Changeset 97231 in vbox for trunk/src

Timestamp:

Oct 19, 2022 9:12:57 AM (3 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

154207

Message:

VMM/CPUM: Define our own X86EFLAGS/X86RFLAGS structures so we can use reserved bits for internal state.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/CPUMAllRegs.cpp (modified) (1 diff)
• VMMAll/IEMAllCImpl.cpp (modified) (2 diffs)
• VMMAll/VMXAllTemplate.cpp.h (modified) (1 diff)
• VMMR3/CPUM.cpp (modified) (6 diffs)
• VMMR3/EM.cpp (modified) (1 diff)
• include/CPUMInternal.h (modified) (1 diff)
• include/IEMMc.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

@@ -184 +184 @@
 {
     return pVCpu->cpum.s.Hyper.dr[7];
+}
+
+
+/**
+ * Checks that the special cookie stored in unused reserved RFLAGS bits
+ *
+ * @retval  true if cookie is ok.
+ * @retval  false if cookie is not ok.
+ * @param   pVM         The cross context VM structure.
+ * @param   pVCpu       The cross context virtual CPU structure.
+ */
+VMM_INT_DECL(bool) CPUMAssertGuestRFlagsCookie(PVM pVM, PVMCPU pVCpu)
+{
+    AssertLogRelMsgReturn(      (pVCpu->cpum.s.Guest.rflags.uBoth & ~(uint64_t)(X86_EFL_LIVE_MASK | X86_EFL_RA1_MASK))
+                             == pVM->cpum.s.fReservedRFlagsCookie
+                          && (pVCpu->cpum.s.Guest.rflags.uBoth & X86_EFL_RA1_MASK) == X86_EFL_RA1_MASK,
+                          ("rflags=%#RX64 vs fReservedRFlagsCookie=%#RX64\n",
+                           pVCpu->cpum.s.Guest.rflags.uBoth, pVM->cpum.s.fReservedRFlagsCookie),
+                          false);
+    return true;
 }
 

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp

@@ -8024 +8024 @@
             || (pVCpu->cpum.GstCtx.ax & 0xf) >= 10)
         {
-            iemAImpl_add_u16(&pVCpu->cpum.GstCtx.ax, 0x106, &pVCpu->cpum.GstCtx.eflags.u32);
+            iemAImpl_add_u16(&pVCpu->cpum.GstCtx.ax, 0x106, &pVCpu->cpum.GstCtx.eflags.uBoth);
             pVCpu->cpum.GstCtx.eflags.Bits.u1AF = 1;
             pVCpu->cpum.GstCtx.eflags.Bits.u1CF = 1;
@@ -8069 +8069 @@
             || (pVCpu->cpum.GstCtx.ax & 0xf) >= 10)
         {
-            iemAImpl_sub_u16(&pVCpu->cpum.GstCtx.ax, 0x106, &pVCpu->cpum.GstCtx.eflags.u32);
+            iemAImpl_sub_u16(&pVCpu->cpum.GstCtx.ax, 0x106, &pVCpu->cpum.GstCtx.eflags.uBoth);
             pVCpu->cpum.GstCtx.eflags.Bits.u1AF = 1;
             pVCpu->cpum.GstCtx.eflags.Bits.u1CF = 1;

trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h

@@ -1805 +1805 @@
            Use 32-bit VMWRITE. */
         uint32_t fEFlags = pVCpu->cpum.GstCtx.eflags.u;
-        Assert(fEFlags & X86_EFL_RA1_MASK);
-        Assert(!(fEFlags & ~(X86_EFL_1 | X86_EFL_LIVE_MASK)));
+        Assert((fEFlags & X86_EFL_RA1_MASK) == X86_EFL_RA1_MASK);
+        AssertMsg(!(fEFlags & ~(X86_EFL_LIVE_MASK | X86_EFL_RA1_MASK)), ("%#x\n", fEFlags));
 
 #ifndef IN_NEM_DARWIN

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -145 +145 @@
 #include <iprt/mem.h>
 #include <iprt/mp.h>
+#include <iprt/rand.h>
 #include <iprt/string.h>
 
@@ -2205 +2206 @@
 
     /*
+     * Generate the RFLAGS cookie.
+     */
+    pVM->cpum.s.fReservedRFlagsCookie = RTRandU64() & ~(CPUMX86EFLAGS_HW_MASK_64 | CPUMX86EFLAGS_INT_MASK_64);
+
+    /*
      * Init the VMX/SVM state.
      *
@@ -2220 +2226 @@
         Assert(pVM->apCpusR3[0]->cpum.s.Guest.hwvirt.enmHwvirt == CPUMHWVIRT_NONE);
 
+    /*
+     * Initialize the general guest CPU state.
+     */
     CPUMR3Reset(pVM);
+
     return VINF_SUCCESS;
 }
@@ -2303 +2313 @@
     pCtx->eip                       = 0x0000fff0;
     pCtx->edx                       = 0x00000600;   /* P6 processor */
-    pCtx->eflags.Bits.u1Reserved0   = 1;
+
+    Assert((pVM->cpum.s.fReservedRFlagsCookie & (X86_EFL_LIVE_MASK | X86_EFL_RAZ_LO_MASK | X86_EFL_RA1_MASK)) == 0);
+    pCtx->rflags.uBoth              = pVM->cpum.s.fReservedRFlagsCookie | X86_EFL_RA1_MASK;
 
     pCtx->cs.Sel                    = 0xf000;
@@ -2495 +2507 @@
     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     {
-        PVMCPU pVCpu = pVM->apCpusR3[idCpu];
-
+        PVMCPU const   pVCpu   = pVM->apCpusR3[idCpu];
+        PCPUMCTX const pGstCtx = &pVCpu->cpum.s.Guest;
+
+        /** @todo ditch this the next time we change the saved state. */
         SSMR3PutStructEx(pSSM, &DummyHyperCtx,           sizeof(DummyHyperCtx),           0, g_aCpumCtxFields, NULL);
 
-        PCPUMCTX pGstCtx = &pVCpu->cpum.s.Guest;
+        uint64_t const fSavedRFlags = pGstCtx->rflags.uBoth;
+        pGstCtx->rflags.uBoth &= CPUMX86EFLAGS_HW_MASK_64; /* Temporarily clear the non-hardware bits in RFLAGS while saving. */
         SSMR3PutStructEx(pSSM, pGstCtx,                  sizeof(*pGstCtx),                0, g_aCpumCtxFields, NULL);
+        pGstCtx->rflags.uBoth  = fSavedRFlags;
+
         SSMR3PutStructEx(pSSM, &pGstCtx->XState.x87,     sizeof(pGstCtx->XState.x87),     0, g_aCpumX87Fields, NULL);
         if (pGstCtx->fXStateMask != 0)
@@ -2922 +2939 @@
             AssertRCReturn(rc, rc);
 
+            /* Deal with the reusing of reserved RFLAGS bits. */
+            pGstCtx->rflags.uBoth |= pVM->cpum.s.fReservedRFlagsCookie;
+
             /* REM and other may have cleared must-be-one fields in DR6 and
                DR7, fix these. */

trunk/src/VBox/VMM/VMMR3/EM.cpp

@@ -2210 +2210 @@
                 fFFDone = false;
 
+#ifdef VBOX_STRICT
+            CPUMAssertGuestRFlagsCookie(pVM, pVCpu);
+#endif
+
             /*
              * Now what to do?

trunk/src/VBox/VMM/include/CPUMInternal.h

@@ -382 +382 @@
     uint8_t                 abPadding1[1];
 
+    /** Random value we store in the reserved RFLAGS bits we don't use ourselves so
+     *  we can detect corruption. */
+    uint64_t                fReservedRFlagsCookie;
+
     /** Align to 64-byte boundary. */
-    uint8_t                 abPadding2[20+4];
+    uint8_t                 abPadding2[16];
 
     /** Host CPU feature information.

trunk/src/VBox/VMM/include/IEMMc.h

@@ -334 +334 @@
 #define IEM_MC_REF_GREG_I64(a_pi64Dst, a_iGReg)         (a_pi64Dst) = (int64_t *)iemGRegRefU64(pVCpu, (a_iGReg))
 #define IEM_MC_REF_GREG_I64_CONST(a_pi64Dst, a_iGReg)   (a_pi64Dst) = (int64_t const *)iemGRegRefU64(pVCpu, (a_iGReg))
-/** @note Not for IOPL or IF testing or modification. */
-#define IEM_MC_REF_EFLAGS(a_pEFlags)                    (a_pEFlags) = &pVCpu->cpum.GstCtx.eflags.u
+/** @note Not for IOPL or IF testing or modification.
+ * @note Must preserve any undefined bits, see CPUMX86EFLAGS! */
+#define IEM_MC_REF_EFLAGS(a_pEFlags)                    (a_pEFlags) = &pVCpu->cpum.GstCtx.eflags.uBoth
 #define IEM_MC_REF_MXCSR(a_pfMxcsr)                     (a_pfMxcsr) = &pVCpu->cpum.GstCtx.XState.x87.MXCSR