Changeset 97289 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Oct 25, 2022 7:56:51 AM (2 years ago)

Author:

vboxsync

Message:

IEM: Clear interrupt shadow flags together with RF.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAll.cpp (modified) (1 diff)
• IEMAllCImpl.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -9929 +9929 @@
      * See if there is an interrupt pending in TRPM, inject it if we can.
      */
-    /** @todo Can we centralize this under CPUMCanInjectInterrupt()? */
-#if defined(VBOX_WITH_NESTED_HWVIRT_SVM) || defined(VBOX_WITH_NESTED_HWVIRT_VMX)
-    bool fIntrEnabled = CPUMGetGuestGif(&pVCpu->cpum.GstCtx);
-    if (fIntrEnabled)
-    {
-        if (!CPUMIsGuestInNestedHwvirtMode(IEM_GET_CTX(pVCpu)))
-            fIntrEnabled = pVCpu->cpum.GstCtx.eflags.Bits.u1IF;
-        else if (CPUMIsGuestInVmxNonRootMode(IEM_GET_CTX(pVCpu)))
-            fIntrEnabled = CPUMIsGuestVmxPhysIntrEnabled(IEM_GET_CTX(pVCpu));
-        else
-        {
-            Assert(CPUMIsGuestInSvmNestedHwVirtMode(IEM_GET_CTX(pVCpu)));
-            fIntrEnabled = CPUMIsGuestSvmPhysIntrEnabled(pVCpu, IEM_GET_CTX(pVCpu));
-        }
-    }
-#else
-    bool fIntrEnabled = pVCpu->cpum.GstCtx.eflags.Bits.u1IF;
-#endif
-
     /** @todo What if we are injecting an exception and not an interrupt? Is that
      *        possible here? For now we assert it is indeed only an interrupt. */
-    if (   fIntrEnabled
-        && TRPMHasTrap(pVCpu)
-        && !CPUMIsInInterruptShadow(&pVCpu->cpum.GstCtx))
-    {
-        uint8_t     u8TrapNo;
-        TRPMEVENT   enmType;
-        uint32_t    uErrCode;
-        RTGCPTR     uCr2;
-        int rc2 = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrCode, &uCr2, NULL /* pu8InstLen */, NULL /* fIcebp */);
-        AssertRC(rc2);
-        Assert(enmType == TRPM_HARDWARE_INT);
-        VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8TrapNo, enmType, (uint16_t)uErrCode, uCr2, 0 /* cbInstr */);
-        TRPMResetTrap(pVCpu);
+    if (!TRPMHasTrap(pVCpu))
+    { /* likely */ }
+    else
+    {
+        if (   !CPUMIsInInterruptShadow(&pVCpu->cpum.GstCtx)
+            && !CPUMAreInterruptsInhibitedByNmi(&pVCpu->cpum.GstCtx))
+        {
+            /** @todo Can we centralize this under CPUMCanInjectInterrupt()? */
 #if defined(VBOX_WITH_NESTED_HWVIRT_SVM) || defined(VBOX_WITH_NESTED_HWVIRT_VMX)
-        /* Injecting an event may cause a VM-exit. */
-        if (   rcStrict != VINF_SUCCESS
-            && rcStrict != VINF_IEM_RAISED_XCPT)
-            return iemExecStatusCodeFiddling(pVCpu, rcStrict);
+            bool fIntrEnabled = CPUMGetGuestGif(&pVCpu->cpum.GstCtx);
+            if (fIntrEnabled)
+            {
+                if (!CPUMIsGuestInNestedHwvirtMode(IEM_GET_CTX(pVCpu)))
+                    fIntrEnabled = pVCpu->cpum.GstCtx.eflags.Bits.u1IF;
+                else if (CPUMIsGuestInVmxNonRootMode(IEM_GET_CTX(pVCpu)))
+                    fIntrEnabled = CPUMIsGuestVmxPhysIntrEnabled(IEM_GET_CTX(pVCpu));
+                else
+                {
+                    Assert(CPUMIsGuestInSvmNestedHwVirtMode(IEM_GET_CTX(pVCpu)));
+                    fIntrEnabled = CPUMIsGuestSvmPhysIntrEnabled(pVCpu, IEM_GET_CTX(pVCpu));
+                }
+            }
 #else
-        NOREF(rcStrict);
+            bool fIntrEnabled = pVCpu->cpum.GstCtx.eflags.Bits.u1IF;
 #endif
+            if (fIntrEnabled)
+            {
+                uint8_t     u8TrapNo;
+                TRPMEVENT   enmType;
+                uint32_t    uErrCode;
+                RTGCPTR     uCr2;
+                int rc2 = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrCode, &uCr2, NULL /*pu8InstLen*/, NULL /*fIcebp*/);
+                AssertRC(rc2);
+                Assert(enmType == TRPM_HARDWARE_INT);
+                VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8TrapNo, enmType, (uint16_t)uErrCode, uCr2, 0 /*cbInstr*/);
+
+                TRPMResetTrap(pVCpu);
+
+#if defined(VBOX_WITH_NESTED_HWVIRT_SVM) || defined(VBOX_WITH_NESTED_HWVIRT_VMX)
+                /* Injecting an event may cause a VM-exit. */
+                if (   rcStrict != VINF_SUCCESS
+                    && rcStrict != VINF_IEM_RAISED_XCPT)
+                    return iemExecStatusCodeFiddling(pVCpu, rcStrict);
+#else
+                NOREF(rcStrict);
+#endif
+            }
+        }
     }
 

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp

@@ -4702 +4702 @@
 IEM_CIMPL_DEF_2(iemCImpl_load_SReg, uint8_t, iSegReg, uint16_t, uSel)
 {
+    if (iSegReg != X86_SREG_SS)
+        return IEM_CIMPL_CALL_2(iemCImpl_LoadSReg, iSegReg, uSel);
+    /** @todo only set it the shadow flag if it was clear before? */
     VBOXSTRICTRC rcStrict = IEM_CIMPL_CALL_2(iemCImpl_LoadSReg, iSegReg, uSel);
-    if (iSegReg == X86_SREG_SS && rcStrict == VINF_SUCCESS)
+    if (rcStrict == VINF_SUCCESS)
         CPUMSetInInterruptShadowSs(&pVCpu->cpum.GstCtx);
     return rcStrict;
@@ -4756 +4759 @@
 
     /*
-     * Commit the stack on success.
+     * Commit the stack on success and set interrupt shadow flag if appropriate
+     * (the latter must be done after updating RIP).
      */
     if (rcStrict == VINF_SUCCESS)
@@ -4762 +4766 @@
         pVCpu->cpum.GstCtx.rsp = TmpRsp.u;
         if (iSegReg == X86_SREG_SS)
+        {
+            /** @todo only set it the shadow flag if it was clear before? */
             CPUMSetInInterruptShadowSs(&pVCpu->cpum.GstCtx);
+        }
     }
     return rcStrict;
@@ -7508 +7515 @@
         fEfl |= X86_EFL_IF;
 
-    /* Commit. */
+    /*
+     * Commit.
+     *
+     * Note! Setting the shadow interrupt flag must be done after RIP updating.
+     */
     IEMMISC_SET_EFL(pVCpu, fEfl);
     iemRegAddToRipAndClearRF(pVCpu, cbInstr);
     if (!(fEflOld & X86_EFL_IF) && (fEfl & X86_EFL_IF))
+    {
+        /** @todo only set it the shadow flag if it was clear before? */
         CPUMSetInInterruptShadowSti(&pVCpu->cpum.GstCtx);
+    }
     Log2(("STI: %#x -> %#x\n", fEflOld, fEfl));
     return VINF_SUCCESS;