VirtualBox

Ignore:
Timestamp:
Apr 14, 2023 3:17:44 PM (23 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
156854
Message:

Devices/EFI/FirmwareNew: Update to edk2-stable202302 and make it build, bugref:4643

Location:
trunk/src/VBox/Devices/EFI/FirmwareNew
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/EFI/FirmwareNew

  • trunk/src/VBox/Devices/EFI/FirmwareNew/IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h

    r89983 r99404  
    66#pragma pack(1)
    77
    8 
    98/** Fsp S Configuration
    109**/
    1110typedef struct {
     11  /** Offset 0x0118 - BMP Logo Data Size
     12    BMP logo data buffer size. 0x00000000(Default).
     13  **/
     14  UINT32    LogoSize;
    1215
    13 /** Offset 0x0118 - BMP Logo Data Size
    14   BMP logo data buffer size. 0x00000000(Default).
    15 **/
    16   UINT32                      LogoSize;
     16  /** Offset 0x011C - BMP Logo Data Pointer
     17    BMP logo data pointer to a BMP format buffer. 0x00000000(Default).
     18  **/
     19  UINT32    LogoPtr;
    1720
    18 /** Offset 0x011C - BMP Logo Data Pointer
    19   BMP logo data pointer to a BMP format buffer. 0x00000000(Default).
    20 **/
    21   UINT32                      LogoPtr;
     21  /** Offset 0x0120 - Graphics Configuration Data Pointer
     22    Graphics configuration data used for initialization. 0x00000000(Default).
     23  **/
     24  UINT32    GraphicsConfigPtr;
    2225
    23 /** Offset 0x0120 - Graphics Configuration Data Pointer
    24   Graphics configuration data used for initialization. 0x00000000(Default).
    25 **/
    26   UINT32                      GraphicsConfigPtr;
     26  /** Offset 0x0124 - PCI GFX Temporary MMIO Base
     27    PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).
     28  **/
     29  UINT32    PciTempResourceBase;
    2730
    28 /** Offset 0x0124 - PCI GFX Temporary MMIO Base
    29   PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).
    30 **/
    31   UINT32                      PciTempResourceBase;
     31  /** Offset 0x0128
     32  **/
     33  UINT8     UnusedUpdSpace1[3];
    3234
    33 /** Offset 0x0128
    34 **/
    35   UINT8                       UnusedUpdSpace1[3];
    36 
    37 /** Offset 0x012B
    38 **/
    39   UINT8                       ReservedFspsUpd;
     35  /** Offset 0x012B
     36  **/
     37  UINT8     ReservedFspsUpd;
    4038} FSP_S_CONFIG;
    4139
    … …  
    4341**/
    4442typedef struct {
     43  /** Offset 0x0000
     44  **/
     45  FSP_UPD_HEADER    FspUpdHeader;
    4546
    46 /** Offset 0x0000
    47 **/
    48   FSP_UPD_HEADER              FspUpdHeader;
     47  /** Offset 0x00F8
     48  **/
     49  FSPS_ARCH_UPD     FspsArchUpd;
    4950
    50 /** Offset 0x00F8
    51 **/
    52   FSPS_ARCH_UPD               FspsArchUpd;
     51  /** Offset 0x0118
     52  **/
     53  FSP_S_CONFIG      FspsConfig;
    5354
    54 /** Offset 0x0118
    55 **/
    56   FSP_S_CONFIG                FspsConfig;
     55  /** Offset 0x012C
     56  **/
     57  UINT8             UnusedUpdSpace2[2];
    5758
    58 /** Offset 0x012C
    59 **/
    60   UINT8                       UnusedUpdSpace2[2];
    61 
    62 /** Offset 0x012E
    63 **/
    64   UINT16                      UpdTerminator;
     59  /** Offset 0x012E
     60  **/
     61  UINT16            UpdTerminator;
    6562} FSPS_UPD;
    6663
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