Changeset 99404 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/MdePkg/Include/Uefi/UefiPxe.h
- Timestamp:
- Apr 14, 2023 3:17:44 PM (2 years ago)
- svn:sync-xref-src-repo-rev:
- 156854
- Location:
- trunk/src/VBox/Devices/EFI/FirmwareNew
- Files:
-
- 2 edited
-
. (modified) (1 prop)
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MdePkg/Include/Uefi/UefiPxe.h (modified) (102 diffs)
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trunk/src/VBox/Devices/EFI/FirmwareNew
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Property svn:mergeinfo
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trunk/src/VBox/Devices/EFI/FirmwareNew/MdePkg/Include/Uefi/UefiPxe.h
r80721 r99404 27 27 /// UNDI ROM ID and devive ID signature. 28 28 /// 29 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')29 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E') 30 30 31 31 /// 32 32 /// BUS ROM ID signatures. 33 33 /// 34 #define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')35 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')36 #define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')37 #define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')34 #define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R') 35 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R') 36 #define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R') 37 #define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4') 38 38 39 39 #define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8)) … … 55 55 (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56)) 56 56 57 58 57 #define PXE_CPBSIZE_NOT_USED 0 ///< zero 59 58 #define PXE_DBSIZE_NOT_USED 0 ///< zero … … 62 61 #define PXE_CONST CONST 63 62 64 #define PXE_VOLATILE 65 66 typedef VOID 67 typedef UINT8 68 typedef UINT16 69 typedef UINT32 70 typedef UINTN 63 #define PXE_VOLATILE volatile 64 65 typedef VOID PXE_VOID; 66 typedef UINT8 PXE_UINT8; 67 typedef UINT16 PXE_UINT16; 68 typedef UINT32 PXE_UINT32; 69 typedef UINTN PXE_UINTN; 71 70 72 71 /// 73 72 /// Typedef unsigned long PXE_UINT64. 74 73 /// 75 typedef UINT64 74 typedef UINT64 PXE_UINT64; 76 75 77 76 typedef PXE_UINT8 PXE_BOOL; 78 #define PXE_FALSE 0///< zero79 #define PXE_TRUE (!PXE_FALSE)80 81 typedef PXE_UINT16 77 #define PXE_FALSE 0 ///< zero 78 #define PXE_TRUE (!PXE_FALSE) 79 80 typedef PXE_UINT16 PXE_OPCODE; 82 81 83 82 /// … … 94 93 /// Change UNDI operational state from Started to Stopped. 95 94 /// 96 #define PXE_OPCODE_STOP 0x000295 #define PXE_OPCODE_STOP 0x0002 97 96 98 97 /// … … 109 108 /// Changed UNDI operational state from Started to Initialized. 110 109 /// 111 #define PXE_OPCODE_INITIALIZE 0x0005110 #define PXE_OPCODE_INITIALIZE 0x0005 112 111 113 112 /// … … 119 118 /// Change the UNDI operational state from Initialized to Started. 120 119 /// 121 #define PXE_OPCODE_SHUTDOWN 0x0007120 #define PXE_OPCODE_SHUTDOWN 0x0007 122 121 123 122 /// … … 139 138 /// Read traffic statistics. 140 139 /// 141 #define PXE_OPCODE_STATISTICS 0x000B140 #define PXE_OPCODE_STATISTICS 0x000B 142 141 143 142 /// … … 149 148 /// Read or change non-volatile storage on the NIC. 150 149 /// 151 #define PXE_OPCODE_NVDATA 0x000D150 #define PXE_OPCODE_NVDATA 0x000D 152 151 153 152 /// 154 153 /// Get & clear interrupt status. 155 154 /// 156 #define PXE_OPCODE_GET_STATUS 0x000E155 #define PXE_OPCODE_GET_STATUS 0x000E 157 156 158 157 /// … … 164 163 /// Transmit packet(s). 165 164 /// 166 #define PXE_OPCODE_TRANSMIT 0x0010165 #define PXE_OPCODE_TRANSMIT 0x0010 167 166 168 167 /// … … 174 173 /// Last valid PXE UNDI OpCode number. 175 174 /// 176 #define PXE_OPCODE_LAST_VALID 0x0011177 178 typedef PXE_UINT16 175 #define PXE_OPCODE_LAST_VALID 0x0011 176 177 typedef PXE_UINT16 PXE_OPFLAGS; 179 178 180 179 #define PXE_OPFLAGS_NOT_USED 0x0000 … … 232 231 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS. 233 232 /// 234 #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000235 #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000236 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000237 #define PXE_OPFLAGS_INTERRUPT_READ 0x0000233 #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000 234 #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000 235 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000 236 #define PXE_OPFLAGS_INTERRUPT_READ 0x0000 238 237 239 238 /// … … 241 240 /// after a complete non-error packet has been received. 242 241 /// 243 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001242 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001 244 243 245 244 /// … … 253 252 /// when command execution stops. 254 253 /// 255 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004254 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004 256 255 257 256 /// … … 277 276 /// set this OpFlag: 278 277 /// 279 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000278 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000 280 279 281 280 /// … … 296 295 /// list will be received. If the filter list is empty, no multicast 297 296 /// 298 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004297 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 299 298 300 299 /// … … 338 337 /// Select the type of non-volatile data operation. 339 338 /// 340 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001341 #define PXE_OPFLAGS_NVDATA_READ 0x0000342 #define PXE_OPFLAGS_NVDATA_WRITE 0x0001339 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001 340 #define PXE_OPFLAGS_NVDATA_READ 0x0000 341 #define PXE_OPFLAGS_NVDATA_WRITE 0x0001 343 342 344 343 /// … … 361 360 /// NICs and UNDIs may transmit multiple buffers per interrupt. 362 361 /// 363 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002362 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002 364 363 365 364 /// 366 365 /// Return current media status. 367 366 /// 368 #define PXE_OPFLAGS_GET_MEDIA_STATUS 367 #define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004 369 368 370 369 /// … … 387 386 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000 388 387 389 #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002390 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002391 #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000388 #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002 389 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002 390 #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000 392 391 393 392 /// … … 400 399 /// PXE STATFLAGS. 401 400 /// 402 typedef PXE_UINT16 401 typedef PXE_UINT16 PXE_STATFLAGS; 403 402 404 403 #define PXE_STATFLAGS_INITIALIZE 0x0000 … … 420 419 /// UNDI Get State. 421 420 /// 422 #define PXE_STATFLAGS_GET_STATE_MASK 0x0003423 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002424 #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001425 #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000421 #define PXE_STATFLAGS_GET_STATE_MASK 0x0003 422 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002 423 #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001 424 #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000 426 425 427 426 /// … … 463 462 /// If set, receive interrupts are enabled. 464 463 /// 465 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001464 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001 466 465 467 466 /// … … 473 472 /// If set, command interrupts are enabled. 474 473 /// 475 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004474 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004 476 475 477 476 /// … … 493 492 /// filter list will be received. 494 493 /// 495 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004494 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 496 495 497 496 /// … … 535 534 /// Use to determine if an interrupt has occurred. 536 535 /// 537 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F538 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000536 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F 537 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000 539 538 540 539 /// … … 546 545 /// If set, at least one transmit interrupt occurred. 547 546 /// 548 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002547 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002 549 548 550 549 /// … … 556 555 /// If set, at least one software interrupt occurred. 557 556 /// 558 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008557 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008 559 558 560 559 /// … … 588 587 /// 589 588 /// UNDI Receive 590 /// .589 /// . 591 590 592 591 /// 593 592 /// No additional StatFlags. 594 593 /// 595 typedef PXE_UINT16 596 597 #define PXE_STATCODE_INITIALIZE 0x0000594 typedef PXE_UINT16 PXE_STATCODE; 595 596 #define PXE_STATCODE_INITIALIZE 0x0000 598 597 599 598 /// … … 601 600 /// and BC protocol functions. 602 601 /// 603 #define PXE_STATCODE_SUCCESS 602 #define PXE_STATCODE_SUCCESS 0x0000 604 603 605 604 #define PXE_STATCODE_INVALID_CDB 0x0001 … … 623 622 #define PXE_STATCODE_NO_DATA 0x0013 624 623 625 typedef PXE_UINT16 624 typedef PXE_UINT16 PXE_IFNUM; 626 625 627 626 /// 628 627 /// This interface number must be passed to the S/W UNDI Start command. 629 628 /// 630 #define PXE_IFNUM_START 0x0000629 #define PXE_IFNUM_START 0x0000 631 630 632 631 /// … … 634 633 /// Start commands if information in the CDB, CPB or DB is invalid. 635 634 /// 636 #define PXE_IFNUM_INVALID 0x0000637 638 typedef PXE_UINT16 635 #define PXE_IFNUM_INVALID 0x0000 636 637 typedef PXE_UINT16 PXE_CONTROL; 639 638 640 639 /// … … 645 644 /// error is returned. 646 645 /// 647 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002646 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002 648 647 649 648 /// … … 657 656 #define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000 658 657 659 typedef PXE_UINT8 660 661 #define PXE_FRAME_TYPE_NONE 662 #define PXE_FRAME_TYPE_UNICAST 663 #define PXE_FRAME_TYPE_BROADCAST 664 #define PXE_FRAME_TYPE_FILTERED_MULTICAST 665 #define PXE_FRAME_TYPE_PROMISCUOUS 666 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 667 668 #define PXE_FRAME_TYPE_MULTICAST 669 670 typedef PXE_UINT32 671 672 typedef PXE_UINT32 658 typedef PXE_UINT8 PXE_FRAME_TYPE; 659 660 #define PXE_FRAME_TYPE_NONE 0x00 661 #define PXE_FRAME_TYPE_UNICAST 0x01 662 #define PXE_FRAME_TYPE_BROADCAST 0x02 663 #define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03 664 #define PXE_FRAME_TYPE_PROMISCUOUS 0x04 665 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05 666 667 #define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST 668 669 typedef PXE_UINT32 PXE_IPV4; 670 671 typedef PXE_UINT32 PXE_IPV6[4]; 673 672 #define PXE_MAC_LENGTH 32 674 673 675 typedef PXE_UINT8 676 677 typedef PXE_UINT8 678 typedef UINT16 674 typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH]; 675 676 typedef PXE_UINT8 PXE_IFTYPE; 677 typedef UINT16 PXE_MEDIA_PROTOCOL; 679 678 680 679 /// … … 710 709 711 710 typedef struct s_pxe_hw_undi { 712 PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.713 PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI).714 PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero.715 PXE_UINT8 Rev; ///< PXE_ROMID_REV.716 PXE_UINT8 IFcnt; ///< physical connector count lower byte.717 PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.718 PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.719 PXE_UINT8 IFcntExt; ///< physical connector count upper byte.720 PXE_UINT8 reserved; ///< zero, not used.721 PXE_UINT32 Implementation; ///< implementation flags.711 PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE. 712 PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI). 713 PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero. 714 PXE_UINT8 Rev; ///< PXE_ROMID_REV. 715 PXE_UINT8 IFcnt; ///< physical connector count lower byte. 716 PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER. 717 PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER. 718 PXE_UINT8 IFcntExt; ///< physical connector count upper byte. 719 PXE_UINT8 reserved; ///< zero, not used. 720 PXE_UINT32 Implementation; ///< implementation flags. 722 721 ///< reserved ///< vendor use. 723 722 ///< UINT32 Status; ///< status port. … … 743 742 /// If set, last command failed. 744 743 /// 745 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000744 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000 746 745 747 746 /// 748 747 /// If set, identifies enabled receive filters. 749 748 /// 750 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000751 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800752 #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400753 #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200754 #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100749 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000 750 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800 751 #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400 752 #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200 753 #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100 755 754 756 755 /// 757 756 /// If set, identifies enabled external interrupts. 758 757 /// 759 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080760 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040761 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020762 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010758 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080 759 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040 760 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020 761 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010 763 762 764 763 /// 765 764 /// If set, identifies pending interrupts. 766 765 /// 767 #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008768 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004769 #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002770 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001766 #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008 767 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004 768 #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002 769 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001 771 770 772 771 /// … … 784 783 /// Use these to enable/disable receive filters. 785 784 /// 786 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000787 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800788 #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400789 #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200790 #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100785 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000 786 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800 787 #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400 788 #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200 789 #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100 791 790 792 791 /// 793 792 /// Use these to enable/disable external interrupts. 794 793 /// 795 #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080796 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040797 #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020798 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010794 #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080 795 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040 796 #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020 797 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010 799 798 800 799 /// … … 807 806 808 807 typedef struct s_pxe_sw_undi { 809 PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.810 PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI).811 PXE_UINT8 Fudge; ///< makes 8-bit cksum zero.812 PXE_UINT8 Rev; ///< PXE_ROMID_REV.813 PXE_UINT8 IFcnt; ///< physical connector count lower byte.814 PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.815 PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.816 PXE_UINT8 IFcntExt; ///< physical connector count upper byte.817 PXE_UINT8 reserved1; ///< zero, not used.818 PXE_UINT32 Implementation; ///< Implementation flags.819 PXE_UINT64 EntryPoint; ///< API entry point.820 PXE_UINT8 reserved2[3]; ///< zero, not used.821 PXE_UINT8 BusCnt; ///< number of bustypes supported.822 PXE_UINT32 BusType[1]; ///< list of supported bustypes.808 PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE. 809 PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI). 810 PXE_UINT8 Fudge; ///< makes 8-bit cksum zero. 811 PXE_UINT8 Rev; ///< PXE_ROMID_REV. 812 PXE_UINT8 IFcnt; ///< physical connector count lower byte. 813 PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER. 814 PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER. 815 PXE_UINT8 IFcntExt; ///< physical connector count upper byte. 816 PXE_UINT8 reserved1; ///< zero, not used. 817 PXE_UINT32 Implementation; ///< Implementation flags. 818 PXE_UINT64 EntryPoint; ///< API entry point. 819 PXE_UINT8 reserved2[3]; ///< zero, not used. 820 PXE_UINT8 BusCnt; ///< number of bustypes supported. 821 PXE_UINT32 BusType[1]; ///< list of supported bustypes. 823 822 } PXE_SW_UNDI; 824 823 825 824 typedef union u_pxe_undi { 826 PXE_HW_UNDI hw;827 PXE_SW_UNDI sw;825 PXE_HW_UNDI hw; 826 PXE_SW_UNDI sw; 828 827 } PXE_UNDI; 829 828 … … 831 830 /// Signature of !PXE structure. 832 831 /// 833 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')832 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E') 834 833 835 834 /// 836 835 /// !PXE structure format revision 837 /// .838 #define PXE_ROMID_REV 0x02836 /// . 837 #define PXE_ROMID_REV 0x02 839 838 840 839 /// … … 843 842 /// and PXE Boot Server Request packets. 844 843 /// 845 #define PXE_ROMID_MAJORVER 846 #define PXE_ROMID_MINORVER 844 #define PXE_ROMID_MAJORVER 0x03 845 #define PXE_ROMID_MINORVER 0x01 847 846 848 847 /// … … 873 872 874 873 typedef struct s_pxe_cdb { 875 PXE_OPCODE OpCode;876 PXE_OPFLAGS OpFlags;877 PXE_UINT16 CPBsize;878 PXE_UINT16 DBsize;879 PXE_UINT64 CPBaddr;880 PXE_UINT64 DBaddr;881 PXE_STATCODE StatCode;882 PXE_STATFLAGS StatFlags;883 PXE_UINT16 IFnum;884 PXE_CONTROL Control;874 PXE_OPCODE OpCode; 875 PXE_OPFLAGS OpFlags; 876 PXE_UINT16 CPBsize; 877 PXE_UINT16 DBsize; 878 PXE_UINT64 CPBaddr; 879 PXE_UINT64 DBaddr; 880 PXE_STATCODE StatCode; 881 PXE_STATFLAGS StatFlags; 882 PXE_UINT16 IFnum; 883 PXE_CONTROL Control; 885 884 } PXE_CDB; 886 885 887 886 typedef union u_pxe_ip_addr { 888 PXE_IPV6 IPv6;889 PXE_IPV4 IPv4;887 PXE_IPV6 IPv6; 888 PXE_IPV4 IPv4; 890 889 } PXE_IP_ADDR; 891 890 … … 902 901 /// PCC BusType definitions. 903 902 /// 904 PXE_UINT32 BusType;903 PXE_UINT32 BusType; 905 904 906 905 /// 907 906 /// Bus, device & function numbers that locate this device. 908 907 /// 909 PXE_UINT16 Bus; 910 PXE_UINT8 Device; 911 PXE_UINT8 Function; 912 } 913 PCI, PCC; 914 908 PXE_UINT16 Bus; 909 PXE_UINT8 Device; 910 PXE_UINT8 Function; 911 } PCI, PCC; 915 912 } PXE_DEVICE; 916 913 … … 918 915 /// cpb and db definitions 919 916 /// 920 #define MAX_PCI_CONFIG_LEN 64 ///< # of dwords.921 #define MAX_EEPROM_LEN 128 ///< # of dwords.922 #define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done.923 #define MAX_MCAST_ADDRESS_CNT 8917 #define MAX_PCI_CONFIG_LEN 64 ///< # of dwords. 918 #define MAX_EEPROM_LEN 128 ///< # of dwords. 919 #define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done. 920 #define MAX_MCAST_ADDRESS_CNT 8 924 921 925 922 typedef struct s_pxe_cpb_start_30 { … … 934 931 /// This field cannot be set to zero. 935 932 /// 936 UINT64 Delay;933 UINT64 Delay; 937 934 938 935 /// … … 950 947 /// This field cannot be set to zero. 951 948 /// 952 UINT64 Block;949 UINT64 Block; 953 950 954 951 /// … … 964 961 /// are equal. 965 962 /// 966 UINT64 Virt2Phys;963 UINT64 Virt2Phys; 967 964 /// 968 965 /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port, … … 975 972 /// This field can not be set to zero. 976 973 /// 977 UINT64 Mem_IO;974 UINT64 Mem_IO; 978 975 } PXE_CPB_START_30; 979 976 … … 989 986 /// This field cannot be set to zero. 990 987 /// 991 UINT64 Delay;988 UINT64 Delay; 992 989 993 990 /// … … 1005 1002 /// This field cannot be set to zero. 1006 1003 /// 1007 UINT64 Block;1004 UINT64 Block; 1008 1005 1009 1006 /// … … 1019 1016 /// are equal. 1020 1017 /// 1021 UINT64 Virt2Phys;1018 UINT64 Virt2Phys; 1022 1019 /// 1023 1020 /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port, … … 1030 1027 /// This field can not be set to zero. 1031 1028 /// 1032 UINT64 Mem_IO;1029 UINT64 Mem_IO; 1033 1030 /// 1034 1031 /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size, … … 1047 1044 /// This field can be set to zero if there is no mapping service available. 1048 1045 /// 1049 UINT64 Map_Mem;1046 UINT64 Map_Mem; 1050 1047 1051 1048 /// … … 1058 1055 /// This field can be set to zero if there is no unmapping service available. 1059 1056 /// 1060 UINT64 UnMap_Mem;1057 UINT64 UnMap_Mem; 1061 1058 1062 1059 /// … … 1070 1067 /// This field can be set to zero if there is no service available. 1071 1068 /// 1072 UINT64 Sync_Mem;1069 UINT64 Sync_Mem; 1073 1070 1074 1071 /// … … 1078 1075 /// when calling for that interface! 1079 1076 /// 1080 UINT64 Unique_ID;1077 UINT64 Unique_ID; 1081 1078 } PXE_CPB_START_31; 1082 1079 1083 #define TO_AND_FROM_DEVICE 1084 #define FROM_DEVICE 1085 #define TO_DEVICE 1086 1087 #define PXE_DELAY_MILLISECOND 10001088 #define PXE_DELAY_SECOND 10000001089 #define PXE_IO_READ 01090 #define PXE_IO_WRITE 11091 #define PXE_MEM_READ 21092 #define PXE_MEM_WRITE 41080 #define TO_AND_FROM_DEVICE 0 1081 #define FROM_DEVICE 1 1082 #define TO_DEVICE 2 1083 1084 #define PXE_DELAY_MILLISECOND 1000 1085 #define PXE_DELAY_SECOND 1000000 1086 #define PXE_IO_READ 0 1087 #define PXE_IO_WRITE 1 1088 #define PXE_MEM_READ 2 1089 #define PXE_MEM_WRITE 4 1093 1090 1094 1091 typedef struct s_pxe_db_get_init_info { … … 1101 1098 /// use system memory to receive and transmit packets. 1102 1099 /// 1103 PXE_UINT32 MemoryRequired;1100 PXE_UINT32 MemoryRequired; 1104 1101 1105 1102 /// 1106 1103 /// Maximum frame data length for Tx/Rx excluding the media header. 1107 1104 /// 1108 PXE_UINT32 FrameDataLen;1105 PXE_UINT32 FrameDataLen; 1109 1106 1110 1107 /// … … 1113 1110 /// filled. 1114 1111 /// 1115 PXE_UINT32 LinkSpeeds[4];1112 PXE_UINT32 LinkSpeeds[4]; 1116 1113 1117 1114 /// 1118 1115 /// Number of non-volatile storage items. 1119 1116 /// 1120 PXE_UINT32 NvCount;1117 PXE_UINT32 NvCount; 1121 1118 1122 1119 /// 1123 1120 /// Width of non-volatile storage item in bytes. 0, 1, 2 or 4 1124 1121 /// 1125 PXE_UINT16 NvWidth;1122 PXE_UINT16 NvWidth; 1126 1123 1127 1124 /// … … 1130 1127 /// and transmit buffers. 1131 1128 /// 1132 PXE_UINT16 MediaHeaderLen;1129 PXE_UINT16 MediaHeaderLen; 1133 1130 1134 1131 /// 1135 1132 /// Number of bytes in the NIC hardware (MAC) address. 1136 1133 /// 1137 PXE_UINT16 HWaddrLen;1134 PXE_UINT16 HWaddrLen; 1138 1135 1139 1136 /// … … 1141 1138 /// MAC address filter list. 1142 1139 /// 1143 PXE_UINT16 MCastFilterCnt;1140 PXE_UINT16 MCastFilterCnt; 1144 1141 1145 1142 /// … … 1150 1147 /// memory on the NIC. 1151 1148 /// 1152 PXE_UINT16 TxBufCnt;1153 PXE_UINT16 TxBufSize;1154 PXE_UINT16 RxBufCnt;1155 PXE_UINT16 RxBufSize;1149 PXE_UINT16 TxBufCnt; 1150 PXE_UINT16 TxBufSize; 1151 PXE_UINT16 RxBufCnt; 1152 PXE_UINT16 RxBufSize; 1156 1153 1157 1154 /// … … 1160 1157 /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros. 1161 1158 /// 1162 PXE_UINT8 IFtype;1159 PXE_UINT8 IFtype; 1163 1160 1164 1161 /// 1165 1162 /// Supported duplex. See PXE_DUPLEX_xxxxx #defines below. 1166 1163 /// 1167 PXE_UINT8 SupportedDuplexModes;1164 PXE_UINT8 SupportedDuplexModes; 1168 1165 1169 1166 /// 1170 1167 /// Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below. 1171 1168 /// 1172 PXE_UINT8 SupportedLoopBackModes;1169 PXE_UINT8 SupportedLoopBackModes; 1173 1170 } PXE_DB_GET_INIT_INFO; 1174 1171 1175 #define PXE_MAX_TXRX_UNIT_ETHER 1176 1177 #define PXE_HWADDR_LEN_ETHER 1178 #define PXE_MAC_HEADER_LEN_ETHER 1172 #define PXE_MAX_TXRX_UNIT_ETHER 1500 1173 1174 #define PXE_HWADDR_LEN_ETHER 0x0006 1175 #define PXE_MAC_HEADER_LEN_ETHER 0x000E 1179 1176 1180 1177 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1 1181 1178 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2 1182 1179 1183 #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1184 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 1180 #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1 1181 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2 1185 1182 1186 1183 typedef struct s_pxe_pci_config_info { … … 1189 1186 /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI. 1190 1187 /// 1191 UINT32 BusType;1188 UINT32 BusType; 1192 1189 1193 1190 /// … … 1195 1192 /// is bound to. 1196 1193 /// 1197 UINT16 Bus;1198 UINT8 Device;1199 UINT8 Function;1194 UINT16 Bus; 1195 UINT8 Device; 1196 UINT8 Function; 1200 1197 1201 1198 /// … … 1204 1201 /// 1205 1202 union { 1206 UINT8 Byte[256];1207 UINT16 Word[128];1208 UINT32 Dword[64];1203 UINT8 Byte[256]; 1204 UINT16 Word[128]; 1205 UINT32 Dword[64]; 1209 1206 } Config; 1210 1207 } PXE_PCI_CONFIG_INFO; … … 1215 1212 /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC. 1216 1213 /// 1217 PXE_UINT32 BusType;1214 PXE_UINT32 BusType; 1218 1215 1219 1216 /// … … 1221 1218 /// is bound to. 1222 1219 /// 1223 PXE_UINT16 Bus;1224 PXE_UINT8 Device;1225 PXE_UINT8 Function;1220 PXE_UINT16 Bus; 1221 PXE_UINT8 Device; 1222 PXE_UINT8 Function; 1226 1223 1227 1224 /// … … 1230 1227 /// 1231 1228 union { 1232 PXE_UINT8 Byte[256];1233 PXE_UINT16 Word[128];1234 PXE_UINT32 Dword[64];1229 PXE_UINT8 Byte[256]; 1230 PXE_UINT16 Word[128]; 1231 PXE_UINT32 Dword[64]; 1235 1232 } Config; 1236 1233 } PXE_PCC_CONFIG_INFO; 1237 1234 1238 1235 typedef union u_pxe_db_get_config_info { 1239 PXE_PCI_CONFIG_INFO pci;1240 PXE_PCC_CONFIG_INFO pcc;1236 PXE_PCI_CONFIG_INFO pci; 1237 PXE_PCC_CONFIG_INFO pcc; 1241 1238 } PXE_DB_GET_CONFIG_INFO; 1242 1239 … … 1247 1244 /// will be using this for transmit and receive buffering. 1248 1245 /// 1249 PXE_UINT64 MemoryAddr;1246 PXE_UINT64 MemoryAddr; 1250 1247 1251 1248 /// … … 1253 1250 /// returned by the Get Init Info command. 1254 1251 /// 1255 PXE_UINT32 MemoryLength;1252 PXE_UINT32 MemoryLength; 1256 1253 1257 1254 /// … … 1260 1257 /// default link speed (operation depends on UNDI/NIC functionality). 1261 1258 /// 1262 PXE_UINT32 LinkSpeed;1259 PXE_UINT32 LinkSpeed; 1263 1260 1264 1261 /// … … 1272 1269 /// counts and sizes as it sees fit. 1273 1270 /// 1274 PXE_UINT16 TxBufCnt;1275 PXE_UINT16 TxBufSize;1276 PXE_UINT16 RxBufCnt;1277 PXE_UINT16 RxBufSize;1271 PXE_UINT16 TxBufCnt; 1272 PXE_UINT16 TxBufSize; 1273 PXE_UINT16 RxBufCnt; 1274 PXE_UINT16 RxBufSize; 1278 1275 1279 1276 /// … … 1281 1278 /// to use the default values. 1282 1279 /// 1283 PXE_UINT8 DuplexMode;1284 1285 PXE_UINT8 LoopBackMode;1280 PXE_UINT8 DuplexMode; 1281 1282 PXE_UINT8 LoopBackMode; 1286 1283 } PXE_CPB_INITIALIZE; 1287 1284 1288 #define PXE_DUPLEX_DEFAULT 0x001289 #define PXE_FORCE_FULL_DUPLEX 0x011290 #define PXE_ENABLE_FULL_DUPLEX 0x021291 #define PXE_FORCE_HALF_DUPLEX 0x041292 #define PXE_DISABLE_FULL_DUPLEX 0x081293 1294 #define LOOPBACK_NORMAL 1295 #define LOOPBACK_INTERNAL 1296 #define LOOPBACK_EXTERNAL 1285 #define PXE_DUPLEX_DEFAULT 0x00 1286 #define PXE_FORCE_FULL_DUPLEX 0x01 1287 #define PXE_ENABLE_FULL_DUPLEX 0x02 1288 #define PXE_FORCE_HALF_DUPLEX 0x04 1289 #define PXE_DISABLE_FULL_DUPLEX 0x08 1290 1291 #define LOOPBACK_NORMAL 0 1292 #define LOOPBACK_INTERNAL 1 1293 #define LOOPBACK_EXTERNAL 2 1297 1294 1298 1295 typedef struct s_pxe_db_initialize { … … 1305 1302 /// lowest memory buffer address. 1306 1303 /// 1307 PXE_UINT32 MemoryUsed;1304 PXE_UINT32 MemoryUsed; 1308 1305 1309 1306 /// … … 1311 1308 /// allocated. 1312 1309 /// 1313 PXE_UINT16 TxBufCnt;1314 PXE_UINT16 TxBufSize;1315 PXE_UINT16 RxBufCnt;1316 PXE_UINT16 RxBufSize;1310 PXE_UINT16 TxBufCnt; 1311 PXE_UINT16 TxBufSize; 1312 PXE_UINT16 RxBufCnt; 1313 PXE_UINT16 RxBufSize; 1317 1314 } PXE_DB_INITIALIZE; 1318 1315 … … 1322 1319 /// replace the existing multicast MAC address filter list. 1323 1320 /// 1324 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];1321 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT]; 1325 1322 } PXE_CPB_RECEIVE_FILTERS; 1326 1323 … … 1329 1326 /// Filtered multicast MAC address list. 1330 1327 /// 1331 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];1328 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT]; 1332 1329 } PXE_DB_RECEIVE_FILTERS; 1333 1330 … … 1337 1334 /// will be changed. 1338 1335 /// 1339 PXE_MAC_ADDR StationAddr;1336 PXE_MAC_ADDR StationAddr; 1340 1337 } PXE_CPB_STATION_ADDRESS; 1341 1338 … … 1344 1341 /// Current station MAC address. 1345 1342 /// 1346 PXE_MAC_ADDR StationAddr;1343 PXE_MAC_ADDR StationAddr; 1347 1344 1348 1345 /// 1349 1346 /// Station broadcast MAC address. 1350 1347 /// 1351 PXE_MAC_ADDR BroadcastAddr;1348 PXE_MAC_ADDR BroadcastAddr; 1352 1349 1353 1350 /// 1354 1351 /// Permanent station MAC address. 1355 1352 /// 1356 PXE_MAC_ADDR PermanentAddr;1353 PXE_MAC_ADDR PermanentAddr; 1357 1354 } PXE_DB_STATION_ADDRESS; 1358 1355 … … 1367 1364 /// Etc. 1368 1365 /// 1369 PXE_UINT64 Supported;1366 PXE_UINT64 Supported; 1370 1367 1371 1368 /// 1372 1369 /// Statistic data. 1373 1370 /// 1374 PXE_UINT64 Data[64];1371 PXE_UINT64 Data[64]; 1375 1372 } PXE_DB_STATISTICS; 1376 1373 … … 1384 1381 /// Number of valid frames received and copied into receive buffers. 1385 1382 /// 1386 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x011383 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01 1387 1384 1388 1385 /// … … 1396 1393 /// media. This would be >1500 for ethernet. 1397 1394 /// 1398 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x031395 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03 1399 1396 1400 1397 /// … … 1427 1424 /// and dropped frames. 1428 1425 /// 1429 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x091426 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09 1430 1427 1431 1428 /// … … 1446 1443 /// Number of collisions detection on this subnet. 1447 1444 /// 1448 #define PXE_STATISTICS_COLLISIONS 0x141445 #define PXE_STATISTICS_COLLISIONS 0x14 1449 1446 1450 1447 /// 1451 1448 /// Number of frames destined for unsupported protocol. 1452 1449 /// 1453 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x151450 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15 1454 1451 1455 1452 /// 1456 1453 /// Number of valid frames received that were duplicated. 1457 1454 /// 1458 #define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x161455 #define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x16 1459 1456 1460 1457 /// 1461 1458 /// Number of encrypted frames received that failed to decrypt. 1462 1459 /// 1463 #define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x171460 #define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x17 1464 1461 1465 1462 /// 1466 1463 /// Number of frames that failed to transmit after exceeding the retry limit. 1467 1464 /// 1468 #define PXE_STATISTICS_TX_ERROR_FRAMES 0x181465 #define PXE_STATISTICS_TX_ERROR_FRAMES 0x18 1469 1466 1470 1467 /// 1471 1468 /// Number of frames transmitted successfully after more than one attempt. 1472 1469 /// 1473 #define PXE_STATISTICS_TX_RETRY_FRAMES 0x191470 #define PXE_STATISTICS_TX_RETRY_FRAMES 0x19 1474 1471 1475 1472 typedef struct s_pxe_cpb_mcast_ip_to_mac { … … 1477 1474 /// Multicast IP address to be converted to multicast MAC address. 1478 1475 /// 1479 PXE_IP_ADDR IP;1476 PXE_IP_ADDR IP; 1480 1477 } PXE_CPB_MCAST_IP_TO_MAC; 1481 1478 … … 1484 1481 /// Multicast MAC address. 1485 1482 /// 1486 PXE_MAC_ADDR MAC;1483 PXE_MAC_ADDR MAC; 1487 1484 } PXE_DB_MCAST_IP_TO_MAC; 1488 1485 … … 1495 1492 /// Non-volatile storage address to be changed. 1496 1493 /// 1497 PXE_UINT32 Addr;1494 PXE_UINT32 Addr; 1498 1495 1499 1496 /// … … 1501 1498 /// 1502 1499 union { 1503 PXE_UINT8 Byte;1504 PXE_UINT16 Word;1505 PXE_UINT32 Dword;1500 PXE_UINT8 Byte; 1501 PXE_UINT16 Word; 1502 PXE_UINT32 Dword; 1506 1503 } Data; 1507 1504 } Item[MAX_EEPROM_LEN]; … … 1516 1513 /// Array of byte-wide data items. 1517 1514 /// 1518 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];1515 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2]; 1519 1516 1520 1517 /// 1521 1518 /// Array of word-wide data items. 1522 1519 /// 1523 PXE_UINT16 Word[MAX_EEPROM_LEN << 1];1520 PXE_UINT16 Word[MAX_EEPROM_LEN << 1]; 1524 1521 1525 1522 /// 1526 1523 /// Array of dword-wide data items. 1527 1524 /// 1528 PXE_UINT32 Dword[MAX_EEPROM_LEN];1525 PXE_UINT32 Dword[MAX_EEPROM_LEN]; 1529 1526 } PXE_CPB_NVDATA_BULK; 1530 1527 … … 1537 1534 /// Array of byte-wide data items. 1538 1535 /// 1539 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];1536 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2]; 1540 1537 1541 1538 /// 1542 1539 /// Array of word-wide data items. 1543 1540 /// 1544 PXE_UINT16 Word[MAX_EEPROM_LEN << 1];1541 PXE_UINT16 Word[MAX_EEPROM_LEN << 1]; 1545 1542 1546 1543 /// 1547 1544 /// Array of dword-wide data items. 1548 1545 /// 1549 PXE_UINT32 Dword[MAX_EEPROM_LEN];1546 PXE_UINT32 Dword[MAX_EEPROM_LEN]; 1550 1547 } Data; 1551 1548 } PXE_DB_NVDATA; … … 1556 1553 /// there is no next receive frame available. 1557 1554 /// 1558 PXE_UINT32 RxFrameLen;1555 PXE_UINT32 RxFrameLen; 1559 1556 1560 1557 /// 1561 1558 /// Reserved, set to zero. 1562 1559 /// 1563 PXE_UINT32 reserved;1560 PXE_UINT32 reserved; 1564 1561 1565 1562 /// 1566 1563 /// Addresses of transmitted buffers that need to be recycled. 1567 1564 /// 1568 PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];1565 PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS]; 1569 1566 } PXE_DB_GET_STATUS; 1570 1567 … … 1574 1571 /// the media header without doing byte swapping. 1575 1572 /// 1576 PXE_MAC_ADDR SrcAddr;1577 PXE_MAC_ADDR DestAddr;1573 PXE_MAC_ADDR SrcAddr; 1574 PXE_MAC_ADDR DestAddr; 1578 1575 1579 1576 /// … … 1581 1578 /// follows the last byte of the media header. 1582 1579 /// 1583 PXE_UINT64 1580 PXE_UINT64 MediaHeader; 1584 1581 1585 1582 /// 1586 1583 /// Length of packet data in bytes (not including the media header). 1587 1584 /// 1588 PXE_UINT32 1585 PXE_UINT32 PacketLen; 1589 1586 1590 1587 /// … … 1593 1590 /// the Assigned Numbers RFC 1700. 1594 1591 /// 1595 PXE_UINT16 1592 PXE_UINT16 Protocol; 1596 1593 1597 1594 /// 1598 1595 /// Length of the media header in bytes. 1599 1596 /// 1600 PXE_UINT16 1597 PXE_UINT16 MediaHeaderLen; 1601 1598 } PXE_CPB_FILL_HEADER; 1602 1599 1603 #define PXE_PROTOCOL_ETHERNET_IP 0x08001604 #define PXE_PROTOCOL_ETHERNET_ARP 0x08061605 #define MAX_XMIT_FRAGMENTS 161600 #define PXE_PROTOCOL_ETHERNET_IP 0x0800 1601 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806 1602 #define MAX_XMIT_FRAGMENTS 16 1606 1603 1607 1604 typedef struct s_pxe_cpb_fill_header_fragmented { … … 1610 1607 /// the media header without doing byte swapping. 1611 1608 /// 1612 PXE_MAC_ADDR SrcAddr;1613 PXE_MAC_ADDR DestAddr;1609 PXE_MAC_ADDR SrcAddr; 1610 PXE_MAC_ADDR DestAddr; 1614 1611 1615 1612 /// 1616 1613 /// Length of packet data in bytes (not including the media header). 1617 1614 /// 1618 PXE_UINT32 PacketLen;1615 PXE_UINT32 PacketLen; 1619 1616 1620 1617 /// … … 1623 1620 /// the Assigned Numbers RFC 1700. 1624 1621 /// 1625 PXE_MEDIA_PROTOCOL Protocol;1622 PXE_MEDIA_PROTOCOL Protocol; 1626 1623 1627 1624 /// 1628 1625 /// Length of the media header in bytes. 1629 1626 /// 1630 PXE_UINT16 MediaHeaderLen;1627 PXE_UINT16 MediaHeaderLen; 1631 1628 1632 1629 /// 1633 1630 /// Number of packet fragment descriptors. 1634 1631 /// 1635 PXE_UINT16 FragCnt;1632 PXE_UINT16 FragCnt; 1636 1633 1637 1634 /// 1638 1635 /// Reserved, must be set to zero. 1639 1636 /// 1640 PXE_UINT16 reserved;1637 PXE_UINT16 reserved; 1641 1638 1642 1639 /// … … 1648 1645 /// Address of this packet fragment. 1649 1646 /// 1650 PXE_UINT64 FragAddr;1647 PXE_UINT64 FragAddr; 1651 1648 1652 1649 /// 1653 1650 /// Length of this packet fragment. 1654 1651 /// 1655 PXE_UINT32 FragLen;1652 PXE_UINT32 FragLen; 1656 1653 1657 1654 /// 1658 1655 /// Reserved, must be set to zero. 1659 1656 /// 1660 PXE_UINT32 reserved;1657 PXE_UINT32 reserved; 1661 1658 } FragDesc[MAX_XMIT_FRAGMENTS]; 1662 } 1663 PXE_CPB_FILL_HEADER_FRAGMENTED; 1659 } PXE_CPB_FILL_HEADER_FRAGMENTED; 1664 1660 1665 1661 typedef struct s_pxe_cpb_transmit { … … 1668 1664 /// of the media header. 1669 1665 /// 1670 PXE_UINT64 FrameAddr;1666 PXE_UINT64 FrameAddr; 1671 1667 1672 1668 /// … … 1674 1670 /// include the length of the media header. 1675 1671 /// 1676 PXE_UINT32 DataLen;1672 PXE_UINT32 DataLen; 1677 1673 1678 1674 /// 1679 1675 /// Length of the media header in bytes. 1680 1676 /// 1681 PXE_UINT16 MediaheaderLen;1677 PXE_UINT16 MediaheaderLen; 1682 1678 1683 1679 /// 1684 1680 /// Reserved, must be zero. 1685 1681 /// 1686 PXE_UINT16 reserved;1682 PXE_UINT16 reserved; 1687 1683 } PXE_CPB_TRANSMIT; 1688 1684 … … 1691 1687 /// Length of packet data in bytes (not including the media header). 1692 1688 /// 1693 PXE_UINT32 FrameLen;1689 PXE_UINT32 FrameLen; 1694 1690 1695 1691 /// 1696 1692 /// Length of the media header in bytes. 1697 1693 /// 1698 PXE_UINT16 MediaheaderLen;1694 PXE_UINT16 MediaheaderLen; 1699 1695 1700 1696 /// 1701 1697 /// Number of packet fragment descriptors. 1702 1698 /// 1703 PXE_UINT16 FragCnt;1699 PXE_UINT16 FragCnt; 1704 1700 1705 1701 /// … … 1711 1707 /// Address of this frame fragment. 1712 1708 /// 1713 PXE_UINT64 FragAddr;1709 PXE_UINT64 FragAddr; 1714 1710 1715 1711 /// 1716 1712 /// Length of this frame fragment. 1717 1713 /// 1718 PXE_UINT32 FragLen;1714 PXE_UINT32 FragLen; 1719 1715 1720 1716 /// 1721 1717 /// Reserved, must be set to zero. 1722 1718 /// 1723 PXE_UINT32 reserved;1719 PXE_UINT32 reserved; 1724 1720 } FragDesc[MAX_XMIT_FRAGMENTS]; 1725 } 1726 PXE_CPB_TRANSMIT_FRAGMENTS; 1721 } PXE_CPB_TRANSMIT_FRAGMENTS; 1727 1722 1728 1723 typedef struct s_pxe_cpb_receive { … … 1731 1726 /// of the frame header. 1732 1727 /// 1733 PXE_UINT64 BufferAddr;1728 PXE_UINT64 BufferAddr; 1734 1729 1735 1730 /// … … 1738 1733 /// the received frame, data will be lost. 1739 1734 /// 1740 PXE_UINT32 BufferLen;1735 PXE_UINT32 BufferLen; 1741 1736 1742 1737 /// 1743 1738 /// Reserved, must be set to zero. 1744 1739 /// 1745 PXE_UINT32 reserved;1740 PXE_UINT32 reserved; 1746 1741 } PXE_CPB_RECEIVE; 1747 1742 … … 1750 1745 /// Source and destination MAC addresses from media header. 1751 1746 /// 1752 PXE_MAC_ADDR SrcAddr;1753 PXE_MAC_ADDR DestAddr;1747 PXE_MAC_ADDR SrcAddr; 1748 PXE_MAC_ADDR DestAddr; 1754 1749 1755 1750 /// … … 1758 1753 /// if data was lost because the receive buffer was too small. 1759 1754 /// 1760 PXE_UINT32 FrameLen;1755 PXE_UINT32 FrameLen; 1761 1756 1762 1757 /// 1763 1758 /// Protocol type from media header. 1764 1759 /// 1765 PXE_MEDIA_PROTOCOL Protocol;1760 PXE_MEDIA_PROTOCOL Protocol; 1766 1761 1767 1762 /// 1768 1763 /// Length of media header in received frame. 1769 1764 /// 1770 PXE_UINT16 MediaHeaderLen;1765 PXE_UINT16 MediaHeaderLen; 1771 1766 1772 1767 /// 1773 1768 /// Type of receive frame. 1774 1769 /// 1775 PXE_FRAME_TYPE Type;1770 PXE_FRAME_TYPE Type; 1776 1771 1777 1772 /// 1778 1773 /// Reserved, must be zero. 1779 1774 /// 1780 PXE_UINT8 reserved[7]; 1781 1775 PXE_UINT8 reserved[7]; 1782 1776 } PXE_DB_RECEIVE; 1783 1777
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