Changeset 99404 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c

Timestamp:

Apr 14, 2023 3:17:44 PM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

156854

Message:

Devices/EFI/FirmwareNew: Update to edk2-stable202302 and make it build, bugref:4643

Location:

trunk/src/VBox/Devices/EFI/FirmwareNew

Files:

• . (modified) (1 prop)
• OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c (modified) (5 diffs)

trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c

@@ -8 +8 @@
 
 **/
-#include <PiDxe.h>
+#include <IndustryStandard/Pci.h>                     // PCI_MAX_BUS
+#include <IndustryStandard/Q35MchIch9.h>              // INTEL_Q35_MCH_DEVIC...
+#include <Library/BaseMemoryLib.h>                    // ZeroMem()
+#include <Library/PcdLib.h>                           // PcdGet64()
+#include <Library/PciHostBridgeLib.h>                 // PCI_ROOT_BRIDGE_APE...
+#include <Library/PciHostBridgeUtilityLib.h>          // PciHostBridgeUtilit...
+#include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...
+#include <Protocol/PciRootBridgeIo.h>                 // EFI_PCI_ATTRIBUTE_I...
 
-#include <IndustryStandard/Pci.h>
-#include <IndustryStandard/Q35MchIch9.h>
-
-#include <Protocol/PciHostBridgeResourceAllocation.h>
-#include <Protocol/PciRootBridgeIo.h>
-
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PciHostBridgeLib.h>
-#include <Library/PciHostBridgeUtilityLib.h>
-#include "PciHostBridge.h"
-
-
-STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
-
+STATIC PCI_ROOT_BRIDGE_APERTURE  mNonExistAperture = { MAX_UINT64, 0 };
 
 /**
@@ -40 +31 @@
 EFIAPI
 PciHostBridgeGetRootBridges (
-  UINTN *Count
+  UINTN  *Count
   )
 {
-  UINT64               Attributes;
-  UINT64               AllocationAttributes;
-  PCI_ROOT_BRIDGE_APERTURE Io;
-  PCI_ROOT_BRIDGE_APERTURE Mem;
-  PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
-
-  if (PcdGetBool (PcdPciDisableBusEnumeration)) {
-    return ScanForRootBridges (Count);
-  }
+  UINT64                    Attributes;
+  UINT64                    AllocationAttributes;
+  PCI_ROOT_BRIDGE_APERTURE  Io;
+  PCI_ROOT_BRIDGE_APERTURE  Mem;
+  PCI_ROOT_BRIDGE_APERTURE  MemAbove4G;
 
   ZeroMem (&Io, sizeof (Io));
@@ -58 +45 @@
 
   Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
-    EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
-    EFI_PCI_ATTRIBUTE_ISA_IO_16 |
-    EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
-    EFI_PCI_ATTRIBUTE_VGA_MEMORY |
-    EFI_PCI_ATTRIBUTE_VGA_IO_16 |
-    EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
+               EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
+               EFI_PCI_ATTRIBUTE_ISA_IO_16 |
+               EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
+               EFI_PCI_ATTRIBUTE_VGA_MEMORY |
+               EFI_PCI_ATTRIBUTE_VGA_IO_16 |
+               EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
 
   AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
   if (PcdGet64 (PcdPciMmio64Size) > 0) {
     AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
-    MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
-    MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
-                       PcdGet64 (PcdPciMmio64Size) - 1;
+    MemAbove4G.Base       = PcdGet64 (PcdPciMmio64Base);
+    MemAbove4G.Limit      = PcdGet64 (PcdPciMmio64Base) +
+                            PcdGet64 (PcdPciMmio64Size) - 1;
   } else {
     CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
   }
 
-  Io.Base = PcdGet64 (PcdPciIoBase);
-  Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
-  Mem.Base = PcdGet64 (PcdPciMmio32Base);
+  Io.Base   = PcdGet64 (PcdPciIoBase);
+  Io.Limit  = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
+  Mem.Base  = PcdGet64 (PcdPciMmio32Base);
   Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);
 
   return PciHostBridgeUtilityGetRootBridges (
-    Count,
-    Attributes,
-    AllocationAttributes,
-    FALSE,
-    PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
-    0,
-    PCI_MAX_BUS,
-    &Io,
-    &Mem,
-    &MemAbove4G,
-    &mNonExistAperture,
-    &mNonExistAperture
-    );
+           Count,
+           Attributes,
+           AllocationAttributes,
+           FALSE,
+           PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
+           0,
+           PCI_MAX_BUS,
+           &Io,
+           &Mem,
+           &MemAbove4G,
+           &mNonExistAperture,
+           &mNonExistAperture
+           );
 }
-
 
 /**
@@ -107 +93 @@
 EFIAPI
 PciHostBridgeFreeRootBridges (
-  PCI_ROOT_BRIDGE *Bridges,
-  UINTN           Count
+  PCI_ROOT_BRIDGE  *Bridges,
+  UINTN            Count
   )
 {
   PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
 }
-
 
 /**
@@ -132 +117 @@
 EFIAPI
 PciHostBridgeResourceConflict (
-  EFI_HANDLE                        HostBridgeHandle,
-  VOID                              *Configuration
+  EFI_HANDLE  HostBridgeHandle,
+  VOID        *Configuration
   )
 {