VirtualBox

Changeset 99734 in vbox for trunk/src/VBox/VMM/include


Ignore:
Timestamp:
May 10, 2023 5:28:24 PM (2 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
157310
Message:

VMM/GIC: Updates to the implementation, implement forwarding of SGIs and PPIs, bugref:10404

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/include/GICInternal.h

    r99492 r99734  
    8686typedef struct GICCPU
    8787{
     88    /** @name The per vCPU redistributor data is kept here.
     89     * @{ */
     90
     91    /** @name Physical LPI register state.
     92     * @{ */
     93    /** @} */
     94
     95    /** @name SGI and PPI redistributor register state.
     96     * @{ */
     97    /** Interrupt Group 0 Register. */
     98    volatile uint32_t           u32RegIGrp0;
     99    /** Interrupt Configuration Register 0. */
     100    volatile uint32_t           u32RegICfg0;
     101    /** Interrupt Configuration Register 1. */
     102    volatile uint32_t           u32RegICfg1;
     103    /** Interrupt enabled bitmap. */
     104    volatile uint32_t           bmIntEnabled;
     105    /** Current interrupt pending state. */
     106    volatile uint32_t           bmIntPending;
     107    /** The current interrupt active state. */
     108    volatile uint32_t           bmIntActive;
     109    /** The interrupt priority for each of the SGI/PPIs */
     110    volatile uint8_t            abIntPriority[GIC_INTID_RANGE_PPI_LAST + 1];
     111    /** @} */
     112
     113    /** @name ICC system register state.
     114     * @{ */
     115    /** Flag whether group 0 interrupts are currently enabled. */
     116    volatile bool               fIrqGrp0Enabled;
     117    /** Flag whether group 1 interrupts are currently enabled. */
     118    volatile bool               fIrqGrp1Enabled;
     119    /** The current interrupt priority, only interrupts with a higher priority get signalled. */
     120    volatile uint8_t            bInterruptPriority;
     121    /** The interrupt controller Binary Point Register for Group 0 interrupts. */
     122    uint8_t                     bBinaryPointGrp0;
     123    /** The interrupt controller Binary Point Register for Group 1 interrupts. */
     124    uint8_t                     bBinaryPointGrp1;
     125    /** @} */
     126
    88127    /** @name Log Max counters
    89128     * @{ */
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