|
|
|
@53325
|
10 years |
vboxsync |
VMM: Fix sign inconsistency in the RealUseTSC case.
|
|
|
|
@53247
|
10 years |
vboxsync |
IEM: Added salc (set AL to CF). Started making sense of the whole …
|
|
|
|
@53246
|
10 years |
vboxsync |
IEM: Added salc (set AL to CF). Started making sense of the whole …
|
|
|
|
@53235
|
10 years |
vboxsync |
VMM: Fixed incorrect pure TSC-offsetting mode switch with paravirt. …
|
|
|
|
@53202
|
10 years |
vboxsync |
doc nits
|
|
|
|
@53188
|
10 years |
vboxsync |
IEM: into is invalid in 64-bit mode; added int1/icebp.
|
|
|
|
@53182
|
10 years |
vboxsync |
IEMAll: Added IEM_MC_FETCH_MEM_I64 and tweaked the VT-x verification …
|
|
|
|
@53181
|
10 years |
vboxsync |
IEM/IRET: Make the 16-bit IRET real/v86 mode instruction clear RF, …
|
|
|
|
@53180
|
10 years |
vboxsync |
IEM: Implemented fidl m64i.
|
|
|
|
@53152
|
10 years |
vboxsync |
VMM/TM: space.
|
|
|
|
@53108
|
10 years |
vboxsync |
IEM: Call gate TSS access needs to check TSS bitness, not gate, duh.
|
|
|
|
@53107
|
10 years |
vboxsync |
Committed more than I had intended…
|
|
|
|
@53104
|
10 years |
vboxsync |
IEM: Added FILD m16.
|
|
|
|
@53102
|
10 years |
vboxsync |
IEM: SS determines stacks size, not CS (IRET).
|
|
|
|
@53101
|
10 years |
vboxsync |
EM: Careful with MOV to segment register.
|
|
|
|
@52984
|
10 years |
vboxsync |
iomMMIODoComplicatedWrite: Fixed assertion, should be using && instead …
|
|
|
|
@52919
|
10 years |
vboxsync |
IEM: Corrected FNOP opcode.
|
|
|
|
@52913
|
10 years |
vboxsync |
IEM: Implemented call gates (currently disabled).
|
|
|
|
@52884
|
10 years |
vboxsync |
IEM: Added comments where code does not match comments and/or Intel …
|
|
|
|
@52883
|
10 years |
vboxsync |
IEM: Fixed 16-bit inter-privilege IRET.
|
|
|
|
@52882
|
10 years |
vboxsync |
IEM: Fixed inter-privilege RETF.
|
|
|
|
@52866
|
10 years |
vboxsync |
Typo cut and paste.
|
|
|
|
@52859
|
10 years |
vboxsync |
IEM: Inter-ring RETF stack fix.
|
|
|
|
@52770
|
10 years |
vboxsync |
VMM/CPUM: Fix EFER WRMSR to ignore EFER.LMA bit, trunk regression …
|
|
|
|
@52768
|
10 years |
vboxsync |
VMM/GIM: doxygen beautifications.
|
|
|
|
@52767
|
10 years |
vboxsync |
VMM/GIM: Get rid of separate fEnabled field, just use the provider to …
|
|
|
|
@52726
|
10 years |
vboxsync |
VMM/IEM: minor nit.
|
|
|
|
@52724
|
10 years |
vboxsync |
IEM: Implemented expand-down limit checks (2 out of 3).
|
|
|
|
@52717
|
10 years |
vboxsync |
VMM/CPUM: Raise #GP(0) while writing to disallowed EFER bits.
|
|
|
|
@52671
|
10 years |
vboxsync |
VMM/GIM: Use the PDM interface to query the APIC timer freq.
|
|
|
|
@52670
|
10 years |
vboxsync |
VMM, Devices: Add interface to query the APIC frequency from the APIC …
|
|
|
|
@52669
|
10 years |
vboxsync |
VMM/IEM: added todo.
|
|
|
|
@52661
|
10 years |
vboxsync |
IEM: Clear TRPM when exception was raised, too.
|
|
|
|
@52659
|
10 years |
vboxsync |
VMM/IEM: Reset TRPM only when IEM successfully injects the trap. …
|
|
|
|
@52465
|
10 years |
vboxsync |
VMM: Fix IEM FXSAVE implementation to match the logic in HM/raw-mode …
|
|
|
|
@52456
|
10 years |
vboxsync |
Typos.
|
|
|
|
@52449
|
10 years |
vboxsync |
IEM: When emulating non-repeated INSB/INSW/INSD, write what we read …
|
|
|
|
@52440
|
10 years |
vboxsync |
VMM/GIM: comment.
|
|
|
|
@52419
|
10 years |
vboxsync |
VMM: Fix restoring 32-bit guest FPU state on 64-bit capable VMs.
|
|
|
|
@52410
|
10 years |
vboxsync |
traling spaces
|
|
|
|
@52395
|
10 years |
vboxsync |
added todo
|
|
|
|
@52363
|
10 years |
vboxsync |
SELM: More effective address calculation width fixes.
|
|
|
|
@52362
|
10 years |
vboxsync |
iemInitDecoderAndPrefetchOpcodes: Outside 64-bit mode, effective …
|
|
|
|
@52361
|
10 years |
vboxsync |
iemInitDecoderAndPrefetchOpcodes: Outside 64-bit mode, effective …
|
|
|
|
@52318
|
10 years |
vboxsync |
VMM/PGM: Fix.
|
|
|
|
@52098
|
10 years |
vboxsync |
IEM: Added forgotten return statements.
|
|
|
|
@52080
|
10 years |
vboxsync |
VMM: Use IEM task switches since old code does not work at all.
|
|
|
|
@52077
|
10 years |
vboxsync |
VMM/IEM: Block further NMIs while injecting an NMI.
|
|
|
|
@52066
|
10 years |
vboxsync |
VMM: Fixed potential bug in AMD-V NMI injection when interrupt …
|
|
|
|
@52041
|
10 years |
vboxsync |
VMM: Fix NMI handling.
|
|
|
|
@52006
|
10 years |
vboxsync |
VMM: VT-x and AMD-V support for making GIM hypercalls.
|
|
|
|
@51981
|
10 years |
vboxsync |
VMM/GIM, VMM/HM: Add support for Hyper-V hypervisor capabilities …
|
|
|
|
@51980
|
10 years |
vboxsync |
VMM/GIM: Get system-reset MSR working, added EOI, TPR, ICR APIC MSR …
|
|
|
|
@51959
|
10 years |
vboxsync |
TM: Set pVM->tm.s.u64LastPausedTSC to the highest pVCpu->tm.s.u64TSC …
|
|
|
|
@51852
|
10 years |
vboxsync |
TM: Add the same TSC offset to each VCPU when pausing/resuming (not …
|
|
|
|
@51729
|
10 years |
vboxsync |
Recently missed header updates.
|
|
|
|
@51728
|
10 years |
vboxsync |
VMM: Add MWait Extensions as a CPUM feature to allow configuring it …
|
|
|
|
@51720
|
10 years |
vboxsync |
VMM: Doxygen bugref comment consistency.
|
|
|
|
@51686
|
10 years |
vboxsync |
VMM/GIM: Fixes to saved state, enabled reset MSR availability in CPUID.
|
|
|
|
@51658
|
11 years |
vboxsync |
VMM/GIM: Bits, try to find out why it breaks on mac2-rel.
|
|
|
|
@51644
|
11 years |
vboxsync |
VMM/GIM: Fix wrongly committed testing bits.
|
|
|
|
@51643
|
11 years |
vboxsync |
VMM/GIM: More bits for Hyper-V implementation.
|
|
|
|
@51563
|
11 years |
vboxsync |
VMM/GIM: bits.
|
|
|
|
@51560
|
11 years |
vboxsync |
VMM/GIM: Mapping of GIM MMIO2 regions and Hyper-V provider work.
|
|
|
|
@51434
|
11 years |
vboxsync |
VMM/IEM: nit.
|
|
|
|
@51422
|
11 years |
vboxsync |
VMM/EMAll: allow WrMsrs to return VERR_EM_INTERPRETER to fallback to …
|
|
|
|
@51367
|
11 years |
vboxsync |
VMM/GIM: Hyper-V provider, work-in-progress.
|
|
|
|
@51366
|
11 years |
vboxsync |
VMM/CPUM: Assertion.
|
|
|
|
@51333
|
11 years |
vboxsync |
VMM/GIM: Hyper-V provider, work-in-progress.
|
|
|
|
@51301
|
11 years |
vboxsync |
VMM: Retire aGuestCpuIdHyper legacy array.
|
|
|
|
@51288
|
11 years |
vboxsync |
Fixes for canonical address in MSRs.
|
|
|
|
@51271
|
11 years |
vboxsync |
VMM: Implemented hyper heap realloc. and adjusted CPUM CpuId arrays …
|
|
|
|
@51256
|
11 years |
vboxsync |
IEM: Fall back if IEMInjectTrpmEvent() did not do its job.
|
|
|
|
@51235
|
11 years |
vboxsync |
Instrumented cpumMsrWr_Ia32SysEnterEip with a LogRel for tracking the …
|
|
|
|
@51233
|
11 years |
vboxsync |
CPUMAllMsrs.cpp: Quickfix for IA32_APIC_BASE read #GP.
|
|
|
|
@51182
|
11 years |
vboxsync |
VMM/IEM: Implemented hardware task-switches, code path disabled.
|
|
|
|
@50953
|
11 years |
vboxsync |
GIM: Skeleton, work in progress.
|
|
|
|
@50923
|
11 years |
vboxsync |
IEM: Use ASPECT_NOT_IMPLEMENTED on interrupt task gates instead of …
|
|
|
|
@50917
|
11 years |
vboxsync |
Added PDMQueueFlushIfNecessary.
|
|
|
|
@50866
|
11 years |
vboxsync |
VMM/EMAll: Disallow writing to reserved bits while loading CR0.
|
|
|
|
@50863
|
11 years |
vboxsync |
VMM/IEMAllCImpl: Comment clarification about reserved bits in CR4 for …
|
|
|
|
@50819
|
11 years |
vboxsync |
VMMAll/PGMAllPool: Clear references to the shadow table while adding …
|
|
|
|
@50785
|
11 years |
vboxsync |
CPUMAllRegs: comment nit.
|
|
|
|
@50617
|
11 years |
vboxsync |
Implemented MSR 0x00000035 on i7, it reports threads and core counts …
|
|
|
|
@50590
|
11 years |
vboxsync |
CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should …
|
|
|
|
@50584
|
11 years |
vboxsync |
CPUM,DevEFI: Bus vs cpu clock ratio fixes for more recent CPUs. Older …
|
|
|
|
@50387
|
11 years |
vboxsync |
build fix
|
|
|
|
@50385
|
11 years |
vboxsync |
TMAll: Realized what the asserting was all about and reintroduced it, …
|
|
|
|
@50383
|
11 years |
vboxsync |
tmTimerVirtualSyncSet: Removed non-sensical lock ownership assertion.
|
|
|
|
@50381
|
11 years |
vboxsync |
tmTimerVirtualSyncStop: Removed non-sensical lock ownership assertion.
|
|
|
|
@50158
|
11 years |
vboxsync |
cpumMsrWr_Ia32BiosSignId should ignore writes, not GP. Only used on P4.
|
|
|
|
@50141
|
11 years |
vboxsync |
selmValidateAndConvertCSAddrHidden: Drop the bogus VERR_INVALID_RPL checks.
|
|
|
|
@50001
|
11 years |
vboxsync |
PDMCritSect: Ditto VERR_INTERRUPTED fix for shared critical sections.
|
|
|
|
@50000
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: That worked but wasn't entirely …
|
|
|
|
@49999
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: Ok, that didn't work, so next attempt.
|
|
|
|
@49998
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: Deal with VERR_INTERRUPTED while trying …
|
|
|
|
@49981
|
11 years |
vboxsync |
CPUMAllMsrs.cpp: Fixed cpumLookupMsrRange to resolved aliases. Also …
|
|
|
|
@49975
|
11 years |
vboxsync |
EM: Make sure the RA1 and RAZ bits of DR6 and DR7 are enforced. Fixes …
|
|
|
|
@49972
|
11 years |
vboxsync |
CPUM: More msr hacking.
|
|
|
|
@49966
|
11 years |
vboxsync |
CPUM: Added AMD Athlon64 3200+ (130nm) and Pentium4 (mod 4, w/ 64-bit).
|
|
|
|
