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|
@40248
|
13 years |
vboxsync |
IEM: fst[p], fist[p] and fisttp implementations and fixes.
|
|
|
@40246
|
13 years |
vboxsync |
IEM: Conditional FPU move instructions (FCMOV*).
|
|
|
@40242
|
13 years |
vboxsync |
f2xm1, fyl2x, fptan. fpu stack push bugfix.
|
|
|
@40209
|
13 years |
vboxsync |
IEM: Implemented missing FPU instructions starting with 0xd8 and …
|
|
|
@40199
|
13 years |
vboxsync |
fstp st0
|
|
|
@40174
|
13 years |
vboxsync |
checked out some todos.
|
|
|
@40164
|
13 years |
vboxsync |
IEM: A bunch of r80 by r80 instructions, needed fsubrp stN,st0.
|
|
|
@40160
|
13 years |
vboxsync |
AMD adjustments.
|
|
|
@40159
|
13 years |
vboxsync |
AMD adjustments.
|
|
|
@40155
|
13 years |
vboxsync |
build fix
|
|
|
@40140
|
13 years |
vboxsync |
Move X86_XCPT_* to x86extra.mac.
|
|
|
@40139
|
13 years |
vboxsync |
tstX86-1: FDIV m64r -> #PF tests.
|
|
|
@40138
|
13 years |
vboxsync |
IEM: fdiv work. Added x86extra.mac for non-automatic x86.h bits.
|
|
|
@40090
|
13 years |
vboxsync |
Test reserved FPU aliases.
|
|
|
@40089
|
13 years |
vboxsync |
0xdf 11/1 seems to behave like fxch st(i), while 0xdf 11/2 and 11/3 …
|
|
|
@40088
|
13 years |
vboxsync |
IEM: 0xde 11/2 seems to behave like fcomp.
|
|
|
@40087
|
13 years |
vboxsync |
IEM: 0xdd 11/1 seems to behave like fxch.
|
|
|
@40086
|
13 years |
vboxsync |
More FPU instruction stubs and attempts at figuring out what the …
|
|
|
@40083
|
13 years |
vboxsync |
More FPU instruction stubs.
|
|
|
@40082
|
13 years |
vboxsync |
More FPU instruction stubs.
|
|
|
@40070
|
13 years |
vboxsync |
More experiments / tests.
|
|
|
@40069
|
13 years |
vboxsync |
Floating point testing.
|
|
|
@40057
|
13 years |
vboxsync |
fpu explorations.
|
|
|
@40037
|
13 years |
vboxsync |
buildfix
|
|
|
@40024
|
13 years |
vboxsync |
IEM: Some more FPU work underways.
|
|
|
@40008
|
13 years |
vboxsync |
tstX86-1A.asm: buildfix next try
|
|
|
@40004
|
13 years |
vboxsync |
tstX86-1A.asm: buildfix
|
|
|
@40001
|
13 years |
vboxsync |
IEM: Filled in some NOPs and PREFETCHes.
|
|
|
@39998
|
13 years |
vboxsync |
tstX86-1: Display CR2.
|
|
|
@39997
|
13 years |
vboxsync |
tstX86-1: fxrstor (on intel) will #PF before committing any register …
|
|
|
@39996
|
13 years |
vboxsync |
tstX86-1: fxrstor (on intel) will #PF before committing any register …
|
|
|
@39995
|
13 years |
vboxsync |
tstX86-1: fxsave (on intel) will #PF before writing anything. very nice.
|
|
|
@39993
|
13 years |
vboxsync |
tstX86-1: Some fxsave and fxrstor tests.
|
|
|
@39989
|
13 years |
vboxsync |
txtX86-1: some prefix decoding checks for the groups and rex.
|
|
|
@37955
|
13 years |
vboxsync |
Moved VBox/x86.h/mac to iprt/x86.h/mac.
|
|
|
@36866
|
14 years |
vboxsync |
build fix
|
|
|
@36864
|
14 years |
vboxsync |
tstX86-1: made it work on darwin.
|
|
|
@36862
|
14 years |
vboxsync |
tstX86-1: Testing invalid lock prefix decoding order.
|
|
|
@36838
|
14 years |
vboxsync |
IEM: SMSW and LMSW.
|
|
|
@36768
|
14 years |
vboxsync |
IEM: Initial commit, work in progress.
|