|
|
@50749
|
11 years |
vboxsync |
VMM/HMVMXR0: When only all-context VPID flush is supported by the CPU, …
|
|
|
@50748
|
11 years |
vboxsync |
VMM/HMR0: cleanup.
|
|
|
@50746
|
11 years |
vboxsync |
VMM/HMR0: Assert tidying.
|
|
|
@50740
|
11 years |
vboxsync |
VMM/HMR0: Don't flush tagged-TLB entries each time while leaving HM …
|
|
|
@50739
|
11 years |
vboxsync |
VMM/HMVMXR0: undo temporary change from r92738.
|
|
|
@50738
|
11 years |
vboxsync |
VMM/HMVMXR0: Temporary enable of HMVMX_ALWAYS_FLUSH_TLB for a test build.
|
|
|
@50720
|
11 years |
vboxsync |
VMM/HMVMXR0: Assert.
|
|
|
@50713
|
11 years |
vboxsync |
VMM/HM: typo.
|
|
|
@50698
|
11 years |
vboxsync |
VMM/HMVMXR0: More info. on assert failures.
|
|
|
@50696
|
11 years |
vboxsync |
VMM/HMVMXR0: More assertions in TLB flushing.
|
|
|
@50695
|
11 years |
vboxsync |
format string fixes
|
|
|
@50694
|
11 years |
vboxsync |
a few unimportant format string fixes
|
|
|
@50661
|
11 years |
vboxsync |
GCC:/MSC: => gcc:/msc: like everywhere
|
|
|
@50657
|
11 years |
vboxsync |
VBoxCpuReport: Filled in some msrs for sandybridge.
|
|
|
@50656
|
11 years |
vboxsync |
Added an example of the initial SandyBridge silicone.
|
|
|
@50655
|
11 years |
vboxsync |
VMM/HMVMXR0: First entry into VT-x may already have saved the …
|
|
|
@50653
|
11 years |
vboxsync |
Added a more recent K8 CPU to the CPU database.
|
|
|
@50617
|
11 years |
vboxsync |
Implemented MSR 0x00000035 on i7, it reports threads and core counts …
|
|
|
@50614
|
11 years |
vboxsync |
VMM/HMVMXR0: Avoid one extra VM-exit while injecting interrupts if …
|
|
|
@50607
|
11 years |
vboxsync |
auPrev[2] not [1].
|
|
|
@50606
|
11 years |
vboxsync |
cpumR3IsEcxRelevantForCpuIdLeaf: Improved exit conditions, fixing …
|
|
|
@50601
|
11 years |
vboxsync |
VMM/HMVMXR0: Undo r92473. We -do- need it, better comments.
|
|
|
@50600
|
11 years |
vboxsync |
VMM/HMVMXR0: This should not be necessary, while in preemption hook …
|
|
|
@50596
|
11 years |
vboxsync |
VMM: follow-up fix to r92440
|
|
|
@50590
|
11 years |
vboxsync |
CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should …
|
|
|
@50584
|
11 years |
vboxsync |
CPUM,DevEFI: Bus vs cpu clock ratio fixes for more recent CPUs. Older …
|
|
|
@50575
|
11 years |
vboxsync |
VMM: Added SSMR3RegisterStub and used it to provide saved state …
|
|
|
@50540
|
11 years |
vboxsync |
VMM/HM: Ignore SMX mode and proceed with a warning.
|
|
|
@50509
|
11 years |
vboxsync |
VMM/HMVMXR0: Build fix.
|
|
|
@50506
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix for workaround done in r92215.
|
|
|
@50428
|
11 years |
vboxsync |
HMR0Mixed.mac: Windows experiment with delaying host IDTR.LIMIT …
|
|
|
@50426
|
11 years |
vboxsync |
HMR0VMX.cpp: Hacked hmR0VmxSaveHostSegmentRegs to call …
|
|
|
@50407
|
11 years |
vboxsync |
duh
|
|
|
@50406
|
11 years |
vboxsync |
Some RTEnvGet cleanup, adding todos for the rest.
|
|
|
@50387
|
11 years |
vboxsync |
build fix
|
|
|
@50385
|
11 years |
vboxsync |
TMAll: Realized what the asserting was all about and reintroduced it, …
|
|
|
@50383
|
11 years |
vboxsync |
tmTimerVirtualSyncSet: Removed non-sensical lock ownership assertion.
|
|
|
@50381
|
11 years |
vboxsync |
tmTimerVirtualSyncStop: Removed non-sensical lock ownership assertion.
|
|
|
@50333
|
11 years |
vboxsync |
VMM, SupDrv: Allow VT-x when in presumed SMX mode when the VMXON bit …
|
|
|
@50285
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping over IO instructions (string I/O is a …
|
|
|
@50284
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping over IRET and POPF in real-on-v86 mode.
|
|
|
@50275
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping in real-on-v86 mode for certain …
|
|
|
@50271
|
11 years |
vboxsync |
VMM/HMVMXR0: Comment clarification.
|
|
|
@50270
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping with IRET on real-on-v86 mode while …
|
|
|
@50255
|
11 years |
vboxsync |
VMM: two undocumented CPUID bits
|
|
|
@50163
|
11 years |
vboxsync |
CPUM.cpp: Enable SSE4.1 and SSE4.2 by default for trunk.
|
|
|
@50162
|
11 years |
vboxsync |
CPUM.cpp: Added /CPUM/SSE4.1 and /CPUM/SSE4.2 configuration overrides …
|
|
|
@50158
|
11 years |
vboxsync |
cpumMsrWr_Ia32BiosSignId should ignore writes, not GP. Only used on P4.
|
|
|
@50157
|
11 years |
vboxsync |
CPUMR3Db.cpp: Redid the cpu database matching (cpumR3DbGetCpuInfo) to …
|
|
|
@50141
|
11 years |
vboxsync |
selmValidateAndConvertCSAddrHidden: Drop the bogus VERR_INVALID_RPL checks.
|
|
|
@50115
|
11 years |
vboxsync |
tstVMM: Drop the MSR quick report in the default test.
|
|
|
@50113
|
11 years |
vboxsync |
Because of the CPUID leaves we'll need the heap to always be mapped …
|
|
|
@50112
|
11 years |
vboxsync |
Missed one line.
|
|
|
@50111
|
11 years |
vboxsync |
Better name & restrict line length to 130 chars.
|
|
|
@50110
|
11 years |
vboxsync |
corrected function name.
|
|
|
@50087
|
11 years |
vboxsync |
VERR_CPUM_TOO_MANY_CPUID_SUBLEAVES: Dump some potentially useful info …
|
|
|
@50038
|
11 years |
vboxsync |
CPUM: Don't use stale pStdFeatureLeaf and pExtFeatureLeaf pointers. …
|
|
|
@50019
|
11 years |
vboxsync |
CPUMR3CpuId.cpp (trunk+4.3): s/RTStrmPrintf/Log/
|
|
|
@50009
|
11 years |
vboxsync |
VMMRZCallRing3Disable,VMMRZCallRing3Enable: Made them preemption …
|
|
|
@50001
|
11 years |
vboxsync |
PDMCritSect: Ditto VERR_INTERRUPTED fix for shared critical sections.
|
|
|
@50000
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: That worked but wasn't entirely …
|
|
|
@49999
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: Ok, that didn't work, so next attempt.
|
|
|
@49998
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: Deal with VERR_INTERRUPTED while trying …
|
|
|
@49995
|
11 years |
vboxsync |
cpus/*AMD*.h: Make sure the patch loader MSR is present in older entries.
|
|
|
@49993
|
11 years |
vboxsync |
CPUM: VIA MSR mappings (rough cut).
|
|
|
@49992
|
11 years |
vboxsync |
VMM/HMVMXR0: comment copy & paste error.
|
|
|
@49990
|
11 years |
vboxsync |
VMM/HMSVMR0: nit.
|
|
|
@49988
|
11 years |
vboxsync |
CPU: Hacking VIA
|
|
|
@49981
|
11 years |
vboxsync |
CPUMAllMsrs.cpp: Fixed cpumLookupMsrRange to resolved aliases. Also …
|
|
|
@49979
|
11 years |
vboxsync |
Fix burn.
|
|
|
@49978
|
11 years |
vboxsync |
CPUM: One more P4 related issue that needs fudging.
|
|
|
@49977
|
11 years |
vboxsync |
CPUM: Make sure a minimum of commonly used MSRs are present by default.
|
|
|
@49975
|
11 years |
vboxsync |
EM: Make sure the RA1 and RAZ bits of DR6 and DR7 are enforced. Fixes …
|
|
|
@49972
|
11 years |
vboxsync |
CPUM: More msr hacking.
|
|
|
@49971
|
11 years |
vboxsync |
VMM/HMSVMR0: nit.
|
|
|
@49970
|
11 years |
vboxsync |
VMM/HMSVMR0: Avoid MSR write when possible.
|
|
|
@49969
|
11 years |
vboxsync |
VMM/HMSVMR0: todo addressed in r91390.
|
|
|
@49968
|
11 years |
vboxsync |
VMM/HMSVMR0: Update guest TSC AUX when we allow MSR passthru.
|
|
|
@49967
|
11 years |
vboxsync |
HMR0SVM.cpp: Use CPUR0GetGuestTscAux() instead of CPUMQueryGuestMsr to …
|
|
|
@49966
|
11 years |
vboxsync |
CPUM: Added AMD Athlon64 3200+ (130nm) and Pentium4 (mod 4, w/ 64-bit).
|
|
|
@49954
|
11 years |
vboxsync |
CPUM.cpp: Off by one bug in new CPUID count limiting code.
|
|
|
@49952
|
11 years |
vboxsync |
Added AMD_Phenom_II_X6_1100T entry.
|
|
|
@49945
|
11 years |
vboxsync |
PAT hack for a core 2 duo.
|
|
|
@49937
|
11 years |
vboxsync |
VMM/HMSVMR0: Change ASID when required.
|
|
|
@49936
|
11 years |
vboxsync |
wtf?
|
|
|
@49934
|
11 years |
vboxsync |
VMM/HMR0: Don't unnecessarily reset uCurrentAsid.
|
|
|
@49932
|
11 years |
vboxsync |
VMM/HMR0: Assertion.
|
|
|
@49931
|
11 years |
vboxsync |
VMM/HMSVMR0: Assertions.
|
|
|
@49927
|
11 years |
vboxsync |
VMM: Mapped the MSRs for a core 2 penryn cpu.
|
|
|
@49925
|
11 years |
vboxsync |
VMM/HM: Fewer tree levels in HM stats.
|
|
|
@49922
|
11 years |
vboxsync |
export
|
|
|
@49921
|
11 years |
vboxsync |
export
|
|
|
@49915
|
11 years |
vboxsync |
CPUM: Fixed CPUID(5) copy&paste regression.
|
|
|
@49914
|
11 years |
vboxsync |
SELM: Fixed stale selector handling issue (raw-mode only). Returning …
|
|
|
@49903
|
11 years |
vboxsync |
VMM/HMVMXR0: Todo comment.
|
|
|
@49902
|
11 years |
vboxsync |
VMM/HMSVMR0: nit.
|
|
|
@49901
|
11 years |
vboxsync |
VMM/HMVMXR0: nit.
|
|
|
@49900
|
11 years |
vboxsync |
VMM/HMSVMR0: 32-bit build fix.
|
|
|
@49899
|
11 years |
vboxsync |
Added data for i5-3570.
|
|
|
@49898
|
11 years |
vboxsync |
VMM/HMSVMR0: Fix for MOV DRx intercepts on 32-bit hosts with 64-bit guests.
|
|
|