Changeset 108882 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Apr 8, 2025 10:53:54 AM (5 weeks ago)
- svn:sync-xref-src-repo-rev:
- 168333
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GICAll.cpp
r108864 r108882 1725 1725 uint16_t idxIntr; 1726 1726 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); 1727 STAM_PROFILE_START(&pGicCpu-> CTX_SUFF_Z(StatProfIntrAck), x);1727 STAM_PROFILE_START(&pGicCpu->StatProfIntrAck, x); 1728 1728 uint16_t const uIntId = gicGetHighestPriorityPendingIntr(pGicDev, pGicCpu, fGroup0, fGroup1, &idxIntr, &bIntrPriority); 1729 1729 if (uIntId != GIC_INTID_RANGE_SPECIAL_NO_INTERRUPT) … … 1738 1738 if (bIntrPriority >= pGicCpu->bIntrPriorityMask) 1739 1739 { 1740 STAM_PROFILE_STOP(&pGicCpu-> CTX_SUFF_Z(StatProfIntrAck), x);1740 STAM_PROFILE_STOP(&pGicCpu->StatProfIntrAck, x); 1741 1741 return GIC_INTID_RANGE_SPECIAL_NO_INTERRUPT; 1742 1742 } … … 1763 1763 if (bIntrGroupPriority >= bRunningGroupPriority) 1764 1764 { 1765 STAM_PROFILE_STOP(&pGicCpu-> CTX_SUFF_Z(StatProfIntrAck), x);1765 STAM_PROFILE_STOP(&pGicCpu->StatProfIntrAck, x); 1766 1766 return GIC_INTID_RANGE_SPECIAL_NO_INTERRUPT; 1767 1767 } … … 1857 1857 1858 1858 LogFlowFunc(("uIntId=%u\n", uIntId)); 1859 STAM_PROFILE_STOP(&pGicCpu-> CTX_SUFF_Z(StatProfIntrAck), x);1859 STAM_PROFILE_STOP(&pGicCpu->StatProfIntrAck, x); 1860 1860 return uIntId; 1861 1861 } … … 2589 2589 #ifdef VBOX_WITH_STATISTICS 2590 2590 PVMCPU pVCpu = VMMGetCpuById(pVM, 0); 2591 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatSetSpi));2591 STAM_COUNTER_INC(&pVCpu->gic.s.StatSetSpi); 2592 2592 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); 2593 2593 #endif 2594 STAM_PROFILE_START(&pGicCpu-> CTX_SUFF_Z(StatProfSetSpi), a);2594 STAM_PROFILE_START(&pGicCpu->StatProfSetSpi, a); 2595 2595 2596 2596 uint16_t const uIntId = GIC_INTID_RANGE_SPI_START + uSpiIntId; … … 2612 2612 2613 2613 int const rc = VBOXSTRICTRC_VAL(gicDistUpdateIrqState(pVM, pGicDev)); 2614 STAM_PROFILE_STOP(&pGicCpu-> CTX_SUFF_Z(StatProfSetSpi), a);2614 STAM_PROFILE_STOP(&pGicCpu->StatProfSetSpi, a); 2615 2615 2616 2616 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); … … 2630 2630 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); 2631 2631 2632 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatSetPpi));2633 STAM_PROFILE_START(&pGicCpu-> CTX_SUFF_Z(StatProfSetPpi), b);2632 STAM_COUNTER_INC(&pVCpu->gic.s.StatSetPpi); 2633 STAM_PROFILE_START(&pGicCpu->StatProfSetPpi, b); 2634 2634 2635 2635 uint32_t const uIntId = GIC_INTID_RANGE_PPI_START + uPpiIntId; … … 2651 2651 2652 2652 int const rc = VBOXSTRICTRC_VAL(gicReDistUpdateIrqState(pGicDev, pVCpu)); 2653 STAM_PROFILE_STOP(&pGicCpu-> CTX_SUFF_Z(StatProfSetPpi), b);2653 STAM_PROFILE_STOP(&pGicCpu->StatProfSetPpi, b); 2654 2654 2655 2655 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); … … 2700 2700 #ifdef VBOX_WITH_STATISTICS 2701 2701 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); 2702 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatSetSgi));2703 STAM_PROFILE_START(&pGicCpu-> CTX_SUFF_Z(StatProfSetSgi), c);2702 STAM_COUNTER_INC(&pVCpu->gic.s.StatSetSgi); 2703 STAM_PROFILE_START(&pGicCpu->StatProfSetSgi, c); 2704 2704 #else 2705 2705 PCGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); … … 2756 2756 } 2757 2757 2758 STAM_PROFILE_STOP(&pGicCpu-> CTX_SUFF_Z(StatProfSetSgi), c);2758 STAM_PROFILE_STOP(&pGicCpu->StatProfSetSgi, c); 2759 2759 return VINF_SUCCESS; 2760 2760 } … … 2772 2772 Assert(pu64Value); 2773 2773 2774 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatSysRegRead));2774 STAM_COUNTER_INC(&pVCpu->gic.s.StatSysRegRead); 2775 2775 2776 2776 *pu64Value = 0; … … 2900 2900 LogFlowFunc(("pVCpu=%p u32Reg=%#x{%s} u64Value=%RX64\n", pVCpu, u32Reg, gicIccGetRegDescription(u32Reg), u64Value)); 2901 2901 2902 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatSysRegWrite));2902 STAM_COUNTER_INC(&pVCpu->gic.s.StatSysRegWrite); 2903 2903 2904 2904 PPDMDEVINS pDevIns = VMCPU_TO_DEVINS(pVCpu); … … 3197 3197 uint32_t uValue = 0; 3198 3198 3199 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatMmioRead));3199 STAM_COUNTER_INC(&pVCpu->gic.s.StatMmioRead); 3200 3200 3201 3201 VBOXSTRICTRC rc = VBOXSTRICTRC_VAL(gicDistReadRegister(pDevIns, pVCpu, offReg, &uValue)); … … 3220 3220 uint32_t uValue = *(uint32_t *)pv; 3221 3221 3222 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatMmioWrite));3222 STAM_COUNTER_INC(&pVCpu->gic.s.StatMmioWrite); 3223 3223 LogFlowFunc(("[%u]: offReg=%#RX16 (%s) uValue=%#RX32\n", pVCpu->idCpu, offReg, gicDistGetRegDescription(offReg), uValue)); 3224 3224 … … 3248 3248 PVMCPUCC pVCpu = pVM->CTX_SUFF(apCpus)[idReDist]; 3249 3249 3250 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatMmioRead));3250 STAM_COUNTER_INC(&pVCpu->gic.s.StatMmioRead); 3251 3251 3252 3252 /* Redistributor or SGI/PPI frame? */ … … 3289 3289 PVMCPUCC pVCpu = pVM->CTX_SUFF(apCpus)[idReDist]; 3290 3290 3291 STAM_COUNTER_INC(&pVCpu->gic.s. CTX_SUFF_Z(StatMmioWrite));3291 STAM_COUNTER_INC(&pVCpu->gic.s.StatMmioWrite); 3292 3292 3293 3293 /* Redistributor or SGI/PPI frame? */ -
trunk/src/VBox/VMM/VMMAll/GITSAll.cpp
r108878 r108882 137 137 138 138 139 #if 0 139 140 static const char * gitsGetCommandName(uint8_t uCmdId) 140 141 { … … 166 167 } 167 168 } 169 #endif 168 170 169 171 … … 420 422 pGitsDev->uCmdReadReg = 0; 421 423 pGitsDev->uCmdWriteReg = 0; 422 RT_ZERO(pGitsDev->a uCt);424 RT_ZERO(pGitsDev->aCtes); 423 425 } 424 426 … … 498 500 RT_BF_GET(uReg, GITS_BF_CTRL_REG_CWRITER_RETRY), uReg & GITS_BF_CTRL_REG_CWRITER_OFFSET_MASK); 499 501 } 502 503 /* Interrupt Collection Table. */ 504 { 505 pHlp->pfnPrintf(pHlp, " Collection Table:\n"); 506 bool fHasValidCtes = false; 507 for (unsigned i = 0; i < RT_ELEMENTS(pGitsDev->aCtes); i++) 508 { 509 if (pGitsDev->aCtes[i].fValid) 510 { 511 AssertCompile(sizeof(pGitsDev->aCtes[i].idTargetCpu) == sizeof(uint16_t)); 512 pHlp->pfnPrintf(pHlp, " aCtes[%u].idTargetCpu = %#RX16\n", i, pGitsDev->aCtes[i].idTargetCpu); 513 fHasValidCtes = true; 514 } 515 } 516 if (!fHasValidCtes) 517 pHlp->pfnPrintf(pHlp, " Empty (no valid entries)\n"); 518 } 500 519 } 501 520 … … 513 532 if (!fIsEmpty) 514 533 { 515 uint32_t const cCmdQueuePages = (pGitsDev->uCmdBaseReg.u & GITS_BF_CTRL_REG_CBASER_SIZE_MASK) + 1;534 uint32_t const cCmdQueuePages = RT_BF_GET(pGitsDev->uCmdBaseReg.u, GITS_BF_CTRL_REG_CBASER_SIZE) + 1; 516 535 uint32_t const cbCmdQueue = cCmdQueuePages << GITS_CMD_QUEUE_PAGE_SHIFT; 517 536 AssertRelease(cbCmdQueue <= cbBuf); /** @todo Paranoia; make this a debug assert later. */ … … 538 557 /* The write offset has wrapped around, read till end of buffer followed by wrapped-around data. */ 539 558 uint32_t const cbForward = cbCmdQueue - offRead; 540 uint32_t const cbWrapped = off Read;559 uint32_t const cbWrapped = offWrite; 541 560 Assert(cbForward + cbWrapped <= cbBuf); 542 561 rc = PDMDevHlpPhysReadMeta(pDevIns, GCPhysCmds, pvBuf, cbForward); … … 575 594 uint32_t const uTargetCpuId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_RDBASE); 576 595 uint16_t const uIntrCollectionId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_IC_ID); 577 AssertRelease(uIntrCollectionId < RT_ELEMENTS(pGitsDev->a uCt)); /** @todo later figure ideal/correct CT size. */596 AssertRelease(uIntrCollectionId < RT_ELEMENTS(pGitsDev->aCtes)); /** @todo later figure ideal/correct CT size. */ 578 597 579 598 GITS_CRIT_SECT_ENTER(pDevIns); 580 599 Assert(!RT_BF_GET(pGitsDev->uTypeReg.u, GITS_BF_CTRL_REG_TYPER_PTA)); 581 pGitsDev->a uCt[uIntrCollectionId].fValid = fValid;582 pGitsDev->a uCt[uIntrCollectionId].idTargetCpu = uTargetCpuId;600 pGitsDev->aCtes[uIntrCollectionId].fValid = fValid; 601 pGitsDev->aCtes[uIntrCollectionId].idTargetCpu = uTargetCpuId; 583 602 GITS_CRIT_SECT_LEAVE(pDevIns); 603 STAM_COUNTER_INC(&pGitsDev->StatCmdMapc); 584 604 break; 585 605 } … … 588 608 { 589 609 /* Nothing to do since all previous commands have committed their changes to device state. */ 610 STAM_COUNTER_INC(&pGitsDev->StatCmdSync); 590 611 break; 591 612 } … … 594 615 { 595 616 /* Nothing to do as we currently do not cache interrupt mappings. */ 617 STAM_COUNTER_INC(&pGitsDev->StatCmdInvall); 596 618 break; 597 619 } 598 620 599 621 default: 600 AssertReleaseMsgFailed(("Cmd=%#x (%s)\n", uCmdId, gitsGetCommandName(uCmdId))); 622 //AssertReleaseMsgFailed(("Cmd=%#x (%s) idxCmd=%u cCmds=%u cbCmds=%u\n", uCmdId, 623 // gitsGetCommandName(uCmdId), idxCmd, cCmds, cbCmds)); 624 //break; 601 625 break; 602 626 } -
trunk/src/VBox/VMM/VMMR3/GICR3.cpp
r108864 r108882 962 962 */ 963 963 #ifdef VBOX_WITH_STATISTICS 964 # define GICCPU_REG_COUNTER(a_pvReg, a_pszNameFmt, a_pszDesc) \ 965 PDMDevHlpSTAMRegisterF(pDevIns, a_pvReg, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, \ 966 a_pszDesc, a_pszNameFmt, idCpu) 967 # define GICCPU_PROF_COUNTER(a_pvReg, a_pszNameFmt, a_pszDesc) \ 968 PDMDevHlpSTAMRegisterF(pDevIns, a_pvReg, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, \ 969 a_pszDesc, a_pszNameFmt, idCpu) 964 970 # define GIC_REG_COUNTER(a_pvReg, a_pszNameFmt, a_pszDesc) \ 965 971 PDMDevHlpSTAMRegisterF(pDevIns, a_pvReg, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, \ 966 a_pszDesc, a_pszNameFmt, idCpu) 967 # define GIC_PROF_COUNTER(a_pvReg, a_pszNameFmt, a_pszDesc) \ 968 PDMDevHlpSTAMRegisterF(pDevIns, a_pvReg, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, \ 969 a_pszDesc, a_pszNameFmt, idCpu) 970 972 a_pszDesc, a_pszNameFmt) 973 974 /* Redistributor. */ 971 975 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 972 976 { … … 974 978 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); 975 979 976 GIC_REG_COUNTER(&pGicCpu->StatMmioReadR3, "%u/MmioRead", "Number of MMIO reads in R3."); 977 GIC_REG_COUNTER(&pGicCpu->StatMmioWriteR3, "%u/MmioWrite", "Number of MMIO writes in R3."); 978 GIC_REG_COUNTER(&pGicCpu->StatSysRegReadR3, "%u/SysRegRead", "Number of system register reads in R3."); 979 GIC_REG_COUNTER(&pGicCpu->StatSysRegWriteR3, "%u/SysRegWrite", "Number of system register writes in R3."); 980 GIC_REG_COUNTER(&pGicCpu->StatSetSpiR3, "%u/SetSpi", "Number of set SPI callbacks in R3."); 981 GIC_REG_COUNTER(&pGicCpu->StatSetPpiR3, "%u/SetPpi", "Number of set PPI callbacks in R3."); 982 GIC_REG_COUNTER(&pGicCpu->StatSetSgiR3, "%u/SetSgi", "Number of SGIs generated in R3."); 983 984 GIC_PROF_COUNTER(&pGicCpu->StatProfIntrAckR3, "%u/Prof/IntrAck", "Profiling of interrupt acknowledge (IAR) in R3."); 985 GIC_PROF_COUNTER(&pGicCpu->StatProfSetSpiR3, "%u/Prof/SetSpi", "Profiling of set SPI callback in R3."); 986 GIC_PROF_COUNTER(&pGicCpu->StatProfSetPpiR3, "%u/Prof/SetPpi", "Profiling of set PPI callback in R3."); 987 GIC_PROF_COUNTER(&pGicCpu->StatProfSetSgiR3, "%u/Prof/SetSgi", "Profiling of SGIs generated in R3."); 988 } 989 # undef GIC_REG_COUNTER 990 # undef GIC_PROF_COUNTER 980 GICCPU_REG_COUNTER(&pGicCpu->StatMmioRead, "%u/MmioRead", "Number of MMIO reads."); 981 GICCPU_REG_COUNTER(&pGicCpu->StatMmioWrite, "%u/MmioWrite", "Number of MMIO writes."); 982 GICCPU_REG_COUNTER(&pGicCpu->StatSysRegRead, "%u/SysRegRead", "Number of system register reads."); 983 GICCPU_REG_COUNTER(&pGicCpu->StatSysRegWrite, "%u/SysRegWrite", "Number of system register writes."); 984 GICCPU_REG_COUNTER(&pGicCpu->StatSetSpi, "%u/SetSpi", "Number of set SPI callbacks."); 985 GICCPU_REG_COUNTER(&pGicCpu->StatSetPpi, "%u/SetPpi", "Number of set PPI callbacks."); 986 GICCPU_REG_COUNTER(&pGicCpu->StatSetSgi, "%u/SetSgi", "Number of SGIs generated."); 987 988 GICCPU_PROF_COUNTER(&pGicCpu->StatProfIntrAck, "%u/Prof/IntrAck", "Profiling of interrupt acknowledge (IAR)."); 989 GICCPU_PROF_COUNTER(&pGicCpu->StatProfSetSpi, "%u/Prof/SetSpi", "Profiling of set SPI callback."); 990 GICCPU_PROF_COUNTER(&pGicCpu->StatProfSetPpi, "%u/Prof/SetPpi", "Profiling of set PPI callback."); 991 GICCPU_PROF_COUNTER(&pGicCpu->StatProfSetSgi, "%u/Prof/SetSgi", "Profiling of SGIs generated."); 992 } 993 994 /* ITS. */ 995 PGITSDEV pGitsDev = &pGicDev->Gits; 996 GIC_REG_COUNTER(&pGitsDev->StatCmdMapc, "ITS/Commands/MAPC", "Number of MAPC commands executed."); 997 GIC_REG_COUNTER(&pGitsDev->StatCmdSync, "ITS/Commands/SYNC", "Number of SYNC commands executed."); 998 GIC_REG_COUNTER(&pGitsDev->StatCmdInvall, "ITS/Commands/INVALL", "Number of INVALL commands executed."); 999 1000 # undef GICCPU_REG_COUNTER 1001 # undef GICCPU_PROF_COUNTER 991 1002 #endif 992 1003 -
trunk/src/VBox/VMM/include/GICInternal.h
r108864 r108882 233 233 * @{ */ 234 234 #ifdef VBOX_WITH_STATISTICS 235 /** Number of MMIO reads in R3. */236 STAMCOUNTER StatMmioRead R3;237 /** Number of MMIO writes in R3. */238 STAMCOUNTER StatMmioWrite R3;239 /** Number of MSR reads in R3. */240 STAMCOUNTER StatSysRegRead R3;241 /** Number of MSR writes in R3. */242 STAMCOUNTER StatSysRegWrite R3;235 /** Number of MMIO reads. */ 236 STAMCOUNTER StatMmioRead; 237 /** Number of MMIO writes. */ 238 STAMCOUNTER StatMmioWrite; 239 /** Number of MSR reads. */ 240 STAMCOUNTER StatSysRegRead; 241 /** Number of MSR writes. */ 242 STAMCOUNTER StatSysRegWrite; 243 243 /** Number of set SPI callbacks. */ 244 STAMCOUNTER StatSetSpi R3;244 STAMCOUNTER StatSetSpi; 245 245 /** Number of set PPI callbacks. */ 246 STAMCOUNTER StatSetPpi R3;246 STAMCOUNTER StatSetPpi; 247 247 /** Number of SGIs generated. */ 248 STAMCOUNTER StatSetSgi R3;248 STAMCOUNTER StatSetSgi; 249 249 250 250 /** Profiling of interrupt acknowledge (IAR). */ 251 STAMPROFILE StatProfIntrAck R3;251 STAMPROFILE StatProfIntrAck; 252 252 /** Profiling of set SPI callback. */ 253 STAMPROFILE StatProfSetSpi R3;253 STAMPROFILE StatProfSetSpi; 254 254 /** Profiling of set PPI callback. */ 255 STAMPROFILE StatProfSetPpi R3;255 STAMPROFILE StatProfSetPpi; 256 256 /** Profiling of set SGI function. */ 257 STAMPROFILE StatProfSetSgi R3;257 STAMPROFILE StatProfSetSgi; 258 258 #endif 259 259 /** @} */ -
trunk/src/VBox/VMM/include/GITSInternal.h
r108877 r108882 36 36 #include <VBox/gic-its.h> 37 37 #include <VBox/vmm/pdmthread.h> 38 #include <VBox/vmm/stam.h> 38 39 39 40 /** @defgroup grp_gits_int Internal … … 157 158 */ 158 159 /** The collection table. */ 159 GITSCTE a uCt[2048];160 GITSCTE aCtes[2048]; 160 161 /** @} */ 161 162 … … 166 167 /** Padding. */ 167 168 uint8_t afPadding0[7]; 169 /** @} */ 170 171 /** @name Statistics. 172 * @{ */ 173 #ifdef VBOX_WITH_STATISTICS 174 STAMCOUNTER StatCmdMapc; 175 STAMCOUNTER StatCmdSync; 176 STAMCOUNTER StatCmdInvall; 177 #endif 168 178 /** @} */ 169 179 } GITSDEV; … … 177 187 AssertCompileMemberAlignment(GITSDEV, uCmdWriteReg, 4); 178 188 AssertCompileMemberAlignment(GITSDEV, hEvtCmdQueue, 8); 189 AssertCompileMemberAlignment(GITSDEV, aCtes, 8); 179 190 AssertCompileMemberAlignment(GITSDEV, uArchRev, 8); 180 191
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