Changeset 11311 in vbox for trunk/src/VBox
- Timestamp:
- Aug 8, 2008 11:31:54 PM (17 years ago)
- svn:sync-xref-src-repo-rev:
- 34406
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 31 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/CPUM.cpp
r11298 r11311 508 508 */ 509 509 PCPUMCPUID pCpuId = &pCPUM->aGuestCpuIdStd[0]; 510 uint32_t cElements = ELEMENTS(pCPUM->aGuestCpuIdStd);510 uint32_t cElements = RT_ELEMENTS(pCPUM->aGuestCpuIdStd); 511 511 for (i=0;; ) 512 512 { … … 732 732 SSMR3PutU32(pSSM, pVM->cpum.s.fChanged); 733 733 734 SSMR3PutU32(pSSM, ELEMENTS(pVM->cpum.s.aGuestCpuIdStd));734 SSMR3PutU32(pSSM, RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdStd)); 735 735 SSMR3PutMem(pSSM, &pVM->cpum.s.aGuestCpuIdStd[0], sizeof(pVM->cpum.s.aGuestCpuIdStd)); 736 736 737 SSMR3PutU32(pSSM, ELEMENTS(pVM->cpum.s.aGuestCpuIdExt));737 SSMR3PutU32(pSSM, RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdExt)); 738 738 SSMR3PutMem(pSSM, &pVM->cpum.s.aGuestCpuIdExt[0], sizeof(pVM->cpum.s.aGuestCpuIdExt)); 739 739 740 SSMR3PutU32(pSSM, ELEMENTS(pVM->cpum.s.aGuestCpuIdCentaur));740 SSMR3PutU32(pSSM, RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdCentaur)); 741 741 SSMR3PutMem(pSSM, &pVM->cpum.s.aGuestCpuIdCentaur[0], sizeof(pVM->cpum.s.aGuestCpuIdCentaur)); 742 742 … … 785 785 int rc = SSMR3GetU32(pSSM, &cElements); AssertRCReturn(rc, rc); 786 786 /* Support old saved states with a smaller standard cpuid array. */ 787 if (cElements > ELEMENTS(pVM->cpum.s.aGuestCpuIdStd))787 if (cElements > RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdStd)) 788 788 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 789 789 SSMR3GetMem(pSSM, &pVM->cpum.s.aGuestCpuIdStd[0], cElements*sizeof(pVM->cpum.s.aGuestCpuIdStd[0])); 790 790 791 791 rc = SSMR3GetU32(pSSM, &cElements); AssertRCReturn(rc, rc); 792 if (cElements != ELEMENTS(pVM->cpum.s.aGuestCpuIdExt))792 if (cElements != RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdExt)) 793 793 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 794 794 SSMR3GetMem(pSSM, &pVM->cpum.s.aGuestCpuIdExt[0], sizeof(pVM->cpum.s.aGuestCpuIdExt)); … … 876 876 }; 877 877 char *psz = pszEFlags; 878 for (unsigned i = 0; i < ELEMENTS(s_aFlags); i++)878 for (unsigned i = 0; i < RT_ELEMENTS(s_aFlags); i++) 879 879 { 880 880 const char *pszAdd = s_aFlags[i].fFlag & efl ? s_aFlags[i].pszSet : s_aFlags[i].pszClear; … … 1542 1542 " RAW Extended CPUIDs\n" 1543 1543 " Function eax ebx ecx edx\n"); 1544 for (unsigned i = 0; i < ELEMENTS(pVM->cpum.s.aGuestCpuIdExt); i++)1544 for (unsigned i = 0; i < RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdExt); i++) 1545 1545 { 1546 1546 Guest = pVM->cpum.s.aGuestCpuIdExt[i]; -
trunk/src/VBox/VMM/DBGF.cpp
r9421 r11311 562 562 RTGCPTR eip = pCtx->rip + pCtx->csHid.u64Base; 563 563 #endif 564 for (iBp = 0; iBp < ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++)564 for (iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++) 565 565 if ( pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_REM 566 566 && pVM->dbgf.s.aBreakpoints[iBp].GCPtr == eip) -
trunk/src/VBox/VMM/DBGFBp.cpp
r8155 r11311 68 68 */ 69 69 unsigned i; 70 for (i = 0; i < ELEMENTS(pVM->dbgf.s.aHwBreakpoints); i++)70 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); i++) 71 71 { 72 72 pVM->dbgf.s.aHwBreakpoints[i].iBp = i; … … 75 75 } 76 76 77 for (i = 0; i < ELEMENTS(pVM->dbgf.s.aBreakpoints); i++)78 { 79 pVM->dbgf.s.aBreakpoints[i].iBp = i + ELEMENTS(pVM->dbgf.s.aHwBreakpoints);77 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); i++) 78 { 79 pVM->dbgf.s.aBreakpoints[i].iBp = i + RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); 80 80 pVM->dbgf.s.aBreakpoints[i].enmType = DBGFBPTYPE_FREE; 81 81 } … … 110 110 { 111 111 case DBGFBPTYPE_REG: 112 cBps = ELEMENTS(pVM->dbgf.s.aHwBreakpoints);112 cBps = RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); 113 113 paBps = &pVM->dbgf.s.aHwBreakpoints[0]; 114 114 pcBpsCur = &pVM->dbgf.s.cHwBreakpoints; … … 117 117 case DBGFBPTYPE_INT3: 118 118 case DBGFBPTYPE_REM: 119 cBps = ELEMENTS(pVM->dbgf.s.aBreakpoints);119 cBps = RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); 120 120 paBps = &pVM->dbgf.s.aBreakpoints[0]; 121 121 pcBpsCur = &pVM->dbgf.s.cBreakpoints; … … 156 156 /* Find it. */ 157 157 PDBGFBP pBp; 158 if (iBp < ELEMENTS(pVM->dbgf.s.aHwBreakpoints))158 if (iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints)) 159 159 pBp = &pVM->dbgf.s.aHwBreakpoints[iBp]; 160 160 else 161 161 { 162 iBp -= ELEMENTS(pVM->dbgf.s.aHwBreakpoints);163 if (iBp >= ELEMENTS(pVM->dbgf.s.aBreakpoints))162 iBp -= RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); 163 if (iBp >= RT_ELEMENTS(pVM->dbgf.s.aBreakpoints)) 164 164 return NULL; 165 165 pBp = &pVM->dbgf.s.aBreakpoints[iBp]; … … 205 205 { 206 206 case DBGFBPTYPE_REG: 207 cBps = ELEMENTS(pVM->dbgf.s.aHwBreakpoints);207 cBps = RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); 208 208 paBps = &pVM->dbgf.s.aHwBreakpoints[0]; 209 209 break; … … 211 211 case DBGFBPTYPE_INT3: 212 212 case DBGFBPTYPE_REM: 213 cBps = ELEMENTS(pVM->dbgf.s.aBreakpoints);213 cBps = RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); 214 214 paBps = &pVM->dbgf.s.aBreakpoints[0]; 215 215 break; … … 957 957 */ 958 958 unsigned i; 959 for (i = 0; i < ELEMENTS(pVM->dbgf.s.aHwBreakpoints); i++)959 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); i++) 960 960 if (pVM->dbgf.s.aHwBreakpoints[i].enmType != DBGFBPTYPE_FREE) 961 961 { … … 968 968 * Enumerate the other breakpoints. 969 969 */ 970 for (i = 0; i < ELEMENTS(pVM->dbgf.s.aBreakpoints); i++)970 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); i++) 971 971 if (pVM->dbgf.s.aBreakpoints[i].enmType != DBGFBPTYPE_FREE) 972 972 { -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r9675 r11311 198 198 if (!fRegisteredCmds) 199 199 { 200 int rc = DBGCRegisterCommands(&g_aCmds[0], ELEMENTS(g_aCmds));200 int rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds)); 201 201 if (VBOX_SUCCESS(rc)) 202 202 fRegisteredCmds = true; … … 2405 2405 AssertRC(rc); /* can't fail */ 2406 2406 2407 for (unsigned i=0;i< ELEMENTS(aOpenBsdPushCSOffset);i++)2407 for (unsigned i=0;i<RT_ELEMENTS(aOpenBsdPushCSOffset);i++) 2408 2408 { 2409 2409 rc = CPUMR3DisasmInstrCPU(pVM, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL); -
trunk/src/VBox/VMM/PATM/PATM.cpp
r9675 r11311 184 184 if (!fRegisteredCmds) 185 185 { 186 int rc = DBGCRegisterCommands(&g_aCmds[0], ELEMENTS(g_aCmds));186 int rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds)); 187 187 if (VBOX_SUCCESS(rc)) 188 188 fRegisteredCmds = true; … … 324 324 memset(pVM->patm.s.pGCStateHC, 0, PAGE_SIZE); 325 325 AssertReleaseMsg(pVM->patm.s.pGCStateGC, ("Impossible! MMHyperHC2GC(%p) failed!\n", pVM->patm.s.pGCStateGC)); 326 326 327 327 Log(("Patch memory allocated at %p - %VRv\n", pVM->patm.s.pPatchMemHC, pVM->patm.s.pPatchMemGC)); 328 328 pVM->patm.s.pGCStateHC->uVMFlags = X86_EFL_IF; -
trunk/src/VBox/VMM/PDM.cpp
r11299 r11311 298 298 * The register PCI Buses. 299 299 */ 300 for (unsigned i = 0; i < ELEMENTS(pVM->pdm.s.aPciBuses); i++)300 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pdm.s.aPciBuses); i++) 301 301 { 302 302 if (pVM->pdm.s.aPciBuses[i].pDevInsRC) -
trunk/src/VBox/VMM/PDMDevice.cpp
r11261 r11311 2411 2411 */ 2412 2412 unsigned iBus = 0; 2413 for (iBus = 0; iBus < ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)2413 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++) 2414 2414 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3) 2415 2415 break; 2416 if (iBus >= ELEMENTS(pVM->pdm.s.aPciBuses))2417 { 2418 AssertMsgFailed(("Too many PCI buses. Max=%u\n", ELEMENTS(pVM->pdm.s.aPciBuses)));2416 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses)) 2417 { 2418 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses))); 2419 2419 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER)); 2420 2420 return VERR_INVALID_PARAMETER; -
trunk/src/VBox/VMM/PDMDriver.cpp
r10710 r11311 906 906 int rc = VINF_SUCCESS; 907 907 PVM pVM = pDrvIns->Internal.s.pVM; 908 if (pVM->pdm.s.cPollers < ELEMENTS(pVM->pdm.s.apfnPollers))908 if (pVM->pdm.s.cPollers < RT_ELEMENTS(pVM->pdm.s.apfnPollers)) 909 909 { 910 910 pVM->pdm.s.apfnPollers[pVM->pdm.s.cPollers] = pfnPoller; -
trunk/src/VBox/VMM/PGM.cpp
r11299 r11311 1130 1130 pVM->pgm.s.pGstPaePDPTHC = NULL; 1131 1131 pVM->pgm.s.pGstPaePDPTGC = 0; 1132 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apGstPaePDsHC); i++)1132 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apGstPaePDsHC); i++) 1133 1133 { 1134 1134 pVM->pgm.s.apGstPaePDsHC[i] = NULL; … … 1250 1250 if (!fRegisteredCmds) 1251 1251 { 1252 int rc = DBGCRegisterCommands(&g_aCmds[0], ELEMENTS(g_aCmds));1252 int rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds)); 1253 1253 if (VBOX_SUCCESS(rc)) 1254 1254 fRegisteredCmds = true; … … 1352 1352 1353 1353 ASMMemZeroPage(pVM->pgm.s.pInterPaePDPT); 1354 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apInterPaePDs); i++)1354 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apInterPaePDs); i++) 1355 1355 { 1356 1356 ASMMemZeroPage(pVM->pgm.s.apInterPaePDs[i]); … … 1359 1359 } 1360 1360 1361 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.pInterPaePDPT64->a); i++)1362 { 1363 const unsigned iPD = i % ELEMENTS(pVM->pgm.s.apInterPaePDs);1361 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.pInterPaePDPT64->a); i++) 1362 { 1363 const unsigned iPD = i % RT_ELEMENTS(pVM->pgm.s.apInterPaePDs); 1364 1364 pVM->pgm.s.pInterPaePDPT64->a[i].u = X86_PDPE_P | X86_PDPE_RW | X86_PDPE_US | X86_PDPE_A | PGM_PLXFLAGS_PERMANENT 1365 1365 | MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[iPD]); … … 1367 1367 1368 1368 RTHCPHYS HCPhysInterPaePDPT64 = MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPT64); 1369 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.pInterPaePML4->a); i++)1369 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.pInterPaePML4->a); i++) 1370 1370 pVM->pgm.s.pInterPaePML4->a[i].u = X86_PML4E_P | X86_PML4E_RW | X86_PML4E_US | X86_PML4E_A | PGM_PLXFLAGS_PERMANENT 1371 1371 | HCPhysInterPaePDPT64; … … 1417 1417 ASMMemZero32(pVM->pgm.s.pHCPaePDPT, PAGE_SIZE); 1418 1418 ASMMemZero32(pVM->pgm.s.pHCNestedRoot, PAGE_SIZE); 1419 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)1419 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apHCPaePDs); i++) 1420 1420 { 1421 1421 ASMMemZero32(pVM->pgm.s.apHCPaePDs[i], PAGE_SIZE); … … 1712 1712 * Reserve space for mapping the paging pages into guest context. 1713 1713 */ 1714 int rc = MMR3HyperReserve(pVM, PAGE_SIZE * (2 + ELEMENTS(pVM->pgm.s.apHCPaePDs) + 1 + 2 + 2), "Paging", &GCPtr);1714 int rc = MMR3HyperReserve(pVM, PAGE_SIZE * (2 + RT_ELEMENTS(pVM->pgm.s.apHCPaePDs) + 1 + 2 + 2), "Paging", &GCPtr); 1715 1715 AssertRCReturn(rc, rc); 1716 1716 pVM->pgm.s.pGC32BitPD = GCPtr; … … 1761 1761 GCPtr += PAGE_SIZE; /* reserved page */ 1762 1762 1763 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)1763 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apHCPaePDs); i++) 1764 1764 { 1765 1765 rc = PGMMap(pVM, GCPtr, pVM->pgm.s.aHCPhysPaePDs[i], PAGE_SIZE, 0); … … 1796 1796 /* init cache */ 1797 1797 RTHCPHYS HCPhysDummy = MMR3PageDummyHCPhys(pVM); 1798 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache); i++)1798 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache); i++) 1799 1799 pVM->pgm.s.aHCPhysDynPageMapCache[i] = HCPhysDummy; 1800 1800 … … 1829 1829 pVM->pgm.s.pGC32BitPD += offDelta; 1830 1830 pVM->pgm.s.pGuestPDGC += offDelta; 1831 AssertCompile( ELEMENTS(pVM->pgm.s.apGCPaePDs) ==ELEMENTS(pVM->pgm.s.apGstPaePDsGC));1832 for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apGCPaePDs); i++)1831 AssertCompile(RT_ELEMENTS(pVM->pgm.s.apGCPaePDs) == RT_ELEMENTS(pVM->pgm.s.apGstPaePDsGC)); 1832 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apGCPaePDs); i++) 1833 1833 { 1834 1834 pVM->pgm.s.apGCPaePDs[i] += offDelta; … … 2539 2539 * Iterate the page directory. 2540 2540 */ 2541 for (unsigned iPD = 0; iPD < ELEMENTS(pPDSrc->a); iPD++)2541 for (unsigned iPD = 0; iPD < RT_ELEMENTS(pPDSrc->a); iPD++) 2542 2542 { 2543 2543 X86PDE PdeSrc = pPDSrc->a[iPD]; … … 3422 3422 static int pgmR3DumpHierarchyHCPaePT(PVM pVM, PX86PTPAE pPT, uint64_t u64Address, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp) 3423 3423 { 3424 for (unsigned i = 0; i < ELEMENTS(pPT->a); i++)3424 for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++) 3425 3425 { 3426 3426 X86PTEPAE Pte = pPT->a[i]; … … 3475 3475 3476 3476 int rc = VINF_SUCCESS; 3477 for (unsigned i = 0; i < ELEMENTS(pPD->a); i++)3477 for (unsigned i = 0; i < RT_ELEMENTS(pPD->a); i++) 3478 3478 { 3479 3479 X86PDEPAE Pde = pPD->a[i]; … … 3582 3582 3583 3583 int rc = VINF_SUCCESS; 3584 const unsigned c = fLongMode ? ELEMENTS(pPDPT->a) : X86_PG_PAE_PDPE_ENTRIES;3584 const unsigned c = fLongMode ? RT_ELEMENTS(pPDPT->a) : X86_PG_PAE_PDPE_ENTRIES; 3585 3585 for (unsigned i = 0; i < c; i++) 3586 3586 { … … 3651 3651 3652 3652 int rc = VINF_SUCCESS; 3653 for (unsigned i = 0; i < ELEMENTS(pPML4->a); i++)3653 for (unsigned i = 0; i < RT_ELEMENTS(pPML4->a); i++) 3654 3654 { 3655 3655 X86PML4E Pml4e = pPML4->a[i]; … … 3697 3697 int pgmR3DumpHierarchyHC32BitPT(PVM pVM, PX86PT pPT, uint32_t u32Address, PCDBGFINFOHLP pHlp) 3698 3698 { 3699 for (unsigned i = 0; i < ELEMENTS(pPT->a); i++)3699 for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++) 3700 3700 { 3701 3701 X86PTE Pte = pPT->a[i]; … … 3743 3743 3744 3744 int rc = VINF_SUCCESS; 3745 for (unsigned i = 0; i < ELEMENTS(pPD->a); i++)3745 for (unsigned i = 0; i < RT_ELEMENTS(pPD->a); i++) 3746 3746 { 3747 3747 X86PDE Pde = pPD->a[i]; … … 3827 3827 int pgmR3DumpHierarchyGC32BitPT(PVM pVM, PX86PT pPT, uint32_t u32Address, RTGCPHYS PhysSearch) 3828 3828 { 3829 for (unsigned i = 0; i < ELEMENTS(pPT->a); i++)3829 for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++) 3830 3830 { 3831 3831 X86PTE Pte = pPT->a[i]; … … 3905 3905 cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address")); 3906 3906 3907 for (unsigned i = 0; i < ELEMENTS(pPD->a); i++)3907 for (unsigned i = 0; i < RT_ELEMENTS(pPD->a); i++) 3908 3908 { 3909 3909 X86PDE Pde = pPD->a[i]; -
trunk/src/VBox/VMM/PGMMap.cpp
r11299 r11311 894 894 */ 895 895 const unsigned cPTs = pMapping->cPTs; 896 unsigned iPDNew = ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */896 unsigned iPDNew = RT_ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */ 897 897 while (iPDNew-- > 0) 898 898 { … … 963 963 */ 964 964 const unsigned cPTs = pMapping->cb >> X86_PD_PAE_SHIFT; 965 unsigned iPDNew = ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */965 unsigned iPDNew = RT_ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */ 966 966 967 967 while (iPDNew-- > 0) … … 1150 1150 unsigned iPT = off >> X86_PD_SHIFT; 1151 1151 unsigned iPTE = (off >> PAGE_SHIFT) & X86_PT_MASK; 1152 while (cb > 0 && iPTE < ELEMENTS(CTXALLSUFF(pCur->aPTs[iPT].pPT)->a))1152 while (cb > 0 && iPTE < RT_ELEMENTS(CTXALLSUFF(pCur->aPTs[iPT].pPT)->a)) 1153 1153 { 1154 1154 if (!CTXALLSUFF(pCur->aPTs[iPT].paPaePTs)[iPTE / 512].a[iPTE % 512].n.u1Present) -
trunk/src/VBox/VMM/PGMPool.cpp
r10032 r11311 220 220 #endif 221 221 #ifdef PGMPOOL_WITH_CACHE 222 for (unsigned i = 0; i < ELEMENTS(pPool->aiHash); i++)222 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++) 223 223 pPool->aiHash[i] = NIL_PGMPOOL_IDX; 224 224 pPool->iAgeHead = NIL_PGMPOOL_IDX; … … 259 259 pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].idx = PGMPOOL_IDX_PAE_PD_0 + i; 260 260 } 261 261 262 262 /* The Shadow PDPT. */ 263 263 pPool->aPages[PGMPOOL_IDX_PDPT].Core.Key = NIL_RTHCPHYS; -
trunk/src/VBox/VMM/STAM.cpp
r8155 r11311 148 148 { 149 149 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, pResultDesc, fFlags, pfnHandler pszSyntax, ....pszDescription */ 150 { "stats", 0, 1, &g_aArgPat[0], ELEMENTS(g_aArgPat), NULL, 0, stamR3CmdStats, "[pattern]", "Display statistics." },151 { "statsreset", 0, 1, &g_aArgPat[0], ELEMENTS(g_aArgPat), NULL, 0, stamR3CmdStatsReset,"[pattern]", "Resets statistics." }150 { "stats", 0, 1, &g_aArgPat[0], RT_ELEMENTS(g_aArgPat), NULL, 0, stamR3CmdStats, "[pattern]", "Display statistics." }, 151 { "statsreset", 0, 1, &g_aArgPat[0], RT_ELEMENTS(g_aArgPat), NULL, 0, stamR3CmdStatsReset,"[pattern]", "Resets statistics." } 152 152 }; 153 153 #endif … … 221 221 if (!fRegisteredCmds) 222 222 { 223 int rc = DBGCRegisterCommands(&g_aCmds[0], ELEMENTS(g_aCmds));223 int rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds)); 224 224 if (VBOX_SUCCESS(rc)) 225 225 fRegisteredCmds = true; -
trunk/src/VBox/VMM/TM.cpp
r11299 r11311 647 647 uint64_t au64Samples[5]; 648 648 unsigned i; 649 for (i = 0; i < ELEMENTS(au64Samples); i++)649 for (i = 0; i < RT_ELEMENTS(au64Samples); i++) 650 650 { 651 651 unsigned cMillies; … … 674 674 unsigned iHigh = 0; 675 675 unsigned iLow = 0; 676 for (i = 1; i < ELEMENTS(au64Samples); i++)676 for (i = 1; i < RT_ELEMENTS(au64Samples); i++) 677 677 { 678 678 if (au64Samples[i] < au64Samples[iLow]) … … 685 685 686 686 u64Hz = au64Samples[0]; 687 for (i = 1; i < ELEMENTS(au64Samples); i++)687 for (i = 1; i < RT_ELEMENTS(au64Samples); i++) 688 688 u64Hz += au64Samples[i]; 689 u64Hz /= ELEMENTS(au64Samples) - 2;689 u64Hz /= RT_ELEMENTS(au64Samples) - 2; 690 690 691 691 return u64Hz; -
trunk/src/VBox/VMM/TRPM.cpp
r11299 r11311 431 431 AssertRelease(!(RT_OFFSETOF(VM, trpm.s.aIdt) & 15)); 432 432 AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding)); 433 AssertRelease( ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8);433 AssertRelease(RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8); 434 434 435 435 /* … … 573 573 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[0]; 574 574 PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[0]; 575 for (unsigned i = 0; i < ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++)575 for (unsigned i = 0; i < RT_ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++) 576 576 { 577 577 if ( pIdte->Gen.u1Present … … 631 631 632 632 /* Relocate IDT handlers for forwarding guest traps/interrupts. */ 633 for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)633 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++) 634 634 { 635 635 if (pVM->trpm.s.aGuestTrapHandler[iTrap] != TRPM_INVALID_HANDLER) … … 748 748 * Save any trampoline gates. 749 749 */ 750 for (uint32_t iTrap = 0; iTrap < ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++)750 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++) 751 751 { 752 752 if (pTrpm->aGuestTrapHandler[iTrap]) … … 847 847 if (iTrap == (uint32_t)~0) 848 848 break; 849 if ( iTrap >= ELEMENTS(pTrpm->aIdt)849 if ( iTrap >= RT_ELEMENTS(pTrpm->aIdt) 850 850 || pTrpm->aGuestTrapHandler[iTrap]) 851 851 { … … 1060 1060 1061 1061 if ( iTrap < TRPM_HANDLER_INT_BASE 1062 || iTrap >= ELEMENTS(pVM->trpm.s.aIdt))1062 || iTrap >= RT_ELEMENTS(pVM->trpm.s.aIdt)) 1063 1063 { 1064 1064 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %#x!\n", iTrap)); … … 1109 1109 TRPMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr) 1110 1110 { 1111 for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)1111 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++) 1112 1112 { 1113 1113 if (pVM->trpm.s.aGuestTrapHandler[iTrap] == GCPtr) … … 1137 1137 TRPMR3DECL(RTRCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap) 1138 1138 { 1139 AssertReturn(iTrap < ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER);1139 AssertReturn(iTrap < RT_ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER); 1140 1140 1141 1141 return pVM->trpm.s.aGuestTrapHandler[iTrap]; … … 1157 1157 * Validate. 1158 1158 */ 1159 if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))1159 if (iTrap >= RT_ELEMENTS(pVM->trpm.s.aIdt)) 1160 1160 { 1161 1161 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap)); -
trunk/src/VBox/VMM/VMM.cpp
r11141 r11311 225 225 */ 226 226 unsigned cbCoreCode = 0; 227 for (unsigned iSwitcher = 0; iSwitcher < ELEMENTS(s_apSwitchers); iSwitcher++)227 for (unsigned iSwitcher = 0; iSwitcher < RT_ELEMENTS(s_apSwitchers); iSwitcher++) 228 228 { 229 229 pVM->vmm.s.aoffSwitchers[iSwitcher] = cbCoreCode; … … 298 298 * copy the code. 299 299 */ 300 for (unsigned iSwitcher = 0; iSwitcher < ELEMENTS(s_apSwitchers); iSwitcher++)300 for (unsigned iSwitcher = 0; iSwitcher < RT_ELEMENTS(s_apSwitchers); iSwitcher++) 301 301 { 302 302 PVMMSWITCHERDEF pSwitcher = s_apSwitchers[iSwitcher]; … … 817 817 * All the switchers. 818 818 */ 819 for (unsigned iSwitcher = 0; iSwitcher < ELEMENTS(s_apSwitchers); iSwitcher++)819 for (unsigned iSwitcher = 0; iSwitcher < RT_ELEMENTS(s_apSwitchers); iSwitcher++) 820 820 { 821 821 PVMMSWITCHERDEF pSwitcher = s_apSwitchers[iSwitcher]; … … 2654 2654 { "cfgm", NULL }, 2655 2655 }; 2656 for (unsigned i = 0; i < ELEMENTS(aInfo); i++)2656 for (unsigned i = 0; i < RT_ELEMENTS(aInfo); i++) 2657 2657 { 2658 2658 if (fDoneHyper && !strcmp(aInfo[i].pszInfo, "cpumhyper")) -
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r11299 r11311 966 966 { 967 967 PCCPUMCPUID pCpuId; 968 if (iLeaf < ELEMENTS(pVM->cpum.s.aGuestCpuIdStd))968 if (iLeaf < RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdStd)) 969 969 pCpuId = &pVM->cpum.s.aGuestCpuIdStd[iLeaf]; 970 970 else if (iLeaf - UINT32_C(0x80000000) < RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdExt)) -
trunk/src/VBox/VMM/VMMAll/DBGFAll.cpp
r8155 r11311 41 41 RTGCUINTREG uDr7 = X86_DR7_GD | X86_DR7_GE | X86_DR7_LE | X86_DR7_MB1_MASK; 42 42 PDBGFBP pBp = &pVM->dbgf.s.aHwBreakpoints[0]; 43 unsigned cLeft = ELEMENTS(pVM->dbgf.s.aHwBreakpoints);43 unsigned cLeft = RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); 44 44 while (cLeft-- > 0) 45 45 { -
trunk/src/VBox/VMM/VMMAll/MMAllHyper.cpp
r8155 r11311 809 809 * Check poison. 810 810 */ 811 unsigned i = ELEMENTS(pHeap->aDelayedFrees);811 unsigned i = RT_ELEMENTS(pHeap->aDelayedFrees); 812 812 while (i-- > 0) 813 813 if (pHeap->aDelayedFrees[i].offChunk) … … 836 836 pHeap->aDelayedFrees[pHeap->iDelayedFree].offChunk = (uintptr_t)pChunk - (uintptr_t)pHeap; 837 837 pHeap->aDelayedFrees[pHeap->iDelayedFree].uCaller = (uintptr_t)ASMReturnAddress(); 838 pHeap->iDelayedFree = (pHeap->iDelayedFree + 1) % ELEMENTS(pHeap->aDelayedFrees);838 pHeap->iDelayedFree = (pHeap->iDelayedFree + 1) % RT_ELEMENTS(pHeap->aDelayedFrees); 839 839 840 840 #else /* !MMHYPER_HEAP_FREE_POISON */ -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r10822 r11311 1607 1607 const unsigned offPTSrc = 0; 1608 1608 # endif 1609 const unsigned iPTDstEnd = RT_MIN(iPTDst + PGM_SYNC_NR_PAGES / 2, ELEMENTS(pPTDst->a));1609 const unsigned iPTDstEnd = RT_MIN(iPTDst + PGM_SYNC_NR_PAGES / 2, RT_ELEMENTS(pPTDst->a)); 1610 1610 if (iPTDst < PGM_SYNC_NR_PAGES / 2) 1611 1611 iPTDst = 0; … … 1808 1808 */ 1809 1809 unsigned iPTDst = (GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK; 1810 const unsigned iPTDstEnd = RT_MIN(iPTDst + PGM_SYNC_NR_PAGES / 2, ELEMENTS(pPTDst->a));1810 const unsigned iPTDstEnd = RT_MIN(iPTDst + PGM_SYNC_NR_PAGES / 2, RT_ELEMENTS(pPTDst->a)); 1811 1811 if (iPTDst < PGM_SYNC_NR_PAGES / 2) 1812 1812 iPTDst = 0; … … 2408 2408 unsigned iPTBase = (GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK; 2409 2409 unsigned iPTDst = iPTBase; 2410 const unsigned iPTDstEnd = RT_MIN(iPTDst + PGM_SYNC_NR_PAGES / 2, ELEMENTS(pPTDst->a));2410 const unsigned iPTDstEnd = RT_MIN(iPTDst + PGM_SYNC_NR_PAGES / 2, RT_ELEMENTS(pPTDst->a)); 2411 2411 if (iPTDst <= PGM_SYNC_NR_PAGES / 2) 2412 2412 iPTDst = 0; … … 2415 2415 # else /* !PGM_SYNC_N_PAGES */ 2416 2416 unsigned iPTDst = 0; 2417 const unsigned iPTDstEnd = ELEMENTS(pPTDst->a);2417 const unsigned iPTDstEnd = RT_ELEMENTS(pPTDst->a); 2418 2418 # endif /* !PGM_SYNC_N_PAGES */ 2419 2419 # if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE == PGM_TYPE_32BIT … … 2508 2508 PPGMRAMRANGE pRam = CTXALLSUFF(pVM->pgm.s.pRamRanges); 2509 2509 unsigned iPTDst = 0; 2510 while (iPTDst < ELEMENTS(pPTDst->a))2510 while (iPTDst < RT_ELEMENTS(pPTDst->a)) 2511 2511 { 2512 2512 /* Advance ram range list. */ … … 2573 2573 iHCPage++; 2574 2574 iPTDst++; 2575 } while ( iPTDst < ELEMENTS(pPTDst->a)2575 } while ( iPTDst < RT_ELEMENTS(pPTDst->a) 2576 2576 && GCPhys <= pRam->GCPhysLast); 2577 2577 } … … 2584 2584 GCPhys += PAGE_SIZE; 2585 2585 iPTDst++; 2586 } while ( iPTDst < ELEMENTS(pPTDst->a)2586 } while ( iPTDst < RT_ELEMENTS(pPTDst->a) 2587 2587 && GCPhys < pRam->GCPhys); 2588 2588 } … … 2590 2590 { 2591 2591 Log(("Invalid pages at %VGp (2)\n", GCPhys)); 2592 for ( ; iPTDst < ELEMENTS(pPTDst->a); iPTDst++)2592 for ( ; iPTDst < RT_ELEMENTS(pPTDst->a); iPTDst++) 2593 2593 pPTDst->a[iPTDst].u = 0; /* MMIO or invalid page, we must handle them manually. */ 2594 2594 } … … 3021 3021 PGM_GST_NAME(HandlerVirtualUpdate)(pVM, cr4); 3022 3022 STAM_PROFILE_STOP(&pVM->pgm.s.CTXMID(Stat,SyncCR3Handlers), h); 3023 #endif 3023 #endif 3024 3024 3025 3025 #ifdef PGMPOOL_WITH_MONITORING … … 3141 3141 LogFlow(("SyncCR3: guest PDPE %d not present; clear shw pdpe\n", iPdpte)); 3142 3142 /* for each page directory entry */ 3143 for (unsigned iPD = 0; iPD < ELEMENTS(pPDSrc->a); iPD++)3143 for (unsigned iPD = 0; iPD < RT_ELEMENTS(pPDSrc->a); iPD++) 3144 3144 { 3145 3145 if ( pPDEDst[iPD].n.u1Present … … 3183 3183 3184 3184 /* Fetch the pgm pool shadow descriptor if the shadow pdpte is present. */ 3185 if (!pPdpeDst->n.u1Present) 3185 if (!pPdpeDst->n.u1Present) 3186 3186 continue; /* next PDPTE */ 3187 3187 … … 3189 3189 GCPhysPdeSrc = PdpeSrc.u & X86_PDPE_PG_MASK; 3190 3190 3191 /* Anything significant changed? */ 3191 /* Anything significant changed? */ 3192 3192 if ( PdpeSrc.n.u1Present != pPdpeDst->n.u1Present 3193 3193 || GCPhysPdeSrc != pShwPde->GCPhys) … … 3212 3212 { 3213 3213 # endif /* PGM_GST_TYPE != PGM_TYPE_PAE && PGM_GST_TYPE != PGM_TYPE_AMD64 */ 3214 for (unsigned iPD = 0; iPD < ELEMENTS(pPDSrc->a); iPD++)3214 for (unsigned iPD = 0; iPD < RT_ELEMENTS(pPDSrc->a); iPD++) 3215 3215 { 3216 3216 # if PGM_SHW_TYPE == PGM_TYPE_32BIT … … 3689 3689 pPdpeDst = &pPdptDst->a[iPdpte]; 3690 3690 3691 if (!pPdpeDst->n.u1Present) 3691 if (!pPdpeDst->n.u1Present) 3692 3692 { 3693 3693 GCPtr += 512 * _2M; … … 3891 3891 # endif 3892 3892 for (unsigned iPT = 0, off = 0; 3893 iPT < ELEMENTS(pPTDst->a);3893 iPT < RT_ELEMENTS(pPTDst->a); 3894 3894 iPT++, off += PAGE_SIZE) 3895 3895 { … … 4133 4133 /* iterate the page table. */ 4134 4134 for (unsigned iPT = 0, off = 0; 4135 iPT < ELEMENTS(pPTDst->a);4135 iPT < RT_ELEMENTS(pPTDst->a); 4136 4136 iPT++, off += PAGE_SIZE, GCPhysGst += PAGE_SIZE) 4137 4137 { -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r8856 r11311 189 189 unsigned iPT = off >> X86_PD_SHIFT; 190 190 unsigned iPTE = (off >> PAGE_SHIFT) & X86_PT_MASK; 191 while (cb > 0 && iPTE < ELEMENTS(CTXALLSUFF(pCur->aPTs[iPT].pPT)->a))191 while (cb > 0 && iPTE < RT_ELEMENTS(CTXALLSUFF(pCur->aPTs[iPT].pPT)->a)) 192 192 { 193 193 /* 32-Bit */ -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r11299 r11311 326 326 { 327 327 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTEPAE); 328 AssertReturnVoid(iShw2 < ELEMENTS(uShw.pPTPae->a));328 AssertReturnVoid(iShw2 < RT_ELEMENTS(uShw.pPTPae->a)); 329 329 330 330 if (uShw.pPTPae->a[iShw2].n.u1Present) … … 360 360 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTE); 361 361 if ( iShw2 != iShw 362 && iShw2 < ELEMENTS(uShw.pPD->a)362 && iShw2 < RT_ELEMENTS(uShw.pPD->a) 363 363 && uShw.pPD->a[iShw2].u & PGM_PDFLAGS_MAPPING) 364 364 { … … 400 400 { 401 401 const unsigned iShw2 = iShw + 2; 402 if ( iShw2 < ELEMENTS(uShw.pPDPae->a)402 if ( iShw2 < RT_ELEMENTS(uShw.pPDPae->a) 403 403 && (uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P)) 404 404 { … … 458 458 { 459 459 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE); 460 AssertReturnVoid(iShw2 < ELEMENTS(uShw.pPDPae->a));460 AssertReturnVoid(iShw2 < RT_ELEMENTS(uShw.pPDPae->a)); 461 461 462 462 if ( iShw2 != iShw … … 491 491 */ 492 492 const unsigned iShw = off / sizeof(X86PDPE); 493 if (iShw < X86_PG_PAE_PDPE_ENTRIES) /* don't use ELEMENTS(uShw.pPDPT->a), because that's for long mode only */493 if (iShw < X86_PG_PAE_PDPE_ENTRIES) /* don't use RT_ELEMENTS(uShw.pPDPT->a), because that's for long mode only */ 494 494 { 495 495 if (uShw.pPDPT->a[iShw].u & PGM_PLXFLAGS_MAPPING) … … 548 548 { 549 549 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE); 550 AssertReturnVoid(iShw2 < ELEMENTS(uShw.pPDPae->a));550 AssertReturnVoid(iShw2 < RT_ELEMENTS(uShw.pPDPae->a)); 551 551 552 552 if ( iShw2 != iShw … … 2349 2349 const uint32_t u32 = PGM_PAGE_GET_HCPHYS(pPhysPage) | X86_PTE_P; 2350 2350 PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage); 2351 for (unsigned i = pPage->iFirstPresent; i < ELEMENTS(pPT->a); i++)2351 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++) 2352 2352 if ((pPT->a[i].u & (X86_PTE_PG_MASK | X86_PTE_P)) == u32) 2353 2353 { … … 2360 2360 #if defined(DEBUG) && !defined(IN_RING0) ///@todo RTLogPrintf is missing in R0. 2361 2361 RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent); 2362 for (unsigned i = 0; i < ELEMENTS(pPT->a); i++)2362 for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++) 2363 2363 if ((pPT->a[i].u & (X86_PTE_PG_MASK | X86_PTE_P)) == u32) 2364 2364 { … … 2379 2379 const uint64_t u64 = PGM_PAGE_GET_HCPHYS(pPhysPage) | X86_PTE_P; 2380 2380 PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage); 2381 for (unsigned i = pPage->iFirstPresent; i < ELEMENTS(pPT->a); i++)2381 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++) 2382 2382 if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK | X86_PTE_P)) == u64) 2383 2383 { … … 2390 2390 #if defined(DEBUG) && !defined(IN_RING0) ///@todo RTLogPrintf is missing in R0. 2391 2391 RTLogPrintf("cRefs=%d iFirstPresent=%d cPresent=%d\n", cRefs, pPage->iFirstPresent, pPage->cPresent); 2392 for (unsigned i = 0; i < ELEMENTS(pPT->a); i++)2392 for (unsigned i = 0; i < RT_ELEMENTS(pPT->a); i++) 2393 2393 if ((pPT->a[i].u & (X86_PTE_PAE_PG_MASK | X86_PTE_P)) == u64) 2394 2394 { … … 2445 2445 Assert(iPhysExt < pPool->cMaxPhysExts); 2446 2446 pPhysExt = &pPool->CTXSUFF(paPhysExts)[iPhysExt]; 2447 for (unsigned i = 0; i < ELEMENTS(pPhysExt->aidx); i++)2447 for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++) 2448 2448 if (pPhysExt->aidx[i] != NIL_PGMPOOL_IDX) 2449 2449 { … … 2523 2523 unsigned cPresent = pPage->cPresent; 2524 2524 PX86PT pPT = (PX86PT)PGMPOOL_PAGE_2_PTR(pVM, pPage); 2525 for (unsigned i = pPage->iFirstPresent; i < ELEMENTS(pPT->a); i++)2525 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++) 2526 2526 if (pPT->a[i].n.u1Present) 2527 2527 { … … 2545 2545 unsigned cPresent = pPage->cPresent; 2546 2546 PX86PTPAE pPT = (PX86PTPAE)PGMPOOL_PAGE_2_PTR(pVM, pPage); 2547 for (unsigned i = pPage->iFirstPresent; i < ELEMENTS(pPT->a); i++)2547 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pPT->a); i++) 2548 2548 if (pPT->a[i].n.u1Present) 2549 2549 { … … 2730 2730 Assert(iPhysExt < pPool->cMaxPhysExts); 2731 2731 PPGMPOOLPHYSEXT pPhysExt = &pPool->CTXSUFF(paPhysExts)[iPhysExt]; 2732 for (unsigned i = 0; i < ELEMENTS(pPhysExt->aidx); i++)2732 for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++) 2733 2733 pPhysExt->aidx[i] = NIL_PGMPOOL_IDX; 2734 2734 pPhysExt->iNext = pPool->iPhysExtFreeHead; … … 2753 2753 Assert(iPhysExt < pPool->cMaxPhysExts); 2754 2754 pPhysExt = &pPool->CTXSUFF(paPhysExts)[iPhysExt]; 2755 for (unsigned i = 0; i < ELEMENTS(pPhysExt->aidx); i++)2755 for (unsigned i = 0; i < RT_ELEMENTS(pPhysExt->aidx); i++) 2756 2756 pPhysExt->aidx[i] = NIL_PGMPOOL_IDX; 2757 2757 … … 2794 2794 { 2795 2795 Assert(iPhysExt < pPool->cMaxPhysExts); 2796 for (unsigned i = 0; i < ELEMENTS(paPhysExts[iPhysExt].aidx); i++)2796 for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++) 2797 2797 if (paPhysExts[iPhysExt].aidx[i] == NIL_PGMPOOL_IDX) 2798 2798 { … … 2893 2893 * Look for the shadow page and check if it's all freed. 2894 2894 */ 2895 for (unsigned i = 0; i < ELEMENTS(paPhysExts[iPhysExt].aidx); i++)2895 for (unsigned i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++) 2896 2896 { 2897 2897 if (paPhysExts[iPhysExt].aidx[i] == pPage->idx) … … 2899 2899 paPhysExts[iPhysExt].aidx[i] = NIL_PGMPOOL_IDX; 2900 2900 2901 for (i = 0; i < ELEMENTS(paPhysExts[iPhysExt].aidx); i++)2901 for (i = 0; i < RT_ELEMENTS(paPhysExts[iPhysExt].aidx); i++) 2902 2902 if (paPhysExts[iPhysExt].aidx[i] != NIL_PGMPOOL_IDX) 2903 2903 { … … 3059 3059 DECLINLINE(void) pgmPoolTrackDerefPT32Bit32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PT pShwPT, PCX86PT pGstPT) 3060 3060 { 3061 for (unsigned i = pPage->iFirstPresent; i < ELEMENTS(pShwPT->a); i++)3061 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pShwPT->a); i++) 3062 3062 if (pShwPT->a[i].n.u1Present) 3063 3063 { … … 3081 3081 DECLINLINE(void) pgmPoolTrackDerefPTPae32Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PT pGstPT) 3082 3082 { 3083 for (unsigned i = 0; i < ELEMENTS(pShwPT->a); i++)3083 for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++) 3084 3084 if (pShwPT->a[i].n.u1Present) 3085 3085 { … … 3101 3101 DECLINLINE(void) pgmPoolTrackDerefPTPaePae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PTPAE pShwPT, PCX86PTPAE pGstPT) 3102 3102 { 3103 for (unsigned i = 0; i < ELEMENTS(pShwPT->a); i++)3103 for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++) 3104 3104 if (pShwPT->a[i].n.u1Present) 3105 3105 { … … 3121 3121 { 3122 3122 RTGCPHYS GCPhys = pPage->GCPhys; 3123 for (unsigned i = 0; i < ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)3123 for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE) 3124 3124 if (pShwPT->a[i].n.u1Present) 3125 3125 { … … 3141 3141 { 3142 3142 RTGCPHYS GCPhys = pPage->GCPhys; 3143 for (unsigned i = 0; i < ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE)3143 for (unsigned i = 0; i < RT_ELEMENTS(pShwPT->a); i++, GCPhys += PAGE_SIZE) 3144 3144 if (pShwPT->a[i].n.u1Present) 3145 3145 { … … 3161 3161 DECLINLINE(void) pgmPoolTrackDerefPDPae(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPAE pShwPD) 3162 3162 { 3163 for (unsigned i = 0; i < ELEMENTS(pShwPD->a); i++)3163 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++) 3164 3164 { 3165 3165 if (pShwPD->a[i].n.u1Present) … … 3185 3185 DECLINLINE(void) pgmPoolTrackDerefPDPT64Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PDPT pShwPDPT) 3186 3186 { 3187 for (unsigned i = 0; i < ELEMENTS(pShwPDPT->a); i++)3187 for (unsigned i = 0; i < RT_ELEMENTS(pShwPDPT->a); i++) 3188 3188 { 3189 3189 if (pShwPDPT->a[i].n.u1Present) … … 3208 3208 DECLINLINE(void) pgmPoolTrackDerefPML464Bit(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PX86PML4 pShwPML4) 3209 3209 { 3210 for (unsigned i = 0; i < ELEMENTS(pShwPML4->a); i++)3210 for (unsigned i = 0; i < RT_ELEMENTS(pShwPML4->a); i++) 3211 3211 { 3212 3212 if (pShwPML4->a[i].n.u1Present) … … 3506 3506 * Clear the GCPhys hash and the age list. 3507 3507 */ 3508 for (unsigned i = 0; i < ELEMENTS(pPool->aiHash); i++)3508 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++) 3509 3509 pPool->aiHash[i] = NIL_PGMPOOL_IDX; 3510 3510 pPool->iAgeHead = NIL_PGMPOOL_IDX; -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r9893 r11311 303 303 304 304 unsigned iPTE = (GCPtr >> SHW_PT_SHIFT) & SHW_PT_MASK; 305 while (iPTE < ELEMENTS(pPT->a))305 while (iPTE < RT_ELEMENTS(pPT->a)) 306 306 { 307 307 if (pPT->a[iPTE].n.u1Present) -
trunk/src/VBox/VMM/VMMAll/REMAll.cpp
r10410 r11311 46 46 REMDECL(int) REMNotifyInvalidatePage(PVM pVM, RTGCPTR GCPtrPage) 47 47 { 48 if (pVM->rem.s.cInvalidatedPages < ELEMENTS(pVM->rem.s.aGCPtrInvalidatedPages))48 if (pVM->rem.s.cInvalidatedPages < RT_ELEMENTS(pVM->rem.s.aGCPtrInvalidatedPages)) 49 49 { 50 50 /* … … 94 94 REMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 95 95 { 96 if (pVM->rem.s.cHandlerNotifications >= ELEMENTS(pVM->rem.s.aHandlerNotifications))96 if (pVM->rem.s.cHandlerNotifications >= RT_ELEMENTS(pVM->rem.s.aHandlerNotifications)) 97 97 remFlushHandlerNotifications(pVM); 98 98 PREMHANDLERNOTIFICATION pRec = &pVM->rem.s.aHandlerNotifications[pVM->rem.s.cHandlerNotifications++]; … … 118 118 REMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 119 119 { 120 if (pVM->rem.s.cHandlerNotifications >= ELEMENTS(pVM->rem.s.aHandlerNotifications))120 if (pVM->rem.s.cHandlerNotifications >= RT_ELEMENTS(pVM->rem.s.aHandlerNotifications)) 121 121 remFlushHandlerNotifications(pVM); 122 122 PREMHANDLERNOTIFICATION pRec = &pVM->rem.s.aHandlerNotifications[pVM->rem.s.cHandlerNotifications++]; … … 144 144 REMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 145 145 { 146 if (pVM->rem.s.cHandlerNotifications >= ELEMENTS(pVM->rem.s.aHandlerNotifications))146 if (pVM->rem.s.cHandlerNotifications >= RT_ELEMENTS(pVM->rem.s.aHandlerNotifications)) 147 147 remFlushHandlerNotifications(pVM); 148 148 PREMHANDLERNOTIFICATION pRec = &pVM->rem.s.aHandlerNotifications[pVM->rem.s.cHandlerNotifications++]; -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r10087 r11311 835 835 * Validate. 836 836 */ 837 if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))837 if (iTrap >= RT_ELEMENTS(pVM->trpm.s.aIdt)) 838 838 { 839 839 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap)); -
trunk/src/VBox/VMM/VMMGC/PGMGC.cpp
r8155 r11311 266 266 || pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 3] == HCPhys) 267 267 { 268 static const uint8_t au8Trans[MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT][ ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache)] =268 static const uint8_t au8Trans[MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT][RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache)] = 269 269 { 270 270 { 0, 5, 6, 7 }, … … 277 277 { 4, 5, 6, 7 }, 278 278 }; 279 Assert( ELEMENTS(au8Trans) == 8);280 Assert( ELEMENTS(au8Trans[0]) == 4);279 Assert(RT_ELEMENTS(au8Trans) == 8); 280 Assert(RT_ELEMENTS(au8Trans[0]) == 4); 281 281 int iPage = au8Trans[pVM->pgm.s.iDynPageMapLast][iCache]; 282 282 void *pv = pVM->pgm.s.pbDynPageMapBaseGC + (iPage << PAGE_SHIFT); … … 286 286 return VINF_SUCCESS; 287 287 } 288 Assert( ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) == 4);288 Assert(RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) == 4); 289 289 STAM_COUNTER_INC(&pVM->pgm.s.StatDynMapCacheMisses); 290 290 … … 296 296 Assert((MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT) == 8); 297 297 298 pVM->pgm.s.aHCPhysDynPageMapCache[iPage & ( ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) - 1)] = HCPhys;298 pVM->pgm.s.aHCPhysDynPageMapCache[iPage & (RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) - 1)] = HCPhys; 299 299 pVM->pgm.s.paDynPageMap32BitPTEsGC[iPage].u = (uint32_t)HCPhys | X86_PTE_P | X86_PTE_A | X86_PTE_D; 300 300 pVM->pgm.s.paDynPageMapPaePTEsGC[iPage].u = HCPhys | X86_PTE_P | X86_PTE_A | X86_PTE_D; -
trunk/src/VBox/VMM/VMMGC/TRPMGC.cpp
r9288 r11311 60 60 * Validate input. 61 61 */ 62 if (iTrap >= ELEMENTS(pVM->trpm.s.aTmpTrapHandlers))62 if (iTrap >= RT_ELEMENTS(pVM->trpm.s.aTmpTrapHandlers)) 63 63 { 64 64 AssertMsgFailed(("Trap handler iTrap=%u is out of range!\n", iTrap)); … … 120 120 /** @note this causes problems in Windows XP as instructions following the update can be dangerous (str eax has been seen) */ 121 121 /** @note not going back to ring 3 could make the code scanner miss them. */ 122 /* Check if we can handle the write here. */ 122 /* Check if we can handle the write here. */ 123 123 if ( iGate != 3 /* Gate 3 is handled differently; could do it here as well, but let ring 3 handle this case for now. */ 124 124 && !ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iGate)) /* Passthru gates need special attention too. */ -
trunk/src/VBox/VMM/VMMR0/DBGFR0.cpp
r9212 r11311 54 54 { 55 55 Assert(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8); 56 for (unsigned iBp = 0; iBp < ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)56 for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++) 57 57 { 58 58 if ( (uDr6 & RT_BIT(iBp)) … … 113 113 RTGCPTR pPc; 114 114 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, 115 (RTGCPTR)((RTGCUINTPTR)pRegFrame->eip - 1), 115 (RTGCPTR)((RTGCUINTPTR)pRegFrame->eip - 1), 116 116 &pPc); 117 117 AssertRCReturn(rc, rc); 118 118 119 for (unsigned iBp = 0; iBp < ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++)119 for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++) 120 120 { 121 121 if ( pVM->dbgf.s.aBreakpoints[iBp].GCPtr == (RTGCUINTPTR)pPc -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r11133 r11311 990 990 char *psz = szEFlags; 991 991 uint32_t efl = pCtx->eflags.u32; 992 for (unsigned i = 0; i < ELEMENTS(aFlags); i++)992 for (unsigned i = 0; i < RT_ELEMENTS(aFlags); i++) 993 993 { 994 994 const char *pszAdd = aFlags[i].fFlag & efl ? aFlags[i].pszSet : aFlags[i].pszClear; -
trunk/src/VBox/VMM/testcase/tstAnimate.cpp
r11157 r11311 176 176 177 177 rc = -1; 178 for (unsigned i = 0; i < ELEMENTS(aVars); i++)178 for (unsigned i = 0; i < RT_ELEMENTS(aVars); i++) 179 179 { 180 180 if (!strcmp(psz, aVars[i].pszVar)) -
trunk/src/VBox/VMM/testcase/tstMMHyperHeap.cpp
r8155 r11311 133 133 134 134 /* allocate */ 135 for (i = 0; i < ELEMENTS(aOps); i++)135 for (i = 0; i < RT_ELEMENTS(aOps); i++) 136 136 { 137 137 rc = MMHyperAlloc(pVM, aOps[i].cb, aOps[i].uAlignment, MM_TAG_VM, &aOps[i].pvAlloc); … … 150 150 151 151 /* free and allocate the same node again. */ 152 for (i = 0; i < ELEMENTS(aOps); i++)152 for (i = 0; i < RT_ELEMENTS(aOps); i++) 153 153 { 154 154 if ( !aOps[i].pvAlloc … … 188 188 /* free it in a specific order. */ 189 189 int cFreed = 0; 190 for (i = 0; i < ELEMENTS(aOps); i++)190 for (i = 0; i < RT_ELEMENTS(aOps); i++) 191 191 { 192 192 unsigned j; 193 for (j = 0; j < ELEMENTS(aOps); j++)193 for (j = 0; j < RT_ELEMENTS(aOps); j++) 194 194 { 195 195 if ( aOps[j].iFreeOrder != i … … 212 212 } 213 213 } 214 Assert(cFreed == ELEMENTS(aOps));214 Assert(cFreed == RT_ELEMENTS(aOps)); 215 215 RTPrintf("i=done free=%d\n", MMHyperHeapGetFreeSize(pVM)); 216 216 -
trunk/src/VBox/VMM/testcase/tstVMREQ.cpp
r8155 r11311 49 49 50 50 51 /** 51 /** 52 52 * Testings va_list passing in VMSetRuntimeError. 53 53 */ … … 119 119 120 120 121 /** 122 * Functions that tests passing a va_list * argument in a request, 121 /** 122 * Functions that tests passing a va_list * argument in a request, 123 123 * similar to VMSetRuntimeError. 124 124 */ … … 129 129 #else 130 130 va_list va2; 131 va_copy(va2, va); 131 va_copy(va2, va); 132 132 void *pvVA = va2; 133 #endif 133 #endif 134 134 135 135 PVMREQ pReq; … … 142 142 #if 1 143 143 va_end(va2); 144 #endif 145 } 146 147 148 /** 149 * Functions that tests passing a va_list * argument in a request, 144 #endif 145 } 146 147 148 /** 149 * Functions that tests passing a va_list * argument in a request, 150 150 * similar to VMSetRuntimeError. 151 151 */ … … 181 181 { 182 182 PVMREQ apReq[17]; 183 const unsigned cReqs = i % ELEMENTS(apReq);183 const unsigned cReqs = i % RT_ELEMENTS(apReq); 184 184 unsigned iReq; 185 185 for (iReq = 0; iReq < cReqs; iReq++)
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