VirtualBox

Changeset 12657 in vbox for trunk/src/VBox/VMM/CPUM.cpp


Ignore:
Timestamp:
Sep 22, 2008 6:29:06 PM (16 years ago)
Author:
vboxsync
Message:

#1865: CPUM. Also added missing aliasing for DR4&5 to the guest DRx setter and getter.

File:
1 edited

Legend:

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Added
Removed

  • trunk/src/VBox/VMM/CPUM.cpp

    r12600 r12657  
    2828 * There are three CPU contexts, the most important one is the guest one (GC).
    2929 * When running in raw-mode (RC) there is a special hyper context for the VMM
    30  * that floats around inside the guest address space. When running in raw-mode
    31  * or when using 64-bit guests on a 32-bit host, CPUM also maintains a host
    32  * context for saving and restoring registers accross world switches. This latter
    33  * is done in cooperation with the world switcher (@see pg_vmm).
     30 * part that floats around inside the guest address space. When running in
     31 * raw-mode, CPUM also maintains a host context for saving and restoring
     32 * registers accross world switches. This latter is done in cooperation with the
     33 * world switcher (@see pg_vmm).
    3434 */
    3535
    … …  
    6565*******************************************************************************/
    6666/** The saved state version. */
     67#define CPUM_SAVED_STATE_VERSION            8
     68/** The saved state version of 1.6, used for backwards compatability. */
    6769#define CPUM_SAVED_STATE_VERSION_VER1_6     6
    68 #define CPUM_SAVED_STATE_VERSION            8
    6970
    7071
    … …  
    8586/** Pointer to a cpu info dump type. */
    8687typedef CPUMDUMPTYPE *PCPUMDUMPTYPE;
     88
    8789
    8890/*******************************************************************************
    … …  
    119121     * Setup any fixed pointers and offsets.
    120122     */
    121     pVM->cpum.s.offVM = RT_OFFSETOF(VM, cpum);
    122     pVM->cpum.s.pCPUMHC = &pVM->cpum.s;
    123123    pVM->cpum.s.pHyperCoreR3 = CPUMCTX2CORE(&pVM->cpum.s.Hyper);
    124124    pVM->cpum.s.pHyperCoreR0 = VM_R0_ADDR(pVM, CPUMCTX2CORE(&pVM->cpum.s.Hyper));
    … …  
    130130     * Check that the CPU supports the minimum features we require.
    131131     */
    132     /** @todo check the contract! */
    133132    if (!ASMHasCpuId())
    134133    {
    … …  
    510509     * Load CPUID overrides from configuration.
    511510     */
     511    /** @cfgm{CPUM/CPUID/[000000xx|800000xx|c000000x]/[eax|ebx|ecx|edx],32-bit}
     512     * Overloads the CPUID leaf values. */
    512513    PCPUMCPUID  pCpuId = &pCPUM->aGuestCpuIdStd[0];
    513514    uint32_t    cElements = RT_ELEMENTS(pCPUM->aGuestCpuIdStd);
    … …  
    603604     * Switcher pointers.
    604605     */
    605     pVM->cpum.s.pCPUMGC = VM_GUEST_ADDR(pVM, &pVM->cpum.s);
    606     pVM->cpum.s.pHyperCoreGC = MMHyperCCToRC(pVM, pVM->cpum.s.pHyperCoreR3);
    607     Assert(pVM->cpum.s.pHyperCoreGC != NIL_RTGCPTR);
     606    pVM->cpum.s.pHyperCoreRC = MMHyperCCToRC(pVM, pVM->cpum.s.pHyperCoreR3);
     607    Assert(pVM->cpum.s.pHyperCoreRC != NIL_RTRCPTR);
    608608}
    609609
    … …  
    714714    pCtx->fpu.FCW                   = 0x37f;
    715715
    716     /* Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3A, Table 8-1. IA-32 Processor States Following Power-up, Reset, or INIT */
     716    /* Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A, Table 8-1. IA-32 Processor States Following Power-up, Reset, or INIT */
    717717    pCtx->fpu.MXCSR                 = 0x1F80;
    718718
    … …  
    765765}
    766766
     767
    767768/**
    768769 * Load a version 1.6 CPUMCTX structure.
    … …  
    774775static void cpumR3LoadCPUM1_6(PVM pVM, CPUMCTX_VER1_6 *pCpumctx16)
    775776{
    776 #define CPUMCTX16_LOADREG(regname)      pVM->cpum.s.Guest.regname = pCpumctx16->regname;
    777 
    778 #define CPUMCTX16_LOADDRXREG(regname)   pVM->cpum.s.Guest.dr[regname] = pCpumctx16->dr##regname;
    779 
    780 #define CPUMCTX16_LOADHIDREG(regname)                                                   \
    781     pVM->cpum.s.Guest.regname##Hid.u64Base      = pCpumctx16->regname##Hid.u32Base;     \
    782     pVM->cpum.s.Guest.regname##Hid.u32Limit     = pCpumctx16->regname##Hid.u32Limit;    \
    783     pVM->cpum.s.Guest.regname##Hid.Attr         = pCpumctx16->regname##Hid.Attr;
    784 
    785 #define CPUMCTX16_LOADSEGREG(regname)                                                   \
    786     pVM->cpum.s.Guest.regname                   = pCpumctx16->regname;                  \
    787     CPUMCTX16_LOADHIDREG(regname);
    788 
    789     pVM->cpum.s.Guest.fpu               = pCpumctx16->fpu;
     777#define CPUMCTX16_LOADREG(RegName) \
     778        pVM->cpum.s.Guest.RegName = pCpumctx16->RegName;
     779
     780#define CPUMCTX16_LOADDRXREG(RegName) \
     781        pVM->cpum.s.Guest.dr[RegName] = pCpumctx16->dr##RegName;
     782
     783#define CPUMCTX16_LOADHIDREG(RegName) \
     784        pVM->cpum.s.Guest.RegName##Hid.u64Base  = pCpumctx16->RegName##Hid.u32Base; \
     785        pVM->cpum.s.Guest.RegName##Hid.u32Limit = pCpumctx16->RegName##Hid.u32Limit; \
     786        pVM->cpum.s.Guest.RegName##Hid.Attr     = pCpumctx16->RegName##Hid.Attr;
     787
     788#define CPUMCTX16_LOADSEGREG(RegName) \
     789        pVM->cpum.s.Guest.RegName = pCpumctx16->RegName; \
     790        CPUMCTX16_LOADHIDREG(RegName);
     791
     792    pVM->cpum.s.Guest.fpu = pCpumctx16->fpu;
    790793
    791794    CPUMCTX16_LOADREG(rax);
    … …  
    851854    CPUMCTX16_LOADHIDREG(tr);
    852855
     856#undef CPUMCTX16_LOADSEGREG
    853857#undef CPUMCTX16_LOADHIDREG
    854 #undef CPUMCTX16_LOADSEGREG
     858#undef CPUMCTX16_LOADDRXREG
    855859#undef CPUMCTX16_LOADREG
    856860}
     861
    857862
    858863/**
    … …  
    977982     * Format the flags.
    978983     */
    979     static struct
     984    static const struct
    980985    {
    981986        const char *pszSet; const char *pszClear; uint32_t fFlag;
    … …  
    10391044        case CPUMDUMPTYPE_TERSE:
    10401045            if (CPUMIsGuestIn64BitCode(pVM, pCtxCore))
    1041             {
    10421046                pHlp->pfnPrintf(pHlp,
    10431047                    "%srax=%016RX64 %srbx=%016RX64 %srcx=%016RX64 %srdx=%016RX64\n"
    … …  
    10531057                    pszPrefix, (RTSEL)pCtxCore->cs, pszPrefix, (RTSEL)pCtxCore->ss, pszPrefix, (RTSEL)pCtxCore->ds, pszPrefix, (RTSEL)pCtxCore->es,
    10541058                    pszPrefix, (RTSEL)pCtxCore->fs, pszPrefix, (RTSEL)pCtxCore->gs, pszPrefix, efl);
    1055             }
    10561059            else
    10571060                pHlp->pfnPrintf(pHlp,
    … …  
    10671070        case CPUMDUMPTYPE_DEFAULT:
    10681071            if (CPUMIsGuestIn64BitCode(pVM, pCtxCore))
    1069             {
    10701072                pHlp->pfnPrintf(pHlp,
    10711073                    "%srax=%016RX64 %srbx=%016RX64 %srcx=%016RX64 %srdx=%016RX64\n"
    … …  
    10851087                    pszPrefix, pCtx->cr0, pszPrefix, pCtx->cr2, pszPrefix, pCtx->cr3, pszPrefix, pCtx->cr4,
    10861088                    pszPrefix, pCtx->gdtr.pGdt, pCtx->gdtr.cbGdt, pszPrefix, (RTSEL)pCtx->ldtr);
    1087             }
    10881089            else
    10891090                pHlp->pfnPrintf(pHlp,
    … …  
    11031104        case CPUMDUMPTYPE_VERBOSE:
    11041105            if (CPUMIsGuestIn64BitCode(pVM, pCtxCore))
    1105             {
    11061106                pHlp->pfnPrintf(pHlp,
    11071107                    "%srax=%016RX64 %srbx=%016RX64 %srcx=%016RX64 %srdx=%016RX64\n"
    … …  
    11411141                    pszPrefix, (RTSEL)pCtx->tr, pCtx->trHid.u64Base, pCtx->trHid.u32Limit, pCtx->trHid.Attr.u,
    11421142                    pszPrefix, pCtx->SysEnter.cs, pCtx->SysEnter.eip, pCtx->SysEnter.esp);
    1143             }
    11441143            else
    11451144                pHlp->pfnPrintf(pHlp,
    … …  
    11811180                pszPrefix, pCtx->fpu.MXCSR, pszPrefix, pCtx->fpu.MXCSR_MASK);
    11821181
    1183 
    11841182            pHlp->pfnPrintf(pHlp,
    11851183                "MSR:\n"
    … …  
    11981196                pszPrefix, pCtx->msrSFMASK,
    11991197                pszPrefix, pCtx->msrKERNELGSBASE);
    1200 
    12011198            break;
    12021199    }
    … …  
    12761273    cpumR3InfoOne(pVM, &pVM->cpum.s.Guest, CPUMCTX2CORE(&pVM->cpum.s.Guest), pHlp, enmType, "");
    12771274}
     1275
    12781276
    12791277/**
    … …  
    22602258 * @param   pc          GC instruction pointer
    22612259 * @param   prefix      String prefix for logging
     2260 *
    22622261 * @deprecated  Use DBGFR3DisasInstrCurrentLog().
    2263  *
    22642262 */
    22652263CPUMR3DECL(void) CPUMR3DisasmInstr(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, char *prefix)
    22662264{
    2267     DISCPUSTATE cpu;
    2268 
    2269     CPUMR3DisasmInstrCPU(pVM, pCtx, pc, &cpu, prefix);
    2270 }
     2265    DISCPUSTATE Cpu;
     2266    CPUMR3DisasmInstrCPU(pVM, pCtx, pc, &Cpu, prefix);
     2267}
     2268
    22712269
    22722270/**
    … …  
    22802278 * @param   nrInstructions
    22812279 *
     2280 * @deprecated  Create new DBGFR3Disas function to do this.
    22822281 */
    22832282CPUMR3DECL(void) CPUMR3DisasmBlock(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, char *prefix, int nrInstructions)
    22842283{
    2285     for(int i=0;i<nrInstructions;i++)
     2284    for (int i = 0; i < nrInstructions; i++)
    22862285    {
    22872286        DISCPUSTATE cpu;
    … …  
    22922291}
    22932292
     2293
     2294/**
     2295 * Debug helper - Saves guest context on raw mode entry (for fatal dump)
     2296 *
     2297 * @internal
     2298 */
     2299CPUMR3DECL(void) CPUMR3SaveEntryCtx(PVM pVM)
     2300{
     2301    pVM->cpum.s.GuestEntry = pVM->cpum.s.Guest;
     2302}
     2303
    22942304#endif /* DEBUG */
    2295 
    2296 #ifdef DEBUG
    2297 /**
    2298  * Debug helper - Saves guest context on raw mode entry (for fatal dump)
    2299  *
    2300  * @internal
    2301  */
    2302 CPUMR3DECL(void) CPUMR3SaveEntryCtx(PVM pVM)
    2303 {
    2304     pVM->cpum.s.GuestEntry = pVM->cpum.s.Guest;
    2305 }
    2306 #endif /* DEBUG */
    2307 
    23082305
    23092306/**
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