Changeset 15414 in vbox for trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
- Timestamp:
- Dec 13, 2008 4:33:30 AM (16 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r15410 r15414 46 46 #if defined(RT_ARCH_AMD64) 47 47 # define VMX_IS_64BIT_HOST_MODE() (true) 48 #elif defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)48 #elif defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 49 49 # define VMX_IS_64BIT_HOST_MODE() (g_fVMXIs64bitHost != 0) 50 50 #else … … 59 59 static uint32_t const g_aIOOpAnd[4] = {0xff, 0xffff, 0, 0xffffffff}; 60 60 61 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL61 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 62 62 /** See HWACCMR0A.asm. */ 63 63 extern "C" uint32_t g_fVMXIs64bitHost; … … 833 833 /* Control registers */ 834 834 rc = VMXWriteVMCS(VMX_VMCS_HOST_CR0, ASMGetCR0()); 835 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL835 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 836 836 if (VMX_IS_64BIT_HOST_MODE()) 837 837 { … … 852 852 853 853 /* Selector registers. */ 854 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL854 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 855 855 if (VMX_IS_64BIT_HOST_MODE()) 856 856 { … … 894 894 895 895 /* GDTR & IDTR */ 896 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL896 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 897 897 if (VMX_IS_64BIT_HOST_MODE()) 898 898 { … … 927 927 } 928 928 929 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL929 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 930 930 if (VMX_IS_64BIT_HOST_MODE()) 931 931 { … … 951 951 952 952 /* FS and GS base. */ 953 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)953 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 954 954 if (VMX_IS_64BIT_HOST_MODE()) 955 955 { … … 966 966 rc = VMXWriteVMCS(VMX_VMCS32_HOST_SYSENTER_CS, ASMRdMsr_Low(MSR_IA32_SYSENTER_CS)); 967 967 Log2(("VMX_VMCS_HOST_SYSENTER_CS %08x\n", ASMRdMsr_Low(MSR_IA32_SYSENTER_CS))); 968 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL968 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 969 969 if (VMX_IS_64BIT_HOST_MODE()) 970 970 { … … 1110 1110 /* Save debug controls (dr7 & IA32_DEBUGCTL_MSR) (forced to 1 on the 'first' VT-x capable CPUs; this actually includes the newest Nehalem CPUs) */ 1111 1111 val |= VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_DEBUG; 1112 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)1112 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1113 1113 if (VMX_IS_64BIT_HOST_MODE()) 1114 1114 val |= VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64; … … 1561 1561 #if !defined(VBOX_ENABLE_64_BITS_GUESTS) 1562 1562 return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE; 1563 #elif HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)1563 #elif HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1564 1564 pVCpu->hwaccm.s.vmx.pfnStartVM = VMXR0SwitcherStartVM64; 1565 1565 #else 1566 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL1566 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 1567 1567 if (!pVM->hwaccm.s.fAllow64BitGuests) 1568 1568 return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE; … … 3487 3487 Log(("VMX_VMCS_HOST_RIP %RHv\n", val)); 3488 3488 3489 # if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)3489 # if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 3490 3490 if (VMX_IS_64BIT_HOST_MODE()) 3491 3491 { … … 3509 3509 } 3510 3510 3511 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)3511 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 3512 3512 /** 3513 3513 * Prepares for and executes VMLAUNCH (64 bits guest mode) … … 3628 3628 } 3629 3629 3630 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) */3630 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */ 3631 3631 3632 3632
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