Changeset 15414 in vbox
- Timestamp:
- Dec 13, 2008 4:33:30 AM (16 years ago)
- svn:sync-xref-src-repo-rev:
- 40863
- Location:
- trunk
- Files:
-
- 19 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/Config.kmk
r15373 r15414 1016 1016 DEFS.amd64 = RT_ARCH_AMD64 __AMD64__ 1017 1017 DEFS.darwin = RT_OS_DARWIN __DARWIN__ 1018 DEFS.darwin.x86 = VBOX_WITH_HYBIRD_32BIT_KERNEL1019 1018 DEFS.freebsd = RT_OS_FREEBSD __FREEBSD__ 1020 1019 DEFS.l4 = RT_OS_L4 __L4__ __L4ENV__ L4API_l4v2 ARCH_$(KBUILD_TARGET_ARCH) __NO_CTYPE _FILE_OFFSET_BITS=64 -
trunk/src/VBox/VMM/CPUM.cpp
r14762 r15414 968 968 return VERR_SSM_UNEXPECTED_DATA; 969 969 } 970 970 971 971 for (unsigned i=0;i<pVM->cCPUs;i++) 972 972 { … … 1412 1412 */ 1413 1413 #if HC_ARCH_BITS == 32 1414 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL1414 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 1415 1415 if (!(pCtx->efer & MSR_K6_EFER_LMA)) 1416 1416 # endif … … 1432 1432 pCtx->SysEnter.cs, pCtx->SysEnter.eip, pCtx->SysEnter.esp); 1433 1433 } 1434 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL1434 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 1435 1435 else 1436 1436 # endif 1437 1437 #endif 1438 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)1438 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1439 1439 { 1440 1440 pHlp->pfnPrintf(pHlp, -
trunk/src/VBox/VMM/CPUMInternal.h
r14870 r15414 79 79 80 80 /* Sanity check. */ 81 #if defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) && (HC_ARCH_BITS != 32 || R0_ARCH_BITS != 32)82 # error "VBOX_WITH_HYB IRD_32BIT_KERNEL is only for 32 bit builds."81 #if defined(VBOX_WITH_HYBRID_32BIT_KERNEL) && (HC_ARCH_BITS != 32 || R0_ARCH_BITS != 32) 82 # error "VBOX_WITH_HYBRID_32BIT_KERNEL is only for 32 bit builds." 83 83 #endif 84 84 … … 87 87 * The saved host CPU state. 88 88 * 89 * @remark The special VBOX_WITH_HYB IRD_32BIT_KERNEL checks here are for the 10.4.x series89 * @remark The special VBOX_WITH_HYBRID_32BIT_KERNEL checks here are for the 10.4.x series 90 90 * of Mac OS X where the OS is essentially 32-bit but the cpu mode can be 64-bit. 91 91 */ … … 98 98 /** General purpose register, selectors, flags and more 99 99 * @{ */ 100 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)100 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 101 101 /** General purpose register ++ 102 102 * { */ … … 152 152 /** @} */ 153 153 154 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)154 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 155 155 /** Control registers. 156 156 * @{ */ … … 192 192 uint8_t auPadding[24+32]; 193 193 194 #elif HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)194 #elif HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 195 195 196 196 /** Control registers. … … 235 235 236 236 /* padding to get 32byte aligned size */ 237 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL237 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 238 238 uint8_t auPadding[16]; 239 239 # else … … 344 344 CPUMCTX Guest; 345 345 346 /** 346 /** 347 347 * Guest context - misc MSRs 348 348 * Aligned on a 64-byte boundrary. -
trunk/src/VBox/VMM/CPUMInternal.mac
r15030 r15414 43 43 %define FPUSTATE_SIZE 512 44 44 45 ;; if anyone figures how to do %if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) in45 ;; if anyone figures how to do %if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) in 46 46 ; nasm please tell / fix this hack. 47 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL48 %define fVBOX_WITH_HYB IRD_32BIT_KERNEL 147 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 48 %define fVBOX_WITH_HYBRID_32BIT_KERNEL 1 49 49 %else 50 %define fVBOX_WITH_HYB IRD_32BIT_KERNEL 050 %define fVBOX_WITH_HYBRID_32BIT_KERNEL 0 51 51 %endif 52 52 … … 200 200 .Host.fpu resb FPUSTATE_SIZE 201 201 202 %if HC_ARCH_BITS == 64 || fVBOX_WITH_HYB IRD_32BIT_KERNEL202 %if HC_ARCH_BITS == 64 || fVBOX_WITH_HYBRID_32BIT_KERNEL 203 203 ;.Host.rax resq 1 - scratch 204 204 .Host.rbx resq 1 … … 246 246 .Host.csPadding resw 1 247 247 248 %if HC_ARCH_BITS == 32 && fVBOX_WITH_HYB IRD_32BIT_KERNEL == 0248 %if HC_ARCH_BITS == 32 && fVBOX_WITH_HYBRID_32BIT_KERNEL == 0 249 249 .Host.cr0 resd 1 250 250 ;.Host.cr2 resd 1 - scratch … … 411 411 .fChanged resd 1 412 412 .ulOffCPUM resd 1 413 .u32RetCode resd 1 413 .u32RetCode resd 1 414 414 endstruc 415 415 -
trunk/src/VBox/VMM/HWACCM.cpp
r15404 r15414 215 215 pVM->fHWACCMEnabled = true; 216 216 217 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL217 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 218 218 /* 64-bit mode is configurable and it depends on both the kernel mode and VT-x. 219 219 * (To use the default, don't set 64bitEnabled in CFGM.) */ … … 820 820 CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SEP); 821 821 #ifdef VBOX_ENABLE_64_BITS_GUESTS 822 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL /* remove */822 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL /* remove */ 823 823 if (pVM->hwaccm.s.fAllow64BitGuests) 824 824 # endif … … 832 832 #endif 833 833 LogRel(("HWACCM: VMX enabled!\n")); 834 #if defined(VBOX_ENABLE_64_BITS_GUESTS) && defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)834 #if defined(VBOX_ENABLE_64_BITS_GUESTS) && defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 835 835 LogRel((pVM->hwaccm.s.fAllow64BitGuests 836 836 ? "HWACCM: 32-bit and 64-bit guest supported.\n" … … 935 935 CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_RDTSCP); 936 936 #ifdef VBOX_ENABLE_64_BITS_GUESTS 937 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL937 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 938 938 if (pVM->hwaccm.s.fAllow64BitGuests) 939 939 # endif … … 953 953 } 954 954 955 #if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)955 #if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 956 956 if (pVM->fHWACCMEnabled) 957 957 { -
trunk/src/VBox/VMM/HWACCMInternal.h
r15404 r15414 35 35 #include <iprt/mp.h> 36 36 37 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) // || defined (VBOX_WITH_64_BITS_GUESTS)37 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) // || defined (VBOX_WITH_64_BITS_GUESTS) 38 38 /* Enable 64 bits guest support. */ 39 39 # define VBOX_ENABLE_64_BITS_GUESTS … … 201 201 bool fInjectNMI; 202 202 203 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL203 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 204 204 /** Set if we can support 64-bit guests or not. */ 205 205 bool fAllow64BitGuests; … … 208 208 /** Explicit alignment padding to make 32-bit gcc align u64RegisterMask 209 209 * naturally. */ 210 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL210 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 211 211 bool padding[1]; 212 212 #else … … 220 220 RTUINT uMaxASID; 221 221 222 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)222 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 223 223 /** 32 to 64 bits switcher entrypoint. */ 224 224 R0PTRTYPE(PFNHWACCMSWITCHERHC) pfnHost32ToGuest64R0; … … 242 242 RTRCPTR uAlignment[1]; 243 243 # endif 244 #elif defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)244 #elif defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 245 245 uint32_t u32Alignment[1]; 246 246 #endif … … 637 637 638 638 639 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL639 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 640 640 /** 641 641 * Gets 64-bit GDTR and IDTR on darwin. -
trunk/src/VBox/VMM/Makefile.kmk
r15413 r15414 44 44 VMMR3_DEFS += VBOX_WITH_NEW_RECOMPILER 45 45 endif 46 VMMR3_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3 46 VMMR3_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3 47 VMMR3_DEFS.darwin.x86 = VBOX_WITH_HYBRID_32BIT_KERNEL VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R3 47 48 VMMR3_INCS := \ 48 49 $(PATH_SUB_CURRENT) \ … … 309 310 VMMGC_DEFS += VBOX_WITH_NEW_RECOMPILER 310 311 endif 311 VMMGC_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_RC 312 VMMGC_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_RC 313 VMMGC_DEFS.darwin.x86 = VBOX_WITH_HYBRID_32BIT_KERNEL VBOX_WITH_HYBRID_32BIT_KERNEL_IN_RC 312 314 VMMGC_SYSSUFF = .gc 313 315 VMMGC_LIBS = \ … … 408 410 VMMR0_DEFS += VBOX_WITH_NEW_RECOMPILER 409 411 endif 410 VMMR0_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0 412 VMMR0_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 413 VMMR0_DEFS.darwin.x86 = VBOX_WITH_HYBRID_32BIT_KERNEL VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0 411 414 ifeq ($(VBOX_LDR_FMT),pe) 412 415 VMMR0_LDFLAGS = -Entry:VMMR0EntryEx -
trunk/src/VBox/VMM/PGM.cpp
r15411 r15414 1508 1508 case SUPPAGINGMODE_AMD64_NX: 1509 1509 case SUPPAGINGMODE_AMD64_GLOBAL_NX: 1510 #ifndef VBOX_WITH_HYB IRD_32BIT_KERNEL1510 #ifndef VBOX_WITH_HYBRID_32BIT_KERNEL 1511 1511 if (ARCH_BITS != 64) 1512 1512 { -
trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
r15404 r15414 168 168 } 169 169 170 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)170 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 171 171 if (CPUMIsGuestInLongModeEx(pCtx)) 172 172 { … … 258 258 AssertReturn((pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU), VINF_SUCCESS); 259 259 260 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)260 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 261 261 if (CPUMIsGuestInLongModeEx(pCtx)) 262 262 { … … 321 321 322 322 /* Save the guest's debug state. The caller is responsible for DR7. */ 323 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)323 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 324 324 if (CPUMIsGuestInLongModeEx(pCtx)) 325 325 { … … 386 386 387 387 /* Activate the guest state DR0-3; DR7 is left to the caller. */ 388 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)388 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 389 389 if (CPUMIsGuestInLongModeEx(pCtx)) 390 390 { -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r15409 r15414 1071 1071 1072 1072 1073 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)1073 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1074 1074 /** 1075 1075 * Save guest FPU/XMM state (64 bits guest mode & 32 bits host only) … … 1126 1126 # endif 1127 1127 1128 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) */1128 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */ 1129 1129 1130 1130 /** -
trunk/src/VBox/VMM/VMMR0/HWACCMR0A.asm
r15395 r15414 52 52 %define MAYBE_64_BIT 53 53 %endif 54 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL54 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 55 55 %define MAYBE_64_BIT 56 56 %endif … … 214 214 ;* External Symbols * 215 215 ;******************************************************************************* 216 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL216 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 217 217 extern NAME(SUPR0AbsIs64bit) 218 218 extern NAME(SUPR0Abs64bitKernelCS) … … 226 226 ;* Global Variables * 227 227 ;******************************************************************************* 228 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL228 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 229 229 BEGINDATA 230 230 ;; … … 262 262 mov ecx, [esp + 4] ; idxField 263 263 lea edx, [esp + 8] ; &u64Data 264 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL264 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 265 265 cmp byte [NAME(g_fVMXIs64bitHost)], 0 266 266 jz .legacy_mode … … 268 268 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 269 269 .legacy_mode: 270 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL270 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 271 271 vmwrite ecx, [edx] ; low dword 272 272 jz .done … … 286 286 ret 287 287 288 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL288 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 289 289 ALIGNCODE(16) 290 290 BITS 64 … … 302 302 dd .the_end, NAME(SUPR0AbsKernelCS) 303 303 BITS 32 304 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL304 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 305 305 ENDPROC VMXWriteVMCS64 306 306 … … 329 329 mov ecx, [esp + 4] ; idxField 330 330 mov edx, [esp + 8] ; pData 331 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL331 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 332 332 cmp byte [NAME(g_fVMXIs64bitHost)], 0 333 333 jz .legacy_mode … … 335 335 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 336 336 .legacy_mode: 337 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL337 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 338 338 vmread [edx], ecx ; low dword 339 339 jz .done … … 353 353 ret 354 354 355 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL355 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 356 356 ALIGNCODE(16) 357 357 BITS 64 … … 369 369 dd .the_end, NAME(SUPR0AbsKernelCS) 370 370 BITS 32 371 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL371 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 372 372 ENDPROC VMXReadVMCS64 373 373 … … 398 398 mov ecx, [esp + 4] ; idxField 399 399 mov edx, [esp + 8] ; pu32Data 400 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL400 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 401 401 cmp byte [NAME(g_fVMXIs64bitHost)], 0 402 402 jz .legacy_mode … … 404 404 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 405 405 .legacy_mode: 406 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL406 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 407 407 xor eax, eax 408 408 vmread [edx], ecx … … 417 417 ret 418 418 419 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL419 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 420 420 ALIGNCODE(16) 421 421 BITS 64 … … 434 434 dd .the_end, NAME(SUPR0AbsKernelCS) 435 435 BITS 32 436 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL436 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 437 437 ENDPROC VMXReadVMCS32 438 438 … … 463 463 mov ecx, [esp + 4] ; idxField 464 464 mov edx, [esp + 8] ; u32Data 465 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL465 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 466 466 cmp byte [NAME(g_fVMXIs64bitHost)], 0 467 467 jz .legacy_mode … … 469 469 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 470 470 .legacy_mode: 471 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL471 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 472 472 xor eax, eax 473 473 vmwrite ecx, edx … … 482 482 ret 483 483 484 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL484 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 485 485 ALIGNCODE(16) 486 486 BITS 64 … … 498 498 dd .the_end, NAME(SUPR0AbsKernelCS) 499 499 BITS 32 500 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL500 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 501 501 ENDPROC VMXWriteVMCS32 502 502 … … 519 519 vmxon [rsp] 520 520 %else ; RT_ARCH_X86 521 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL521 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 522 522 cmp byte [NAME(g_fVMXIs64bitHost)], 0 523 523 jz .legacy_mode … … 525 525 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 526 526 .legacy_mode: 527 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL527 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 528 528 xor eax, eax 529 529 vmxon [esp + 4] … … 543 543 ret 544 544 545 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL545 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 546 546 ALIGNCODE(16) 547 547 BITS 64 … … 559 559 dd .the_end, NAME(SUPR0AbsKernelCS) 560 560 BITS 32 561 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL561 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 562 562 ENDPROC VMXEnable 563 563 … … 568 568 ;DECLASM(void) VMXDisable(void); 569 569 BEGINPROC VMXDisable 570 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL570 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 571 571 cmp byte [NAME(g_fVMXIs64bitHost)], 0 572 572 jz .legacy_mode … … 574 574 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 575 575 .legacy_mode: 576 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL576 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 577 577 vmxoff 578 578 .the_end: 579 579 ret 580 580 581 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL581 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 582 582 ALIGNCODE(16) 583 583 BITS 64 … … 588 588 dd .the_end, NAME(SUPR0AbsKernelCS) 589 589 BITS 32 590 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL590 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 591 591 ENDPROC VMXDisable 592 592 … … 610 610 vmclear [rsp] 611 611 %else ; RT_ARCH_X86 612 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL612 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 613 613 cmp byte [NAME(g_fVMXIs64bitHost)], 0 614 614 jz .legacy_mode … … 616 616 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 617 617 .legacy_mode: 618 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL618 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 619 619 xor eax, eax 620 620 vmclear [esp + 4] … … 628 628 ret 629 629 630 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL630 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 631 631 ALIGNCODE(16) 632 632 BITS 64 … … 664 664 vmptrld [rsp] 665 665 %else 666 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL666 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 667 667 cmp byte [NAME(g_fVMXIs64bitHost)], 0 668 668 jz .legacy_mode … … 670 670 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 671 671 .legacy_mode: 672 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL672 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 673 673 xor eax, eax 674 674 vmptrld [esp + 4] … … 682 682 ret 683 683 684 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL684 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 685 685 ALIGNCODE(16) 686 686 BITS 64 … … 696 696 dd .the_end, NAME(SUPR0AbsKernelCS) 697 697 BITS 32 698 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL698 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 699 699 ENDPROC VMXActivateVMCS 700 700 … … 719 719 %endif 720 720 %else 721 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL721 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 722 722 cmp byte [NAME(g_fVMXIs64bitHost)], 0 723 723 jz .legacy_mode … … 725 725 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 726 726 .legacy_mode: 727 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL727 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 728 728 vmptrst qword [esp+04h] 729 729 %endif … … 732 732 ret 733 733 734 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL734 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 735 735 ALIGNCODE(16) 736 736 BITS 64 … … 744 744 dd .the_end, NAME(SUPR0AbsKernelCS) 745 745 BITS 32 746 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL746 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 747 747 %endif 748 748 ENDPROC VMXGetActivateVMCS … … 768 768 %endif 769 769 %else 770 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL770 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 771 771 cmp byte [NAME(g_fVMXIs64bitHost)], 0 772 772 jz .legacy_mode … … 774 774 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 775 775 .legacy_mode: 776 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL776 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 777 777 mov eax, [esp + 4] 778 778 mov ecx, [esp + 8] … … 789 789 ret 790 790 791 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL791 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 792 792 ALIGNCODE(16) 793 793 BITS 64 … … 807 807 dd .the_end, NAME(SUPR0AbsKernelCS) 808 808 BITS 32 809 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL809 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 810 810 ENDPROC VMXR0InvEPT 811 811 … … 831 831 %endif 832 832 %else 833 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL833 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 834 834 cmp byte [NAME(g_fVMXIs64bitHost)], 0 835 835 jz .legacy_mode … … 837 837 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 838 838 .legacy_mode: 839 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL839 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 840 840 mov eax, [esp + 4] 841 841 mov ecx, [esp + 8] … … 852 852 ret 853 853 854 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL854 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 855 855 ALIGNCODE(16) 856 856 BITS 64 … … 870 870 dd .the_end, NAME(SUPR0AbsKernelCS) 871 871 BITS 32 872 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL872 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 873 873 ENDPROC VMXR0InvVPID 874 874 … … 934 934 %endif ; GC_ARCH_BITS != 64 935 935 936 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL936 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 937 937 938 938 ;/** … … 988 988 ENDPROC hwaccmR0Get64bitCR3 989 989 990 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL990 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL 991 991 992 992 … … 995 995 ; The default setup of the StartVM routines. 996 996 ; 997 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL997 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 998 998 %define MY_NAME(name) name %+ _32 999 999 %else … … 1015 1015 1016 1016 1017 %ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL1017 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 1018 1018 ; 1019 1019 ; Write the wrapper procedures. … … 1254 1254 1255 1255 %include "HWACCMR0Mixed.mac" 1256 %endif ; VBOX_WITH_HYB IRD_32BIT_KERNEL1256 %endif ; VBOX_WITH_HYBRID_32BIT_KERNEL -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r15410 r15414 769 769 #if !defined(VBOX_ENABLE_64_BITS_GUESTS) 770 770 return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE; 771 #elif HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)771 #elif HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 772 772 pVCpu->hwaccm.s.svm.pfnVMRun = SVMR0VMSwitcherRun64; 773 773 #else 774 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL774 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 775 775 if (!pVM->hwaccm.s.fAllow64BitGuests) 776 776 return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE; … … 2298 2298 } 2299 2299 2300 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)2300 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 2301 2301 /** 2302 2302 * Prepares for and executes VMRUN (64 bits guests from a 32 bits hosts). -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.h
r15404 r15414 138 138 VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 139 139 140 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)140 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 141 141 142 142 /** … … 165 165 VMMR0DECL(int) SVMR0Execute64BitsHandler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTRCPTR pfnHandler, uint32_t cbParam, uint32_t *paParam); 166 166 167 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) */167 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */ 168 168 169 169 /** -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r15410 r15414 46 46 #if defined(RT_ARCH_AMD64) 47 47 # define VMX_IS_64BIT_HOST_MODE() (true) 48 #elif defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)48 #elif defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 49 49 # define VMX_IS_64BIT_HOST_MODE() (g_fVMXIs64bitHost != 0) 50 50 #else … … 59 59 static uint32_t const g_aIOOpAnd[4] = {0xff, 0xffff, 0, 0xffffffff}; 60 60 61 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL61 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 62 62 /** See HWACCMR0A.asm. */ 63 63 extern "C" uint32_t g_fVMXIs64bitHost; … … 833 833 /* Control registers */ 834 834 rc = VMXWriteVMCS(VMX_VMCS_HOST_CR0, ASMGetCR0()); 835 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL835 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 836 836 if (VMX_IS_64BIT_HOST_MODE()) 837 837 { … … 852 852 853 853 /* Selector registers. */ 854 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL854 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 855 855 if (VMX_IS_64BIT_HOST_MODE()) 856 856 { … … 894 894 895 895 /* GDTR & IDTR */ 896 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL896 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 897 897 if (VMX_IS_64BIT_HOST_MODE()) 898 898 { … … 927 927 } 928 928 929 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL929 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 930 930 if (VMX_IS_64BIT_HOST_MODE()) 931 931 { … … 951 951 952 952 /* FS and GS base. */ 953 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)953 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 954 954 if (VMX_IS_64BIT_HOST_MODE()) 955 955 { … … 966 966 rc = VMXWriteVMCS(VMX_VMCS32_HOST_SYSENTER_CS, ASMRdMsr_Low(MSR_IA32_SYSENTER_CS)); 967 967 Log2(("VMX_VMCS_HOST_SYSENTER_CS %08x\n", ASMRdMsr_Low(MSR_IA32_SYSENTER_CS))); 968 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL968 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 969 969 if (VMX_IS_64BIT_HOST_MODE()) 970 970 { … … 1110 1110 /* Save debug controls (dr7 & IA32_DEBUGCTL_MSR) (forced to 1 on the 'first' VT-x capable CPUs; this actually includes the newest Nehalem CPUs) */ 1111 1111 val |= VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_DEBUG; 1112 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)1112 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1113 1113 if (VMX_IS_64BIT_HOST_MODE()) 1114 1114 val |= VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64; … … 1561 1561 #if !defined(VBOX_ENABLE_64_BITS_GUESTS) 1562 1562 return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE; 1563 #elif HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)1563 #elif HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 1564 1564 pVCpu->hwaccm.s.vmx.pfnStartVM = VMXR0SwitcherStartVM64; 1565 1565 #else 1566 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL1566 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 1567 1567 if (!pVM->hwaccm.s.fAllow64BitGuests) 1568 1568 return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE; … … 3487 3487 Log(("VMX_VMCS_HOST_RIP %RHv\n", val)); 3488 3488 3489 # if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)3489 # if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 3490 3490 if (VMX_IS_64BIT_HOST_MODE()) 3491 3491 { … … 3509 3509 } 3510 3510 3511 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)3511 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 3512 3512 /** 3513 3513 * Prepares for and executes VMLAUNCH (64 bits guest mode) … … 3628 3628 } 3629 3629 3630 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL) */3630 #endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */ 3631 3631 3632 3632 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.h
r15404 r15414 204 204 205 205 206 # if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)206 # if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 207 207 /** 208 208 * Executes the specified handler in 64 mode … … 350 350 DECLASM(int) VMXR0StartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu); 351 351 352 # if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)352 # if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 353 353 /** 354 354 * Prepares for and executes VMLAUNCH (64 bits guest mode) -
trunk/src/VBox/VMM/VMMR0/TRPMR0.cpp
r14515 r15414 46 46 AssertMsgReturnVoid(uActiveVector < 256, ("uActiveVector=%#x is invalid! (More assertions to come, please enjoy!)\n", uActiveVector)); 47 47 48 #ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL48 #ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 49 49 /* 50 50 * Check if we're in long mode or not. -
trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
r15404 r15414 925 925 926 926 927 #if defined(DEBUG) && HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)927 #if defined(DEBUG) && HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 928 928 case VMMR0_DO_TEST_SWITCHER3264: 929 929 return HWACCMR0TestSwitcher3264(pVM); -
trunk/src/VBox/VMM/VMMSwitcher.cpp
r14981 r15414 60 60 &vmmR3SwitcherPAEToAMD64_Def, 61 61 NULL, //&vmmR3SwitcherPAETo32Bit_Def, 62 # ifdef VBOX_WITH_HYB IRD_32BIT_KERNEL62 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 63 63 &vmmR3SwitcherAMD64ToPAE_Def, 64 64 # else … … 608 608 } 609 609 610 #if defined(RT_ARCH_AMD64) || defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)610 #if defined(RT_ARCH_AMD64) || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 611 611 /* 612 612 * 64-bit HC Code Selector (no argument). … … 615 615 { 616 616 Assert(offSrc < pSwitcher->cbCode); 617 # if defined(RT_OS_DARWIN) && defined(VBOX_WITH_HYB IRD_32BIT_KERNEL)617 # if defined(RT_OS_DARWIN) && defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 618 618 *uSrc.pu16 = 0x80; /* KERNEL64_CS from i386/seg.h */ 619 619 # else -
trunk/src/VBox/VMM/VMMSwitcher/AMD64andLegacy.mac
r14979 r15414 49 49 GLOBALNAME Start 50 50 51 %ifndef VBOX_WITH_HYB IRD_32BIT_KERNEL51 %ifndef VBOX_WITH_HYBRID_32BIT_KERNEL 52 52 BITS 64 53 53 … … 113 113 114 114 115 %else ; VBOX_WITH_HYB IRD_32BIT_KERNEL115 %else ; VBOX_WITH_HYBRID_32BIT_KERNEL 116 116 117 117 … … 178 178 179 179 BITS 64 180 %endif ;!VBOX_WITH_HYB IRD_32BIT_KERNEL180 %endif ;!VBOX_WITH_HYBRID_32BIT_KERNEL 181 181 182 182
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