Changeset 19475 in vbox for trunk/src/VBox/Devices/PC/DevAPIC.cpp
- Timestamp:
- May 7, 2009 10:55:17 AM (16 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r19468 r19475 363 363 getCpuFromLapic(dev, s)); 364 364 } 365 365 366 #ifdef IN_RING3 366 367 DECLINLINE(void) cpuSendSipi(APICDeviceInfo* dev, APICState *s, int vector) … … 371 372 getCpuFromLapic(dev, s), 372 373 vector); 374 } 375 376 DECLINLINE(void) cpuSendInitIpi(APICDeviceInfo* dev, APICState *s) 377 { 378 Log2(("apic: send init IPI\n")); 379 380 dev->pApicHlpR3->pfnSendInitIpi(dev->pDevInsR3, 381 getCpuFromLapic(dev, s)); 373 382 } 374 383 #endif … … 416 425 #endif /* !VBOX */ 417 426 418 static void apic_init_ipi(APIC State *s);427 static void apic_init_ipi(APICDeviceInfo* dev, APICState *s); 419 428 static void apic_set_irq(APICDeviceInfo* dev, APICState *s, int vector_num, int trigger_mode); 420 429 static bool apic_update_irq(APICDeviceInfo* dev, APICState *s); … … 431 440 PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, uint8_t val); 432 441 PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns); 433 PDMBOTHCBDECL( void)apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,442 PDMBOTHCBDECL(int) apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, 434 443 uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity, 435 444 uint8_t u8TriggerMode); … … 451 460 APICState *apic_iter; 452 461 #else /* VBOX */ 453 static voidapic_bus_deliver(APICDeviceInfo* dev,454 455 456 462 static int apic_bus_deliver(APICDeviceInfo* dev, 463 uint32_t deliver_bitmask, uint8_t delivery_mode, 464 uint8_t vector_num, uint8_t polarity, 465 uint8_t trigger_mode) 457 466 { 458 467 #endif /* VBOX */ … … 470 479 apic_set_irq(dev, apic, vector_num, trigger_mode); 471 480 } 472 return ;481 return VINF_SUCCESS; 473 482 } 474 483 case APIC_DM_FIXED: … … 480 489 foreach_apic(dev, deliver_bitmask, 481 490 cpuSetInterrupt(dev, apic)); 482 return ;491 return VINF_SUCCESS; 483 492 484 493 case APIC_DM_NMI: … … 486 495 foreach_apic(dev, deliver_bitmask, 487 496 cpuSetInterrupt(dev, apic)); 488 return ;497 return VINF_SUCCESS; 489 498 490 499 case APIC_DM_INIT: 491 500 /* normal INIT IPI sent to processors */ 492 501 #ifdef VBOX 502 #ifdef IN_RING3 493 503 foreach_apic(dev, deliver_bitmask, 494 apic_init_ipi(apic)); 504 apic_init_ipi(dev, apic)); 505 return VINF_SUCCESS; 506 #else 507 /* We shall send init IPI only in R3, R0 calls should be 508 rescheduled to R3 */ 509 return VINF_IOM_HC_MMIO_READ_WRITE; 510 #endif /* IN_RING3 */ 511 495 512 #else 496 513 for (apic_iter = first_local_apic; apic_iter != NULL; … … 499 516 } 500 517 #endif 501 return;502 518 503 519 case APIC_DM_EXTINT: … … 506 522 507 523 default: 508 return ;524 return VINF_SUCCESS; 509 525 } 510 526 … … 512 528 foreach_apic(dev, deliver_bitmask, 513 529 apic_set_irq (dev, apic, vector_num, trigger_mode)); 530 return VINF_SUCCESS; 514 531 #else /* VBOX */ 515 532 for (apic_iter = first_local_apic; apic_iter != NULL; … … 672 689 { 673 690 APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 674 int r v= VINF_SUCCESS;691 int rc = VINF_SUCCESS; 675 692 676 693 if (dev->enmVersion < PDMAPICVERSION_X2APIC) … … 718 735 apic->icr[0] = (uint32_t)u64Value; 719 736 apic->icr[1] = (uint32_t)(u64Value >> 32); 720 r v= apic_deliver(dev, apic, (apic->icr[1] >> 24) & 0xff, (apic->icr[0] >> 11) & 1,737 rc = apic_deliver(dev, apic, (apic->icr[1] >> 24) & 0xff, (apic->icr[0] >> 11) & 1, 721 738 (apic->icr[0] >> 8) & 7, (apic->icr[0] & 0xff), 722 739 (apic->icr[0] >> 14) & 1, (apic->icr[0] >> 15) & 1); … … 750 767 /* Self IPI, see x2APIC book 2.4.5 */ 751 768 int vector = u64Value & 0xff; 752 apic_bus_deliver(dev,753 1 << getLapicById(dev, idCpu)->id /* Self */,754 0 /* Delivery mode - fixed */,755 vector,756 0 /* Polarity - conform to the bus */,757 0 /* Trigger mode - edge */);769 rc = apic_bus_deliver(dev, 770 1 << getLapicById(dev, idCpu)->id /* Self */, 771 0 /* Delivery mode - fixed */, 772 vector, 773 0 /* Polarity - conform to the bus */, 774 0 /* Trigger mode - edge */); 758 775 break; 759 776 } … … 764 781 } 765 782 766 return r v;783 return rc; 767 784 } 768 785 PDMBOTHCBDECL(int) apicReadMSR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value) … … 854 871 * for connecting the two devices. 855 872 */ 856 PDMBOTHCBDECL( void) apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,873 PDMBOTHCBDECL(int) apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, 857 874 uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity, 858 875 uint8_t u8TriggerMode) … … 861 878 LogFlow(("apicBusDeliverCallback: pDevIns=%p u8Dest=%#x u8DestMode=%#x u8DeliveryMode=%#x iVector=%#x u8Polarity=%#x u8TriggerMode=%#x\n", 862 879 pDevIns, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode)); 863 apic_bus_deliver(dev, apic_get_delivery_bitmask(dev, u8Dest, u8DestMode),864 u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);880 return apic_bus_deliver(dev, apic_get_delivery_bitmask(dev, u8Dest, u8DestMode), 881 u8DeliveryMode, iVector, u8Polarity, u8TriggerMode); 865 882 } 866 883 … … 1053 1070 } 1054 1071 1055 static void apic_init_ipi(APICState *s) 1072 #ifdef IN_RING3 1073 static void apic_init_ipi(APICDeviceInfo* dev, APICState *s) 1056 1074 { 1057 1075 int i; … … 1075 1093 1076 1094 #ifdef VBOX 1077 /** @todo reset CPU, activate wait for sipi mode for application processors */ 1078 /** Must be dealt with in ring 3 */ 1079 #endif 1080 } 1081 1082 #ifdef IN_RING3 1095 cpuSendInitIpi(dev, s); 1096 #endif 1097 } 1098 1083 1099 /* send a SIPI message to the CPU to start it */ 1084 1100 static void apic_startup(APICDeviceInfo* dev, APICState *s, int vector_num) … … 1098 1114 #endif 1099 1115 } 1100 #endif 1116 #endif /* IN_RING3 */ 1101 1117 1102 1118 static int apic_deliver(APICDeviceInfo* dev, APICState *s, … … 1142 1158 int level = (s->icr[0] >> 14) & 1; 1143 1159 if (level == 0 && trig_mode == 1) { 1144 #ifdef VBOX1145 1160 foreach_apic(dev, deliver_bitmask, 1146 1161 apic->arb_id = apic->id); 1162 #ifndef VBOX 1163 return; 1164 #else 1147 1165 return VINF_SUCCESS; 1148 #else /* !VBOX */ 1149 for (apic_iter = first_local_apic; apic_iter != NULL; 1150 apic_iter = apic_iter->next_apic) { 1151 if (deliver_bitmask & (1 << apic_iter->id)) { 1152 apic_iter->arb_id = apic_iter->id; 1153 } 1154 } 1155 return; 1156 #endif /* !VBOX */ 1166 #endif 1157 1167 } 1158 1168 } … … 1171 1181 #else 1172 1182 # ifdef IN_RING3 1173 1174 1183 foreach_apic(dev, deliver_bitmask, 1175 1184 apic_startup(dev, apic, vector_num)); 1176 1185 return VINF_SUCCESS; 1177 1186 # else 1178 /* We shall send SIPI only in R3, R0 calls should be 1187 /* We shall send SIPI only in R3, R0 calls should be 1179 1188 rescheduled to R3 */ 1180 1189 return VINF_IOM_HC_MMIO_WRITE; … … 1187 1196 trigger_mode); 1188 1197 #else /* VBOX */ 1189 apic_bus_deliver(dev, deliver_bitmask, delivery_mode, vector_num, polarity, 1190 trigger_mode); 1191 return VINF_SUCCESS; 1198 return apic_bus_deliver(dev, deliver_bitmask, delivery_mode, vector_num, 1199 polarity, trigger_mode); 1192 1200 #endif /* VBOX */ 1193 1201 } … … 1456 1464 static int apic_mem_writel(APICDeviceInfo* dev, APICState *s, target_phys_addr_t addr, uint32_t val) 1457 1465 { 1458 int r v= VINF_SUCCESS;1466 int rc = VINF_SUCCESS; 1459 1467 #endif /* VBOX */ 1460 1468 int index; … … 1520 1528 case 0x30: 1521 1529 s->icr[0] = val; 1522 r v = apic_deliver(dev, s, (s->icr[1] >> 24) & 0xff,1530 rc = apic_deliver(dev, s, (s->icr[1] >> 24) & 0xff, 1523 1531 (s->icr[0] >> 11) & 1, 1524 1532 (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), … … 1570 1578 } 1571 1579 #ifdef VBOX 1572 return r v;1580 return rc; 1573 1581 #endif 1574 1582 } … … 1783 1791 delivery_mode, vector, polarity, trig_mode); 1784 1792 #else /* VBOX */ 1785 s->CTX_SUFF(pIoApicHlp)->pfnApicBusDeliver(s->CTX_SUFF(pDevIns),1793 int rc = s->CTX_SUFF(pIoApicHlp)->pfnApicBusDeliver(s->CTX_SUFF(pDevIns), 1786 1794 dest, 1787 1795 dest_mode, … … 1790 1798 polarity, 1791 1799 trig_mode); 1800 /* We must be sure that attempts to reschedule in R3 1801 never get here */ 1802 Assert(rc == VINF_SUCCESS); 1792 1803 #endif /* VBOX */ 1793 1804 } … … 2155 2166 TMTimerStop(s->CTX_SUFF(pTimer)); 2156 2167 2157 apic_init_ipi( s);2168 apic_init_ipi(dev, s); 2158 2169 /* malc, I've removed the initing duplicated in apic_init_ipi(). This 2159 2170 * arb_id was left over.. */
Note:
See TracChangeset
for help on using the changeset viewer.