Changeset 40450 in vbox for trunk/src/VBox/VMM

Timestamp:

Mar 13, 2012 3:56:22 PM (13 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

76807

Message:

EM: Refactoring (dropping pVM argument).

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/EMAll.cpp (modified) (8 diffs)
• VMMAll/PGMAll.cpp (modified) (1 diff)
• VMMAll/PGMAllPool.cpp (modified) (2 diffs)
• VMMR0/HWSVMR0.cpp (modified) (5 diffs)
• VMMR0/HWVMXR0.cpp (modified) (2 diffs)
• VMMR3/EMRaw.cpp (modified) (2 diffs)
• VMMRC/PATMRC.cpp (modified) (2 diffs)
• VMMRC/SELMRC.cpp (modified) (2 diffs)
• VMMRC/TRPMRCHandlers.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -76 +76 @@
 *******************************************************************************/
 #ifndef VBOX_WITH_IEM
-DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPUOuter(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
+DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPUOuter(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
                                                         RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize);
 #endif
@@ -474 +474 @@
  * @retval  VERR_*                  Fatal errors.
  *
- * @param   pVM         The VM handle.
  * @param   pVCpu       The VMCPU handle.
  * @param   pRegFrame   The register frame.
@@ -485 +484 @@
  *          to worry about e.g. invalid modrm combinations (!)
  */
-VMMDECL(VBOXSTRICTRC) EMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
+VMMDECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
 {
     LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
@@ -511 +510 @@
             Assert(cbOp == pDis->opsize);
             uint32_t cbIgnored;
-            rc = emInterpretInstructionCPUOuter(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, &cbIgnored);
+            rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, &cbIgnored);
             if (RT_SUCCESS(rc))
                 pRegFrame->rip += cbOp; /* Move on to the next instruction. */
@@ -567 +566 @@
         {
             Assert(cbOp == pDis->opsize);
-            rc = emInterpretInstructionCPUOuter(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, pcbWritten);
+            rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, pcbWritten);
             if (RT_SUCCESS(rc))
                 pRegFrame->rip += cbOp; /* Move on to the next instruction. */
@@ -607 +606 @@
  *          Make sure this can't happen!! (will add some assertions/checks later)
  */
-VMMDECL(VBOXSTRICTRC) EMInterpretInstructionCpuUpdtPC(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
+VMMDECL(VBOXSTRICTRC) EMInterpretInstructionCpuUpdtPC(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
                                                       RTGCPTR pvFault, EMCODETYPE enmCodeType)
 {
     STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
     uint32_t cbIgnored;
-    VBOXSTRICTRC rc = emInterpretInstructionCPUOuter(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
+    VBOXSTRICTRC rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
     STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
     if (RT_SUCCESS(rc))
@@ -3345 +3344 @@
  * @retval  VERR_*                  Fatal errors.
  *
- * @param   pVM         The VM handle.
  * @param   pVCpu       The VMCPU handle.
  * @param   pDis        The disassembler cpu state for the instruction to be
@@ -3361 +3359 @@
  *          Make sure this can't happen!! (will add some assertions/checks later)
  */
-DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPUOuter(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
+DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPUOuter(PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
                                                         RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize)
 {
     STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
-    VBOXSTRICTRC rc = emInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, pcbSize);
+    VBOXSTRICTRC rc = emInterpretInstructionCPU(pVCpu->CTX_SUFF(pVM), pVCpu, pDis, pRegFrame, pvFault, enmCodeType, pcbSize);
     STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
     if (RT_SUCCESS(rc))

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

@@ -807 +807 @@
 VMMDECL(VBOXSTRICTRC) PGMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
 {
-    VBOXSTRICTRC rc = EMInterpretInstruction(pVM, pVCpu, pRegFrame, pvFault);
+    VBOXSTRICTRC rc = EMInterpretInstruction(pVCpu, pRegFrame, pvFault);
     if (rc == VERR_EM_INTERPRETER)
         rc = VINF_EM_RAW_EMULATE_INSTR;

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -840 +840 @@
      * Must do this in raw mode (!); XP boot will fail otherwise.
      */
-    VBOXSTRICTRC rc2 = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL);
+    VBOXSTRICTRC rc2 = EMInterpretInstructionCpuUpdtPC(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL);
     if (RT_SUCCESS(rc2))
         AssertMsg(rc2 == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rc2))); /* ASSUMES no complicated stuff here. */
@@ -979 +979 @@
      * Interpret the instruction.
      */
-    VBOXSTRICTRC rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL);
+    VBOXSTRICTRC rc = EMInterpretInstructionCpuUpdtPC(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL);
     if (RT_SUCCESS(rc))
         AssertMsg(rc == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rc))); /* ASSUMES no complicated stuff here. */

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -2057 +2057 @@
         Log2(("SVM: %RGv mov cr%d, \n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_WRITE_CR0));
         STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCRxWrite[exitCode - SVM_EXIT_WRITE_CR0]);
-        rc = EMInterpretInstruction(pVM, pVCpu, CPUMCTX2CORE(pCtx), 0);
+        rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0);
 
         switch (exitCode - SVM_EXIT_WRITE_CR0)
@@ -2096 +2096 @@
         Log2(("SVM: %RGv mov x, cr%d\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_READ_CR0));
         STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCRxRead[exitCode - SVM_EXIT_READ_CR0]);
-        rc = EMInterpretInstruction(pVM, pVCpu, CPUMCTX2CORE(pCtx), 0);
+        rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0);
         if (rc == VINF_SUCCESS)
         {
@@ -2131 +2131 @@
         }
 
-        rc = EMInterpretInstruction(pVM, pVCpu, CPUMCTX2CORE(pCtx), 0);
+        rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0);
         if (rc == VINF_SUCCESS)
         {
@@ -2166 +2166 @@
         }
 
-        rc = EMInterpretInstruction(pVM, pVCpu, CPUMCTX2CORE(pCtx), 0);
+        rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0);
         if (rc == VINF_SUCCESS)
         {
@@ -2450 +2450 @@
         STAM_COUNTER_INC((pVMCB->ctrl.u64ExitInfo1 == 0) ? &pVCpu->hwaccm.s.StatExitRdmsr : &pVCpu->hwaccm.s.StatExitWrmsr);
         Log(("SVM: %s\n", (pVMCB->ctrl.u64ExitInfo1 == 0) ? "rdmsr" : "wrmsr"));
-        rc = EMInterpretInstruction(pVM, pVCpu, CPUMCTX2CORE(pCtx), 0);
+        rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0);
         if (rc == VINF_SUCCESS)
         {

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -3335 +3335 @@
 
                     default:
-                        rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pDis, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR);
+                        rc = EMInterpretInstructionCpuUpdtPC(pVCpu, pDis, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR);
                         fUpdateRIP = false;
                         break;
@@ -3660 +3660 @@
         /* Note: the intel manual claims there's a REX version of RDMSR that's slightly different, so we play safe by completely disassembling the instruction. */
         Log2(("VMX: %s\n", (exitReason == VMX_EXIT_RDMSR) ? "rdmsr" : "wrmsr"));
-        rc = EMInterpretInstruction(pVM, pVCpu, CPUMCTX2CORE(pCtx), 0);
+        rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0);
         if (rc == VINF_SUCCESS)
         {

trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

@@ -605 +605 @@
                 AssertRC(rc);
 
-                rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR));
+                rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCpuUpdtPC(pVCpu, &cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR));
                 if (RT_SUCCESS(rc))
                     return rc;
@@ -1094 +1094 @@
 #endif
 
-                    rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR));
+                    rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCpuUpdtPC(pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR));
                     if (RT_SUCCESS(rc))
                     {

trunk/src/VBox/VMM/VMMRC/PATMRC.cpp

@@ -112 +112 @@
             /* This part of the page was not patched; try to emulate the instruction. */
             LogFlow(("PATMHandleWriteToPatchPage: Interpret %x accessing %RRv\n", pRegFrame->eip, GCPtr));
-            int rc = EMInterpretInstruction(pVM, VMMGetCpu0(pVM), pRegFrame, (RTGCPTR)(RTRCUINTPTR)GCPtr);
+            int rc = EMInterpretInstruction(VMMGetCpu0(pVM), pRegFrame, (RTGCPTR)(RTRCUINTPTR)GCPtr);
             if (rc == VINF_SUCCESS)
             {
@@ -520 +520 @@
             }
 
-            rc = EMInterpretInstructionCpuUpdtPC(pVM, VMMGetCpu0(pVM), &cpu, pRegFrame, 0 /* not relevant here */,
+            rc = EMInterpretInstructionCpuUpdtPC(VMMGetCpu0(pVM), &cpu, pRegFrame, 0 /* not relevant here */,
                                                  EMCODETYPE_SUPERVISOR);
             if (rc != VINF_SUCCESS)

trunk/src/VBox/VMM/VMMRC/SELMRC.cpp

@@ -194 +194 @@
         /** @todo should check if any affected selectors are loaded. */
         uint32_t cb;
-        rc = EMInterpretInstructionEx(pVM, pVCpu, pRegFrame, (RTGCPTR)(RTRCUINTPTR)pvFault, &cb);
+        rc = EMInterpretInstructionEx(pVCpu, pRegFrame, (RTGCPTR)(RTRCUINTPTR)pvFault, &cb);
         if (RT_SUCCESS(rc) && cb)
         {
@@ -305 +305 @@
      */
     uint32_t cb;
-    int rc = EMInterpretInstructionEx(pVM, pVCpu, pRegFrame, (RTGCPTR)(RTRCUINTPTR)pvFault, &cb);
+    int rc = EMInterpretInstructionEx(pVCpu, pRegFrame, (RTGCPTR)(RTRCUINTPTR)pvFault, &cb);
     if (RT_SUCCESS(rc) && cb)
     {

trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

@@ -556 +556 @@
         {
             LogFlow(("TRPMGCTrap06Handler: -> EMInterpretInstructionCPU\n"));
-            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &Cpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
+            rc = EMInterpretInstructionCpuUpdtPC(pVCpu, &Cpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
         }
         /* Never generate a raw trap here; it might be an instruction, that requires emulation. */
@@ -798 +798 @@
         case OP_WRMSR:
         {
-            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
+            rc = EMInterpretInstructionCpuUpdtPC(pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
             if (rc == VERR_EM_INTERPRETER)
                 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
@@ -874 +874 @@
         case OP_RDPMC:
         {
-            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
+            rc = EMInterpretInstructionCpuUpdtPC(pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
             if (rc == VERR_EM_INTERPRETER)
                 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;