Changeset 41674 in vbox
- Timestamp:
- Jun 12, 2012 8:16:31 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 78481
- Location:
- trunk
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dis.h
r41671 r41674 35 35 36 36 37 /** CPU mode flags (DISCPUSTATE::mode).38 * @{39 */ 40 typedef enum 37 /** 38 * CPU mode flags (DISCPUSTATE::mode). 39 */ 40 typedef enum DISCPUMODE 41 41 { 42 CPUMODE_16BIT = 1, 43 CPUMODE_32BIT = 2, 44 CPUMODE_64BIT = 3, 42 CPUMODE_INVALID = 0, 43 CPUMODE_16BIT, 44 CPUMODE_32BIT, 45 CPUMODE_64BIT, 45 46 /** hack forcing the size of the enum to 32-bits. */ 46 47 CPUMODE_MAKE_32BIT_HACK = 0x7fffffff 47 48 } DISCPUMODE; 48 /** @} */ 49 50 /** Prefix byte flags 49 50 /** @name Prefix byte flags 51 51 * @{ 52 52 */ 53 53 #define PREFIX_NONE 0 54 54 /** non-default address size. */ 55 #define PREFIX_ADDRSIZE RT_BIT(0)55 #define PREFIX_ADDRSIZE UINT8_C(0x00) 56 56 /** non-default operand size. */ 57 #define PREFIX_OPSIZE RT_BIT(1)57 #define PREFIX_OPSIZE UINT8_C(0x01) 58 58 /** lock prefix. */ 59 #define PREFIX_LOCK RT_BIT(2)59 #define PREFIX_LOCK UINT8_C(0x02) 60 60 /** segment prefix. */ 61 #define PREFIX_SEG RT_BIT(3)61 #define PREFIX_SEG UINT8_C(0x04) 62 62 /** rep(e) prefix (not a prefix, but we'll treat is as one). */ 63 #define PREFIX_REP RT_BIT(4)63 #define PREFIX_REP UINT8_C(0x08) 64 64 /** rep(e) prefix (not a prefix, but we'll treat is as one). */ 65 #define PREFIX_REPNE RT_BIT(5)65 #define PREFIX_REPNE UINT8_C(0x10) 66 66 /** REX prefix (64 bits) */ 67 #define PREFIX_REX RT_BIT(6)68 /** @} */ 69 70 /** 64 bits prefix byte flags67 #define PREFIX_REX UINT8_C(0x20) 68 /** @} */ 69 70 /** @name 64 bits prefix byte flags 71 71 * @{ 72 72 */ … … 90 90 /** @} */ 91 91 92 /** 93 * Operand type.92 /** @name Operand type. 93 * @{ 94 94 */ 95 95 #define OPTYPE_INVALID RT_BIT(0) … … 119 119 #define OPTYPE_MOD_FIXED_11 RT_BIT(24) /**< modrm.mod is always 11b */ 120 120 #define OPTYPE_FORCED_32_OP_SIZE_X86 RT_BIT(25) /**< Forced 32 bits operand size; regardless of prefix bytes (only in 16 & 32 bits mode!) */ 121 #define OPTYPE_ALL (0xffffffff) 122 123 /** Parameter usage flags. 121 #define OPTYPE_ALL UINT32_C(0xffffffff) 122 /** @} */ 123 124 /** @name Parameter usage flags. 124 125 * @{ 125 126 */ … … 507 508 PFNDISPARSE *pfnDisasmFnTable; 508 509 /** Internal: instruction filter */ 509 uint32_t uFilter;510 uint32_t fFilter; 510 511 /** Return code set by a worker function like the opcode bytes readers. */ 511 512 int32_t rc; … … 558 559 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput); 559 560 560 DISDECL(int) DIS CoreOne(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PDISCPUSTATE pCpu, uint32_t *pcbInstr);561 DISDECL(int) DIS CoreOneWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,562 563 DISDECL(int) DIS CoreOneExEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t uFilter,564 565 561 DISDECL(int) DISInstr(void const *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE pCpu, uint32_t *pcbInstr); 562 DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser, 563 PDISCPUSTATE pCpu, uint32_t *pcbInstr); 564 DISDECL(int) DISInstEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t uFilter, 565 PFNDISREADBYTES pfnReadBytes, void *pvUser, 566 PDISCPUSTATE pCpu, uint32_t *pcbInstr); 566 567 567 568 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam); -
trunk/src/VBox/Devices/PC/BIOS-new/MakeDebianBiosAssembly.cpp
r41668 r41674 968 968 unsigned cbInstr; 969 969 DISCPUSTATE CpuState; 970 int rc = DIS CoreOneWithReader(uFlatAddr, fIs16Bit ? CPUMODE_16BIT : CPUMODE_32BIT,971 970 int rc = DISInstrWithReader(uFlatAddr, fIs16Bit ? CPUMODE_16BIT : CPUMODE_32BIT, 971 disReadOpcodeBytes, NULL, &CpuState, &cbInstr); 972 972 if ( RT_SUCCESS(rc) 973 973 && cbInstr <= cb) -
trunk/src/VBox/Disassembler/Disasm.cpp
r41671 r41674 96 96 PDISCPUSTATE pCpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput) 97 97 { 98 int rc = DIS CoreOneExEx(uInstrAddr, enmCpuMode, uFilter, pfnReadBytes, pvUser, pCpu, pcbInstr);98 int rc = DISInstEx(uInstrAddr, enmCpuMode, uFilter, pfnReadBytes, pvUser, pCpu, pcbInstr); 99 99 if (RT_SUCCESS(rc) && pszOutput && cbOutput) 100 100 { -
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41668 r41674 212 212 * 213 213 * @returns VBox status code. 214 * @param uInstrAddrAddress of the instruction to decode. This is a214 * @param pvInstr Address of the instruction to decode. This is a 215 215 * real address in the current context that can be 216 * derefferenced. (Consider DISCoreOneWithReader if217 * this isn't the case.)216 * accessed without faulting. (Consider 217 * DISInstrWithReader if this isn't the case.) 218 218 * @param enmCpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT. 219 219 * @param pfnReadBytes Callback for reading instruction bytes. … … 224 224 * PDISCPUSTATE::opsize. 225 225 */ 226 DISDECL(int) DIS CoreOne(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PDISCPUSTATE pCpu, uint32_t *pcbInstr)227 { 228 return DIS CoreOneExEx(uInstrAddr, enmCpuMode, OPTYPE_ALL, NULL /*pfnReadBytes*/, NULL /*pvUser*/, pCpu, pcbInstr);226 DISDECL(int) DISInstr(const void *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE pCpu, uint32_t *pcbInstr) 227 { 228 return DISInstEx((uintptr_t)pvInstr, enmCpuMode, OPTYPE_ALL, NULL /*pfnReadBytes*/, NULL /*pvUser*/, pCpu, pcbInstr); 229 229 } 230 230 … … 246 246 * PDISCPUSTATE::opsize. 247 247 */ 248 DISDECL(int) DIS CoreOneWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,249 250 { 251 return DIS CoreOneExEx(uInstrAddr, enmCpuMode, OPTYPE_ALL, pfnReadBytes, pvUser, pCpu, pcbInstr);248 DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser, 249 PDISCPUSTATE pCpu, uint32_t *pcbInstr) 250 { 251 return DISInstEx(uInstrAddr, enmCpuMode, OPTYPE_ALL, pfnReadBytes, pvUser, pCpu, pcbInstr); 252 252 } 253 253 254 254 255 255 /** 256 * Parses one guest instruction. 257 * 258 * The result is found in pCpu and pcbInstr. 256 * Disassembles on instruction, details in @a pCpu and length in @a pcbInstr. 259 257 * 260 258 * @returns VBox status code. … … 263 261 * @param enmCpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT. 264 262 * @param pfnReadBytes Callback for reading instruction bytes. 265 * @param uFilter Instruction type filter.263 * @param fFilter Instruction type filter. 266 264 * @param pvUser User argument for the instruction reader. (Ends up in apvUserData[0].) 267 * @param pCpu Pointer to cpu structure. Will be initialized. 268 * @param pcbInstr Where to store the size of the instruction. 269 * NULL is allowed. This is also stored in 270 * PDISCPUSTATE::opsize. 265 * @param pCpu Pointer to CPU structure. With the exception of 266 * DISCPUSTATE::apvUserData[1] and 267 * DISCPUSTATE::apvUserData[2], the structure will be 268 * completely initialized by this API, i.e. no input is 269 * taken from it. 270 * @param pcbInstr Where to store the size of the instruction. (This 271 * is also stored in PDISCPUSTATE::opsize.) Optional. 271 272 */ 272 DISDECL(int) DIS CoreOneExEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t uFilter,273 274 273 DISDECL(int) DISInstEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter, 274 PFNDISREADBYTES pfnReadBytes, void *pvUser, 275 PDISCPUSTATE pCpu, uint32_t *pcbInstr) 275 276 { 276 277 const OPCODE *paOneByteMap; … … 299 300 pCpu->uInstrAddr = uInstrAddr; 300 301 pCpu->pfnDisasmFnTable = g_apfnFullDisasm; 301 pCpu-> uFilter = uFilter;302 pCpu->fFilter = fFilter; 302 303 pCpu->rc = VINF_SUCCESS; 303 304 pCpu->pfnReadBytes = pfnReadBytes ? pfnReadBytes : disReadBytesDefault; … … 451 452 /* 452 453 * Apply filter to instruction type to determine if a full disassembly is required. 453 * @noteMultibyte opcodes are always marked harmless until the final byte.454 * Note! Multibyte opcodes are always marked harmless until the final byte. 454 455 */ 455 if ((pOp->optype & pCpu-> uFilter) == 0)456 if ((pOp->optype & pCpu->fFilter) == 0) 456 457 { 457 458 fFiltered = true; … … 541 542 * @note Multibyte opcodes are always marked harmless until the final byte. 542 543 */ 543 if ((fpop->optype & pCpu-> uFilter) == 0)544 if ((fpop->optype & pCpu->fFilter) == 0) 544 545 pCpu->pfnDisasmFnTable = g_apfnCalcSize; 545 546 else -
trunk/src/VBox/Disassembler/DisasmTestCore.cpp
r41668 r41674 39 39 unsigned cb; 40 40 DISCPUSTATE cpu; 41 if (DIS CoreOne((uintptr_t)&DISCoreOne, CPUMODE_32BIT, &cpu, &cb))41 if (DISInstr((void *)(uintptr_t)&DISInstr, CPUMODE_32BIT, &cpu, &cb)) 42 42 printf("ok %d\n", cpu.addrmode); 43 43 else -
trunk/src/VBox/Runtime/testcase/tstLdr-3.cpp
r41668 r41674 164 164 char szOutput[256]; 165 165 unsigned cbInstr; 166 int rc = DIS CoreOneWithReader(uNearAddr + i, pCpu->mode,167 168 166 int rc = DISInstrWithReader(uNearAddr + i, pCpu->mode, 167 MyReadBytes, (uint8_t *)pvCodeBlock - (uintptr_t)uNearAddr, 168 pCpu, &cbInstr); 169 169 RTAssertSetMayPanic(fMayPanic); 170 170 RTAssertSetQuiet(fQuiet); -
trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp
r41668 r41674 105 105 { 106 106 uint32_t cb; 107 int rc = DIS CoreOneWithReader(CodeIndex, CPUMODE_32BIT, DisasmTest1ReadCode, 0, pCpu, &cb);107 int rc = DISInstrWithReader(CodeIndex, CPUMODE_32BIT, DisasmTest1ReadCode, 0, pCpu, &cb); 108 108 *pcb = cb; 109 109 MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d Cpu: opcode=%#x pCurInstr=%p (42=%d)\n", \ -
trunk/src/VBox/Runtime/testcase/tstLdrObj.cpp
r41668 r41674 98 98 static unsigned cb; 99 99 DISCPUSTATE Cpu; 100 DIS CoreOne((uintptr_t)SomeExportFunction3, CPUMODE_32BIT, &Cpu, &cb);100 DISInstr((void *)(uintptr_t)SomeExportFunction3, CPUMODE_32BIT, &Cpu, &cb); 101 101 return (void *)(uintptr_t)&SomeExportFunction1; 102 102 } -
trunk/src/VBox/Runtime/testcase/tstLdrObjR0.cpp
r41668 r41674 98 98 Cpu.mode = CPUMODE_32BIT; 99 99 100 DIS CoreOne((uintptr_t)SomeExportFunction3, CPUMODE_32BIT, &Cpu, &cb);100 DISInstr((void *)(uintptr_t)SomeExportFunction3, CPUMODE_32BIT, &Cpu, &cb); 101 101 return (void *)(uintptr_t)&SomeExportFunction1; 102 102 } -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41668 r41674 364 364 State.GCPtr = NIL_RTGCPTR; 365 365 } 366 return DIS CoreOneWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize);366 return DISInstrWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize); 367 367 } 368 368 … … 377 377 State.GCPtr = InstrGC; 378 378 379 return DIS CoreOneWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize);379 return DISInstrWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize); 380 380 } 381 381 … … 460 460 461 461 DISCPUMODE enmCpuMode = SELMGetCpuModeFromSelector(pVCpu, pCtxCore->eflags, pCtxCore->cs, (PCPUMSELREGHID)&pCtxCore->csHid); 462 rc = DIS CoreOneWithReader(GCPtrInstr, enmCpuMode, emReadBytes, &State, pDis, pcbInstr);462 rc = DISInstrWithReader(GCPtrInstr, enmCpuMode, emReadBytes, &State, pDis, pcbInstr); 463 463 if (RT_SUCCESS(rc)) 464 464 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r41671 r41674 3676 3676 uint32_t cbInstr; 3677 3677 #ifndef LOG_ENABLED 3678 rc = DIS CoreOneWithReader(GCPtrPC, enmDisCpuMode, cpumR3DisasInstrRead, &State, pCpu, &cbInstr);3678 rc = DISInstrWithReader(GCPtrPC, enmDisCpuMode, cpumR3DisasInstrRead, &State, pCpu, &cbInstr); 3679 3679 if (RT_SUCCESS(rc)) 3680 3680 { -
trunk/src/VBox/VMM/VMMR3/CSAM.cpp
r41673 r41674 765 765 { 766 766 (pCpu)->apvUserData[1] = InstrHC; 767 (pCpu)->apvUserData[2] = (void *)(uintptr_t)InstrGC; Assert(sizeof(InstrGC) <= sizeof(pCpu->apvUserData[0]));768 767 #ifdef DEBUG 769 768 return DISInstrToStrEx(InstrGC, enmCpuMode, CSAMR3ReadBytes, pVM, OPTYPE_ALL, … … 774 773 return DISInstrToStrEx(InstrGC, enmCpuMode, CSAMR3ReadBytes, pVM, ~(OPTYPE_INVALID | OPTYPE_HARMLESS | OPTYPE_RRM_MASK), 775 774 pCpu, pcbInstr, pszOutput, cbOutput); 776 return DIS CoreOneExEx(InstrGC, enmCpuMode, ~(OPTYPE_INVALID | OPTYPE_HARMLESS | OPTYPE_RRM_MASK), CSAMR3ReadBytes, pVM,777 775 return DISInstEx(InstrGC, enmCpuMode, ~(OPTYPE_INVALID | OPTYPE_HARMLESS | OPTYPE_RRM_MASK), CSAMR3ReadBytes, pVM, 776 pCpu, pcbInstr); 778 777 #endif 779 778 } -
trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp
r41668 r41674 140 140 141 141 uint32_t cbInstr; 142 int rc = DIS CoreOneWithReader(GCPtr,143 144 145 146 147 142 int rc = DISInstrWithReader(GCPtr, 143 enmCpuMode, 144 dbgfR3DisasInstrRead, 145 &pState->Cpu, 146 &pState->Cpu, 147 &cbInstr); 148 148 if (RT_SUCCESS(rc)) 149 149 { -
trunk/src/VBox/VMM/VMMR3/PATM.cpp
r41671 r41674 603 603 disinfo.pInstrGC = InstrGCPtr32; 604 604 disinfo.fReadFlags = fReadFlags; 605 (pCpu)->pfnReadBytes = patmReadBytes;606 (pCpu)->apvUserData[0] = &disinfo;607 605 return RT_SUCCESS(DISInstrToStrWithReader(InstrGCPtr32, 608 606 (pPatch->flags & PATMFL_CODE32) ? CPUMODE_32BIT : CPUMODE_16BIT, … … 621 619 disinfo.pInstrGC = InstrGCPtr32; 622 620 disinfo.fReadFlags = fReadFlags; 623 (pCpu)->pfnReadBytes = patmReadBytes; 624 (pCpu)->apvUserData[0] = &disinfo; 625 return RT_SUCCESS(DISCoreOneWithReader(InstrGCPtr32, 626 (pPatch->flags & PATMFL_CODE32) ? CPUMODE_32BIT : CPUMODE_16BIT, 627 patmReadBytes, &disinfo, 628 pCpu, pcbInstr)); 621 return RT_SUCCESS(DISInstrWithReader(InstrGCPtr32, 622 (pPatch->flags & PATMFL_CODE32) ? CPUMODE_32BIT : CPUMODE_16BIT, 623 patmReadBytes, &disinfo, 624 pCpu, pcbInstr)); 629 625 } 630 626 … … 640 636 disinfo.pInstrGC = InstrGCPtr32; 641 637 disinfo.fReadFlags = fReadFlags; 642 (pCpu)->pfnReadBytes = patmReadBytes; 643 (pCpu)->apvUserData[0] = &disinfo; 644 return RT_SUCCESS(DISCoreOneWithReader(InstrGCPtr32, pPatch->uOpMode, patmReadBytes, &disinfo, 645 pCpu, pcbInstr)); 638 return RT_SUCCESS(DISInstrWithReader(InstrGCPtr32, pPatch->uOpMode, patmReadBytes, &disinfo, 639 pCpu, pcbInstr)); 646 640 } 647 641 -
trunk/src/VBox/VMM/VMMR3/VMMSwitcher.cpp
r41671 r41674 835 835 DISCPUSTATE Cpu; 836 836 char szDisas[256]; 837 int rc = DIS CoreOne((uintptr_t)pu8CodeR3 + offCode, CPUMODE_32BIT, &Cpu, &cbInstr);837 int rc = DISInstr(pu8CodeR3 + offCode, CPUMODE_32BIT, &Cpu, &cbInstr); 838 838 if (RT_SUCCESS(rc)) 839 839 { -
trunk/src/VBox/VMM/VMMRC/PATMRC.cpp
r41668 r41674 523 523 rc = VBOXSTRICTRC_TODO(rcStrict); 524 524 #else 525 rc = DIS CoreOne((uintptr_t)&pRec->patch.aPrivInstr[0], cpu.mode, &cpu, &cbOp);525 rc = DISInstr(&pRec->patch.aPrivInstr[0], cpu.mode, &cpu, &cbOp); 526 526 if (RT_FAILURE(rc)) 527 527 {
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