VirtualBox

Changeset 41738 in vbox


Ignore:
Timestamp:
Jun 15, 2012 1:25:47 AM (12 years ago)
Author:
vboxsync
Message:

DISOPCODE: s/optype/fOpType/ s/param/fParam/ docs

Location:
trunk
Files:
10 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/dis.h

    r41737 r41738  
    9191/** @} */
    9292
    93 /** @name Operand type.
     93/** @name Operand type (DISOPCODE::fOpType).
    9494 * @{
    9595 */
    … …  
    449449    const char  *pszOpcode;
    450450#endif
     451    /** Parameter \#1 parser index. */
    451452    uint8_t     idxParse1;
     453    /** Parameter \#2 parser index. */
    452454    uint8_t     idxParse2;
     455    /** Parameter \#3 parser index. */
    453456    uint8_t     idxParse3;
     457    /** Unused padding.  */
    454458    uint8_t     uUnused;
    455459    /** The opcode identifier. This DIS specific, @see grp_dis_opcodes and
    456460     * VBox/disopcode.h. */
    457461    uint16_t    uOpcode;
    458     uint16_t    param1;
    459     uint16_t    param2;
    460     uint16_t    param3;
    461     uint32_t    optype;
     462    /** Parameter \#1 info, @see grp_dis_opparam. */
     463    uint16_t    fParam1;
     464    /** Parameter \#2 info, @see grp_dis_opparam. */
     465    uint16_t    fParam2;
     466    /** Parameter \#3 info, @see grp_dis_opparam. */
     467    uint16_t    fParam3;
     468    /** Operand type flags, DISOPTYPE_XXX. */
     469    uint32_t    fOpType;
    462470} DISOPCODE;
    463471/** Pointer to const opcode. */

  • trunk/include/VBox/disopcode.h

    r41737 r41738  
    629629
    630630
    631 /** @name Opcode parameters
     631/** @defgroup grp_dis_opparam Opcode parameters (DISOPCODE::fParam1,
     632 *            DISOPCODE::fParam2, DISOPCODE::fParam3)
     633 * @ingroup grp_dis
    632634 * @{
    633635 */
     636
    634637/* NOTE: Register order is important for translations!! */
    635638#define OP_PARM_NONE            0

  • trunk/src/VBox/Disassembler/DisasmCore.cpp

    r41737 r41738  
    358358            // segment override prefix byte
    359359            case OP_SEG:
    360                 pCpu->idxSegPrefix = (DISSELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START);
     360                pCpu->idxSegPrefix = (DISSELREG)(paOneByteMap[codebyte].fParam1 - OP_PARM_REG_SEG_START);
    361361                /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */
    362362                if (   pCpu->uCpuMode != DISCPUMODE_64BIT
    … …  
    414414                /* REX prefix byte */
    415415                pCpu->fPrefix   |= DISPREFIX_REX;
    416                 pCpu->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1);
     416                pCpu->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].fParam1);
    417417                iByte           += sizeof(uint8_t);
    418418
    … …  
    459459     * Note! Multibyte opcodes are always marked harmless until the final byte.
    460460     */
    461     if ((pOp->optype & pCpu->fFilter) == 0)
     461    if ((pOp->fOpType & pCpu->fFilter) == 0)
    462462    {
    463463        fFiltered = true;
    … …  
    471471
    472472    // Should contain the parameter type on input
    473     pCpu->param1.param = pOp->param1;
    474     pCpu->param2.param = pOp->param2;
    475     pCpu->param3.param = pOp->param3;
     473    pCpu->param1.param = pOp->fParam1;
     474    pCpu->param2.param = pOp->fParam2;
     475    pCpu->param3.param = pOp->fParam3;
    476476
    477477    /* Correct the operand size if the instruction is marked as forced or default 64 bits */
    478478    if (pCpu->uCpuMode == DISCPUMODE_64BIT)
    479479    {
    480         if (pOp->optype & DISOPTYPE_FORCED_64_OP_SIZE)
     480        if (pOp->fOpType & DISOPTYPE_FORCED_64_OP_SIZE)
    481481            pCpu->uOpMode = DISCPUMODE_64BIT;
    482482        else
    483         if (    (pOp->optype & DISOPTYPE_DEFAULT_64_OP_SIZE)
     483        if (    (pOp->fOpType & DISOPTYPE_DEFAULT_64_OP_SIZE)
    484484            &&  !(pCpu->fPrefix & DISPREFIX_OPSIZE))
    485485            pCpu->uOpMode = DISCPUMODE_64BIT;
    486486    }
    487487    else
    488     if (pOp->optype & DISOPTYPE_FORCED_32_OP_SIZE_X86)
     488    if (pOp->fOpType & DISOPTYPE_FORCED_32_OP_SIZE_X86)
    489489    {
    490490        /* Forced 32 bits operand size for certain instructions (mov crx, mov drx). */
    … …  
    534534
    535535        // Should contain the parameter type on input
    536         pCpu->param1.param = fpop->param1;
    537         pCpu->param2.param = fpop->param2;
     536        pCpu->param1.param = fpop->fParam1;
     537        pCpu->param2.param = fpop->fParam2;
    538538    }
    539539    else
    … …  
    547547     * @note Multibyte opcodes are always marked harmless until the final byte.
    548548     */
    549     if ((fpop->optype & pCpu->fFilter) == 0)
     549    if ((fpop->fOpType & pCpu->fFilter) == 0)
    550550        pCpu->pfnDisasmFnTable = g_apfnCalcSize;
    551551    else
    … …  
    557557    {
    558558        /* Note: redundant, but just in case this ever changes */
    559         if (fpop->optype & DISOPTYPE_FORCED_64_OP_SIZE)
     559        if (fpop->fOpType & DISOPTYPE_FORCED_64_OP_SIZE)
    560560            pCpu->uOpMode = DISCPUMODE_64BIT;
    561561        else
    562         if (    (fpop->optype & DISOPTYPE_DEFAULT_64_OP_SIZE)
     562        if (    (fpop->fOpType & DISOPTYPE_DEFAULT_64_OP_SIZE)
    563563            &&  !(pCpu->fPrefix & DISPREFIX_OPSIZE))
    564564            pCpu->uOpMode = DISCPUMODE_64BIT;
    … …  
    10771077     * encoding of the MOD field in the MODR/M byte.
    10781078     */
    1079     if (pOp->optype & DISOPTYPE_MOD_FIXED_11)
     1079    if (pOp->fOpType & DISOPTYPE_MOD_FIXED_11)
    10801080        pCpu->ModRM.Bits.Mod = 3;
    10811081
    … …  
    11231123     * encoding of the MOD field in the MODR/M byte.
    11241124     */
    1125     if (pOp->optype & DISOPTYPE_MOD_FIXED_11)
     1125    if (pOp->fOpType & DISOPTYPE_MOD_FIXED_11)
    11261126        pCpu->ModRM.Bits.Mod = 3;
    11271127
    … …  
    15681568            /* Use 64-bit registers. */
    15691569            pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
    1570             if (    (pOp->optype & DISOPTYPE_REXB_EXTENDS_OPREG)
     1570            if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
    15711571                &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
    15721572                &&  (pCpu->fPrefix & DISPREFIX_REX)
    … …  
    16121612        if (pCpu->uOpMode == DISCPUMODE_64BIT)
    16131613        {
    1614             if (    (pOp->optype & DISOPTYPE_REXB_EXTENDS_OPREG)
     1614            if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
    16151615                &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
    16161616                &&  (pCpu->fPrefix & DISPREFIX_REX)

  • trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp

    r41737 r41738  
    675675                            if (    pParam->param != OP_PARM_Ev
    676676                                ||  pOp->uOpcode != OP_MOV
    677                                 ||  (   pOp->param1 != OP_PARM_Sw
    678                                      && pOp->param2 != OP_PARM_Sw))
     677                                ||  (   pOp->fParam1 != OP_PARM_Sw
     678                                     && pOp->fParam2 != OP_PARM_Sw))
    679679                                PUT_SIZE_OVERRIDE();
    680680                            PUT_C('[');
    … …  
    792792                            case DISUSE_IMMEDIATE8:
    793793                                if (    (fFlags & DIS_FMT_FLAGS_STRICT)
    794                                     &&  (   (pOp->param1 >= OP_PARM_REG_GEN8_START && pOp->param1 <= OP_PARM_REG_GEN8_END)
    795                                          || (pOp->param2 >= OP_PARM_REG_GEN8_START && pOp->param2 <= OP_PARM_REG_GEN8_END))
     794                                    &&  (   (pOp->fParam1 >= OP_PARM_REG_GEN8_START && pOp->fParam1 <= OP_PARM_REG_GEN8_END)
     795                                         || (pOp->fParam2 >= OP_PARM_REG_GEN8_START && pOp->fParam2 <= OP_PARM_REG_GEN8_END))
    796796                                   )
    797797                                    PUT_SZ("strict byte ");
    … …  
    803803                                    ||  (   (fFlags & DIS_FMT_FLAGS_STRICT)
    804804                                         && (   (int8_t)pParam->parval == (int16_t)pParam->parval
    805                                              || (pOp->param1 >= OP_PARM_REG_GEN16_START && pOp->param1 <= OP_PARM_REG_GEN16_END)
    806                                              || (pOp->param2 >= OP_PARM_REG_GEN16_START && pOp->param2 <= OP_PARM_REG_GEN16_END))
     805                                             || (pOp->fParam1 >= OP_PARM_REG_GEN16_START && pOp->fParam1 <= OP_PARM_REG_GEN16_END)
     806                                             || (pOp->fParam2 >= OP_PARM_REG_GEN16_START && pOp->fParam2 <= OP_PARM_REG_GEN16_END))
    807807                                        )
    808808                                   )
    … …  
    826826                                    ||  (   (fFlags & DIS_FMT_FLAGS_STRICT)
    827827                                         && (   (int8_t)pParam->parval == (int32_t)pParam->parval
    828                                              || (pOp->param1 >= OP_PARM_REG_GEN32_START && pOp->param1 <= OP_PARM_REG_GEN32_END)
    829                                              || (pOp->param2 >= OP_PARM_REG_GEN32_START && pOp->param2 <= OP_PARM_REG_GEN32_END))
     828                                             || (pOp->fParam1 >= OP_PARM_REG_GEN32_START && pOp->fParam1 <= OP_PARM_REG_GEN32_END)
     829                                             || (pOp->fParam2 >= OP_PARM_REG_GEN32_START && pOp->fParam2 <= OP_PARM_REG_GEN32_END))
    830830                                        )
    831831                                    )
    … …  
    13021302    {
    13031303        Assert(pCpu->fPrefix & DISPREFIX_ADDRSIZE);
    1304         if (    pCpu->pCurInstr->param3 == OP_PARM_NONE
    1305             &&  pCpu->pCurInstr->param2 == OP_PARM_NONE
    1306             &&  (   pCpu->pCurInstr->param1 >= OP_PARM_REG_GEN32_START
    1307                  && pCpu->pCurInstr->param1 <= OP_PARM_REG_GEN32_END))
     1304        if (    pCpu->pCurInstr->fParam3 == OP_PARM_NONE
     1305            &&  pCpu->pCurInstr->fParam2 == OP_PARM_NONE
     1306            &&  (   pCpu->pCurInstr->fParam1 >= OP_PARM_REG_GEN32_START
     1307                 && pCpu->pCurInstr->fParam1 <= OP_PARM_REG_GEN32_END))
    13081308            return true;
    13091309    }
    … …  
    13191319
    13201320            case OP_JMP:
    1321                 if (    pCpu->pCurInstr->param1 != OP_PARM_Jb
    1322                     &&  pCpu->pCurInstr->param1 != OP_PARM_Jv)
     1321                if (    pCpu->pCurInstr->fParam1 != OP_PARM_Jb
     1322                    &&  pCpu->pCurInstr->fParam1 != OP_PARM_Jv)
    13231323                    break;
    13241324                /* fall thru */
    … …  
    13521352            case OP_POP:
    13531353            case OP_PUSH:
    1354                 if (    pCpu->pCurInstr->param1 >= OP_PARM_REG_SEG_START
    1355                     &&  pCpu->pCurInstr->param1 <= OP_PARM_REG_SEG_END)
     1354                if (    pCpu->pCurInstr->fParam1 >= OP_PARM_REG_SEG_START
     1355                    &&  pCpu->pCurInstr->fParam1 <= OP_PARM_REG_SEG_END)
    13561356                    return true;
    13571357                if (    (fPrefixes & ~DISPREFIX_OPSIZE)
    1358                     &&  pCpu->pCurInstr->param1 >= OP_PARM_REG_GEN32_START
    1359                     &&  pCpu->pCurInstr->param1 <= OP_PARM_REG_GEN32_END)
     1358                    &&  pCpu->pCurInstr->fParam1 >= OP_PARM_REG_GEN32_START
     1359                    &&  pCpu->pCurInstr->fParam1 <= OP_PARM_REG_GEN32_END)
    13601360                    return true;
    13611361                break;
    … …  
    13731373    /* Implicit 8-bit register instructions doesn't mix with operand size. */
    13741374    if (    (fPrefixes & DISPREFIX_OPSIZE)
    1375         &&  (   (   pCpu->pCurInstr->param1 == OP_PARM_Gb /* r8 */
    1376                  && pCpu->pCurInstr->param2 == OP_PARM_Eb /* r8/mem8 */)
    1377              || (   pCpu->pCurInstr->param2 == OP_PARM_Gb /* r8 */
    1378                  && pCpu->pCurInstr->param1 == OP_PARM_Eb /* r8/mem8 */))
     1375        &&  (   (   pCpu->pCurInstr->fParam1 == OP_PARM_Gb /* r8 */
     1376                 && pCpu->pCurInstr->fParam2 == OP_PARM_Eb /* r8/mem8 */)
     1377             || (   pCpu->pCurInstr->fParam2 == OP_PARM_Gb /* r8 */
     1378                 && pCpu->pCurInstr->fParam1 == OP_PARM_Eb /* r8/mem8 */))
    13791379       )
    13801380    {
    … …  
    14151415            case OP_XOR:
    14161416            case OP_CMP:
    1417                 if (    (    pCpu->pCurInstr->param1 == OP_PARM_Gb /* r8 */
    1418                          && pCpu->pCurInstr->param2 == OP_PARM_Eb /* r8/mem8 */)
    1419                     ||  (    pCpu->pCurInstr->param1 == OP_PARM_Gv /* rX */
    1420                          && pCpu->pCurInstr->param2 == OP_PARM_Ev /* rX/memX */))
     1417                if (    (    pCpu->pCurInstr->fParam1 == OP_PARM_Gb /* r8 */
     1418                         && pCpu->pCurInstr->fParam2 == OP_PARM_Eb /* r8/mem8 */)
     1419                    ||  (    pCpu->pCurInstr->fParam1 == OP_PARM_Gv /* rX */
     1420                         && pCpu->pCurInstr->fParam2 == OP_PARM_Ev /* rX/memX */))
    14211421                    return true;
    14221422
    … …  
    14481448
    14491449    /* shl eax,1 will be assembled to the form without the immediate byte. */
    1450     if (    pCpu->pCurInstr->param2 == OP_PARM_Ib
     1450    if (    pCpu->pCurInstr->fParam2 == OP_PARM_Ib
    14511451        &&  (uint8_t)pCpu->param2.parval == 1)
    14521452    {

  • trunk/src/VBox/VMM/VMMR3/CSAM.cpp

    r41737 r41738  
    881881
    882882    case OP_PUSH:
    883         if (pCpu->pCurInstr->param1 != OP_PARM_REG_CS)
     883        if (pCpu->pCurInstr->fParam1 != OP_PARM_REG_CS)
    884884            break;
    885885
    … …  
    956956    {
    957957        // return or jump/call through a jump table
    958         if (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J)
     958        if (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J)
    959959        {
    960960#ifdef DEBUG
    … …  
    13041304         * If it's harmless, then don't bother checking it (the disasm tables had better be accurate!)
    13051305         */
    1306         if ((cpu.pCurInstr->optype & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS)
     1306        if ((cpu.pCurInstr->fOpType & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS)
    13071307        {
    13081308            AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n"));
    … …  
    13271327
    13281328        // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
    1329         if (    ((cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
     1329        if (    ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
    13301330            ||  (cpu.pCurInstr->uOpcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32))  /* simple indirect call (call dword ptr [address]) */
    13311331        {
    … …  
    13951395
    13961396            rc = VWRN_CONTINUE_ANALYSIS;
    1397         } //if ((cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
     1397        } //if ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
    13981398#ifdef CSAM_SCAN_JUMP_TABLE
    13991399        else
    … …  
    25672567                    if (    rc == VINF_SUCCESS
    25682568                        &&  cpu.pCurInstr->uOpcode == OP_PUSH
    2569                         &&  cpu.pCurInstr->param1 == OP_PARM_REG_CS)
     2569                        &&  cpu.pCurInstr->fParam1 == OP_PARM_REG_CS)
    25702570                    {
    25712571                        rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 | PATMFL_GUEST_SPECIFIC);

  • trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

    r41737 r41738  
    622622        rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &cpu, "Guest Trap: ");
    623623        if (    RT_SUCCESS(rc)
    624             &&  (cpu.pCurInstr->optype & DISOPTYPE_PORTIO))
     624            &&  (cpu.pCurInstr->fOpType & DISOPTYPE_PORTIO))
    625625        {
    626626            /*

  • trunk/src/VBox/VMM/VMMR3/PATM.cpp

    r41737 r41738  
    13951395    {
    13961396        /* No unconditional jumps or calls without fixed displacements. */
    1397         if (    (pCpu->pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
     1397        if (    (pCpu->pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW)
    13981398             && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL)
    13991399           )
    … …  
    14021402            if (    pCpu->param1.cb == 6 /* far call/jmp */
    14031403                ||  (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
    1404                 ||  (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
     1404                ||  (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
    14051405               )
    14061406            {
    … …  
    15021502
    15031503    default:
    1504         if (pCpu->pCurInstr->optype & (DISOPTYPE_PRIVILEGED_NOTRAP))
     1504        if (pCpu->pCurInstr->fOpType & (DISOPTYPE_PRIVILEGED_NOTRAP))
    15051505        {
    15061506            patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC);
    … …  
    15111511
    15121512    /* If single instruction patch, we've copied enough instructions *and* the current instruction is not a relative jump. */
    1513     if ((pPatch->flags & PATMFL_CHECK_SIZE) && pPatch->cbPatchBlockSize > SIZEOF_NEARJUMP32 && !(pCpu->pCurInstr->optype & DISOPTYPE_RELATIVE_CONTROLFLOW))
     1513    if ((pPatch->flags & PATMFL_CHECK_SIZE) && pPatch->cbPatchBlockSize > SIZEOF_NEARJUMP32 && !(pCpu->pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW))
    15141514    {
    15151515        /* The end marker for this kind of patch is any instruction at a location outside our patch jump. */
    … …  
    15541554    {
    15551555        // no unconditional jumps or calls without fixed displacements
    1556         if (    (pCpu->pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
     1556        if (    (pCpu->pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW)
    15571557             && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL)
    15581558           )
    … …  
    15611561            if (    pCpu->param1.cb == 6 /* far call/jmp */
    15621562                ||  (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
    1563                 ||  (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
     1563                ||  (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
    15641564               )
    15651565            {
    … …  
    15831583    #if 0
    15841584        ///@todo we can handle certain in/out and privileged instructions in the guest context
    1585         if (pCpu->pCurInstr->optype & DISOPTYPE_PRIVILEGED && pCpu->pCurInstr->uOpcode != OP_STI)
     1585        if (pCpu->pCurInstr->fOpType & DISOPTYPE_PRIVILEGED && pCpu->pCurInstr->uOpcode != OP_STI)
    15861586        {
    15871587            Log(("Illegal instructions for function patch!!\n"));
    … …  
    16161616        return VWRN_CONTINUE_ANALYSIS;
    16171617    default:
    1618         if (pCpu->pCurInstr->optype & (DISOPTYPE_PRIVILEGED_NOTRAP))
     1618        if (pCpu->pCurInstr->fOpType & (DISOPTYPE_PRIVILEGED_NOTRAP))
    16191619        {
    16201620            patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC);
    … …  
    16941694     * Indirect calls are handled below.
    16951695     */
    1696     if (   (pCpu->pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
     1696    if (   (pCpu->pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW)
    16971697        && (pCpu->pCurInstr->uOpcode != OP_CALL || (pPatch->flags & PATMFL_SUPPORT_CALLS))
    1698         && (OP_PARM_VTYPE(pCpu->pCurInstr->param1) == OP_PARM_J))
     1698        && (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) == OP_PARM_J))
    16991699    {
    17001700        RCPTRTYPE(uint8_t *) pTargetGC = PATMResolveBranch(pCpu, pCurInstrGC);
    … …  
    17451745
    17461746    case OP_MOV:
    1747         if (pCpu->pCurInstr->optype & DISOPTYPE_POTENTIALLY_DANGEROUS)
     1747        if (pCpu->pCurInstr->fOpType & DISOPTYPE_POTENTIALLY_DANGEROUS)
    17481748        {
    17491749            /* mov ss, src? */
    … …  
    17721772
    17731773    case OP_POP:
    1774         if (pCpu->pCurInstr->param1 == OP_PARM_REG_SS)
    1775         {
    1776             Assert(pCpu->pCurInstr->optype & DISOPTYPE_INHIBIT_IRQS);
     1774        if (pCpu->pCurInstr->fParam1 == OP_PARM_REG_SS)
     1775        {
     1776            Assert(pCpu->pCurInstr->fOpType & DISOPTYPE_INHIBIT_IRQS);
    17771777
    17781778            Log(("Force recompilation of next instruction for OP_MOV at %RRv\n", pCurInstrGC));
    … …  
    18791879
    18801880    case OP_PUSH:
    1881         if (pCpu->pCurInstr->param1 == OP_PARM_REG_CS)
     1881        if (pCpu->pCurInstr->fParam1 == OP_PARM_REG_CS)
    18821882        {
    18831883            rc = patmPatchGenPushCS(pVM, pPatch);
    … …  
    19791979    case OP_MOV_DR:
    19801980        /* Note: currently we let DRx writes cause a trap d; our trap handler will decide to interpret it or not. */
    1981         if (pCpu->pCurInstr->param2 == OP_PARM_Dd)
     1981        if (pCpu->pCurInstr->fParam2 == OP_PARM_Dd)
    19821982        {
    19831983            rc = patmPatchGenMovDebug(pVM, pPatch, pCpu);
    … …  
    19901990    case OP_MOV_CR:
    19911991        /* Note: currently we let CRx writes cause a trap d; our trap handler will decide to interpret it or not. */
    1992         if (pCpu->pCurInstr->param2 == OP_PARM_Cd)
     1992        if (pCpu->pCurInstr->fParam2 == OP_PARM_Cd)
    19931993        {
    19941994            rc = patmPatchGenMovControl(pVM, pPatch, pCpu);
    … …  
    20002000
    20012001    default:
    2002         if (pCpu->pCurInstr->optype & (DISOPTYPE_CONTROLFLOW | DISOPTYPE_PRIVILEGED_NOTRAP))
     2002        if (pCpu->pCurInstr->fOpType & (DISOPTYPE_CONTROLFLOW | DISOPTYPE_PRIVILEGED_NOTRAP))
    20032003        {
    20042004gen_illegal_instr:
    … …  
    20492049        if (    (pPatch->flags & PATMFL_CHECK_SIZE)
    20502050             &&  pCurInstrGC + pCpu->cbInstr - pInstrGC >= SIZEOF_NEARJUMP32
    2051              &&  !(pCpu->pCurInstr->optype & DISOPTYPE_RELATIVE_CONTROLFLOW)
     2051             &&  !(pCpu->pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW)
    20522052             &&  !(pPatch->flags & PATMFL_RECOMPILE_NEXT) /* do not do this when the next instruction *must* be executed! */
    20532053           )
    … …  
    22322232
    22332233        /* For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction) */
    2234         if (   (cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    2235             && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J)
     2234        if (   (cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW)
     2235            && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J)
    22362236            &&  cpu.pCurInstr->uOpcode != OP_CALL /* complete functions are replaced; don't bother here. */
    22372237           )
    … …  
    24192419
    24202420                default:
    2421                     if (cpunext.pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
     2421                    if (cpunext.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW)
    24222422                    {
    24232423                        Log(("Unexpected control flow instruction after inhibit irq instruction\n"));
    … …  
    24532453
    24542454        /* For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction). */
    2455         if (   (cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    2456             && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J)
     2455        if (   (cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW)
     2456            && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J)
    24572457            &&  cpu.pCurInstr->uOpcode != OP_CALL /* complete functions are replaced; don't bother here. */
    24582458           )
    … …  
    24692469
    24702470            /* We don't check if the branch target lies in a valid page as we've already done that in the analysis phase. */
    2471             if (!(cpu.pCurInstr->optype & DISOPTYPE_UNCOND_CONTROLFLOW))
     2471            if (!(cpu.pCurInstr->fOpType & DISOPTYPE_UNCOND_CONTROLFLOW))
    24722472            {
    24732473                Log(("patmRecompileCodeStream continue passed conditional jump\n"));
    … …  
    25172517        }
    25182518        else
    2519         if (cpu.pCurInstr->optype & DISOPTYPE_UNCOND_CONTROLFLOW)
     2519        if (cpu.pCurInstr->fOpType & DISOPTYPE_UNCOND_CONTROLFLOW)
    25202520        {
    25212521            rc = VINF_SUCCESS;
    … …  
    51985198    if (    disret == true
    51995199        && (pConflictPatch->flags & PATMFL_CODE32)
    5200         && (cpu.pCurInstr->uOpcode == OP_JMP || (cpu.pCurInstr->optype & DISOPTYPE_COND_CONTROLFLOW))
     5200        && (cpu.pCurInstr->uOpcode == OP_JMP || (cpu.pCurInstr->fOpType & DISOPTYPE_COND_CONTROLFLOW))
    52015201        && (cpu.param1.fUse & DISUSE_IMMEDIATE32_REL))
    52025202    {
    … …  
    60146014        rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCurPatchInstrGC, &CpuOld, 0);
    60156015        if (    RT_FAILURE(rc)
    6016             ||  !(CpuOld.pCurInstr->optype & DISOPTYPE_HARMLESS))
     6016            ||  !(CpuOld.pCurInstr->fOpType & DISOPTYPE_HARMLESS))
    60176017        {
    60186018            if (RT_SUCCESS(rc))
    … …  
    60506050
    60516051    if (    RT_SUCCESS(rc)
    6052         &&  (CpuOld.pCurInstr->optype & DISOPTYPE_HARMLESS)
     6052        &&  (CpuOld.pCurInstr->fOpType & DISOPTYPE_HARMLESS)
    60536053       )
    60546054    {
    … …  
    60656065            rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCurInstrGC, &CpuNew, 0);
    60666066
    6067             fValidInstr = !!(CpuNew.pCurInstr->optype & DISOPTYPE_HARMLESS);
     6067            fValidInstr = !!(CpuNew.pCurInstr->fOpType & DISOPTYPE_HARMLESS);
    60686068            if (    !fValidInstr
    6069                 &&  (CpuNew.pCurInstr->optype & DISOPTYPE_RELATIVE_CONTROLFLOW)
     6069                &&  (CpuNew.pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW)
    60706070               )
    60716071            {

  • trunk/src/VBox/VMM/VMMR3/PATMGuest.cpp

    r41737 r41738  
    235235         *  cli
    236236         */
    237         if (pCpu->pCurInstr->param1 == OP_PARM_REG_CS)
     237        if (pCpu->pCurInstr->fParam1 == OP_PARM_REG_CS)
    238238            return PATMPatchOpenBSDHandlerPrefix(pVM, pCpu, pInstrGC, pInstrHC, pPatchRec);
    239239

  • trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp

    r41737 r41738  
    695695        Log(("patmPatchGenIndirectCall\n"));
    696696        Assert(pCpu->param1.cb == 4);
    697         Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J);
     697        Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J);
    698698
    699699        /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
    … …  
    720720        AssertMsg(PATMIsPatchGCAddr(pVM, pTargetGC) == false, ("Target is already a patch address (%RRv)?!?\n", pTargetGC));
    721721        Assert(pTargetGC);
    722         Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) == OP_PARM_J);
     722        Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) == OP_PARM_J);
    723723
    724724        /** @todo wasting memory as the complex search is overkill and we need only one lookup slot... */
    … …  
    791791    Log(("patmPatchGenIndirectJump\n"));
    792792    Assert(pCpu->param1.cb == 4);
    793     Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J);
     793    Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J);
    794794
    795795    /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
    … …  
    11581158    mod = 0;            //effective address (only)
    11591159    rm  = 5;            //disp32
    1160     if (pCpu->pCurInstr->param1 == OP_PARM_Dd)
     1160    if (pCpu->pCurInstr->fParam1 == OP_PARM_Dd)
    11611161    {
    11621162        Assert(0);  // You not come here. Illegal!
    … …  
    12081208    mod = 0;            //effective address (only)
    12091209    rm  = 5;            //disp32
    1210     if (pCpu->pCurInstr->param1 == OP_PARM_Cd)
     1210    if (pCpu->pCurInstr->fParam1 == OP_PARM_Cd)
    12111211    {
    12121212        Assert(0);  // You not come here. Illegal!

  • trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

    r41737 r41738  
    992992     */
    993993    if (    pVCpu->trpm.s.uActiveErrorCode == 0
    994         &&  (Cpu.pCurInstr->optype & DISOPTYPE_PORTIO))
     994        &&  (Cpu.pCurInstr->fOpType & DISOPTYPE_PORTIO))
    995995    {
    996996        VBOXSTRICTRC rcStrict = IOMRCIOPortHandler(pVM, pRegFrame, &Cpu);
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