Changeset 41738 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Jun 15, 2012 1:25:47 AM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 78546
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CSAM.cpp
r41737 r41738 881 881 882 882 case OP_PUSH: 883 if (pCpu->pCurInstr-> param1 != OP_PARM_REG_CS)883 if (pCpu->pCurInstr->fParam1 != OP_PARM_REG_CS) 884 884 break; 885 885 … … 956 956 { 957 957 // return or jump/call through a jump table 958 if (OP_PARM_VTYPE(pCpu->pCurInstr-> param1) != OP_PARM_J)958 if (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J) 959 959 { 960 960 #ifdef DEBUG … … 1304 1304 * If it's harmless, then don't bother checking it (the disasm tables had better be accurate!) 1305 1305 */ 1306 if ((cpu.pCurInstr-> optype & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS)1306 if ((cpu.pCurInstr->fOpType & ~DISOPTYPE_RRM_MASK) == DISOPTYPE_HARMLESS) 1307 1307 { 1308 1308 AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n")); … … 1327 1327 1328 1328 // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction) 1329 if ( ((cpu.pCurInstr-> optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))1329 if ( ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J)) 1330 1330 || (cpu.pCurInstr->uOpcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */ 1331 1331 { … … 1395 1395 1396 1396 rc = VWRN_CONTINUE_ANALYSIS; 1397 } //if ((cpu.pCurInstr-> optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))1397 } //if ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J)) 1398 1398 #ifdef CSAM_SCAN_JUMP_TABLE 1399 1399 else … … 2567 2567 if ( rc == VINF_SUCCESS 2568 2568 && cpu.pCurInstr->uOpcode == OP_PUSH 2569 && cpu.pCurInstr-> param1 == OP_PARM_REG_CS)2569 && cpu.pCurInstr->fParam1 == OP_PARM_REG_CS) 2570 2570 { 2571 2571 rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 | PATMFL_GUEST_SPECIFIC); -
trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
r41737 r41738 622 622 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &cpu, "Guest Trap: "); 623 623 if ( RT_SUCCESS(rc) 624 && (cpu.pCurInstr-> optype & DISOPTYPE_PORTIO))624 && (cpu.pCurInstr->fOpType & DISOPTYPE_PORTIO)) 625 625 { 626 626 /* -
trunk/src/VBox/VMM/VMMR3/PATM.cpp
r41737 r41738 1395 1395 { 1396 1396 /* No unconditional jumps or calls without fixed displacements. */ 1397 if ( (pCpu->pCurInstr-> optype & DISOPTYPE_CONTROLFLOW)1397 if ( (pCpu->pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) 1398 1398 && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL) 1399 1399 ) … … 1402 1402 if ( pCpu->param1.cb == 6 /* far call/jmp */ 1403 1403 || (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS)) 1404 || (OP_PARM_VTYPE(pCpu->pCurInstr-> param1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))1404 || (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS)) 1405 1405 ) 1406 1406 { … … 1502 1502 1503 1503 default: 1504 if (pCpu->pCurInstr-> optype & (DISOPTYPE_PRIVILEGED_NOTRAP))1504 if (pCpu->pCurInstr->fOpType & (DISOPTYPE_PRIVILEGED_NOTRAP)) 1505 1505 { 1506 1506 patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC); … … 1511 1511 1512 1512 /* If single instruction patch, we've copied enough instructions *and* the current instruction is not a relative jump. */ 1513 if ((pPatch->flags & PATMFL_CHECK_SIZE) && pPatch->cbPatchBlockSize > SIZEOF_NEARJUMP32 && !(pCpu->pCurInstr-> optype & DISOPTYPE_RELATIVE_CONTROLFLOW))1513 if ((pPatch->flags & PATMFL_CHECK_SIZE) && pPatch->cbPatchBlockSize > SIZEOF_NEARJUMP32 && !(pCpu->pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW)) 1514 1514 { 1515 1515 /* The end marker for this kind of patch is any instruction at a location outside our patch jump. */ … … 1554 1554 { 1555 1555 // no unconditional jumps or calls without fixed displacements 1556 if ( (pCpu->pCurInstr-> optype & DISOPTYPE_CONTROLFLOW)1556 if ( (pCpu->pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) 1557 1557 && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL) 1558 1558 ) … … 1561 1561 if ( pCpu->param1.cb == 6 /* far call/jmp */ 1562 1562 || (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS)) 1563 || (OP_PARM_VTYPE(pCpu->pCurInstr-> param1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))1563 || (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS)) 1564 1564 ) 1565 1565 { … … 1583 1583 #if 0 1584 1584 ///@todo we can handle certain in/out and privileged instructions in the guest context 1585 if (pCpu->pCurInstr-> optype & DISOPTYPE_PRIVILEGED && pCpu->pCurInstr->uOpcode != OP_STI)1585 if (pCpu->pCurInstr->fOpType & DISOPTYPE_PRIVILEGED && pCpu->pCurInstr->uOpcode != OP_STI) 1586 1586 { 1587 1587 Log(("Illegal instructions for function patch!!\n")); … … 1616 1616 return VWRN_CONTINUE_ANALYSIS; 1617 1617 default: 1618 if (pCpu->pCurInstr-> optype & (DISOPTYPE_PRIVILEGED_NOTRAP))1618 if (pCpu->pCurInstr->fOpType & (DISOPTYPE_PRIVILEGED_NOTRAP)) 1619 1619 { 1620 1620 patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC); … … 1694 1694 * Indirect calls are handled below. 1695 1695 */ 1696 if ( (pCpu->pCurInstr-> optype & DISOPTYPE_CONTROLFLOW)1696 if ( (pCpu->pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) 1697 1697 && (pCpu->pCurInstr->uOpcode != OP_CALL || (pPatch->flags & PATMFL_SUPPORT_CALLS)) 1698 && (OP_PARM_VTYPE(pCpu->pCurInstr-> param1) == OP_PARM_J))1698 && (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) == OP_PARM_J)) 1699 1699 { 1700 1700 RCPTRTYPE(uint8_t *) pTargetGC = PATMResolveBranch(pCpu, pCurInstrGC); … … 1745 1745 1746 1746 case OP_MOV: 1747 if (pCpu->pCurInstr-> optype & DISOPTYPE_POTENTIALLY_DANGEROUS)1747 if (pCpu->pCurInstr->fOpType & DISOPTYPE_POTENTIALLY_DANGEROUS) 1748 1748 { 1749 1749 /* mov ss, src? */ … … 1772 1772 1773 1773 case OP_POP: 1774 if (pCpu->pCurInstr-> param1 == OP_PARM_REG_SS)1775 { 1776 Assert(pCpu->pCurInstr-> optype & DISOPTYPE_INHIBIT_IRQS);1774 if (pCpu->pCurInstr->fParam1 == OP_PARM_REG_SS) 1775 { 1776 Assert(pCpu->pCurInstr->fOpType & DISOPTYPE_INHIBIT_IRQS); 1777 1777 1778 1778 Log(("Force recompilation of next instruction for OP_MOV at %RRv\n", pCurInstrGC)); … … 1879 1879 1880 1880 case OP_PUSH: 1881 if (pCpu->pCurInstr-> param1 == OP_PARM_REG_CS)1881 if (pCpu->pCurInstr->fParam1 == OP_PARM_REG_CS) 1882 1882 { 1883 1883 rc = patmPatchGenPushCS(pVM, pPatch); … … 1979 1979 case OP_MOV_DR: 1980 1980 /* Note: currently we let DRx writes cause a trap d; our trap handler will decide to interpret it or not. */ 1981 if (pCpu->pCurInstr-> param2 == OP_PARM_Dd)1981 if (pCpu->pCurInstr->fParam2 == OP_PARM_Dd) 1982 1982 { 1983 1983 rc = patmPatchGenMovDebug(pVM, pPatch, pCpu); … … 1990 1990 case OP_MOV_CR: 1991 1991 /* Note: currently we let CRx writes cause a trap d; our trap handler will decide to interpret it or not. */ 1992 if (pCpu->pCurInstr-> param2 == OP_PARM_Cd)1992 if (pCpu->pCurInstr->fParam2 == OP_PARM_Cd) 1993 1993 { 1994 1994 rc = patmPatchGenMovControl(pVM, pPatch, pCpu); … … 2000 2000 2001 2001 default: 2002 if (pCpu->pCurInstr-> optype & (DISOPTYPE_CONTROLFLOW | DISOPTYPE_PRIVILEGED_NOTRAP))2002 if (pCpu->pCurInstr->fOpType & (DISOPTYPE_CONTROLFLOW | DISOPTYPE_PRIVILEGED_NOTRAP)) 2003 2003 { 2004 2004 gen_illegal_instr: … … 2049 2049 if ( (pPatch->flags & PATMFL_CHECK_SIZE) 2050 2050 && pCurInstrGC + pCpu->cbInstr - pInstrGC >= SIZEOF_NEARJUMP32 2051 && !(pCpu->pCurInstr-> optype & DISOPTYPE_RELATIVE_CONTROLFLOW)2051 && !(pCpu->pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW) 2052 2052 && !(pPatch->flags & PATMFL_RECOMPILE_NEXT) /* do not do this when the next instruction *must* be executed! */ 2053 2053 ) … … 2232 2232 2233 2233 /* For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction) */ 2234 if ( (cpu.pCurInstr-> optype & DISOPTYPE_CONTROLFLOW)2235 && (OP_PARM_VTYPE(cpu.pCurInstr-> param1) == OP_PARM_J)2234 if ( (cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) 2235 && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J) 2236 2236 && cpu.pCurInstr->uOpcode != OP_CALL /* complete functions are replaced; don't bother here. */ 2237 2237 ) … … 2419 2419 2420 2420 default: 2421 if (cpunext.pCurInstr-> optype & DISOPTYPE_CONTROLFLOW)2421 if (cpunext.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) 2422 2422 { 2423 2423 Log(("Unexpected control flow instruction after inhibit irq instruction\n")); … … 2453 2453 2454 2454 /* For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction). */ 2455 if ( (cpu.pCurInstr-> optype & DISOPTYPE_CONTROLFLOW)2456 && (OP_PARM_VTYPE(cpu.pCurInstr-> param1) == OP_PARM_J)2455 if ( (cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) 2456 && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J) 2457 2457 && cpu.pCurInstr->uOpcode != OP_CALL /* complete functions are replaced; don't bother here. */ 2458 2458 ) … … 2469 2469 2470 2470 /* We don't check if the branch target lies in a valid page as we've already done that in the analysis phase. */ 2471 if (!(cpu.pCurInstr-> optype & DISOPTYPE_UNCOND_CONTROLFLOW))2471 if (!(cpu.pCurInstr->fOpType & DISOPTYPE_UNCOND_CONTROLFLOW)) 2472 2472 { 2473 2473 Log(("patmRecompileCodeStream continue passed conditional jump\n")); … … 2517 2517 } 2518 2518 else 2519 if (cpu.pCurInstr-> optype & DISOPTYPE_UNCOND_CONTROLFLOW)2519 if (cpu.pCurInstr->fOpType & DISOPTYPE_UNCOND_CONTROLFLOW) 2520 2520 { 2521 2521 rc = VINF_SUCCESS; … … 5198 5198 if ( disret == true 5199 5199 && (pConflictPatch->flags & PATMFL_CODE32) 5200 && (cpu.pCurInstr->uOpcode == OP_JMP || (cpu.pCurInstr-> optype & DISOPTYPE_COND_CONTROLFLOW))5200 && (cpu.pCurInstr->uOpcode == OP_JMP || (cpu.pCurInstr->fOpType & DISOPTYPE_COND_CONTROLFLOW)) 5201 5201 && (cpu.param1.fUse & DISUSE_IMMEDIATE32_REL)) 5202 5202 { … … 6014 6014 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCurPatchInstrGC, &CpuOld, 0); 6015 6015 if ( RT_FAILURE(rc) 6016 || !(CpuOld.pCurInstr-> optype & DISOPTYPE_HARMLESS))6016 || !(CpuOld.pCurInstr->fOpType & DISOPTYPE_HARMLESS)) 6017 6017 { 6018 6018 if (RT_SUCCESS(rc)) … … 6050 6050 6051 6051 if ( RT_SUCCESS(rc) 6052 && (CpuOld.pCurInstr-> optype & DISOPTYPE_HARMLESS)6052 && (CpuOld.pCurInstr->fOpType & DISOPTYPE_HARMLESS) 6053 6053 ) 6054 6054 { … … 6065 6065 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCurInstrGC, &CpuNew, 0); 6066 6066 6067 fValidInstr = !!(CpuNew.pCurInstr-> optype & DISOPTYPE_HARMLESS);6067 fValidInstr = !!(CpuNew.pCurInstr->fOpType & DISOPTYPE_HARMLESS); 6068 6068 if ( !fValidInstr 6069 && (CpuNew.pCurInstr-> optype & DISOPTYPE_RELATIVE_CONTROLFLOW)6069 && (CpuNew.pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW) 6070 6070 ) 6071 6071 { -
trunk/src/VBox/VMM/VMMR3/PATMGuest.cpp
r41737 r41738 235 235 * cli 236 236 */ 237 if (pCpu->pCurInstr-> param1 == OP_PARM_REG_CS)237 if (pCpu->pCurInstr->fParam1 == OP_PARM_REG_CS) 238 238 return PATMPatchOpenBSDHandlerPrefix(pVM, pCpu, pInstrGC, pInstrHC, pPatchRec); 239 239 -
trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
r41737 r41738 695 695 Log(("patmPatchGenIndirectCall\n")); 696 696 Assert(pCpu->param1.cb == 4); 697 Assert(OP_PARM_VTYPE(pCpu->pCurInstr-> param1) != OP_PARM_J);697 Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J); 698 698 699 699 /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause … … 720 720 AssertMsg(PATMIsPatchGCAddr(pVM, pTargetGC) == false, ("Target is already a patch address (%RRv)?!?\n", pTargetGC)); 721 721 Assert(pTargetGC); 722 Assert(OP_PARM_VTYPE(pCpu->pCurInstr-> param1) == OP_PARM_J);722 Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) == OP_PARM_J); 723 723 724 724 /** @todo wasting memory as the complex search is overkill and we need only one lookup slot... */ … … 791 791 Log(("patmPatchGenIndirectJump\n")); 792 792 Assert(pCpu->param1.cb == 4); 793 Assert(OP_PARM_VTYPE(pCpu->pCurInstr-> param1) != OP_PARM_J);793 Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J); 794 794 795 795 /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause … … 1158 1158 mod = 0; //effective address (only) 1159 1159 rm = 5; //disp32 1160 if (pCpu->pCurInstr-> param1 == OP_PARM_Dd)1160 if (pCpu->pCurInstr->fParam1 == OP_PARM_Dd) 1161 1161 { 1162 1162 Assert(0); // You not come here. Illegal! … … 1208 1208 mod = 0; //effective address (only) 1209 1209 rm = 5; //disp32 1210 if (pCpu->pCurInstr-> param1 == OP_PARM_Cd)1210 if (pCpu->pCurInstr->fParam1 == OP_PARM_Cd) 1211 1211 { 1212 1212 Assert(0); // You not come here. Illegal!
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