Changeset 55106 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Apr 6, 2015 7:58:37 PM (10 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/CPUMR0A.asm
r55059 r55106 41 41 %define DS_OFF_IN_X86FXSTATE 14h 42 42 43 ;; For numeric expressions 44 %ifdef RT_ARCH_AMD64 45 %define CPUMR0_IS_AMD64 1 46 %else 47 %define CPUMR0_IS_AMD64 0 48 %endif 49 43 50 44 51 ;******************************************************************************* … … 105 112 %endmacro 106 113 %endif ; Unused. 107 108 109 ;; Macro for FXSAVE for the guest FPU but tries to figure out whether to110 ; save the 32-bit FPU state or 64-bit FPU state.111 ;112 ; @param %1 Pointer to CPUMCPU.113 ; @param %2 Pointer to XState.114 ; @uses xAX, xDX, EFLAGS, 20h of stack.115 ;116 %macro SAVE_32_OR_64_FPU 2117 o64 fxsave [%2]118 119 xor edx, edx120 cmp dword [%2 + CS_OFF_IN_X86FXSTATE], 0121 jne short %%save_done122 123 sub rsp, 20h ; Only need 1ch bytes but keep stack aligned otherwise we #GP(0).124 fnstenv [rsp]125 movzx eax, word [rsp + 10h]126 mov [%2 + CS_OFF_IN_X86FXSTATE], eax127 movzx eax, word [rsp + 18h]128 add rsp, 20h129 mov [%2 + DS_OFF_IN_X86FXSTATE], eax130 mov edx, X86_FXSTATE_RSVD_32BIT_MAGIC131 132 %%save_done:133 mov dword [%2 + X86_OFF_FXSTATE_RSVD], edx134 %endmacro135 136 ;;137 ; Wrapper for selecting 32-bit or 64-bit FXRSTOR according to what SAVE_32_OR_64_FPU did.138 ;139 ; @param %1 Pointer to CPUMCPU.140 ; @param %2 Pointer to XState.141 ; @uses xAX, xDX, EFLAGS142 ;143 %macro RESTORE_32_OR_64_FPU 2144 cmp dword [%2 + X86_OFF_FXSTATE_RSVD], X86_FXSTATE_RSVD_32BIT_MAGIC145 jne short %%restore_64bit_fpu146 fxrstor [%2]147 jmp short %%restore_fpu_done148 %%restore_64bit_fpu:149 o64 fxrstor [%2]150 %%restore_fpu_done:151 %endmacro152 114 153 115 … … 186 148 187 149 ;; 150 ; Saves the host state. 151 ; 152 ; @uses rax, rdx 153 ; @param pCpumCpu Define for the register containing the CPUMCPU pointer. 154 ; @param pXState Define for the regsiter containing the extended state pointer. 155 ; 156 %macro CPUMR0_SAVE_HOST 0 157 ; 158 ; Load a couple of registers we'll use later in all branches. 159 ; 160 mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0] 161 mov eax, [pCpumCpu + CPUMCPU.Host.fXStateMask] 162 163 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 164 ; The joy of 32-bit darwin kernels that runs the CPU in 64-bit mode. 165 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 166 jz %%host_legacy_mode 167 db 0xea ; jmp far .sixtyfourbit_mode 168 dd %%host_sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 169 BITS 64 170 %%host_sixtyfourbit_mode: 171 or eax, eax 172 jz %%host_sixtyfourbit_fxsave 173 174 ; XSAVE 175 mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4] 176 o64 xsave [pXState] 177 jmp %%host_sixtyfourbit_done 178 179 ; FXSAVE 180 %%host_sixtyfourbit_fxsave: 181 o64 fxsave [pXState] 182 183 %%host_sixtyfourbit_done: 184 jmp far [%%host_fpret wrt rip] 185 %%host_fpret: ; 16:32 Pointer to %%host_done. 186 dd %%host_done, NAME(SUPR0AbsKernelCS) 187 BITS 32 188 189 %%host_legacy_mode: 190 %endif 191 192 ; 193 ; XSAVE or FXSAVE? 194 ; 195 or eax, eax 196 jz %%host_fxsave 197 198 ; XSAVE 199 mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4] 200 %ifdef RT_ARCH_AMD64 201 o64 xsave [pXState] 202 %else 203 xsave [pXState] 204 %endif 205 jmp %%host_done 206 207 ; FXSAVE 208 %%host_fxsave: 209 %ifdef RT_ARCH_AMD64 210 o64 fxsave [pXState] ; Use explicit REX prefix. See @bugref{6398}. 211 %else 212 fxsave [pXState] 213 %endif 214 215 %%host_done: 216 %endmacro ; CPUMR0_SAVE_HOST 217 218 219 ;; 220 ; Loads the host state. 221 ; 222 ; @uses rax, rdx 223 ; @param pCpumCpu Define for the register containing the CPUMCPU pointer. 224 ; @param pXState Define for the regsiter containing the extended state pointer. 225 ; 226 %macro CPUMR0_LOAD_HOST 0 227 ; 228 ; Load a couple of registers we'll use later in all branches. 229 ; 230 mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0] 231 mov eax, [pCpumCpu + CPUMCPU.Host.fXStateMask] 232 233 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 234 ; The joy of 32-bit darwin kernels that runs the CPU in 64-bit mode. 235 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 236 jz %%host_legacy_mode 237 db 0xea ; jmp far .sixtyfourbit_mode 238 dd %%host_sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 239 BITS 64 240 %%host_sixtyfourbit_mode: 241 or eax, eax 242 jz %%host_sixtyfourbit_fxrstor 243 244 ; XRSTOR 245 mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4] 246 o64 xrstor [pXState] 247 jmp %%host_sixtyfourbit_done 248 249 ; FXRSTOR 250 %%host_sixtyfourbit_fxrstor: 251 o64 fxrstor [pXState] 252 253 %%host_sixtyfourbit_done: 254 jmp far [%%host_fpret wrt rip] 255 %%host_fpret: ; 16:32 Pointer to %%host_done. 256 dd %%host_done, NAME(SUPR0AbsKernelCS) 257 BITS 32 258 259 %%host_legacy_mode: 260 %endif 261 262 ; 263 ; XRSTOR or FXRSTOR? 264 ; 265 or eax, eax 266 jz %%host_fxrstor 267 268 ; XRSTOR 269 mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4] 270 %ifdef RT_ARCH_AMD64 271 o64 xrstor [pXState] 272 %else 273 xrstor [pXState] 274 %endif 275 jmp %%host_done 276 277 ; FXRSTOR 278 %%host_fxrstor: 279 %ifdef RT_ARCH_AMD64 280 o64 fxrstor [pXState] ; Use explicit REX prefix. See @bugref{6398}. 281 %else 282 fxrstor [pXState] 283 %endif 284 285 %%host_done: 286 %endmacro ; CPUMR0_LOAD_HOST 287 288 289 290 ;; Macro for FXSAVE for the guest FPU but tries to figure out whether to 291 ; save the 32-bit FPU state or 64-bit FPU state. 292 ; 293 ; @param %1 Pointer to CPUMCPU. 294 ; @param %2 Pointer to XState. 295 ; @param %3 Force AMD64 296 ; @uses xAX, xDX, EFLAGS, 20h of stack. 297 ; 298 %macro SAVE_32_OR_64_FPU 3 299 %if CPUMR0_IS_AMD64 || %3 300 ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}. 301 test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE 302 jnz short %%save_long_mode_guest 303 %endif 304 fxsave [pXState] 305 %if CPUMR0_IS_AMD64 || %3 306 jmp %%save_done_32bit_cs_ds 307 308 %%save_long_mode_guest: 309 o64 fxsave [pXState] 310 311 xor edx, edx 312 cmp dword [pXState + CS_OFF_IN_X86FXSTATE], 0 313 jne short %%save_done 314 315 sub rsp, 20h ; Only need 1ch bytes but keep stack aligned otherwise we #GP(0). 316 fnstenv [rsp] 317 movzx eax, word [rsp + 10h] 318 mov [pXState + CS_OFF_IN_X86FXSTATE], eax 319 movzx eax, word [rsp + 18h] 320 add rsp, 20h 321 mov [pXState + DS_OFF_IN_X86FXSTATE], eax 322 %endif 323 %%save_done_32bit_cs_ds: 324 mov edx, X86_FXSTATE_RSVD_32BIT_MAGIC 325 %%save_done: 326 mov dword [pXState + X86_OFF_FXSTATE_RSVD], edx 327 %endmacro ; SAVE_32_OR_64_FPU 328 329 330 ;; 331 ; Save the guest state. 332 ; 333 ; @uses rax, rdx 334 ; @param pCpumCpu Define for the register containing the CPUMCPU pointer. 335 ; @param pXState Define for the regsiter containing the extended state pointer. 336 ; 337 %macro CPUMR0_SAVE_GUEST 0 338 ; 339 ; Load a couple of registers we'll use later in all branches. 340 ; 341 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 342 mov eax, [pCpumCpu + CPUMCPU.Guest.fXStateMask] 343 344 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 345 ; The joy of 32-bit darwin kernels that runs the CPU in 64-bit mode. 346 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 347 jz %%guest_legacy_mode 348 db 0xea ; jmp far .sixtyfourbit_mode 349 dd %%guest_sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 350 BITS 64 351 %%guest_sixtyfourbit_mode: 352 or eax, eax 353 jz %%guest_sixtyfourbit_fxsave 354 355 ; XSAVE 356 mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4] 357 o64 xsave [pXState] 358 jmp %%guest_sixtyfourbit_done 359 360 ; FXSAVE 361 %%guest_sixtyfourbit_fxsave: 362 SAVE_32_OR_64_FPU pCpumCpu, pXState, 1 363 364 %%guest_sixtyfourbit_done: 365 jmp far [%%guest_fpret wrt rip] 366 %%guest_fpret: ; 16:32 Pointer to %%guest_done. 367 dd %%guest_done, NAME(SUPR0AbsKernelCS) 368 BITS 32 369 370 %%guest_legacy_mode: 371 %endif 372 373 ; 374 ; XSAVE or FXSAVE? 375 ; 376 or eax, eax 377 jz %%guest_fxsave 378 379 ; XSAVE 380 mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4] 381 %ifdef RT_ARCH_AMD64 382 o64 xsave [pXState] 383 %else 384 xsave [pXState] 385 %endif 386 jmp %%guest_done 387 388 ; FXSAVE 389 %%guest_fxsave: 390 SAVE_32_OR_64_FPU pCpumCpu, pXState, 0 391 392 %%guest_done: 393 %endmacro ; CPUMR0_SAVE_GUEST 394 395 396 ;; 397 ; Wrapper for selecting 32-bit or 64-bit FXRSTOR according to what SAVE_32_OR_64_FPU did. 398 ; 399 ; @param %1 Pointer to CPUMCPU. 400 ; @param %2 Pointer to XState. 401 ; @param %3 Force AMD64. 402 ; @uses xAX, xDX, EFLAGS 403 ; 404 %macro RESTORE_32_OR_64_FPU 3 405 %if CPUMR0_IS_AMD64 || %3 406 ; Restore the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}. 407 test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE 408 jz %%restore_32bit_fpu 409 cmp dword [pXState + X86_OFF_FXSTATE_RSVD], X86_FXSTATE_RSVD_32BIT_MAGIC 410 jne short %%restore_64bit_fpu 411 %%restore_32bit_fpu: 412 %endif 413 fxrstor [pXState] 414 %if CPUMR0_IS_AMD64 || %3 415 ; TODO: Restore XMM8-XMM15! 416 jmp short %%restore_fpu_done 417 %%restore_64bit_fpu: 418 o64 fxrstor [pXState] 419 %%restore_fpu_done: 420 %endif 421 %endmacro ; RESTORE_32_OR_64_FPU 422 423 424 ;; 425 ; Loads the guest state. 426 ; 427 ; @uses rax, rdx 428 ; @param pCpumCpu Define for the register containing the CPUMCPU pointer. 429 ; @param pXState Define for the regsiter containing the extended state pointer. 430 ; 431 %macro CPUMR0_LOAD_GUEST 0 432 ; 433 ; Load a couple of registers we'll use later in all branches. 434 ; 435 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 436 mov eax, [pCpumCpu + CPUMCPU.Guest.fXStateMask] 437 438 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 439 ; The joy of 32-bit darwin kernels that runs the CPU in 64-bit mode. 440 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 441 jz %%guest_legacy_mode 442 db 0xea ; jmp far .sixtyfourbit_mode 443 dd %%guest_sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 444 BITS 64 445 %%guest_sixtyfourbit_mode: 446 or eax, eax 447 jz %%guest_sixtyfourbit_fxrstor 448 449 ; XRSTOR 450 mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4] 451 o64 xrstor [pXState] 452 jmp %%guest_sixtyfourbit_done 453 454 ; FXRSTOR 455 %%guest_sixtyfourbit_fxrstor: 456 RESTORE_32_OR_64_FPU pCpumCpu, pXState, 1 457 458 %%guest_sixtyfourbit_done: 459 jmp far [%%guest_fpret wrt rip] 460 %%guest_fpret: ; 16:32 Pointer to %%guest_done. 461 dd %%guest_done, NAME(SUPR0AbsKernelCS) 462 BITS 32 463 464 %%guest_legacy_mode: 465 %endif 466 467 ; 468 ; XRSTOR or FXRSTOR? 469 ; 470 or eax, eax 471 jz %%guest_fxrstor 472 473 ; XRSTOR 474 mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4] 475 %ifdef RT_ARCH_AMD64 476 o64 xrstor [pXState] 477 %else 478 xrstor [pXState] 479 %endif 480 jmp %%guest_done 481 482 ; FXRSTOR 483 %%guest_fxrstor: 484 RESTORE_32_OR_64_FPU pCpumCpu, pXState, 0 485 486 %%guest_done: 487 %endmacro ; CPUMR0_LOAD_GUEST 488 489 490 ;; 188 491 ; Saves the host FPU/SSE/AVX state and restores the guest FPU/SSE/AVX state. 189 492 ; … … 219 522 SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use! 220 523 221 ; 222 ; Switch state. 223 ; 224 mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0] 225 226 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 227 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 228 jz .legacy_mode 229 db 0xea ; jmp far .sixtyfourbit_mode 230 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 231 .legacy_mode: 232 %endif 233 234 %ifdef RT_ARCH_AMD64 235 o64 fxsave [pXState] ; Use explicit REX prefix. See @bugref{6398}. 236 237 ; Restore the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}. 238 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 239 test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE 240 jnz short .fpu_load_32_or_64 241 fxrstor [pXState] 242 jmp short .fpu_load_done 243 .fpu_load_32_or_64: 244 RESTORE_32_OR_64_FPU pCpumCpu, pXState 245 .fpu_load_done: 246 %else 247 fxsave [pXState] 248 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 249 fxrstor [pXState] 250 %endif 524 CPUMR0_SAVE_HOST 525 CPUMR0_LOAD_GUEST 251 526 252 527 %ifdef VBOX_WITH_KERNEL_USING_XMM … … 265 540 %endif 266 541 267 .done:268 542 RESTORE_CR0 xCX 269 543 or dword [pCpumCpu + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM) … … 277 551 xor eax, eax 278 552 ret 279 280 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0281 ALIGNCODE(16)282 BITS 64283 .sixtyfourbit_mode:284 o64 fxsave [pXState]285 286 ; Restore the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.287 test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE288 jnz short .fpu_load_32_or_64_darwin289 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]290 fxrstor [pXState]291 jmp short .fpu_load_done_darwin292 .fpu_load_32_or_64_darwin:293 RESTORE_32_OR_64_FPU pCpumCpu, pXState294 .fpu_load_done_darwin:295 296 jmp far [.fpret wrt rip]297 .fpret: ; 16:32 Pointer to .the_end.298 dd .done, NAME(SUPR0AbsKernelCS)299 BITS 32300 %endif301 553 ENDPROC cpumR0SaveHostRestoreGuestFPUState 302 554 … … 338 590 SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use! 339 591 340 ; 341 ; Save the host state. 342 ; 343 mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0] 344 345 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 346 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 347 jz .legacy_mode 348 db 0xea ; jmp far .sixtyfourbit_mode 349 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 350 .legacy_mode: 351 %endif 352 353 %ifdef RT_ARCH_AMD64 354 o64 fxsave [pXstate] 355 %else 356 fxsave [pXState] 357 %endif 358 359 .done: 592 CPUMR0_SAVE_HOST 593 360 594 RESTORE_CR0 xCX 361 595 or dword [pCpumCpu + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM) … … 428 662 SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use! 429 663 430 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 431 432 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 433 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 434 jz .legacy_mode 435 db 0xea ; jmp far .sixtyfourbit_mode 436 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 437 .legacy_mode: 438 %endif 439 440 %ifdef RT_ARCH_AMD64 441 ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}. 442 test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE 443 jnz short .fpu_save_32_or_64 444 fxsave [pXState] 445 jmp short .fpu_save_done 446 .fpu_save_32_or_64: 447 SAVE_32_OR_64_FPU pCpumCpu, pXState 448 .fpu_save_done: 449 450 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 451 o64 fxrstor [pXState] ; Use explicit REX prefix. See @bugref{6398}. 452 %else 453 fxsave [pXState] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption) 454 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0] 455 fxrstor [pXState] 456 %endif 457 458 .done: 664 CPUMR0_SAVE_GUEST 665 CPUMR0_LOAD_HOST 666 459 667 RESTORE_CR0 xCX 460 668 and dword [pCpumCpu + CPUMCPU.fUseFlags], ~CPUM_USED_FPU … … 469 677 xor eax, eax 470 678 ret 471 472 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0473 ALIGNCODE(16)474 BITS 64475 .sixtyfourbit_mode:476 ; Save the guest FPU (32-bit or 64-bit), preserves existing broken state. See @bugref{7138}.477 test dword [pCpumCpu + CPUMCPU.fUseFlags], CPUM_USE_SUPPORTS_LONGMODE478 jnz short .fpu_save_32_or_64_darwin479 fxsave [pXState]480 jmp short .fpu_save_done_darwin481 .fpu_save_32_or_64_darwin:482 SAVE_32_OR_64_FPU pCpumCpu, pXState483 .fpu_save_done_darwin:484 485 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateR0]486 o64 fxrstor [pXstate]487 jmp far [.fpret wrt rip]488 .fpret: ; 16:32 Pointer to .the_end.489 dd .done, NAME(SUPR0AbsKernelCS)490 BITS 32491 %endif492 679 %undef pCpumCpu 493 680 %undef pXState … … 534 721 SAVE_CR0_CLEAR_FPU_TRAPS xCX, xAX ; xCX is now old CR0 value, don't use! 535 722 536 mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateR0] 537 538 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 539 cmp byte [NAME(g_fCPUMIs64bitHost)], 0 540 jz .legacy_mode 541 db 0xea ; jmp far .sixtyfourbit_mode 542 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS) 543 .legacy_mode: 544 %endif 545 546 %ifdef RT_ARCH_AMD64 547 o64 fxrstor [pXState] 548 %else 549 fxrstor [pXState] 550 %endif 551 552 .done: 723 CPUMR0_LOAD_HOST 724 553 725 RESTORE_CR0 xCX 554 726 and dword [pCpumCpu + CPUMCPU.fUseFlags], ~CPUM_USED_FPU … … 563 735 xor eax, eax 564 736 ret 565 566 %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0567 ALIGNCODE(16)568 BITS 64569 .sixtyfourbit_mode:570 o64 fxrstor [pXState]571 jmp far [.fpret wrt rip]572 .fpret: ; 16:32 Pointer to .the_end.573 dd .done, NAME(SUPR0AbsKernelCS)574 BITS 32575 %endif576 737 %undef pCpumCPu 577 738 %undef pXState -
trunk/src/VBox/VMM/VMMRC/CPUMRCA.asm
r55061 r55106 145 145 mov cr0, edx ; Clear flags so we don't trap here. 146 146 147 mov eax, [pCpumCpu + CPUMCPU.Host.fXStateMask] 147 148 mov pXState, [pCpumCpu + CPUMCPU.Host.pXStateRC] 149 or eax, eax 150 jz hlfpua_host_fxsave 151 mov edx, [pCpumCpu + CPUMCPU.Host.fXStateMask + 4] 152 xsave [pXState] 153 jmp hlfpua_host_done 154 hlfpua_host_fxsave: 148 155 fxsave [pXState] 156 hlfpua_host_done: 157 158 mov eax, [pCpumCpu + CPUMCPU.Guest.fXStateMask] 149 159 mov pXState, [pCpumCpu + CPUMCPU.Guest.pXStateRC] 160 or eax, eax 161 jz hlfpua_guest_fxrstor 162 mov edx, [pCpumCpu + CPUMCPU.Guest.fXStateMask + 4] 163 xrstor [pXState] 164 jmp hlfpua_guest_done 165 hlfpua_guest_fxrstor: 150 166 fxrstor [pXState] 167 hlfpua_guest_done: 151 168 152 169 hlfpua_finished_switch: -
trunk/src/VBox/VMM/VMMSwitcher/AMD64andLegacy.mac
r55054 r55106 1139 1139 mov esi, [rdx + r8 + CPUMCPU.fUseFlags] ; esi == use flags. 1140 1140 test esi, CPUM_USED_FPU 1141 jz shortgth_fpu_no1141 jz gth_fpu_no 1142 1142 mov rcx, cr0 1143 1143 and rcx, ~(X86_CR0_TS | X86_CR0_EM) 1144 1144 mov cr0, rcx 1145 1145 1146 mov rax, [rdx + r8 + CPUMCPU.Guest.pXStateR0] 1147 fxsave [rax] 1148 mov rax, [rdx + r8 + CPUMCPU.Host.pXStateR0] 1149 fxrstor [rax] ; We saved 32-bit state, so only restore 32-bit. 1150 jmp short gth_fpu_no 1146 mov r10, rdx ; Save rdx. 1147 1148 mov eax, [r10 + r8 + CPUMCPU.Guest.fXStateMask] 1149 mov r9, [r10 + r8 + CPUMCPU.Guest.pXStateR0] 1150 or eax, eax 1151 jz gth_fpu_guest_fxsave 1152 mov edx, [r10 + r8 + CPUMCPU.Guest.fXStateMask + 4] 1153 xsave [r9] 1154 jmp gth_fpu_host 1155 gth_fpu_guest_fxsave: 1156 fxsave [r9] 1157 1158 gth_fpu_host: 1159 mov eax, [r10 + r8 + CPUMCPU.Host.fXStateMask] 1160 mov r9, [r10 + r8 + CPUMCPU.Host.pXStateR0] 1161 or eax, eax 1162 jz gth_fpu_host_fxrstor 1163 mov edx, [r10 + r8 + CPUMCPU.Host.fXStateMask + 4] 1164 xrstor [r9] ; We saved 32-bit state, so only restore 32-bit. 1165 jmp gth_fpu_done 1166 gth_fpu_host_fxrstor: 1167 fxrstor [r9] ; We saved 32-bit state, so only restore 32-bit. 1168 1169 gth_fpu_done: 1170 mov rdx, r10 ; Restore rdx. 1171 jmp gth_fpu_no 1151 1172 1152 1173 ALIGNCODE(16) -
trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac
r55048 r55106 664 664 and rax, ~(X86_CR0_TS | X86_CR0_EM) 665 665 mov cr0, rax 666 mov eax, [rdx + CPUMCPU.Guest.pXStateRC] 667 o64 fxrstor [rax] ; (use explicit REX prefix, see @bugref{6398}) 666 667 mov eax, [rdx + CPUMCPU.Guest.fXStateMask] 668 mov ebx, [rdx + CPUMCPU.Guest.pXStateRC] 669 or eax, eax 670 jz htg_fpu_fxrstor 671 mov r9, rdx 672 mov edx, [rdx + CPUMCPU.Guest.fXStateMask + 4] 673 o64 xsave [rbx] 674 mov rdx, r9 675 jmp htg_fpu_done 676 htg_fpu_fxrstor: 677 o64 fxrstor [rbx] ; (use explicit REX prefix, see @bugref{6398}) 678 htg_fpu_done: 668 679 mov cr0, rcx ; and restore old CR0 again 669 680 … … 1258 1269 mov cr0, rax 1259 1270 1260 mov eax, [rsi + CPUMCTX.pXStateRC] 1261 o64 fxsave [rax] ; (use explicit REX prefix, see @bugref{6398}) 1262 1271 mov eax, [rsi + CPUMCTX.fXStateMask] 1272 mov ecx, [rsi + CPUMCTX.pXStateRC] 1273 test eax, eax 1274 jz .use_fxsave 1275 mov edx, [rsi + CPUMCTX.fXStateMask + 4] 1276 o64 xsave [rcx] 1277 jmp .done 1278 1279 .use_fxsave: 1280 o64 fxsave [rcx] ; (use explicit REX prefix, see @bugref{6398}) 1281 1282 .done: 1263 1283 mov cr0, rcx ; and restore old CR0 again 1264 1284 -
trunk/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac
r55055 r55106 990 990 mov cr0, ecx 991 991 992 mov eax, [edx + CPUMCPU.Guest.pXStateR0] 993 mov ecx, [edx + CPUMCPU.Host.pXStateR0] 994 fxsave [eax] 992 mov ebx, edx ; save edx 993 994 mov eax, [ebx + CPUMCPU.Guest.fXStateMask] 995 mov ecx, [ebx + CPUMCPU.Guest.pXStateR0] 996 test eax, eax 997 jz gth_fpu_guest_fxsave 998 mov edx, [ebx + CPUMCPU.Guest.fXStateMask + 4] 999 xsave [ecx] 1000 jmp gth_fpu_host 1001 gth_fpu_guest_fxsave: 1002 fxsave [ecx] 1003 1004 gth_fpu_host: 1005 mov eax, [ebx + CPUMCPU.Host.fXStateMask] 1006 mov ecx, [ebx + CPUMCPU.Host.pXStateR0] 1007 test eax, eax 1008 jz gth_fpu_host_fxrstor 1009 mov edx, [ebx + CPUMCPU.Host.fXStateMask + 4] 1010 xrstor [ecx] 1011 jmp gth_fpu_done 1012 gth_fpu_host_fxrstor: 995 1013 fxrstor [ecx] 1014 1015 gth_fpu_done: 1016 mov edx, ebx ; restore edx 996 1017 gth_fpu_no: 997 1018 … … 1003 1024 mov ecx, [edx + CPUMCPU.Host.cr0] 1004 1025 mov cr0, ecx 1005 ;mov ecx, [edx + CPUMCPU.Host.cr2] ; assumes this is waste of time.1026 ;mov ecx, [edx + CPUMCPU.Host.cr2] ; assumes this is a waste of time. 1006 1027 ;mov cr2, ecx 1007 1028 -
trunk/src/VBox/VMM/include/CPUMInternal.h
r55062 r55106 410 410 411 411 /* padding to get 64byte aligned size */ 412 uint8_t auPadding[ 16+20];412 uint8_t auPadding[20]; 413 413 414 414 #elif HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) … … 456 456 /* padding to get 32byte aligned size */ 457 457 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 458 uint8_t auPadding[52]; 459 # else 458 460 uint8_t auPadding[4]; 459 # else460 uint8_t auPadding[8+12];461 461 # endif 462 462 … … 471 471 /** Pointer to the FPU/SSE/AVX/XXXX state ring-3 mapping. */ 472 472 R3PTRTYPE(PX86XSAVEAREA) pXStateR3; 473 /** The XCR0 register. */ 474 uint64_t xcr0; 475 /** The mask to pass to XSAVE/XRSTOR in EDX:EAX. If zero we use 476 * FXSAVE/FXRSTOR (since bit 0 will always be set, we only need to test it). */ 477 uint64_t fXStateMask; 473 478 } CPUMHOSTCTX; 474 479 AssertCompileSizeAlignment(CPUMHOSTCTX, 64); -
trunk/src/VBox/VMM/include/CPUMInternal.mac
r55062 r55106 217 217 .Guest.msrKERNELGSBASE resb 8 218 218 .Guest.msrApicBase resb 8 219 .Guest.pXStateR0 RTR0PTR_RES 1 220 .Guest.pXStateR3 RTR3PTR_RES 1 221 .Guest.pXStateRC RTRCPTR_RES 1 219 .Guest.xcr0 resq 1 220 .Guest.fXStateMask resq 1 221 .Guest.pXStateR0 RTR0PTR_RES 1 222 .Guest.pXStateR3 RTR3PTR_RES 1 223 .Guest.pXStateRC RTRCPTR_RES 1 224 .Guest.aoffXState resw 64 222 225 223 226 alignb 64 … … 324 327 .Host.SysEnter.esp resq 1 325 328 .Host.efer resq 1 326 .Host.auPadding resb ( 16+20)329 .Host.auPadding resb (20) 327 330 328 331 %else ; 64-bit … … 357 360 .Host.efer resq 1 358 361 %if fVBOX_WITH_HYBRID_32BIT_KERNEL 362 .Host.auPadding resb 54 363 %else 359 364 .Host.auPadding resb 4 360 %else361 .Host.auPadding resb (8+12)362 365 %endif 363 366 %endif ; 64-bit … … 366 369 .Host.pXStateR0 RTR0PTR_RES 1 367 370 .Host.pXStateR3 RTR3PTR_RES 1 371 alignb 8 372 .Host.xcr0 resq 1 373 .Host.fXStateMask resq 1 368 374 369 375 ; … … 470 476 .Hyper.msrKERNELGSBASE resb 8 471 477 .Hyper.msrApicBase resb 8 472 .Hyper.pXStateR0 RTR0PTR_RES 1 473 .Hyper.pXStateR3 RTR3PTR_RES 1 474 .Hyper.pXStateRC RTRCPTR_RES 1 478 .Hyper.xcr0 resq 1 479 .Hyper.fXStateMask resq 1 480 .Hyper.pXStateR0 RTR0PTR_RES 1 481 .Hyper.pXStateR3 RTR3PTR_RES 1 482 .Hyper.pXStateRC RTRCPTR_RES 1 483 .Hyper.aoffXState resw 64 475 484 alignb 64 476 485
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