Changeset 59004 in vbox for trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
- Timestamp:
- Dec 5, 2015 12:07:54 AM (9 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (17 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r59003 r59004 9145 9145 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VAPIC_WRITE, VMX_EXIT_APIC_WRITE); /* feature dependent, nothing to enable here */ 9146 9146 9147 SET_ONLY_XBM_IF_EITHER_EN(EXIT_CPUID, VMX_EXIT_CPUID); /* unconditional */ 9148 SET_ONLY_XBM_IF_EITHER_EN(EXIT_GETSEC, VMX_EXIT_GETSEC); /* unconditional */ 9149 SET_CPE1_XBM_IF_EITHER_EN(EXIT_HALT, VMX_EXIT_HLT, VMX_VMCS_CTRL_PROC_EXEC_HLT_EXIT); /* paranoia */ 9150 SET_ONLY_XBM_IF_EITHER_EN(EXIT_INVD, VMX_EXIT_INVD); /* unconditional */ 9151 SET_CPE1_XBM_IF_EITHER_EN(EXIT_INVLPG, VMX_EXIT_INVLPG, VMX_VMCS_CTRL_PROC_EXEC_INVLPG_EXIT); 9152 SET_CPE1_XBM_IF_EITHER_EN(EXIT_RDPMC, VMX_EXIT_RDPMC, VMX_VMCS_CTRL_PROC_EXEC_RDPMC_EXIT); 9153 SET_CPE1_XBM_IF_EITHER_EN(EXIT_RDTSC, VMX_EXIT_RDTSC, VMX_VMCS_CTRL_PROC_EXEC_RDTSC_EXIT); 9154 SET_ONLY_XBM_IF_EITHER_EN(EXIT_RSM, VMX_EXIT_RSM); /* unconditional */ 9155 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMM_CALL, VMX_EXIT_VMCALL); /* unconditional */ 9156 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMCLEAR, VMX_EXIT_VMCLEAR); /* unconditional */ 9157 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMLAUNCH, VMX_EXIT_VMLAUNCH); /* unconditional */ 9158 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMPTRLD, VMX_EXIT_VMPTRLD); /* unconditional */ 9159 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMPTRST, VMX_EXIT_VMPTRST); /* unconditional */ 9160 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMREAD, VMX_EXIT_VMREAD); /* unconditional */ 9161 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMRESUME, VMX_EXIT_VMRESUME); /* unconditional */ 9162 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMWRITE, VMX_EXIT_VMWRITE); /* unconditional */ 9163 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMXOFF, VMX_EXIT_VMXOFF); /* unconditional */ 9164 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMXON, VMX_EXIT_VMXON); /* unconditional */ 9165 9166 if ( IS_EITHER_ENABLED(pVM, EXIT_CRX_READ) 9167 || IS_EITHER_ENABLED(pVM, EXIT_CRX_WRITE)) 9147 SET_ONLY_XBM_IF_EITHER_EN(INSTR_CPUID, VMX_EXIT_CPUID); /* unconditional */ 9148 SET_ONLY_XBM_IF_EITHER_EN( EXIT_CPUID, VMX_EXIT_CPUID); 9149 SET_ONLY_XBM_IF_EITHER_EN(INSTR_GETSEC, VMX_EXIT_GETSEC); /* unconditional */ 9150 SET_ONLY_XBM_IF_EITHER_EN( EXIT_GETSEC, VMX_EXIT_GETSEC); 9151 SET_CPE1_XBM_IF_EITHER_EN(INSTR_HALT, VMX_EXIT_HLT, VMX_VMCS_CTRL_PROC_EXEC_HLT_EXIT); /* paranoia */ 9152 SET_ONLY_XBM_IF_EITHER_EN( EXIT_HALT, VMX_EXIT_HLT); 9153 SET_ONLY_XBM_IF_EITHER_EN(INSTR_INVD, VMX_EXIT_INVD); /* unconditional */ 9154 SET_ONLY_XBM_IF_EITHER_EN( EXIT_INVD, VMX_EXIT_INVD); 9155 SET_CPE1_XBM_IF_EITHER_EN(INSTR_INVLPG, VMX_EXIT_INVLPG, VMX_VMCS_CTRL_PROC_EXEC_INVLPG_EXIT); 9156 SET_ONLY_XBM_IF_EITHER_EN( EXIT_INVLPG, VMX_EXIT_INVLPG); 9157 SET_CPE1_XBM_IF_EITHER_EN(INSTR_RDPMC, VMX_EXIT_RDPMC, VMX_VMCS_CTRL_PROC_EXEC_RDPMC_EXIT); 9158 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RDPMC, VMX_EXIT_RDPMC); 9159 SET_CPE1_XBM_IF_EITHER_EN(INSTR_RDTSC, VMX_EXIT_RDTSC, VMX_VMCS_CTRL_PROC_EXEC_RDTSC_EXIT); 9160 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RDTSC, VMX_EXIT_RDTSC); 9161 SET_ONLY_XBM_IF_EITHER_EN(INSTR_RSM, VMX_EXIT_RSM); /* unconditional */ 9162 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RSM, VMX_EXIT_RSM); 9163 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMM_CALL, VMX_EXIT_VMCALL); /* unconditional */ 9164 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMM_CALL, VMX_EXIT_VMCALL); 9165 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMCLEAR, VMX_EXIT_VMCLEAR); /* unconditional */ 9166 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMCLEAR, VMX_EXIT_VMCLEAR); 9167 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMLAUNCH, VMX_EXIT_VMLAUNCH); /* unconditional */ 9168 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMLAUNCH, VMX_EXIT_VMLAUNCH); 9169 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMPTRLD, VMX_EXIT_VMPTRLD); /* unconditional */ 9170 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMPTRLD, VMX_EXIT_VMPTRLD); 9171 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMPTRST, VMX_EXIT_VMPTRST); /* unconditional */ 9172 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMPTRST, VMX_EXIT_VMPTRST); 9173 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMREAD, VMX_EXIT_VMREAD); /* unconditional */ 9174 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMREAD, VMX_EXIT_VMREAD); 9175 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMRESUME, VMX_EXIT_VMRESUME); /* unconditional */ 9176 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMRESUME, VMX_EXIT_VMRESUME); 9177 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMWRITE, VMX_EXIT_VMWRITE); /* unconditional */ 9178 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMWRITE, VMX_EXIT_VMWRITE); 9179 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMXOFF, VMX_EXIT_VMXOFF); /* unconditional */ 9180 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMXOFF, VMX_EXIT_VMXOFF); 9181 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMXON, VMX_EXIT_VMXON); /* unconditional */ 9182 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMXON, VMX_EXIT_VMXON); 9183 9184 if ( IS_EITHER_ENABLED(pVM, INSTR_CRX_READ) 9185 || IS_EITHER_ENABLED(pVM, INSTR_CRX_WRITE)) 9168 9186 { 9169 9187 int rc2 = hmR0VmxSaveGuestCR0(pVCpu, pCtx); … … 9176 9194 pDbgState->fClearCr4Mask = true; 9177 9195 #endif 9178 if (IS_EITHER_ENABLED(pVM, EXIT_CRX_READ))9196 if (IS_EITHER_ENABLED(pVM, INSTR_CRX_READ)) 9179 9197 pDbgState->fCpe1Extra |= VMX_VMCS_CTRL_PROC_EXEC_CR3_STORE_EXIT | VMX_VMCS_CTRL_PROC_EXEC_CR8_STORE_EXIT; 9180 if (IS_EITHER_ENABLED(pVM, EXIT_CRX_WRITE))9198 if (IS_EITHER_ENABLED(pVM, INSTR_CRX_WRITE)) 9181 9199 pDbgState->fCpe1Extra |= VMX_VMCS_CTRL_PROC_EXEC_CR3_LOAD_EXIT | VMX_VMCS_CTRL_PROC_EXEC_CR8_LOAD_EXIT; 9182 9200 pDbgState->fCpe1Unwanted |= VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW; /* risky? */ … … 9198 9216 } 9199 9217 } 9200 9201 if ( IS_EITHER_ENABLED(pVM, EXIT_DRX_READ) 9202 || IS_EITHER_ENABLED(pVM, EXIT_DRX_WRITE)) 9218 SET_ONLY_XBM_IF_EITHER_EN( EXIT_CRX_READ, VMX_EXIT_MOV_CRX); 9219 SET_ONLY_XBM_IF_EITHER_EN( EXIT_CRX_WRITE, VMX_EXIT_MOV_CRX); 9220 9221 if ( IS_EITHER_ENABLED(pVM, INSTR_DRX_READ) 9222 || IS_EITHER_ENABLED(pVM, INSTR_DRX_WRITE)) 9203 9223 { 9204 9224 /** @todo later, need to fix handler as it assumes this won't usually happen. */ 9205 9225 ASMBitSet(pDbgState->bmExitsToCheck, VMX_EXIT_MOV_DRX); 9206 9226 } 9207 9208 SET_CPEU_XBM_IF_EITHER_EN(EXIT_RDMSR, VMX_EXIT_RDMSR, VMX_VMCS_CTRL_PROC_EXEC_USE_MSR_BITMAPS); /* risky clearing this? */ 9209 SET_CPEU_XBM_IF_EITHER_EN(EXIT_WRMSR, VMX_EXIT_WRMSR, VMX_VMCS_CTRL_PROC_EXEC_USE_MSR_BITMAPS); 9210 SET_CPE1_XBM_IF_EITHER_EN(EXIT_MWAIT, VMX_EXIT_MWAIT, VMX_VMCS_CTRL_PROC_EXEC_MWAIT_EXIT); /* parnoia */ 9211 SET_CPE1_XBM_IF_EITHER_EN(EXIT_MONITOR, VMX_EXIT_MONITOR, VMX_VMCS_CTRL_PROC_EXEC_MONITOR_EXIT); /* parnoia */ 9227 SET_ONLY_XBM_IF_EITHER_EN( EXIT_DRX_READ, VMX_EXIT_MOV_DRX); 9228 SET_ONLY_XBM_IF_EITHER_EN( EXIT_DRX_WRITE, VMX_EXIT_MOV_DRX); 9229 9230 SET_CPEU_XBM_IF_EITHER_EN(INSTR_RDMSR, VMX_EXIT_RDMSR, VMX_VMCS_CTRL_PROC_EXEC_USE_MSR_BITMAPS); /* risky clearing this? */ 9231 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RDMSR, VMX_EXIT_RDMSR); 9232 SET_CPEU_XBM_IF_EITHER_EN(INSTR_WRMSR, VMX_EXIT_WRMSR, VMX_VMCS_CTRL_PROC_EXEC_USE_MSR_BITMAPS); 9233 SET_ONLY_XBM_IF_EITHER_EN( EXIT_WRMSR, VMX_EXIT_WRMSR); 9234 SET_CPE1_XBM_IF_EITHER_EN(INSTR_MWAIT, VMX_EXIT_MWAIT, VMX_VMCS_CTRL_PROC_EXEC_MWAIT_EXIT); /* parnoia */ 9235 SET_ONLY_XBM_IF_EITHER_EN( EXIT_MWAIT, VMX_EXIT_MWAIT); 9236 SET_CPE1_XBM_IF_EITHER_EN(INSTR_MONITOR, VMX_EXIT_MONITOR, VMX_VMCS_CTRL_PROC_EXEC_MONITOR_EXIT); /* parnoia */ 9237 SET_ONLY_XBM_IF_EITHER_EN( EXIT_MONITOR, VMX_EXIT_MONITOR); 9212 9238 #if 0 /** @todo too slow, fix handler. */ 9213 SET_CPE1_XBM_IF_EITHER_EN( EXIT_PAUSE, VMX_EXIT_PAUSE, VMX_VMCS_CTRL_PROC_EXEC_PAUSE_EXIT);9239 SET_CPE1_XBM_IF_EITHER_EN(INSTR_PAUSE, VMX_EXIT_PAUSE, VMX_VMCS_CTRL_PROC_EXEC_PAUSE_EXIT); 9214 9240 #endif 9215 9216 if ( IS_EITHER_ENABLED(pVM, EXIT_SGDT) 9217 || IS_EITHER_ENABLED(pVM, EXIT_SIDT) 9218 || IS_EITHER_ENABLED(pVM, EXIT_LGDT) 9219 || IS_EITHER_ENABLED(pVM, EXIT_LIDT)) 9241 SET_ONLY_XBM_IF_EITHER_EN( EXIT_PAUSE, VMX_EXIT_PAUSE); 9242 9243 if ( IS_EITHER_ENABLED(pVM, INSTR_SGDT) 9244 || IS_EITHER_ENABLED(pVM, INSTR_SIDT) 9245 || IS_EITHER_ENABLED(pVM, INSTR_LGDT) 9246 || IS_EITHER_ENABLED(pVM, INSTR_LIDT)) 9220 9247 { 9221 9248 pDbgState->fCpe2Extra |= VMX_VMCS_CTRL_PROC_EXEC2_DESCRIPTOR_TABLE_EXIT; 9222 9249 ASMBitSet(pDbgState->bmExitsToCheck, VMX_EXIT_XDTR_ACCESS); 9223 9250 } 9224 9225 if ( IS_EITHER_ENABLED(pVM, EXIT_SLDT) 9226 || IS_EITHER_ENABLED(pVM, EXIT_STR) 9227 || IS_EITHER_ENABLED(pVM, EXIT_LLDT) 9228 || IS_EITHER_ENABLED(pVM, EXIT_LTR)) 9251 SET_ONLY_XBM_IF_EITHER_EN( EXIT_SGDT, VMX_EXIT_XDTR_ACCESS); 9252 SET_ONLY_XBM_IF_EITHER_EN( EXIT_SIDT, VMX_EXIT_XDTR_ACCESS); 9253 SET_ONLY_XBM_IF_EITHER_EN( EXIT_LGDT, VMX_EXIT_XDTR_ACCESS); 9254 SET_ONLY_XBM_IF_EITHER_EN( EXIT_LIDT, VMX_EXIT_XDTR_ACCESS); 9255 9256 if ( IS_EITHER_ENABLED(pVM, INSTR_SLDT) 9257 || IS_EITHER_ENABLED(pVM, INSTR_STR) 9258 || IS_EITHER_ENABLED(pVM, INSTR_LLDT) 9259 || IS_EITHER_ENABLED(pVM, INSTR_LTR)) 9229 9260 { 9230 9261 pDbgState->fCpe2Extra |= VMX_VMCS_CTRL_PROC_EXEC2_DESCRIPTOR_TABLE_EXIT; 9231 9262 ASMBitSet(pDbgState->bmExitsToCheck, VMX_EXIT_TR_ACCESS); 9232 9263 } 9233 9234 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_INVEPT, VMX_EXIT_INVEPT); /* unconditional */ 9235 SET_CPE1_XBM_IF_EITHER_EN(EXIT_RDTSCP, VMX_EXIT_RDTSCP, VMX_VMCS_CTRL_PROC_EXEC_RDTSC_EXIT); 9236 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_INVVPID, VMX_EXIT_INVVPID); /* unconditional */ 9237 SET_CPE2_XBM_IF_EITHER_EN(EXIT_WBINVD, VMX_EXIT_WBINVD, VMX_VMCS_CTRL_PROC_EXEC2_WBINVD_EXIT); 9238 SET_ONLY_XBM_IF_EITHER_EN(EXIT_XSETBV, VMX_EXIT_XSETBV); /* unconditional */ 9239 SET_CPE2_XBM_IF_EITHER_EN(EXIT_RDRAND, VMX_EXIT_RDRAND, VMX_VMCS_CTRL_PROC_EXEC2_RDRAND_EXIT); 9240 SET_CPE1_XBM_IF_EITHER_EN(EXIT_VMX_INVPCID, VMX_EXIT_INVPCID, VMX_VMCS_CTRL_PROC_EXEC_INVLPG_EXIT); 9241 SET_ONLY_XBM_IF_EITHER_EN(EXIT_VMX_VMFUNC, VMX_EXIT_VMFUNC); /* unconditional for the current setup */ 9242 SET_CPE2_XBM_IF_EITHER_EN(EXIT_RDSEED, VMX_EXIT_RDSEED, VMX_VMCS_CTRL_PROC_EXEC2_RDSEED_EXIT); 9243 SET_ONLY_XBM_IF_EITHER_EN(EXIT_XSAVES, VMX_EXIT_XSAVES); /* unconditional (enabled by host, guest cfg) */ 9244 SET_ONLY_XBM_IF_EITHER_EN(EXIT_XRSTORS, VMX_EXIT_XRSTORS); /* unconditional (enabled by host, guest cfg) */ 9264 SET_ONLY_XBM_IF_EITHER_EN( EXIT_SLDT, VMX_EXIT_TR_ACCESS); 9265 SET_ONLY_XBM_IF_EITHER_EN( EXIT_STR, VMX_EXIT_TR_ACCESS); 9266 SET_ONLY_XBM_IF_EITHER_EN( EXIT_LLDT, VMX_EXIT_TR_ACCESS); 9267 SET_ONLY_XBM_IF_EITHER_EN( EXIT_LTR, VMX_EXIT_TR_ACCESS); 9268 9269 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_INVEPT, VMX_EXIT_INVEPT); /* unconditional */ 9270 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_INVEPT, VMX_EXIT_INVEPT); 9271 SET_CPE1_XBM_IF_EITHER_EN(INSTR_RDTSCP, VMX_EXIT_RDTSCP, VMX_VMCS_CTRL_PROC_EXEC_RDTSC_EXIT); 9272 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RDTSCP, VMX_EXIT_RDTSCP); 9273 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_INVVPID, VMX_EXIT_INVVPID); /* unconditional */ 9274 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_INVVPID, VMX_EXIT_INVVPID); 9275 SET_CPE2_XBM_IF_EITHER_EN(INSTR_WBINVD, VMX_EXIT_WBINVD, VMX_VMCS_CTRL_PROC_EXEC2_WBINVD_EXIT); 9276 SET_ONLY_XBM_IF_EITHER_EN( EXIT_WBINVD, VMX_EXIT_WBINVD); 9277 SET_ONLY_XBM_IF_EITHER_EN(INSTR_XSETBV, VMX_EXIT_XSETBV); /* unconditional */ 9278 SET_ONLY_XBM_IF_EITHER_EN( EXIT_XSETBV, VMX_EXIT_XSETBV); 9279 SET_CPE2_XBM_IF_EITHER_EN(INSTR_RDRAND, VMX_EXIT_RDRAND, VMX_VMCS_CTRL_PROC_EXEC2_RDRAND_EXIT); 9280 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RDRAND, VMX_EXIT_RDRAND); 9281 SET_CPE1_XBM_IF_EITHER_EN(INSTR_VMX_INVPCID, VMX_EXIT_INVPCID, VMX_VMCS_CTRL_PROC_EXEC_INVLPG_EXIT); 9282 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_INVPCID, VMX_EXIT_INVPCID); 9283 SET_ONLY_XBM_IF_EITHER_EN(INSTR_VMX_VMFUNC, VMX_EXIT_VMFUNC); /* unconditional for the current setup */ 9284 SET_ONLY_XBM_IF_EITHER_EN( EXIT_VMX_VMFUNC, VMX_EXIT_VMFUNC); 9285 SET_CPE2_XBM_IF_EITHER_EN(INSTR_RDSEED, VMX_EXIT_RDSEED, VMX_VMCS_CTRL_PROC_EXEC2_RDSEED_EXIT); 9286 SET_ONLY_XBM_IF_EITHER_EN( EXIT_RDSEED, VMX_EXIT_RDSEED); 9287 SET_ONLY_XBM_IF_EITHER_EN(INSTR_XSAVES, VMX_EXIT_XSAVES); /* unconditional (enabled by host, guest cfg) */ 9288 SET_ONLY_XBM_IF_EITHER_EN(EXIT_XSAVES, VMX_EXIT_XSAVES); 9289 SET_ONLY_XBM_IF_EITHER_EN(INSTR_XRSTORS, VMX_EXIT_XRSTORS); /* unconditional (enabled by host, guest cfg) */ 9290 SET_ONLY_XBM_IF_EITHER_EN( EXIT_XRSTORS, VMX_EXIT_XRSTORS); 9245 9291 9246 9292 #undef IS_EITHER_ENABLED … … 9301 9347 * where we dispatch dtrace events. 9302 9348 */ 9303 bool fDtrace = false; 9304 DBGFEVENTTYPE enmEvent = DBGFEVENT_END; 9305 uint32_t uEventArg = 0; 9349 bool fDtrace1 = false; 9350 bool fDtrace2 = false; 9351 DBGFEVENTTYPE enmEvent1 = DBGFEVENT_END; 9352 DBGFEVENTTYPE enmEvent2 = DBGFEVENT_END; 9353 uint32_t uEventArg = 0; 9354 #define SET_EXIT(a_EventSubName) \ 9355 do { \ 9356 enmEvent2 = RT_CONCAT(DBGFEVENT_EXIT_, a_EventSubName); \ 9357 fDtrace2 = RT_CONCAT3(VBOXVMM_EXIT_, a_EventSubName, _ENABLED)(); \ 9358 } while (0) 9306 9359 #define SET_BOTH(a_EventSubName) \ 9307 do { enmEvent = RT_CONCAT(DBGFEVENT_, a_EventSubName); \ 9308 fDtrace = RT_CONCAT3(VBOXVMM_, a_EventSubName, _ENABLED)(); \ 9360 do { \ 9361 enmEvent1 = RT_CONCAT(DBGFEVENT_INSTR_, a_EventSubName); \ 9362 enmEvent2 = RT_CONCAT(DBGFEVENT_EXIT_, a_EventSubName); \ 9363 fDtrace1 = RT_CONCAT3(VBOXVMM_INSTR_, a_EventSubName, _ENABLED)(); \ 9364 fDtrace2 = RT_CONCAT3(VBOXVMM_EXIT_, a_EventSubName, _ENABLED)(); \ 9309 9365 } while (0) 9310 9366 switch (uExitReason) … … 9328 9384 uEventArg = pVmxTransient->uExitIntErrorCode; 9329 9385 } 9330 enmEvent = (DBGFEVENTTYPE)(DBGFEVENT_XCPT_FIRST + idxVector);9331 switch (enmEvent )9386 enmEvent1 = (DBGFEVENTTYPE)(DBGFEVENT_XCPT_FIRST + idxVector); 9387 switch (enmEvent1) 9332 9388 { 9333 case DBGFEVENT_XCPT_DE: fDtrace = VBOXVMM_XCPT_DE_ENABLED(); break;9334 case DBGFEVENT_XCPT_DB: fDtrace = VBOXVMM_XCPT_DB_ENABLED(); break;9335 case DBGFEVENT_XCPT_BP: fDtrace = VBOXVMM_XCPT_BP_ENABLED(); break;9336 case DBGFEVENT_XCPT_OF: fDtrace = VBOXVMM_XCPT_OF_ENABLED(); break;9337 case DBGFEVENT_XCPT_BR: fDtrace = VBOXVMM_XCPT_BR_ENABLED(); break;9338 case DBGFEVENT_XCPT_UD: fDtrace = VBOXVMM_XCPT_UD_ENABLED(); break;9339 case DBGFEVENT_XCPT_NM: fDtrace = VBOXVMM_XCPT_NM_ENABLED(); break;9340 case DBGFEVENT_XCPT_DF: fDtrace = VBOXVMM_XCPT_DF_ENABLED(); break;9341 case DBGFEVENT_XCPT_TS: fDtrace = VBOXVMM_XCPT_TS_ENABLED(); break;9342 case DBGFEVENT_XCPT_NP: fDtrace = VBOXVMM_XCPT_NP_ENABLED(); break;9343 case DBGFEVENT_XCPT_SS: fDtrace = VBOXVMM_XCPT_SS_ENABLED(); break;9344 case DBGFEVENT_XCPT_GP: fDtrace = VBOXVMM_XCPT_GP_ENABLED(); break;9345 case DBGFEVENT_XCPT_PF: fDtrace = VBOXVMM_XCPT_PF_ENABLED(); break;9346 case DBGFEVENT_XCPT_MF: fDtrace = VBOXVMM_XCPT_MF_ENABLED(); break;9347 case DBGFEVENT_XCPT_AC: fDtrace = VBOXVMM_XCPT_AC_ENABLED(); break;9348 case DBGFEVENT_XCPT_XF: fDtrace = VBOXVMM_XCPT_XF_ENABLED(); break;9349 case DBGFEVENT_XCPT_VE: fDtrace = VBOXVMM_XCPT_VE_ENABLED(); break;9350 case DBGFEVENT_XCPT_SX: fDtrace = VBOXVMM_XCPT_SX_ENABLED(); break;9351 default: break;9389 case DBGFEVENT_XCPT_DE: fDtrace1 = VBOXVMM_XCPT_DE_ENABLED(); break; 9390 case DBGFEVENT_XCPT_DB: fDtrace1 = VBOXVMM_XCPT_DB_ENABLED(); break; 9391 case DBGFEVENT_XCPT_BP: fDtrace1 = VBOXVMM_XCPT_BP_ENABLED(); break; 9392 case DBGFEVENT_XCPT_OF: fDtrace1 = VBOXVMM_XCPT_OF_ENABLED(); break; 9393 case DBGFEVENT_XCPT_BR: fDtrace1 = VBOXVMM_XCPT_BR_ENABLED(); break; 9394 case DBGFEVENT_XCPT_UD: fDtrace1 = VBOXVMM_XCPT_UD_ENABLED(); break; 9395 case DBGFEVENT_XCPT_NM: fDtrace1 = VBOXVMM_XCPT_NM_ENABLED(); break; 9396 case DBGFEVENT_XCPT_DF: fDtrace1 = VBOXVMM_XCPT_DF_ENABLED(); break; 9397 case DBGFEVENT_XCPT_TS: fDtrace1 = VBOXVMM_XCPT_TS_ENABLED(); break; 9398 case DBGFEVENT_XCPT_NP: fDtrace1 = VBOXVMM_XCPT_NP_ENABLED(); break; 9399 case DBGFEVENT_XCPT_SS: fDtrace1 = VBOXVMM_XCPT_SS_ENABLED(); break; 9400 case DBGFEVENT_XCPT_GP: fDtrace1 = VBOXVMM_XCPT_GP_ENABLED(); break; 9401 case DBGFEVENT_XCPT_PF: fDtrace1 = VBOXVMM_XCPT_PF_ENABLED(); break; 9402 case DBGFEVENT_XCPT_MF: fDtrace1 = VBOXVMM_XCPT_MF_ENABLED(); break; 9403 case DBGFEVENT_XCPT_AC: fDtrace1 = VBOXVMM_XCPT_AC_ENABLED(); break; 9404 case DBGFEVENT_XCPT_XF: fDtrace1 = VBOXVMM_XCPT_XF_ENABLED(); break; 9405 case DBGFEVENT_XCPT_VE: fDtrace1 = VBOXVMM_XCPT_VE_ENABLED(); break; 9406 case DBGFEVENT_XCPT_SX: fDtrace1 = VBOXVMM_XCPT_SX_ENABLED(); break; 9407 default: break; 9352 9408 } 9353 9409 } … … 9358 9414 case VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT: 9359 9415 uEventArg = idxVector; 9360 enmEvent 9361 fDtrace 9416 enmEvent1 = DBGFEVENT_INTERRUPT_SOFTWARE; 9417 fDtrace1 = VBOXVMM_INT_SOFTWARE_ENABLED(); 9362 9418 break; 9363 9419 } … … 9366 9422 9367 9423 case VMX_EXIT_TRIPLE_FAULT: 9368 enmEvent = DBGFEVENT_TRIPLE_FAULT;9369 //fDtrace = VBOXVMM_EXIT_TRIPLE_FAULT_ENABLED();9424 enmEvent1 = DBGFEVENT_TRIPLE_FAULT; 9425 //fDtrace1 = VBOXVMM_EXIT_TRIPLE_FAULT_ENABLED(); 9370 9426 break; 9371 case VMX_EXIT_TASK_SWITCH: SET_ BOTH(EXIT_TASK_SWITCH); break;9372 case VMX_EXIT_EPT_VIOLATION: SET_ BOTH(EXIT_VMX_EPT_VIOLATION); break;9373 case VMX_EXIT_EPT_MISCONFIG: SET_ BOTH(EXIT_VMX_EPT_MISCONFIG); break;9374 case VMX_EXIT_APIC_ACCESS: SET_ BOTH(EXIT_VMX_VAPIC_ACCESS); break;9375 case VMX_EXIT_APIC_WRITE: SET_ BOTH(EXIT_VMX_VAPIC_WRITE); break;9427 case VMX_EXIT_TASK_SWITCH: SET_EXIT(TASK_SWITCH); break; 9428 case VMX_EXIT_EPT_VIOLATION: SET_EXIT(VMX_EPT_VIOLATION); break; 9429 case VMX_EXIT_EPT_MISCONFIG: SET_EXIT(VMX_EPT_MISCONFIG); break; 9430 case VMX_EXIT_APIC_ACCESS: SET_EXIT(VMX_VAPIC_ACCESS); break; 9431 case VMX_EXIT_APIC_WRITE: SET_EXIT(VMX_VAPIC_WRITE); break; 9376 9432 9377 9433 /* Instruction specific VM-exits: */ 9378 case VMX_EXIT_CPUID: SET_BOTH( EXIT_CPUID); break;9379 case VMX_EXIT_GETSEC: SET_BOTH( EXIT_GETSEC); break;9380 case VMX_EXIT_HLT: SET_BOTH( EXIT_HALT); break;9381 case VMX_EXIT_INVD: SET_BOTH( EXIT_INVD); break;9382 case VMX_EXIT_INVLPG: SET_BOTH( EXIT_INVLPG); break;9383 case VMX_EXIT_RDPMC: SET_BOTH( EXIT_RDPMC); break;9384 case VMX_EXIT_RDTSC: SET_BOTH( EXIT_RDTSC); break;9385 case VMX_EXIT_RSM: SET_BOTH( EXIT_RSM); break;9386 case VMX_EXIT_VMCALL: SET_BOTH( EXIT_VMM_CALL); break;9387 case VMX_EXIT_VMCLEAR: SET_BOTH( EXIT_VMX_VMCLEAR); break;9388 case VMX_EXIT_VMLAUNCH: SET_BOTH( EXIT_VMX_VMLAUNCH); break;9389 case VMX_EXIT_VMPTRLD: SET_BOTH( EXIT_VMX_VMPTRLD); break;9390 case VMX_EXIT_VMPTRST: SET_BOTH( EXIT_VMX_VMPTRST); break;9391 case VMX_EXIT_VMREAD: SET_BOTH( EXIT_VMX_VMREAD); break;9392 case VMX_EXIT_VMRESUME: SET_BOTH( EXIT_VMX_VMRESUME); break;9393 case VMX_EXIT_VMWRITE: SET_BOTH( EXIT_VMX_VMWRITE); break;9394 case VMX_EXIT_VMXOFF: SET_BOTH( EXIT_VMX_VMXOFF); break;9395 case VMX_EXIT_VMXON: SET_BOTH( EXIT_VMX_VMXON); break;9434 case VMX_EXIT_CPUID: SET_BOTH(CPUID); break; 9435 case VMX_EXIT_GETSEC: SET_BOTH(GETSEC); break; 9436 case VMX_EXIT_HLT: SET_BOTH(HALT); break; 9437 case VMX_EXIT_INVD: SET_BOTH(INVD); break; 9438 case VMX_EXIT_INVLPG: SET_BOTH(INVLPG); break; 9439 case VMX_EXIT_RDPMC: SET_BOTH(RDPMC); break; 9440 case VMX_EXIT_RDTSC: SET_BOTH(RDTSC); break; 9441 case VMX_EXIT_RSM: SET_BOTH(RSM); break; 9442 case VMX_EXIT_VMCALL: SET_BOTH(VMM_CALL); break; 9443 case VMX_EXIT_VMCLEAR: SET_BOTH(VMX_VMCLEAR); break; 9444 case VMX_EXIT_VMLAUNCH: SET_BOTH(VMX_VMLAUNCH); break; 9445 case VMX_EXIT_VMPTRLD: SET_BOTH(VMX_VMPTRLD); break; 9446 case VMX_EXIT_VMPTRST: SET_BOTH(VMX_VMPTRST); break; 9447 case VMX_EXIT_VMREAD: SET_BOTH(VMX_VMREAD); break; 9448 case VMX_EXIT_VMRESUME: SET_BOTH(VMX_VMRESUME); break; 9449 case VMX_EXIT_VMWRITE: SET_BOTH(VMX_VMWRITE); break; 9450 case VMX_EXIT_VMXOFF: SET_BOTH(VMX_VMXOFF); break; 9451 case VMX_EXIT_VMXON: SET_BOTH(VMX_VMXON); break; 9396 9452 case VMX_EXIT_MOV_CRX: 9397 9453 hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); … … 9400 9456 if ( VMX_EXIT_QUALIFICATION_CRX_ACCESS(pVmxTransient->uExitQualification) 9401 9457 == VMX_EXIT_QUALIFICATION_CRX_ACCESS_READ) 9402 SET_BOTH( EXIT_CRX_READ);9458 SET_BOTH(CRX_READ); 9403 9459 else 9404 SET_BOTH( EXIT_CRX_WRITE);9460 SET_BOTH(CRX_WRITE); 9405 9461 uEventArg = VMX_EXIT_QUALIFICATION_CRX_REGISTER(pVmxTransient->uExitQualification); 9406 9462 break; … … 9409 9465 if ( VMX_EXIT_QUALIFICATION_DRX_DIRECTION(pVmxTransient->uExitQualification) 9410 9466 == VMX_EXIT_QUALIFICATION_DRX_DIRECTION_READ) 9411 SET_BOTH( EXIT_DRX_READ);9467 SET_BOTH(DRX_READ); 9412 9468 else 9413 SET_BOTH( EXIT_DRX_WRITE);9469 SET_BOTH(DRX_WRITE); 9414 9470 uEventArg = VMX_EXIT_QUALIFICATION_DRX_REGISTER(pVmxTransient->uExitQualification); 9415 9471 break; 9416 case VMX_EXIT_RDMSR: SET_BOTH( EXIT_RDMSR); break;9417 case VMX_EXIT_WRMSR: SET_BOTH( EXIT_WRMSR); break;9418 case VMX_EXIT_MWAIT: SET_BOTH( EXIT_MWAIT); break;9419 case VMX_EXIT_MONITOR: SET_BOTH( EXIT_MONITOR); break;9420 case VMX_EXIT_PAUSE: SET_BOTH( EXIT_PAUSE); break;9472 case VMX_EXIT_RDMSR: SET_BOTH(RDMSR); break; 9473 case VMX_EXIT_WRMSR: SET_BOTH(WRMSR); break; 9474 case VMX_EXIT_MWAIT: SET_BOTH(MWAIT); break; 9475 case VMX_EXIT_MONITOR: SET_BOTH(MONITOR); break; 9476 case VMX_EXIT_PAUSE: SET_BOTH(PAUSE); break; 9421 9477 case VMX_EXIT_XDTR_ACCESS: 9422 9478 hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 9423 9479 switch (RT_BF_GET(pVmxTransient->ExitInstrInfo.u, VMX_XDTR_INSINFO_INSTR_ID)) 9424 9480 { 9425 case VMX_XDTR_INSINFO_II_SGDT: SET_BOTH( EXIT_SGDT); break;9426 case VMX_XDTR_INSINFO_II_SIDT: SET_BOTH( EXIT_SIDT); break;9427 case VMX_XDTR_INSINFO_II_LGDT: SET_BOTH( EXIT_LGDT); break;9428 case VMX_XDTR_INSINFO_II_LIDT: SET_BOTH( EXIT_LIDT); break;9481 case VMX_XDTR_INSINFO_II_SGDT: SET_BOTH(SGDT); break; 9482 case VMX_XDTR_INSINFO_II_SIDT: SET_BOTH(SIDT); break; 9483 case VMX_XDTR_INSINFO_II_LGDT: SET_BOTH(LGDT); break; 9484 case VMX_XDTR_INSINFO_II_LIDT: SET_BOTH(LIDT); break; 9429 9485 } 9430 9486 break; … … 9434 9490 switch (RT_BF_GET(pVmxTransient->ExitInstrInfo.u, VMX_YYTR_INSINFO_INSTR_ID)) 9435 9491 { 9436 case VMX_YYTR_INSINFO_II_SLDT: SET_BOTH( EXIT_SLDT); break;9437 case VMX_YYTR_INSINFO_II_STR: SET_BOTH( EXIT_STR); break;9438 case VMX_YYTR_INSINFO_II_LLDT: SET_BOTH( EXIT_LLDT); break;9439 case VMX_YYTR_INSINFO_II_LTR: SET_BOTH( EXIT_LTR); break;9492 case VMX_YYTR_INSINFO_II_SLDT: SET_BOTH(SLDT); break; 9493 case VMX_YYTR_INSINFO_II_STR: SET_BOTH(STR); break; 9494 case VMX_YYTR_INSINFO_II_LLDT: SET_BOTH(LLDT); break; 9495 case VMX_YYTR_INSINFO_II_LTR: SET_BOTH(LTR); break; 9440 9496 } 9441 9497 break; 9442 9498 9443 case VMX_EXIT_INVEPT: SET_BOTH( EXIT_VMX_INVEPT); break;9444 case VMX_EXIT_RDTSCP: SET_BOTH( EXIT_RDTSCP); break;9445 case VMX_EXIT_INVVPID: SET_BOTH( EXIT_VMX_INVVPID); break;9446 case VMX_EXIT_WBINVD: SET_BOTH( EXIT_WBINVD); break;9447 case VMX_EXIT_XSETBV: SET_BOTH( EXIT_XSETBV); break;9448 case VMX_EXIT_RDRAND: SET_BOTH( EXIT_RDRAND); break;9449 case VMX_EXIT_INVPCID: SET_BOTH( EXIT_VMX_INVPCID); break;9450 case VMX_EXIT_VMFUNC: SET_BOTH( EXIT_VMX_VMFUNC); break;9451 case VMX_EXIT_RDSEED: SET_BOTH( EXIT_RDSEED); break;9452 case VMX_EXIT_XSAVES: SET_BOTH( EXIT_XSAVES); break;9453 case VMX_EXIT_XRSTORS: SET_BOTH( EXIT_XRSTORS); break;9499 case VMX_EXIT_INVEPT: SET_BOTH(VMX_INVEPT); break; 9500 case VMX_EXIT_RDTSCP: SET_BOTH(RDTSCP); break; 9501 case VMX_EXIT_INVVPID: SET_BOTH(VMX_INVVPID); break; 9502 case VMX_EXIT_WBINVD: SET_BOTH(WBINVD); break; 9503 case VMX_EXIT_XSETBV: SET_BOTH(XSETBV); break; 9504 case VMX_EXIT_RDRAND: SET_BOTH(RDRAND); break; 9505 case VMX_EXIT_INVPCID: SET_BOTH(VMX_INVPCID); break; 9506 case VMX_EXIT_VMFUNC: SET_BOTH(VMX_VMFUNC); break; 9507 case VMX_EXIT_RDSEED: SET_BOTH(RDSEED); break; 9508 case VMX_EXIT_XSAVES: SET_BOTH(XSAVES); break; 9509 case VMX_EXIT_XRSTORS: SET_BOTH(XRSTORS); break; 9454 9510 9455 9511 /* Events that aren't relevant at this point. */ … … 9477 9533 } 9478 9534 #undef SET_BOTH 9535 #undef SET_EXIT 9479 9536 9480 9537 /* … … 9484 9541 * we use enmEvent since the probes are a subset of what DBGF does. 9485 9542 */ 9486 if (fDtrace )9543 if (fDtrace1 || fDtrace2) 9487 9544 { 9488 9545 hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 9489 9546 hmR0VmxSaveGuestState(pVCpu, pMixedCtx); 9490 switch (enmEvent )9547 switch (enmEvent1) 9491 9548 { 9492 9549 /** @todo consider which extra parameters would be helpful for each probe. */ 9550 case DBGFEVENT_END: break; 9493 9551 case DBGFEVENT_XCPT_DE: VBOXVMM_XCPT_DE(pVCpu, pMixedCtx); break; 9494 9552 case DBGFEVENT_XCPT_DB: VBOXVMM_XCPT_DB(pVCpu, pMixedCtx, pMixedCtx->dr[6]); break; … … 9510 9568 case DBGFEVENT_XCPT_SX: VBOXVMM_XCPT_SX(pVCpu, pMixedCtx, uEventArg); break; 9511 9569 case DBGFEVENT_INTERRUPT_SOFTWARE: VBOXVMM_INT_SOFTWARE(pVCpu, pMixedCtx, (uint8_t)uEventArg); break; 9570 case DBGFEVENT_INSTR_CPUID: VBOXVMM_INSTR_CPUID(pVCpu, pMixedCtx, pMixedCtx->eax, pMixedCtx->ecx); break; 9571 case DBGFEVENT_INSTR_GETSEC: VBOXVMM_INSTR_GETSEC(pVCpu, pMixedCtx); break; 9572 case DBGFEVENT_INSTR_HALT: VBOXVMM_INSTR_HALT(pVCpu, pMixedCtx); break; 9573 case DBGFEVENT_INSTR_INVD: VBOXVMM_INSTR_INVD(pVCpu, pMixedCtx); break; 9574 case DBGFEVENT_INSTR_INVLPG: VBOXVMM_INSTR_INVLPG(pVCpu, pMixedCtx); break; 9575 case DBGFEVENT_INSTR_RDPMC: VBOXVMM_INSTR_RDPMC(pVCpu, pMixedCtx); break; 9576 case DBGFEVENT_INSTR_RDTSC: VBOXVMM_INSTR_RDTSC(pVCpu, pMixedCtx); break; 9577 case DBGFEVENT_INSTR_RSM: VBOXVMM_INSTR_RSM(pVCpu, pMixedCtx); break; 9578 case DBGFEVENT_INSTR_CRX_READ: VBOXVMM_INSTR_CRX_READ(pVCpu, pMixedCtx, (uint8_t)uEventArg); break; 9579 case DBGFEVENT_INSTR_CRX_WRITE: VBOXVMM_INSTR_CRX_WRITE(pVCpu, pMixedCtx, (uint8_t)uEventArg); break; 9580 case DBGFEVENT_INSTR_DRX_READ: VBOXVMM_INSTR_DRX_READ(pVCpu, pMixedCtx, (uint8_t)uEventArg); break; 9581 case DBGFEVENT_INSTR_DRX_WRITE: VBOXVMM_INSTR_DRX_WRITE(pVCpu, pMixedCtx, (uint8_t)uEventArg); break; 9582 case DBGFEVENT_INSTR_RDMSR: VBOXVMM_INSTR_RDMSR(pVCpu, pMixedCtx, pMixedCtx->ecx); break; 9583 case DBGFEVENT_INSTR_WRMSR: VBOXVMM_INSTR_WRMSR(pVCpu, pMixedCtx, pMixedCtx->ecx, 9584 RT_MAKE_U64(pMixedCtx->eax, pMixedCtx->edx)); break; 9585 case DBGFEVENT_INSTR_MWAIT: VBOXVMM_INSTR_MWAIT(pVCpu, pMixedCtx); break; 9586 case DBGFEVENT_INSTR_MONITOR: VBOXVMM_INSTR_MONITOR(pVCpu, pMixedCtx); break; 9587 case DBGFEVENT_INSTR_PAUSE: VBOXVMM_INSTR_PAUSE(pVCpu, pMixedCtx); break; 9588 case DBGFEVENT_INSTR_SGDT: VBOXVMM_INSTR_SGDT(pVCpu, pMixedCtx); break; 9589 case DBGFEVENT_INSTR_SIDT: VBOXVMM_INSTR_SIDT(pVCpu, pMixedCtx); break; 9590 case DBGFEVENT_INSTR_LGDT: VBOXVMM_INSTR_LGDT(pVCpu, pMixedCtx); break; 9591 case DBGFEVENT_INSTR_LIDT: VBOXVMM_INSTR_LIDT(pVCpu, pMixedCtx); break; 9592 case DBGFEVENT_INSTR_SLDT: VBOXVMM_INSTR_SLDT(pVCpu, pMixedCtx); break; 9593 case DBGFEVENT_INSTR_STR: VBOXVMM_INSTR_STR(pVCpu, pMixedCtx); break; 9594 case DBGFEVENT_INSTR_LLDT: VBOXVMM_INSTR_LLDT(pVCpu, pMixedCtx); break; 9595 case DBGFEVENT_INSTR_LTR: VBOXVMM_INSTR_LTR(pVCpu, pMixedCtx); break; 9596 case DBGFEVENT_INSTR_RDTSCP: VBOXVMM_INSTR_RDTSCP(pVCpu, pMixedCtx); break; 9597 case DBGFEVENT_INSTR_WBINVD: VBOXVMM_INSTR_WBINVD(pVCpu, pMixedCtx); break; 9598 case DBGFEVENT_INSTR_XSETBV: VBOXVMM_INSTR_XSETBV(pVCpu, pMixedCtx); break; 9599 case DBGFEVENT_INSTR_RDRAND: VBOXVMM_INSTR_RDRAND(pVCpu, pMixedCtx); break; 9600 case DBGFEVENT_INSTR_RDSEED: VBOXVMM_INSTR_RDSEED(pVCpu, pMixedCtx); break; 9601 case DBGFEVENT_INSTR_XSAVES: VBOXVMM_INSTR_XSAVES(pVCpu, pMixedCtx); break; 9602 case DBGFEVENT_INSTR_XRSTORS: VBOXVMM_INSTR_XRSTORS(pVCpu, pMixedCtx); break; 9603 case DBGFEVENT_INSTR_VMM_CALL: VBOXVMM_INSTR_VMM_CALL(pVCpu, pMixedCtx); break; 9604 case DBGFEVENT_INSTR_VMX_VMCLEAR: VBOXVMM_INSTR_VMX_VMCLEAR(pVCpu, pMixedCtx); break; 9605 case DBGFEVENT_INSTR_VMX_VMLAUNCH: VBOXVMM_INSTR_VMX_VMLAUNCH(pVCpu, pMixedCtx); break; 9606 case DBGFEVENT_INSTR_VMX_VMPTRLD: VBOXVMM_INSTR_VMX_VMPTRLD(pVCpu, pMixedCtx); break; 9607 case DBGFEVENT_INSTR_VMX_VMPTRST: VBOXVMM_INSTR_VMX_VMPTRST(pVCpu, pMixedCtx); break; 9608 case DBGFEVENT_INSTR_VMX_VMREAD: VBOXVMM_INSTR_VMX_VMREAD(pVCpu, pMixedCtx); break; 9609 case DBGFEVENT_INSTR_VMX_VMRESUME: VBOXVMM_INSTR_VMX_VMRESUME(pVCpu, pMixedCtx); break; 9610 case DBGFEVENT_INSTR_VMX_VMWRITE: VBOXVMM_INSTR_VMX_VMWRITE(pVCpu, pMixedCtx); break; 9611 case DBGFEVENT_INSTR_VMX_VMXOFF: VBOXVMM_INSTR_VMX_VMXOFF(pVCpu, pMixedCtx); break; 9612 case DBGFEVENT_INSTR_VMX_VMXON: VBOXVMM_INSTR_VMX_VMXON(pVCpu, pMixedCtx); break; 9613 case DBGFEVENT_INSTR_VMX_INVEPT: VBOXVMM_INSTR_VMX_INVEPT(pVCpu, pMixedCtx); break; 9614 case DBGFEVENT_INSTR_VMX_INVVPID: VBOXVMM_INSTR_VMX_INVVPID(pVCpu, pMixedCtx); break; 9615 case DBGFEVENT_INSTR_VMX_INVPCID: VBOXVMM_INSTR_VMX_INVPCID(pVCpu, pMixedCtx); break; 9616 case DBGFEVENT_INSTR_VMX_VMFUNC: VBOXVMM_INSTR_VMX_VMFUNC(pVCpu, pMixedCtx); break; 9617 default: AssertMsgFailed(("enmEvent1=%d uExitReason=%d\n", enmEvent1, uExitReason)); break; 9618 } 9619 switch (enmEvent2) 9620 { 9621 /** @todo consider which extra parameters would be helpful for each probe. */ 9622 case DBGFEVENT_END: break; 9512 9623 case DBGFEVENT_EXIT_TASK_SWITCH: VBOXVMM_EXIT_TASK_SWITCH(pVCpu, pMixedCtx); break; 9513 9624 case DBGFEVENT_EXIT_CPUID: VBOXVMM_EXIT_CPUID(pVCpu, pMixedCtx, pMixedCtx->eax, pMixedCtx->ecx); break; … … 9562 9673 case DBGFEVENT_EXIT_VMX_VAPIC_ACCESS: VBOXVMM_EXIT_VMX_VAPIC_ACCESS(pVCpu, pMixedCtx); break; 9563 9674 case DBGFEVENT_EXIT_VMX_VAPIC_WRITE: VBOXVMM_EXIT_VMX_VAPIC_WRITE(pVCpu, pMixedCtx); break; 9564 default: AssertMsgFailed(("enmEvent=%d uExitReason=%d\n", enmEvent, uExitReason)); break;9675 default: AssertMsgFailed(("enmEvent2=%d uExitReason=%d\n", enmEvent2, uExitReason)); break; 9565 9676 } 9566 9677 } … … 9571 9682 * 9572 9683 * Note! DBGF sets DBGFEVENT_INTERRUPT_SOFTWARE in the bitmap. 9684 * Note! If we have to events, we prioritize the first, i.e. the instruction 9685 * one, in order to avoid event nesting. 9573 9686 */ 9574 if ( enmEvent != DBGFEVENT_END 9575 && DBGF_IS_EVENT_ENABLED(pVM, enmEvent)) 9576 { 9577 VBOXSTRICTRC rcStrict = DBGFEventGenericWithArg(pVM, pVCpu, enmEvent, uEventArg); 9687 if ( enmEvent1 != DBGFEVENT_END 9688 && DBGF_IS_EVENT_ENABLED(pVM, enmEvent1)) 9689 { 9690 VBOXSTRICTRC rcStrict = DBGFEventGenericWithArg(pVM, pVCpu, enmEvent1, uEventArg); 9691 if (rcStrict != VINF_SUCCESS) 9692 return rcStrict; 9693 } 9694 else if ( enmEvent2 != DBGFEVENT_END 9695 && DBGF_IS_EVENT_ENABLED(pVM, enmEvent2)) 9696 { 9697 VBOXSTRICTRC rcStrict = DBGFEventGenericWithArg(pVM, pVCpu, enmEvent2, uEventArg); 9578 9698 if (rcStrict != VINF_SUCCESS) 9579 9699 return rcStrict; … … 9906 10026 Since the variables are in an array and the probes are next to one 9907 10027 another (more or less), we have good locality. So, better read 9908 four-five cache lines ever time and only have one conditional, than9909 70+ conditionals, right? */10028 eight-nine cache lines ever time and only have one conditional, than 10029 128+ conditionals, right? */ 9910 10030 return ( VBOXVMM_R0_HMVMX_VMEXIT_ENABLED_RAW() /* expensive too due to context */ 9911 10031 | VBOXVMM_XCPT_DE_ENABLED_RAW() … … 9929 10049 | VBOXVMM_INT_SOFTWARE_ENABLED_RAW() 9930 10050 | VBOXVMM_INT_HARDWARE_ENABLED_RAW() 9931 | VBOXVMM_EXIT_TASK_SWITCH_ENABLED_RAW() 10051 ) != 0 10052 || ( VBOXVMM_INSTR_HALT_ENABLED_RAW() 10053 | VBOXVMM_INSTR_MWAIT_ENABLED_RAW() 10054 | VBOXVMM_INSTR_MONITOR_ENABLED_RAW() 10055 | VBOXVMM_INSTR_CPUID_ENABLED_RAW() 10056 | VBOXVMM_INSTR_INVD_ENABLED_RAW() 10057 | VBOXVMM_INSTR_WBINVD_ENABLED_RAW() 10058 | VBOXVMM_INSTR_INVLPG_ENABLED_RAW() 10059 | VBOXVMM_INSTR_RDTSC_ENABLED_RAW() 10060 | VBOXVMM_INSTR_RDTSCP_ENABLED_RAW() 10061 | VBOXVMM_INSTR_RDPMC_ENABLED_RAW() 10062 | VBOXVMM_INSTR_RDMSR_ENABLED_RAW() 10063 | VBOXVMM_INSTR_WRMSR_ENABLED_RAW() 10064 | VBOXVMM_INSTR_CRX_READ_ENABLED_RAW() 10065 | VBOXVMM_INSTR_CRX_WRITE_ENABLED_RAW() 10066 | VBOXVMM_INSTR_DRX_READ_ENABLED_RAW() 10067 | VBOXVMM_INSTR_DRX_WRITE_ENABLED_RAW() 10068 | VBOXVMM_INSTR_PAUSE_ENABLED_RAW() 10069 | VBOXVMM_INSTR_XSETBV_ENABLED_RAW() 10070 | VBOXVMM_INSTR_SIDT_ENABLED_RAW() 10071 | VBOXVMM_INSTR_LIDT_ENABLED_RAW() 10072 | VBOXVMM_INSTR_SGDT_ENABLED_RAW() 10073 | VBOXVMM_INSTR_LGDT_ENABLED_RAW() 10074 | VBOXVMM_INSTR_SLDT_ENABLED_RAW() 10075 | VBOXVMM_INSTR_LLDT_ENABLED_RAW() 10076 | VBOXVMM_INSTR_STR_ENABLED_RAW() 10077 | VBOXVMM_INSTR_LTR_ENABLED_RAW() 10078 | VBOXVMM_INSTR_GETSEC_ENABLED_RAW() 10079 | VBOXVMM_INSTR_RSM_ENABLED_RAW() 10080 | VBOXVMM_INSTR_RDRAND_ENABLED_RAW() 10081 | VBOXVMM_INSTR_RDSEED_ENABLED_RAW() 10082 | VBOXVMM_INSTR_XSAVES_ENABLED_RAW() 10083 | VBOXVMM_INSTR_XRSTORS_ENABLED_RAW() 10084 | VBOXVMM_INSTR_VMM_CALL_ENABLED_RAW() 10085 | VBOXVMM_INSTR_VMX_VMCLEAR_ENABLED_RAW() 10086 | VBOXVMM_INSTR_VMX_VMLAUNCH_ENABLED_RAW() 10087 | VBOXVMM_INSTR_VMX_VMPTRLD_ENABLED_RAW() 10088 | VBOXVMM_INSTR_VMX_VMPTRST_ENABLED_RAW() 10089 | VBOXVMM_INSTR_VMX_VMREAD_ENABLED_RAW() 10090 | VBOXVMM_INSTR_VMX_VMRESUME_ENABLED_RAW() 10091 | VBOXVMM_INSTR_VMX_VMWRITE_ENABLED_RAW() 10092 | VBOXVMM_INSTR_VMX_VMXOFF_ENABLED_RAW() 10093 | VBOXVMM_INSTR_VMX_VMXON_ENABLED_RAW() 10094 | VBOXVMM_INSTR_VMX_VMFUNC_ENABLED_RAW() 10095 | VBOXVMM_INSTR_VMX_INVEPT_ENABLED_RAW() 10096 | VBOXVMM_INSTR_VMX_INVVPID_ENABLED_RAW() 10097 | VBOXVMM_INSTR_VMX_INVPCID_ENABLED_RAW() 10098 ) != 0 10099 || ( VBOXVMM_EXIT_TASK_SWITCH_ENABLED_RAW() 9932 10100 | VBOXVMM_EXIT_HALT_ENABLED_RAW() 9933 10101 | VBOXVMM_EXIT_MWAIT_ENABLED_RAW()
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