- Timestamp:
- Oct 24, 2016 2:19:51 PM (8 years ago)
- Location:
- trunk
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pdmpcidev.h
r64387 r64390 170 170 #endif 171 171 }; 172 /** Pointer to the device instance which registered the device. 173 * @todo eliminate this one? */ 174 PPDMDEVINSR3 pDevIns; 172 /** Reserved. */ 173 RTR3PTR pvReserved; 175 174 /** @} */ 176 175 } PDMPCIDEV; -
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r64387 r64390 315 315 devclass = d->config[0x0a] | (d->config[0x0b] << 8); 316 316 if (devclass == 0x0101 && r->size == 4) { 317 int rc = PDMDevHlpIOPortDeregister(d-> pDevIns, r->addr + 2, 1);317 int rc = PDMDevHlpIOPortDeregister(d->Int.s.CTX_SUFF(pDevIns), r->addr + 2, 1); 318 318 AssertRC(rc); 319 319 } else { 320 int rc = PDMDevHlpIOPortDeregister(d-> pDevIns, r->addr, r->size);320 int rc = PDMDevHlpIOPortDeregister(d->Int.s.CTX_SUFF(pDevIns), r->addr, r->size); 321 321 AssertRC(rc); 322 322 } … … 324 324 RTGCPHYS GCPhysBase = r->addr; 325 325 int rc; 326 if (pBus->pPciHlpR3->pfnIsMMIOExBase(pBus->pDevInsR3, d-> pDevIns, GCPhysBase))326 if (pBus->pPciHlpR3->pfnIsMMIOExBase(pBus->pDevInsR3, d->Int.s.CTX_SUFF(pDevIns), GCPhysBase)) 327 327 { 328 328 /* unmap it. */ 329 329 rc = r->map_func(d->Int.s.pDevInsR3, d, i, NIL_RTGCPHYS, r->size, (PCIADDRESSSPACE)(r->type)); 330 330 AssertRC(rc); 331 rc = PDMDevHlpMMIOExUnmap(d-> pDevIns, d, i, GCPhysBase);331 rc = PDMDevHlpMMIOExUnmap(d->Int.s.CTX_SUFF(pDevIns), d, i, GCPhysBase); 332 332 } 333 333 else 334 rc = PDMDevHlpMMIODeregister(d-> pDevIns, GCPhysBase, r->size);334 rc = PDMDevHlpMMIODeregister(d->Int.s.CTX_SUFF(pDevIns), GCPhysBase, r->size); 335 335 AssertMsgRC(rc, ("rc=%Rrc d=%s i=%d GCPhysBase=%RGp size=%#x\n", rc, d->name, i, GCPhysBase, r->size)); 336 336 } … … 519 519 { 520 520 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite); 521 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice-> pDevIns, iBus, iDevice, config_addr, val, len);521 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), iBus, iDevice, config_addr, val, len); 522 522 } 523 523 #else … … 566 566 { 567 567 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigRead); 568 *pu32 = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice-> pDevIns, iBus, iDevice, config_addr, len);568 *pu32 = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), iBus, iDevice, config_addr, len); 569 569 } 570 570 #else … … 1458 1458 if (!s_aFields[i].fWritable) 1459 1459 LogRel(("PCI: %8s/%u: %2u-bit field %s: %x -> %x - !READ ONLY!\n", 1460 pDev->name, pDev-> pDevIns->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src));1460 pDev->name, pDev->Int.s.CTX_SUFF(pDevIns)->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src)); 1461 1461 else 1462 1462 LogRel(("PCI: %8s/%u: %2u-bit field %s: %x -> %x\n", 1463 pDev->name, pDev-> pDevIns->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src));1463 pDev->name, pDev->Int.s.CTX_SUFF(pDevIns)->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src)); 1464 1464 } 1465 1465 if (off == VBOX_PCI_COMMAND) … … 1480 1480 { 1481 1481 LogRel(("PCI: %8s/%u: register %02x: %02x -> %02x\n", 1482 pDev->name, pDev-> pDevIns->iInstance, off, pbDstConfig[off], pbSrcConfig[off])); /** @todo make this Log() later. */1482 pDev->name, pDev->Int.s.CTX_SUFF(pDevIns)->iInstance, off, pbDstConfig[off], pbSrcConfig[off])); /** @todo make this Log() later. */ 1483 1483 pbDstConfig[off] = pbSrcConfig[off]; 1484 1484 } … … 1940 1940 for (uint32_t iBridge = 0; iBridge < pBus->cBridges; iBridge++) 1941 1941 { 1942 PPCIBUS pBusSub = PDMINS_2_DATA(pBus->papBridgesR3[iBridge]-> pDevIns, PPCIBUS);1942 PPCIBUS pBusSub = PDMINS_2_DATA(pBus->papBridgesR3[iBridge]->Int.s.CTX_SUFF(pDevIns), PPCIBUS); 1943 1943 pciR3BusInfo(pBusSub, pHlp, iIndent + 1, fRegisters); 1944 1944 } … … 2262 2262 { 2263 2263 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite); 2264 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice-> pDevIns, iBus, iDevice, u32Address, u32Value, cb);2264 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), iBus, iDevice, u32Address, u32Value, cb); 2265 2265 } 2266 2266 } … … 2295 2295 { 2296 2296 AssertPtr( pBridgeDevice->Int.s.pfnBridgeConfigRead); 2297 u32Value = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice-> pDevIns, iBus, iDevice, u32Address, cb);2297 u32Value = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), iBus, iDevice, u32Address, cb); 2298 2298 } 2299 2299 } -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r64387 r64390 334 334 { 335 335 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite); 336 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice-> pDevIns, pAddr->iBus, pAddr->iDeviceFunc,336 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), pAddr->iBus, pAddr->iDeviceFunc, 337 337 pAddr->iRegister, val, cb); 338 338 } … … 447 447 { 448 448 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigRead); 449 *pu32 = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->pDevIns, pPciAddr->iBus, pPciAddr->iDeviceFunc, pPciAddr->iRegister, cb); 449 *pu32 = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), pPciAddr->iBus, 450 pPciAddr->iDeviceFunc, pPciAddr->iRegister, cb); 450 451 } 451 452 else … … 1144 1145 { 1145 1146 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite); 1146 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->pDevIns, iBus, iDevice, u32Address, u32Value, cb); 1147 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), iBus, iDevice, 1148 u32Address, u32Value, cb); 1147 1149 } 1148 1150 } … … 1173 1175 { 1174 1176 AssertPtr( pBridgeDevice->Int.s.pfnBridgeConfigRead); 1175 u32Value = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->pDevIns, iBus, iDevice, u32Address, cb); 1177 u32Value = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->Int.s.CTX_SUFF(pDevIns), iBus, iDevice, 1178 u32Address, cb); 1176 1179 } 1177 1180 else … … 1335 1338 if (!s_aFields[i].fWritable) 1336 1339 LogRel(("PCI: %8s/%u: %2u-bit field %s: %x -> %x - !READ ONLY!\n", 1337 pDev->name, pDev-> pDevIns->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src));1340 pDev->name, pDev->Int.s.CTX_SUFF(pDevIns)->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src)); 1338 1341 else 1339 1342 LogRel(("PCI: %8s/%u: %2u-bit field %s: %x -> %x\n", 1340 pDev->name, pDev-> pDevIns->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src));1343 pDev->name, pDev->Int.s.CTX_SUFF(pDevIns)->iInstance, cb*8, s_aFields[i].pszName, u32Dst, u32Src)); 1341 1344 } 1342 1345 if (off == VBOX_PCI_COMMAND) … … 1357 1360 { 1358 1361 LogRel(("PCI: %8s/%u: register %02x: %02x -> %02x\n", 1359 pDev->name, pDev-> pDevIns->iInstance, off, pbDstConfig[off], pbSrcConfig[off])); /** @todo make this Log() later. */1362 pDev->name, pDev->Int.s.CTX_SUFF(pDevIns)->iInstance, off, pbDstConfig[off], pbSrcConfig[off])); /** @todo make this Log() later. */ 1360 1363 pbDstConfig[off] = pbSrcConfig[off]; 1361 1364 } … … 1866 1869 break; 1867 1870 } 1868 pBus = PDMINS_2_DATA(pBridge-> pDevIns, PICH9PCIBUS);1871 pBus = PDMINS_2_DATA(pBridge->Int.s.CTX_SUFF(pDevIns), PICH9PCIBUS); 1869 1872 } 1870 1873 … … 1913 1916 AssertMsg(pBridge && pciDevIsPci2PciBridge(pBridge), 1914 1917 ("Device is not a PCI bridge but on the list of PCI bridges\n")); 1915 PICH9PCIBUS pChildBus = PDMINS_2_DATA(pBridge-> pDevIns, PICH9PCIBUS);1918 PICH9PCIBUS pChildBus = PDMINS_2_DATA(pBridge->Int.s.CTX_SUFF(pDevIns), PICH9PCIBUS); 1916 1919 pGlobals->uBus++; 1917 1920 ich9pciInitBridgeTopology(pGlobals, pChildBus, uBusSecondary, pGlobals->uBus); … … 1976 1979 { 1977 1980 LogRel(("PCI: %8s/%u: Read from extended register %d fallen back to generic code\n", 1978 pPciDev->name, pPciDev-> pDevIns->iInstance, u32Address));1981 pPciDev->name, pPciDev->Int.s.CTX_SUFF(pDevIns)->iInstance, u32Address)); 1979 1982 return 0; 1980 1983 } … … 2075 2078 { 2076 2079 LogRel(("PCI: %8s/%u: Write to extended register %d fallen back to generic code\n", 2077 pPciDev->name, pPciDev-> pDevIns->iInstance, u32Address));2080 pPciDev->name, pPciDev->Int.s.CTX_SUFF(pDevIns)->iInstance, u32Address)); 2078 2081 return; 2079 2082 } … … 2352 2355 for (uint32_t iBridge = 0; iBridge < pBus->cBridges; iBridge++) 2353 2356 { 2354 PICH9PCIBUS pBusSub = PDMINS_2_DATA(pBus->papBridgesR3[iBridge]-> pDevIns, PICH9PCIBUS);2357 PICH9PCIBUS pBusSub = PDMINS_2_DATA(pBus->papBridgesR3[iBridge]->Int.s.CTX_SUFF(pDevIns), PICH9PCIBUS); 2355 2358 ich9pciBusInfo(pBusSub, pHlp, iIndent + 1, fRegisters); 2356 2359 } … … 2639 2642 { 2640 2643 if (pBus->papBridgesR3[iBridge]) 2641 ich9pcibridgeReset(pBus->papBridgesR3[iBridge]-> pDevIns);2644 ich9pcibridgeReset(pBus->papBridgesR3[iBridge]->Int.s.CTX_SUFF(pDevIns)); 2642 2645 } 2643 2646 -
trunk/src/VBox/Devices/Bus/MsixCommon.cpp
r64387 r64390 200 200 if (!pciDevIsPassthrough(pDev)) 201 201 { 202 rc = PDMDevHlpPCIIORegionRegister(pDev-> pDevIns, iBar, 0x1000, PCI_ADDRESS_SPACE_MEM, msixMap);202 rc = PDMDevHlpPCIIORegionRegister(pDev->Int.s.CTX_SUFF(pDevIns), iBar, 0x1000, PCI_ADDRESS_SPACE_MEM, msixMap); 203 203 if (RT_FAILURE (rc)) 204 204 return rc; … … 207 207 pDev->Int.s.u8MsixCapOffset = iCapOffset; 208 208 pDev->Int.s.u8MsixCapSize = VBOX_MSIX_CAP_SIZE; 209 PVM pVM = PDMDevHlpGetVM(pDev-> pDevIns);209 PVM pVM = PDMDevHlpGetVM(pDev->Int.s.CTX_SUFF(pDevIns)); 210 210 211 211 pDev->Int.s.pMsixPageR3 = NULL; -
trunk/src/VBox/Devices/Network/DevE1000.cpp
r64387 r64390 6107 6107 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType) 6108 6108 { 6109 RT_NOREF( iRegion);6110 PE1KSTATE pThis = PDMINS_2_DATA(p PciDev->pDevIns, E1KSTATE*);6109 RT_NOREF(pPciDev, iRegion); 6110 PE1KSTATE pThis = PDMINS_2_DATA(pDevIns, E1KSTATE *); 6111 6111 int rc; 6112 6112 -
trunk/src/VBox/Devices/Network/DevVirtioNet.cpp
r64387 r64390 1781 1781 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType) 1782 1782 { 1783 RT_NOREF( iRegion);1784 PVNETSTATE pThis = PDMINS_2_DATA(p PciDev->pDevIns, PVNETSTATE);1783 RT_NOREF(pPciDev, iRegion); 1784 PVNETSTATE pThis = PDMINS_2_DATA(pDevIns, PVNETSTATE); 1785 1785 int rc; 1786 1786 -
trunk/src/VBox/Devices/testcase/tstDeviceStructSizeRC.cpp
r64387 r64390 154 154 GEN_CHECK_OFF(PDMPCIDEV, devfn); 155 155 GEN_CHECK_OFF(PDMPCIDEV, name); 156 GEN_CHECK_OFF(PDMPCIDEV, p DevIns);156 GEN_CHECK_OFF(PDMPCIDEV, pvReserved); 157 157 GEN_CHECK_OFF(PDMPCIDEV, Int); 158 158 GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions); -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r64387 r64390 1401 1401 1402 1402 /* Set some of the public members too. */ 1403 pPciDev->pDevIns = pDevIns;1404 1403 pPciDev->pszNameR3 = pszName; 1405 1404
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