Changeset 66334 in vbox
- Timestamp:
- Mar 29, 2017 2:26:23 PM (8 years ago)
- Location:
- trunk
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/disopcode.h
r66331 r66334 690 690 OP_PAVGUSB, 691 691 OP_PFNACC, 692 /** @} */ 692 693 OP_ROL, 693 694 OP_ROR, … … 734 735 OP_MOV_TR, 735 736 OP_SWAPGS, 736 /** @} */ 737 OP_UD1, 738 OP_UD2, 737 739 /** @name VT-x instructions 738 * @{ */740 * @{ */ 739 741 OP_VMREAD, 740 742 OP_VMWRITE, -
trunk/src/VBox/VMM/Makefile.kmk
r66125 r66334 357 357 $(QUIET)$(MKDIR) -p -- "$(dir $@)" 358 358 $(QUIET)$(SED) \ 359 -e '/IEMOP_MNEMONIC [01234]*(/!d' \360 -e 's/^.*IEMOP_MNEMONIC\( [01234]*\)(/IEM_DO_INSTR_STAT\1(/' \359 -e '/IEMOP_MNEMONIC\(\|[01234]\|[01234]EX\)(/!d' \ 360 -e 's/^.*IEMOP_MNEMONIC\(\|[01234]\|[01234]EX\)(/IEM_DO_INSTR_STAT\1(/' \ 361 361 -e 's/;.*$(DOLLAR)//' \ 362 362 --output "[email protected]" $(filter %.cpp.h,$^) … … 384 384 '#undef IEM_DO_INSTR_STAT3' \ 385 385 '#undef IEM_DO_INSTR_STAT4' \ 386 '#undef IEM_DO_INSTR_STAT0EX' \ 387 '#undef IEM_DO_INSTR_STAT1EX' \ 388 '#undef IEM_DO_INSTR_STAT2EX' \ 389 '#undef IEM_DO_INSTR_STAT3EX' \ 390 '#undef IEM_DO_INSTR_STAT4EX' \ 386 391 '' 387 392 $(QUIET)$(RM) -f -- "[email protected]" "[email protected]" 388 393 $(QUIET)$(CP) -v -f --changed -- "$@" "$(patsubst %.ts,%,$@)" 389 394 395 foobar: $$(VBoxVMM_0_OUTDIR)/CommonGenIncs/IEMInstructionStatisticsTmpl.h 390 396 391 397 if "$(KBUILD_TARGET)" == "win" && !defined(VBOX_ONLY_EXTPACKS_USE_IMPLIBS) -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r66331 r66334 448 448 'byte': [ 256, ], ##< next opcode byte selects the instruction (default). 449 449 '/r': [ 8, ], ##< modrm.reg selects the instruction. 450 'memreg /r':[ 16, ], ##< modrm.reg and (modrm.mod == 3) selects the instruction. 450 451 'mod /r': [ 32, ], ##< modrm.reg and modrm.mod selects the instruction. 451 452 '!11 /r': [ 8, ], ##< modrm.reg selects the instruction with modrm.mod != 0y11. … … 494 495 if self.sSelector == 'mod /r': 495 496 return (bOpcode >> 3) & 0x1f; 497 498 if self.sSelector == 'memreg /r': 499 return ((bOpcode >> 3) & 0x7) | (int((bOpcode >> 6) == 3) << 3); 496 500 497 501 if self.sSelector == '!11 /r': … … 1207 1211 'grp13': InstructionMap('grp13', asLeadOpcodes = ['0x0f', '0x72',], sSelector = 'mod /r'), 1208 1212 'grp14': InstructionMap('grp14', asLeadOpcodes = ['0x0f', '0x73',], sSelector = 'mod /r'), 1209 'grp15': InstructionMap('grp15', asLeadOpcodes = ['0x0f', '0xae',], sSelector = 'm od/r'),1213 'grp15': InstructionMap('grp15', asLeadOpcodes = ['0x0f', '0xae',], sSelector = 'memreg /r'), 1210 1214 'grp16': InstructionMap('grp16', asLeadOpcodes = ['0x0f', '0x18',], sSelector = 'mod /r'), 1211 1215 'grpA17': InstructionMap('grpA17', asLeadOpcodes = ['0x0f', '0x78',], sSelector = '/r'), # AMD: EXTRQ weirdness -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r66332 r66334 6555 6555 6556 6556 6557 /** Opcode 0x0f 0xb9. */ 6557 /** 6558 * @opcode 0xb9 6559 * @opinvalid intel-modrm 6560 * @optest op1=1 op2=2 -> 6561 * @oponlytest 6562 */ 6558 6563 FNIEMOP_DEF(iemOp_Grp10) 6559 6564 { 6560 Log(("iemOp_Grp10 -> #UD\n")); 6561 return IEMOP_RAISE_INVALID_OPCODE(); 6565 /* 6566 * AMD does not decode beyond the 0xb9 whereas intel does the modr/m bit 6567 * too. See bs3-cpu-decoder-1.c32. So, we can forward to iemOp_InvalidNeedRM. 6568 */ 6569 /** @todo fix bs3-cpu-generated-1 to deal with this on AMD! */ 6570 Log(("iemOp_Grp10 aka UD1 -> #UD\n")); 6571 IEMOP_MNEMONIC2EX(ud1, "ud1", RM, UD1, ud1, Gb, Eb, DISOPTYPE_INVALID, IEMOPHINT_IGNORES_OP_SIZE); /* just picked Gb,Eb here. */ 6572 return FNIEMOP_CALL(iemOp_InvalidNeedRM); 6562 6573 } 6563 6574 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-decoding-1.c32
r66331 r66334 355 355 356 356 #define UD_T_EXACT 0 357 #define UD_T_NOAMD 0x80 /**< AMD does not decode unnecessary bytes, Intel does. */ 357 358 #define UD_T_MODRM 1 358 359 #define UD_T_MODRM_I8 2 … … 397 398 CPUDECODE1UDTST const g_aUdTest2Byte_0f[] = 398 399 { 399 #if 1400 #if 0 400 401 { UD_T_EXACT, 2, { 0x0f, 0x04 }, UD_F_ANY_PFX }, 401 402 { UD_T_EXACT, 2, { 0x0f, 0x0a }, UD_F_ANY_PFX }, … … 508 509 { UD_T_MODRM_RR7, 2, { 0x0f, 0xae }, UD_F_NOT_NO_PFX }, /* 00=sfence */ 509 510 { UD_T_MODRM, 2, { 0x0f, 0xb8 }, UD_F_NOT_RN_PFX }, 511 #endif 512 { UD_T_MODRM | UD_T_NOAMD, 2, { 0x0f, 0xb9 }, UD_F_ANY_PFX }, /* UD1 */ 513 #if 0 510 514 /** @todo f3 0f bb rm and f2 0f bb rm does stuff on skylake even if their are blank in intel and AMD tables! */ 511 515 //{ UD_T_MODRM, 2, { 0x0f, 0xbb }, UD_F_NOT_NO_PFX | UD_F_NOT_OZ_PFX }, … … 843 847 void DecodeUdEdgeTest(PCCPUDECODE1UDTST paTests, unsigned cTests) 844 848 { 849 uint8_t BS3_FAR *pbPages; 850 851 /* 852 * Detect AMD. 853 */ 854 bool fIsAmd = false; 855 if (g_uBs3CpuDetected & BS3CPU_F_CPUID) 856 fIsAmd = ASMIsAmdCpu(); 857 Bs3TestPrintf("fIsAmd=%d\n", fIsAmd); 858 845 859 /* 846 860 * Allocate and initialize a page pair 847 861 */ 848 uint8_t BS3_FAR *pbPages;849 862 pbPages = Bs3MemGuardedTestPageAlloc(BS3MEMKIND_FLAT32); 850 863 if (pbPages) … … 1024 1037 { 1025 1038 case UD_T_EXACT: 1039 l_case_exact: 1026 1040 cSuffixes = RT_ELEMENTS(s_aExact); 1027 1041 paSuffixes = s_aExact; 1028 1042 break; 1043 case UD_T_MODRM | UD_T_NOAMD: 1044 if (fIsAmd) 1045 goto l_case_exact; 1029 1046 case UD_T_MODRM: 1030 1047 cSuffixes = RT_ELEMENTS(s_aModRm); … … 1557 1574 Bs3TestPrintf("g_uBs3CpuDetected=%#x\n", g_uBs3CpuDetected); 1558 1575 1576 #if 1 1559 1577 Bs3TestSub("CMPPS, CMPPD, CMPSS, CMPSD"); 1560 1578 DecodeCmppsCmppdCmpssCmpsd(); … … 1562 1580 Bs3TestSub("MOVBE vs CRC32"); 1563 1581 DecodeMovbeVsCrc32(); 1582 #endif 1564 1583 1565 1584 #if 1 … … 1572 1591 #endif 1573 1592 1574 #if 01593 #if 1 1575 1594 Bs3TestSub("misc"); 1576 1595 DecodeEdgeTest(); -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py
r66313 r66334 313 313 if oInstr.fUnused: 314 314 self.asFlags.append('BS3CG1INSTR_F_UNUSED'); 315 elif oInstr.fInvalid: 316 self.asFlags.append('BS3CG1INSTR_F_INVALID'); 315 317 316 318 self.fAdvanceMnemonic = True; ##< Set by the caller. -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66331 r66334 3128 3128 */ 3129 3129 if ( !Bs3Cg1CpuSetupFirst(pThis) 3130 || (pThis->fFlags & BS3CG1INSTR_F_UNUSED))3130 || (pThis->fFlags & (BS3CG1INSTR_F_UNUSED | BS3CG1INSTR_F_INVALID))) 3131 3131 { 3132 3132 fInvalidInstr = true; … … 3250 3250 if (!Bs3Cg1CpuSetupNext(pThis, iCpuSetup, &fInvalidInstr)) 3251 3251 break; 3252 if (pThis->fFlags & BS3CG1INSTR_F_UNUSED)3252 if (pThis->fFlags & (BS3CG1INSTR_F_UNUSED | BS3CG1INSTR_F_INVALID)) 3253 3253 fInvalidInstr = true; 3254 3254 if (fInvalidInstr) -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66331 r66334 242 242 /** Unused instruction. */ 243 243 #define BS3CG1INSTR_F_UNUSED UINT32_C(0x00000004) 244 /** Invalid instruction. */ 245 #define BS3CG1INSTR_F_INVALID UINT32_C(0x00000008) 244 246 /** @} */ 245 247 -
trunk/src/VBox/ValidationKit/bootsectors/bs3kit/Makefile.kmk
r66240 r66334 200 200 ../../../Runtime/common/asm/ASMSerializeInstruction-rdtscp.asm \ 201 201 ../../../Runtime/common/asm/ASMCpuIdExSlow.asm \ 202 ../../../Runtime/common/asm/ASMCpuId.asm \ 202 203 ../../../Runtime/common/asm/ASMGetXcr0.asm \ 203 204 ../../../Runtime/common/asm/ASMSetXcr0.asm \
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