Changeset 66886 in vbox for trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
- Timestamp:
- May 15, 2017 9:20:40 AM (8 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66815 r66886 42 42 * Defined Constants And Macros * 43 43 *********************************************************************************************************************************/ 44 #define BS3CG1_WITH_VEX 45 44 46 #define P_CS X86_OP_PRF_CS 45 47 #define P_SS X86_OP_PRF_SS … … 92 94 BS3CG1OPLOC_INVALID = 0, 93 95 BS3CG1OPLOC_CTX, 96 BS3CG1OPLOC_CTX_ZX_VLMAX, 94 97 BS3CG1OPLOC_IMM, 95 98 BS3CG1OPLOC_MEM, … … 1116 1119 1117 1120 1118 /**1119 * Inserts a 2-byte VEX prefix.1120 *1121 * @returns New offDst value.1122 * @param pThis The state.1123 * @param offDst The current instruction offset.1124 * @param uVexL The VEX.L value.1125 * @param uVexV The VEX.V value (caller inverted it already).1126 * @param uVexR The VEX.R value (caller inverted it already).1127 */1128 DECLINLINE(unsigned) BS3_NEAR_CODE Bs3Cg1InsertVex2bPrefix(PBS3CG1STATE pThis, unsigned offDst,1129 uint8_t uVexV, uint8_t uVexL, uint8_t uVexR)1130 {1131 uint8_t b = uVexR << 7;1132 b |= uVexV << 3;1133 b |= uVexL << 2;1134 switch (pThis->enmPrefixKind)1135 {1136 case BS3CG1PFXKIND_NO_F2_F3_66: b |= 0; break;1137 case BS3CG1PFXKIND_REQ_66: b |= 1; break;1138 case BS3CG1PFXKIND_REQ_F3: b |= 2; break;1139 case BS3CG1PFXKIND_REQ_F2: b |= 3; break;1140 default:1141 Bs3TestFailedF("enmPrefixKind=%d not supported for VEX!\n");1142 break;1143 }1144 1145 pThis->abCurInstr[offDst] = 0xc5; /* vex2 */1146 pThis->abCurInstr[offDst + 1] = b;1147 return offDst + 2;1148 }1149 1150 1151 /**1152 * Inserts a 3-byte VEX prefix.1153 *1154 * @returns New offDst value.1155 * @param pThis The state.1156 * @param offDst The current instruction offset.1157 * @param uVexL The VEX.L value.1158 * @param uVexV The VEX.V value (caller inverted it already).1159 * @param uVexR The VEX.R value (caller inverted it already).1160 * @param uVexR The VEX.X value (caller inverted it already).1161 * @param uVexR The VEX.B value (caller inverted it already).1162 * @param uVexR The VEX.W value (straight).1163 */1164 DECLINLINE(unsigned) BS3_NEAR_CODE Bs3Cg1InsertVex3bPrefix(PBS3CG1STATE pThis, unsigned offDst, uint8_t uVexV, uint8_t uVexL,1165 uint8_t uVexR, uint8_t uVexX, uint8_t uVexB, uint8_t uVexW)1166 {1167 uint8_t b1;1168 uint8_t b2;1169 b1 = uVexR << 7;1170 b1 |= uVexX << 6;1171 b1 |= uVexB << 5;1172 b1 |= 1; /* VEX.mmmmm = 1*/ /** @todo three byte opcode tables */1173 b2 = uVexV << 3;1174 b2 |= uVexW << 7;1175 b2 |= uVexL << 2;1176 switch (pThis->enmPrefixKind)1177 {1178 case BS3CG1PFXKIND_NO_F2_F3_66: b2 |= 0; break;1179 case BS3CG1PFXKIND_REQ_66: b2 |= 1; break;1180 case BS3CG1PFXKIND_REQ_F3: b2 |= 2; break;1181 case BS3CG1PFXKIND_REQ_F2: b2 |= 3; break;1182 default:1183 Bs3TestFailedF("enmPrefixKind=%d not supported for VEX!\n", pThis->enmPrefixKind);1184 break;1185 }1186 1187 pThis->abCurInstr[offDst] = 0xc4; /* vex3 */1188 pThis->abCurInstr[offDst + 1] = b1;1189 pThis->abCurInstr[offDst + 2] = b2;1190 return offDst + 3;1191 }1192 1193 1194 1121 DECLINLINE(unsigned) BS3_NEAR_CODE Bs3Cg1InsertReqPrefix(PBS3CG1STATE pThis, unsigned offDst) 1195 1122 { … … 1326 1253 1327 1254 1328 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Eb_Gb(PBS3CG1STATE pThis, unsigned iEncoding)1255 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Eb_Gb(PBS3CG1STATE pThis, unsigned iEncoding) 1329 1256 { 1330 1257 unsigned off; … … 1357 1284 1358 1285 1359 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Gb_Eb(PBS3CG1STATE pThis, unsigned iEncoding)1286 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Gb_Eb(PBS3CG1STATE pThis, unsigned iEncoding) 1360 1287 { 1361 1288 unsigned off; … … 1388 1315 1389 1316 1390 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Gv_Ev__OR__BS3CG1ENC_MODRM_Ev_Gv(PBS3CG1STATE pThis,1317 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Gv_Ev__OR__MODRM_Ev_Gv(PBS3CG1STATE pThis, 1391 1318 unsigned iEncoding) 1392 1319 { … … 1468 1395 1469 1396 1470 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Wss_WO_Vss(PBS3CG1STATE pThis, unsigned iEncoding)1397 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Wss_WO_Vss(PBS3CG1STATE pThis, unsigned iEncoding) 1471 1398 { 1472 1399 unsigned off; … … 1497 1424 1498 1425 1499 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Wsd_WO_Vsd(PBS3CG1STATE pThis, unsigned iEncoding)1426 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Wsd_WO_Vsd(PBS3CG1STATE pThis, unsigned iEncoding) 1500 1427 { 1501 1428 unsigned off; … … 1526 1453 1527 1454 1528 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Wps_WO_Vps__OR__BS3CG1ENC_MODRM_Wpd_WO_Vpd(PBS3CG1STATE pThis, unsigned iEncoding)1455 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Wps_WO_Vps__OR__MODRM_Wpd_WO_Vpd(PBS3CG1STATE pThis, unsigned iEncoding) 1529 1456 { 1530 1457 unsigned off; … … 1557 1484 1558 1485 1559 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_WqZxReg_WO_Vq(PBS3CG1STATE pThis, unsigned iEncoding)1486 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_WqZxReg_WO_Vq(PBS3CG1STATE pThis, unsigned iEncoding) 1560 1487 { 1561 1488 unsigned off; … … 1586 1513 1587 1514 1588 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Pq_WO_Uq(PBS3CG1STATE pThis, unsigned iEncoding)1515 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Pq_WO_Uq(PBS3CG1STATE pThis, unsigned iEncoding) 1589 1516 { 1590 1517 unsigned off; … … 1610 1537 1611 1538 1612 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vq_WO_UqHi(PBS3CG1STATE pThis, unsigned iEncoding)1539 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Vq_WO_UqHi(PBS3CG1STATE pThis, unsigned iEncoding) 1613 1540 { 1614 1541 unsigned off; … … 1634 1561 1635 1562 1636 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vq_WO_Mq(PBS3CG1STATE pThis, unsigned iEncoding)1563 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Vq_WO_Mq(PBS3CG1STATE pThis, unsigned iEncoding) 1637 1564 { 1638 1565 unsigned off; … … 1656 1583 1657 1584 1658 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VqHi_WO_Uq(PBS3CG1STATE pThis, unsigned iEncoding)1585 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_VqHi_WO_Uq(PBS3CG1STATE pThis, unsigned iEncoding) 1659 1586 { 1660 1587 unsigned off; … … 1680 1607 1681 1608 1682 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VqHi_WO_Mq(PBS3CG1STATE pThis, unsigned iEncoding)1609 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_VqHi_WO_Mq(PBS3CG1STATE pThis, unsigned iEncoding) 1683 1610 { 1684 1611 unsigned off; … … 1702 1629 1703 1630 1704 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vdq_WO_Wdq(PBS3CG1STATE pThis, unsigned iEncoding)1631 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Vdq_WO_Wdq(PBS3CG1STATE pThis, unsigned iEncoding) 1705 1632 { 1706 1633 unsigned off; … … 1733 1660 1734 1661 1735 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vps_WO_Wps__OR__BS3CG1ENC_MODRM_Vpd_WO_Wpd(PBS3CG1STATE pThis,1736 unsigned iEncoding)1662 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Vps_WO_Wps__OR__MODRM_Vpd_WO_Wpd(PBS3CG1STATE pThis, 1663 unsigned iEncoding) 1737 1664 { 1738 1665 unsigned off; … … 1765 1692 1766 1693 1767 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VssZx_WO_Wss(PBS3CG1STATE pThis, unsigned iEncoding)1694 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_VssZx_WO_Wss(PBS3CG1STATE pThis, unsigned iEncoding) 1768 1695 { 1769 1696 unsigned off; … … 1794 1721 1795 1722 1796 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VsdZx_WO_Wsd__OR__MODRM_VqZx_WO_Wq(PBS3CG1STATE pThis,1723 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_VsdZx_WO_Wsd__OR__MODRM_VqZx_WO_Wq(PBS3CG1STATE pThis, 1797 1724 unsigned iEncoding) 1798 1725 { … … 1824 1751 1825 1752 1826 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VqZx_WO_Nq(PBS3CG1STATE pThis, unsigned iEncoding)1753 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_VqZx_WO_Nq(PBS3CG1STATE pThis, unsigned iEncoding) 1827 1754 { 1828 1755 unsigned off; … … 1848 1775 1849 1776 1850 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Gv_RO_Ma(PBS3CG1STATE pThis, unsigned iEncoding)1777 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Gv_RO_Ma(PBS3CG1STATE pThis, unsigned iEncoding) 1851 1778 { 1852 1779 unsigned off; … … 1891 1818 1892 1819 1893 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Mb_RO(PBS3CG1STATE pThis, unsigned iEncoding)1820 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Mb_RO(PBS3CG1STATE pThis, unsigned iEncoding) 1894 1821 { 1895 1822 unsigned off; … … 1908 1835 1909 1836 1910 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Md_RO(PBS3CG1STATE pThis, unsigned iEncoding)1837 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Md_RO(PBS3CG1STATE pThis, unsigned iEncoding) 1911 1838 { 1912 1839 unsigned off; … … 1925 1852 1926 1853 1927 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Md_WO(PBS3CG1STATE pThis, unsigned iEncoding)1854 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Md_WO(PBS3CG1STATE pThis, unsigned iEncoding) 1928 1855 { 1929 1856 unsigned off; … … 1942 1869 1943 1870 1944 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_VEX_MODRM_Md_WO(PBS3CG1STATE pThis, unsigned iEncoding)1871 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Mq_WO_Vq(PBS3CG1STATE pThis, unsigned iEncoding) 1945 1872 { 1946 1873 unsigned off; 1947 1874 if (iEncoding == 0) 1948 1875 { 1949 /** @todo three by opcode needs some tweaking. */ 1950 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 1951 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 1952 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1953 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 1954 4, 0, BS3CG1OPLOC_MEM_WO); 1876 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2_LO; 1877 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1878 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 8, 0, BS3CG1OPLOC_MEM_WO); 1955 1879 } 1956 1880 else if (iEncoding == 1) 1957 1881 { 1958 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 1959 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 1960 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1961 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 1962 4, 0, BS3CG1OPLOC_MEM_WO); 1963 } 1964 else if (iEncoding == 2) 1965 { 1966 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0x7 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 1967 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 1968 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1969 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 1970 4, 0, BS3CG1OPLOC_MEM_WO); 1971 pThis->fInvalidEncoding = true; 1972 } 1973 else if (iEncoding == 3) 1974 { 1975 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 1976 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 1977 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1978 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 1979 4, 0, BS3CG1OPLOC_MEM_WO); 1980 pThis->fInvalidEncoding = true; 1981 } 1982 else if (iEncoding == 4) 1983 { 1984 pThis->abCurInstr[0] = P_OZ; 1985 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 1986 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 1987 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1988 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 1989 4, 0, BS3CG1OPLOC_MEM_WO); 1990 pThis->fInvalidEncoding = true; 1991 } 1992 else if (iEncoding == 5) 1993 { 1994 pThis->abCurInstr[0] = P_RZ; 1995 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 1996 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 1997 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1998 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 1999 4, 0, BS3CG1OPLOC_MEM_WO); 2000 pThis->fInvalidEncoding = true; 2001 } 2002 else if (iEncoding == 6) 2003 { 2004 pThis->abCurInstr[0] = P_RN; 2005 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2006 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2007 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2008 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2009 4, 0, BS3CG1OPLOC_MEM_WO); 2010 pThis->fInvalidEncoding = true; 2011 } 2012 else if (iEncoding == 7) 2013 { 2014 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/); 2015 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2016 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2017 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2018 4, 0, BS3CG1OPLOC_MEM_WO); 2019 } 2020 #if ARCH_BITS == 64 2021 else if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2022 { 2023 if (iEncoding == 8) 2024 { 2025 pThis->abCurInstr[0] = REX_____; 2026 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2027 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2028 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2029 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2030 4, 0, BS3CG1OPLOC_MEM_WO); 2031 pThis->fInvalidEncoding = true; 2032 } 2033 else 2034 return 0; 2035 } 2036 #endif 1882 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO; 1883 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1884 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO); 1885 } 2037 1886 else 2038 1887 return 0; … … 2042 1891 2043 1892 2044 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Mq_WO_Vq(PBS3CG1STATE pThis, unsigned iEncoding)1893 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Mq_WO_VqHi(PBS3CG1STATE pThis, unsigned iEncoding) 2045 1894 { 2046 1895 unsigned off; 2047 1896 if (iEncoding == 0) 2048 1897 { 2049 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2_ LO;1898 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2_HI; 2050 1899 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2051 1900 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 8, 0, BS3CG1OPLOC_MEM_WO); … … 2053 1902 else if (iEncoding == 1) 2054 1903 { 2055 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_ LO;1904 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_HI; 2056 1905 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2057 1906 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO); … … 2064 1913 2065 1914 2066 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Mq_WO_VqHi(PBS3CG1STATE pThis, unsigned iEncoding) 2067 { 2068 unsigned off; 2069 if (iEncoding == 0) 2070 { 2071 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2_HI; 2072 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2073 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 8, 0, BS3CG1OPLOC_MEM_WO); 2074 } 2075 else if (iEncoding == 1) 2076 { 2077 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_HI; 2078 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2079 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO); 2080 } 2081 else 2082 return 0; 2083 pThis->cbCurInstr = off; 2084 return iEncoding + 1; 2085 } 2086 2087 2088 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_BS3CG1ENC_FIXED(PBS3CG1STATE pThis, unsigned iEncoding) 1915 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_FIXED(PBS3CG1STATE pThis, unsigned iEncoding) 2089 1916 { 2090 1917 unsigned off; … … 2101 1928 2102 1929 2103 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_FIXED_AL_Ib(PBS3CG1STATE pThis, unsigned iEncoding)1930 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_FIXED_AL_Ib(PBS3CG1STATE pThis, unsigned iEncoding) 2104 1931 { 2105 1932 unsigned off; … … 2117 1944 2118 1945 2119 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_FIXED_rAX_Iz(PBS3CG1STATE pThis, unsigned iEncoding)1946 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_FIXED_rAX_Iz(PBS3CG1STATE pThis, unsigned iEncoding) 2120 1947 { 2121 1948 unsigned off; … … 2182 2009 2183 2010 2184 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_MOD_EQ_3(PBS3CG1STATE pThis, unsigned iEncoding)2011 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_MOD_EQ_3(PBS3CG1STATE pThis, unsigned iEncoding) 2185 2012 { 2186 2013 unsigned off; … … 2205 2032 2206 2033 2207 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_MOD_NE_3(PBS3CG1STATE pThis, unsigned iEncoding)2034 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_MOD_NE_3(PBS3CG1STATE pThis, unsigned iEncoding) 2208 2035 { 2209 2036 unsigned off; … … 2232 2059 2233 2060 2061 /* 2062 * 2063 * VEX 2064 * VEX 2065 * VEX 2066 * 2067 */ 2068 #ifdef BS3CG1_WITH_VEX 2069 2070 /** 2071 * Inserts a 2-byte VEX prefix. 2072 * 2073 * @returns New offDst value. 2074 * @param pThis The state. 2075 * @param offDst The current instruction offset. 2076 * @param uVexL The VEX.L value. 2077 * @param uVexV The VEX.V value (caller inverted it already). 2078 * @param uVexR The VEX.R value (caller inverted it already). 2079 */ 2080 DECLINLINE(unsigned) BS3_NEAR_CODE Bs3Cg1InsertVex2bPrefix(PBS3CG1STATE pThis, unsigned offDst, 2081 uint8_t uVexV, uint8_t uVexL, uint8_t uVexR) 2082 { 2083 uint8_t b = uVexR << 7; 2084 b |= uVexV << 3; 2085 b |= uVexL << 2; 2086 switch (pThis->enmPrefixKind) 2087 { 2088 case BS3CG1PFXKIND_NO_F2_F3_66: b |= 0; break; 2089 case BS3CG1PFXKIND_REQ_66: b |= 1; break; 2090 case BS3CG1PFXKIND_REQ_F3: b |= 2; break; 2091 case BS3CG1PFXKIND_REQ_F2: b |= 3; break; 2092 default: 2093 Bs3TestFailedF("enmPrefixKind=%d not supported for VEX!\n"); 2094 break; 2095 } 2096 2097 pThis->abCurInstr[offDst] = 0xc5; /* vex2 */ 2098 pThis->abCurInstr[offDst + 1] = b; 2099 return offDst + 2; 2100 } 2101 2102 2103 /** 2104 * Inserts a 3-byte VEX prefix. 2105 * 2106 * @returns New offDst value. 2107 * @param pThis The state. 2108 * @param offDst The current instruction offset. 2109 * @param uVexL The VEX.L value. 2110 * @param uVexV The VEX.V value (caller inverted it already). 2111 * @param uVexR The VEX.R value (caller inverted it already). 2112 * @param uVexR The VEX.X value (caller inverted it already). 2113 * @param uVexR The VEX.B value (caller inverted it already). 2114 * @param uVexR The VEX.W value (straight). 2115 */ 2116 DECLINLINE(unsigned) BS3_NEAR_CODE Bs3Cg1InsertVex3bPrefix(PBS3CG1STATE pThis, unsigned offDst, uint8_t uVexV, uint8_t uVexL, 2117 uint8_t uVexR, uint8_t uVexX, uint8_t uVexB, uint8_t uVexW) 2118 { 2119 uint8_t b1; 2120 uint8_t b2; 2121 b1 = uVexR << 7; 2122 b1 |= uVexX << 6; 2123 b1 |= uVexB << 5; 2124 b1 |= 1; /* VEX.mmmmm = 1*/ /** @todo three byte opcode tables */ 2125 b2 = uVexV << 3; 2126 b2 |= uVexW << 7; 2127 b2 |= uVexL << 2; 2128 switch (pThis->enmPrefixKind) 2129 { 2130 case BS3CG1PFXKIND_NO_F2_F3_66: b2 |= 0; break; 2131 case BS3CG1PFXKIND_REQ_66: b2 |= 1; break; 2132 case BS3CG1PFXKIND_REQ_F3: b2 |= 2; break; 2133 case BS3CG1PFXKIND_REQ_F2: b2 |= 3; break; 2134 default: 2135 Bs3TestFailedF("enmPrefixKind=%d not supported for VEX!\n", pThis->enmPrefixKind); 2136 break; 2137 } 2138 2139 pThis->abCurInstr[offDst] = 0xc4; /* vex3 */ 2140 pThis->abCurInstr[offDst + 1] = b1; 2141 pThis->abCurInstr[offDst + 2] = b2; 2142 return offDst + 3; 2143 } 2144 2145 2146 static unsigned Bs3Cg1EncodeNext_VEX_MODRM_Vps_WO_Wps(PBS3CG1STATE pThis, unsigned iEncoding) 2147 { 2148 unsigned off; 2149 /* 128-bit wide stuff goes first, then we'll update the operand widths afterwards. */ 2150 if (iEncoding == 0) 2151 { 2152 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2153 off = Bs3Cg1InsertOpcodes(pThis, off); 2154 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 2155 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_XMM0; 2156 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM1; 2157 } 2158 else if (iEncoding == 1) 2159 { 2160 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2161 off = Bs3Cg1InsertOpcodes(pThis, off); 2162 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2163 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_XMM5; 2164 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM4; 2165 } 2166 else if (iEncoding == 2) 2167 { 2168 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored*/); 2169 off = Bs3Cg1InsertOpcodes(pThis, off); 2170 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 5, 4); 2171 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_XMM4; 2172 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM5; 2173 } 2174 else if (iEncoding == 3) 2175 { 2176 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2177 off = Bs3Cg1InsertOpcodes(pThis, off); 2178 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 16, 0, BS3CG1OPLOC_MEM); 2179 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2; 2180 } 2181 else if (iEncoding == 4) 2182 { 2183 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2184 off = Bs3Cg1InsertOpcodes(pThis, off); 2185 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 0, BS3CG1OPLOC_MEM); 2186 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 2187 } 2188 else if (iEncoding == 5) 2189 { 2190 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored */); 2191 off = Bs3Cg1InsertOpcodes(pThis, off); 2192 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 0, BS3CG1OPLOC_MEM); 2193 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 2194 } 2195 else if (iEncoding == 6) 2196 { 2197 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2198 off = Bs3Cg1InsertOpcodes(pThis, off); 2199 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM); 2200 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 2201 pThis->bAlignmentXcpt = X86_XCPT_GP; 2202 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 2203 } 2204 else if (iEncoding == 7) 2205 { 2206 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2207 off = Bs3Cg1InsertOpcodes(pThis, off); 2208 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM); 2209 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 2210 pThis->bAlignmentXcpt = X86_XCPT_GP; 2211 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 2212 } 2213 /* 128-bit invalid encodings: */ 2214 else if (iEncoding == 8) 2215 { 2216 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V*/, 0 /*L*/, 1 /*~R*/); /* Bad V value */ 2217 off = Bs3Cg1InsertOpcodes(pThis, off); 2218 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 2219 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_XMM0; 2220 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM1; 2221 pThis->fInvalidEncoding = true; 2222 } 2223 else if (iEncoding == 9) 2224 { 2225 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2226 off = Bs3Cg1InsertOpcodes(pThis, off); 2227 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2228 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_XMM5; 2229 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM4; 2230 pThis->fInvalidEncoding = true; 2231 } 2232 /* 256-bit encodings: */ 2233 else if (iEncoding == 10) 2234 { 2235 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/); 2236 off = Bs3Cg1InsertOpcodes(pThis, off); 2237 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 2238 pThis->aOperands[pThis->iRmOp].cbOp = 32; 2239 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM0; 2240 pThis->aOperands[pThis->iRegOp].cbOp = 32; 2241 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM1; 2242 } 2243 else if (iEncoding == 11) 2244 { 2245 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2246 off = Bs3Cg1InsertOpcodes(pThis, off); 2247 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2248 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM5; 2249 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM4; 2250 } 2251 else if (iEncoding == 12) 2252 { 2253 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored*/); 2254 off = Bs3Cg1InsertOpcodes(pThis, off); 2255 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 5, 4); 2256 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM4; 2257 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM5; 2258 } 2259 else if (iEncoding == 13) 2260 { 2261 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/); 2262 off = Bs3Cg1InsertOpcodes(pThis, off); 2263 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 32, 0, BS3CG1OPLOC_MEM); 2264 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM2; 2265 } 2266 else if (iEncoding == 14) 2267 { 2268 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2269 off = Bs3Cg1InsertOpcodes(pThis, off); 2270 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 0, BS3CG1OPLOC_MEM); 2271 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM3; 2272 } 2273 else if (iEncoding == 15) 2274 { 2275 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored */); 2276 off = Bs3Cg1InsertOpcodes(pThis, off); 2277 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 0, BS3CG1OPLOC_MEM); 2278 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM3; 2279 } 2280 else if (iEncoding == 16) 2281 { 2282 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/); 2283 off = Bs3Cg1InsertOpcodes(pThis, off); 2284 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM); 2285 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 2286 pThis->bAlignmentXcpt = X86_XCPT_GP; 2287 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM3; 2288 } 2289 else if (iEncoding == 17) 2290 { 2291 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2292 off = Bs3Cg1InsertOpcodes(pThis, off); 2293 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM); 2294 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 2295 pThis->bAlignmentXcpt = X86_XCPT_GP; 2296 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM3; 2297 } 2298 /* 256-bit invalid encodings: */ 2299 else if (iEncoding == 18) 2300 { 2301 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V - invalid */, 1 /*L*/, 1 /*~R*/); /* Bad V value */ 2302 off = Bs3Cg1InsertOpcodes(pThis, off); 2303 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 2304 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM0; 2305 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM1; 2306 pThis->fInvalidEncoding = true; 2307 } 2308 else if (iEncoding == 19) 2309 { 2310 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V - invalid */, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2311 off = Bs3Cg1InsertOpcodes(pThis, off); 2312 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2313 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM5; 2314 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM4; 2315 pThis->fInvalidEncoding = true; 2316 } 2317 else if (iEncoding == 20) 2318 { 2319 pThis->abCurInstr[0] = P_RN; 2320 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2321 off = Bs3Cg1InsertOpcodes(pThis, off); 2322 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2323 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM5; 2324 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM4; 2325 pThis->fInvalidEncoding = true; 2326 } 2327 else if (iEncoding == 21) 2328 { 2329 pThis->abCurInstr[0] = P_RZ; 2330 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2331 off = Bs3Cg1InsertOpcodes(pThis, off); 2332 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2333 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM5; 2334 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM4; 2335 pThis->fInvalidEncoding = true; 2336 } 2337 else if (iEncoding == 22) 2338 { 2339 pThis->abCurInstr[0] = P_OZ; 2340 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2341 off = Bs3Cg1InsertOpcodes(pThis, off); 2342 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2343 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM5; 2344 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM4; 2345 pThis->fInvalidEncoding = true; 2346 } 2347 else if (iEncoding == 23) 2348 { 2349 pThis->abCurInstr[0] = P_LK; 2350 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2351 off = Bs3Cg1InsertOpcodes(pThis, off); 2352 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5); 2353 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM5; 2354 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM4; 2355 pThis->fInvalidEncoding = true; 2356 } 2357 #if ARCH_BITS == 64 2358 /* 64-bit mode registers */ 2359 else if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2360 { 2361 if (iEncoding == 24) 2362 { 2363 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/); 2364 off = Bs3Cg1InsertOpcodes(pThis, off); 2365 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 4); 2366 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM4; 2367 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM11; 2368 } 2369 else if (iEncoding == 25) 2370 { 2371 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 0 /*W*/); 2372 off = Bs3Cg1InsertOpcodes(pThis, off); 2373 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 4); 2374 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_YMM12; 2375 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM9; 2376 } 2377 else 2378 return 0; 2379 } 2380 #endif 2381 else 2382 return 0; 2383 pThis->cbCurInstr = off; 2384 return iEncoding + 1; 2385 } 2386 2387 2388 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_Md_WO(PBS3CG1STATE pThis, unsigned iEncoding) 2389 { 2390 unsigned off; 2391 if (iEncoding == 0) 2392 { 2393 /** @todo three by opcode needs some tweaking. */ 2394 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2395 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2396 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2397 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2398 4, 0, BS3CG1OPLOC_MEM_WO); 2399 } 2400 else if (iEncoding == 1) 2401 { 2402 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2403 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2404 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2405 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2406 4, 0, BS3CG1OPLOC_MEM_WO); 2407 } 2408 else if (iEncoding == 2) 2409 { 2410 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0x7 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2411 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2412 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2413 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2414 4, 0, BS3CG1OPLOC_MEM_WO); 2415 pThis->fInvalidEncoding = true; 2416 } 2417 else if (iEncoding == 3) 2418 { 2419 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2420 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2421 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2422 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2423 4, 0, BS3CG1OPLOC_MEM_WO); 2424 pThis->fInvalidEncoding = true; 2425 } 2426 else if (iEncoding == 4) 2427 { 2428 pThis->abCurInstr[0] = P_OZ; 2429 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2430 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2431 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2432 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2433 4, 0, BS3CG1OPLOC_MEM_WO); 2434 pThis->fInvalidEncoding = true; 2435 } 2436 else if (iEncoding == 5) 2437 { 2438 pThis->abCurInstr[0] = P_RZ; 2439 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2440 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2441 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2442 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2443 4, 0, BS3CG1OPLOC_MEM_WO); 2444 pThis->fInvalidEncoding = true; 2445 } 2446 else if (iEncoding == 6) 2447 { 2448 pThis->abCurInstr[0] = P_RN; 2449 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2450 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2451 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2452 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2453 4, 0, BS3CG1OPLOC_MEM_WO); 2454 pThis->fInvalidEncoding = true; 2455 } 2456 else if (iEncoding == 7) 2457 { 2458 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/); 2459 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2460 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2461 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2462 4, 0, BS3CG1OPLOC_MEM_WO); 2463 } 2464 #if ARCH_BITS == 64 2465 else if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2466 { 2467 if (iEncoding == 8) 2468 { 2469 pThis->abCurInstr[0] = REX_____; 2470 off = Bs3Cg1InsertVex3bPrefix(pThis, 1 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2471 off = Bs3Cg1InsertOpcodes(pThis, off) - 1; 2472 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2473 (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT, 2474 4, 0, BS3CG1OPLOC_MEM_WO); 2475 pThis->fInvalidEncoding = true; 2476 } 2477 else 2478 return 0; 2479 } 2480 #endif 2481 else 2482 return 0; 2483 pThis->cbCurInstr = off; 2484 return iEncoding + 1; 2485 } 2486 2487 #endif /* BS3CG1_WITH_VEX */ 2488 2489 2490 2234 2491 /** 2235 2492 * Encodes the next instruction. … … 2249 2506 { 2250 2507 case BS3CG1ENC_MODRM_Eb_Gb: 2251 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Eb_Gb(pThis, iEncoding);2508 return Bs3Cg1EncodeNext_MODRM_Eb_Gb(pThis, iEncoding); 2252 2509 case BS3CG1ENC_MODRM_Gb_Eb: 2253 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Gb_Eb(pThis, iEncoding);2510 return Bs3Cg1EncodeNext_MODRM_Gb_Eb(pThis, iEncoding); 2254 2511 case BS3CG1ENC_MODRM_Gv_Ev: 2255 2512 case BS3CG1ENC_MODRM_Ev_Gv: 2256 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Gv_Ev__OR__BS3CG1ENC_MODRM_Ev_Gv(pThis, iEncoding);2513 return Bs3Cg1EncodeNext_MODRM_Gv_Ev__OR__MODRM_Ev_Gv(pThis, iEncoding); 2257 2514 2258 2515 case BS3CG1ENC_MODRM_Wss_WO_Vss: 2259 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Wss_WO_Vss(pThis, iEncoding);2516 return Bs3Cg1EncodeNext_MODRM_Wss_WO_Vss(pThis, iEncoding); 2260 2517 case BS3CG1ENC_MODRM_Wsd_WO_Vsd: 2261 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Wsd_WO_Vsd(pThis, iEncoding);2518 return Bs3Cg1EncodeNext_MODRM_Wsd_WO_Vsd(pThis, iEncoding); 2262 2519 case BS3CG1ENC_MODRM_Wps_WO_Vps: 2263 2520 case BS3CG1ENC_MODRM_Wpd_WO_Vpd: 2264 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Wps_WO_Vps__OR__BS3CG1ENC_MODRM_Wpd_WO_Vpd(pThis, iEncoding);2521 return Bs3Cg1EncodeNext_MODRM_Wps_WO_Vps__OR__MODRM_Wpd_WO_Vpd(pThis, iEncoding); 2265 2522 case BS3CG1ENC_MODRM_WqZxReg_WO_Vq: 2266 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_WqZxReg_WO_Vq(pThis, iEncoding);2523 return Bs3Cg1EncodeNext_MODRM_WqZxReg_WO_Vq(pThis, iEncoding); 2267 2524 2268 2525 case BS3CG1ENC_MODRM_Pq_WO_Uq: 2269 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Pq_WO_Uq(pThis, iEncoding);2526 return Bs3Cg1EncodeNext_MODRM_Pq_WO_Uq(pThis, iEncoding); 2270 2527 2271 2528 case BS3CG1ENC_MODRM_Vq_WO_UqHi: 2272 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vq_WO_UqHi(pThis, iEncoding);2529 return Bs3Cg1EncodeNext_MODRM_Vq_WO_UqHi(pThis, iEncoding); 2273 2530 case BS3CG1ENC_MODRM_Vq_WO_Mq: 2274 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vq_WO_Mq(pThis, iEncoding);2531 return Bs3Cg1EncodeNext_MODRM_Vq_WO_Mq(pThis, iEncoding); 2275 2532 case BS3CG1ENC_MODRM_VqHi_WO_Uq: 2276 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VqHi_WO_Uq(pThis, iEncoding);2533 return Bs3Cg1EncodeNext_MODRM_VqHi_WO_Uq(pThis, iEncoding); 2277 2534 case BS3CG1ENC_MODRM_VqHi_WO_Mq: 2278 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VqHi_WO_Mq(pThis, iEncoding);2535 return Bs3Cg1EncodeNext_MODRM_VqHi_WO_Mq(pThis, iEncoding); 2279 2536 case BS3CG1ENC_MODRM_Vdq_WO_Wdq: 2280 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vdq_WO_Wdq(pThis, iEncoding);2537 return Bs3Cg1EncodeNext_MODRM_Vdq_WO_Wdq(pThis, iEncoding); 2281 2538 case BS3CG1ENC_MODRM_Vpd_WO_Wpd: 2282 2539 case BS3CG1ENC_MODRM_Vps_WO_Wps: 2283 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Vps_WO_Wps__OR__BS3CG1ENC_MODRM_Vpd_WO_Wpd(pThis, iEncoding);2540 return Bs3Cg1EncodeNext_MODRM_Vps_WO_Wps__OR__MODRM_Vpd_WO_Wpd(pThis, iEncoding); 2284 2541 case BS3CG1ENC_MODRM_VssZx_WO_Wss: 2285 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VssZx_WO_Wss(pThis, iEncoding);2542 return Bs3Cg1EncodeNext_MODRM_VssZx_WO_Wss(pThis, iEncoding); 2286 2543 case BS3CG1ENC_MODRM_VsdZx_WO_Wsd: 2287 2544 case BS3CG1ENC_MODRM_VqZx_WO_Wq: 2288 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VsdZx_WO_Wsd__OR__MODRM_VqZx_WO_Wq(pThis, iEncoding);2545 return Bs3Cg1EncodeNext_MODRM_VsdZx_WO_Wsd__OR__MODRM_VqZx_WO_Wq(pThis, iEncoding); 2289 2546 case BS3CG1ENC_MODRM_VqZx_WO_Nq: 2290 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_VqZx_WO_Nq(pThis, iEncoding);2547 return Bs3Cg1EncodeNext_MODRM_VqZx_WO_Nq(pThis, iEncoding); 2291 2548 2292 2549 case BS3CG1ENC_MODRM_Gv_RO_Ma: 2293 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Gv_RO_Ma(pThis, iEncoding);2550 return Bs3Cg1EncodeNext_MODRM_Gv_RO_Ma(pThis, iEncoding); 2294 2551 2295 2552 case BS3CG1ENC_MODRM_Mb_RO: 2296 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Mb_RO(pThis, iEncoding);2553 return Bs3Cg1EncodeNext_MODRM_Mb_RO(pThis, iEncoding); 2297 2554 case BS3CG1ENC_MODRM_Md_RO: 2298 return Bs3Cg1EncodeNext_ BS3CG1ENC_MODRM_Md_RO(pThis, iEncoding);2555 return Bs3Cg1EncodeNext_MODRM_Md_RO(pThis, iEncoding); 2299 2556 case BS3CG1ENC_MODRM_Md_WO: 2300 return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Md_WO(pThis, iEncoding); 2557 return Bs3Cg1EncodeNext_MODRM_Md_WO(pThis, iEncoding); 2558 case BS3CG1ENC_MODRM_Mq_WO_Vq: 2559 return Bs3Cg1EncodeNext_MODRM_Mq_WO_Vq(pThis, iEncoding); 2560 case BS3CG1ENC_MODRM_Mq_WO_VqHi: 2561 return Bs3Cg1EncodeNext_MODRM_Mq_WO_VqHi(pThis, iEncoding); 2562 2563 case BS3CG1ENC_FIXED: 2564 return Bs3Cg1EncodeNext_FIXED(pThis, iEncoding); 2565 case BS3CG1ENC_FIXED_AL_Ib: 2566 return Bs3Cg1EncodeNext_FIXED_AL_Ib(pThis, iEncoding); 2567 case BS3CG1ENC_FIXED_rAX_Iz: 2568 return Bs3Cg1EncodeNext_FIXED_rAX_Iz(pThis, iEncoding); 2569 2570 case BS3CG1ENC_MODRM_MOD_EQ_3: 2571 return Bs3Cg1EncodeNext_MODRM_MOD_EQ_3(pThis, iEncoding); 2572 case BS3CG1ENC_MODRM_MOD_NE_3: 2573 return Bs3Cg1EncodeNext_MODRM_MOD_NE_3(pThis, iEncoding); 2574 2575 /* 2576 * VEX stuff 2577 */ 2578 #ifdef BS3CG1_WITH_VEX 2579 case BS3CG1ENC_VEX_MODRM_Vps_WO_Wps: 2580 return Bs3Cg1EncodeNext_VEX_MODRM_Vps_WO_Wps(pThis, iEncoding); 2581 2301 2582 case BS3CG1ENC_VEX_MODRM_Md_WO: 2302 return Bs3Cg1EncodeNext_BS3CG1ENC_VEX_MODRM_Md_WO(pThis, iEncoding); 2303 case BS3CG1ENC_MODRM_Mq_WO_Vq: 2304 return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Mq_WO_Vq(pThis, iEncoding); 2305 case BS3CG1ENC_MODRM_Mq_WO_VqHi: 2306 return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Mq_WO_VqHi(pThis, iEncoding); 2307 2308 case BS3CG1ENC_FIXED: 2309 return Bs3Cg1EncodeNext_BS3CG1ENC_FIXED(pThis, iEncoding); 2310 case BS3CG1ENC_FIXED_AL_Ib: 2311 return Bs3Cg1EncodeNext_BS3CG1ENC_FIXED_AL_Ib(pThis, iEncoding); 2312 case BS3CG1ENC_FIXED_rAX_Iz: 2313 return Bs3Cg1EncodeNext_BS3CG1ENC_FIXED_rAX_Iz(pThis, iEncoding); 2314 2315 case BS3CG1ENC_MODRM_MOD_EQ_3: 2316 return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_MOD_EQ_3(pThis, iEncoding); 2317 case BS3CG1ENC_MODRM_MOD_NE_3: 2318 return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_MOD_NE_3(pThis, iEncoding); 2583 return Bs3Cg1EncodeNext_VEX_MODRM_Md_WO(pThis, iEncoding); 2584 2585 #endif /* BS3CG1_WITH_VEX */ 2319 2586 2320 2587 default: … … 2545 2812 /* Unused or invalid instructions mostly. */ 2546 2813 break; 2814 2815 #ifdef BS3CG1_WITH_VEX 2816 2817 case BS3CG1ENC_VEX_MODRM_Vps_WO_Wps: 2818 pThis->iRmOp = 1; 2819 pThis->iRegOp = 0; 2820 pThis->aOperands[0].cbOp = 16; 2821 pThis->aOperands[1].cbOp = 16; 2822 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; 2823 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 2824 break; 2825 2826 #endif /* BS3CG1_WITH_VEX */ 2547 2827 2548 2828 default: … … 2902 3182 BS3CG1DST idxField; 2903 3183 BS3PTRUNION PtrField; 2904 2905 /* Expand the destiation field (can be escaped). */ 3184 bool fZxVlMax; 3185 3186 /* Expand the destiation field (can be escaped). Set fZxVlMax. */ 2906 3187 switch (bOpcode & BS3CG1_CTXOP_DST_MASK) 2907 3188 { … … 2910 3191 if (idxField == BS3CG1DST_INVALID) 2911 3192 idxField = BS3CG1DST_OP1; 3193 fZxVlMax = pEflCtx != NULL && pThis->aOperands[0].enmLocation == BS3CG1OPLOC_CTX_ZX_VLMAX; 2912 3194 break; 2913 3195 … … 2916 3198 if (idxField == BS3CG1DST_INVALID) 2917 3199 idxField = BS3CG1DST_OP2; 3200 fZxVlMax = pEflCtx != NULL && pThis->aOperands[1].enmLocation == BS3CG1OPLOC_CTX_ZX_VLMAX; 2918 3201 break; 2919 3202 2920 3203 case BS3CG1_CTXOP_EFL: 2921 3204 idxField = BS3CG1DST_EFL; 3205 fZxVlMax = false; 2922 3206 break; 2923 3207 … … 2930 3214 if (idxField > BS3CG1DST_INVALID) 2931 3215 { 2932 uint8_t idxField2 = pThis->aOperands[idxField - BS3CG1DST_OP1].idxField; 3216 unsigned idxOp = idxField - BS3CG1DST_OP1; 3217 uint8_t idxField2 = pThis->aOperands[idxOp].idxField; 2933 3218 if (idxField2 != BS3CG1DST_INVALID) 2934 3219 idxField = idxField2; 3220 fZxVlMax = pEflCtx != NULL && pThis->aOperands[idxOp].enmLocation == BS3CG1OPLOC_CTX_ZX_VLMAX; 2935 3221 break; 2936 3222 } … … 2944 3230 return Bs3TestFailed("Malformed context instruction: Destination"); 2945 3231 } 2946 2947 3232 2948 3233 /* Expand value size (can be escaped). */ … … 2989 3274 * Deal with fields up to 8-byte wide. 2990 3275 */ 3276 2991 3277 /* Get the value. */ 2992 3278 uint64_t uValue; … … 3084 3370 /** @todo other FPU fields and FPU state formats. */ 3085 3371 else 3086 return Bs3TestFailedF("Todo implement me: cbDst=%u idxField=%d offField=%#x ", cbDst, idxField, offField);3372 return Bs3TestFailedF("Todo implement me: cbDst=%u idxField=%d offField=%#x (<= 8)", cbDst, idxField, offField); 3087 3373 3088 3374 #ifdef BS3CG1_DEBUG_CTX_MOD … … 3132 3418 3133 3419 case 4: 3134 if ((unsigned)(idxField - BS3CG1DST_XMM0_DW0_ZX) <= (unsigned)(BS3CG1DST_XMM15_DW0_ZX - BS3CG1DST_XMM0_DW0_ZX)) 3420 if ( (unsigned)(idxField - BS3CG1DST_XMM0_DW0_ZX) <= (unsigned)(BS3CG1DST_XMM15_DW0_ZX - BS3CG1DST_XMM0_DW0_ZX) 3421 || fZxVlMax) 3135 3422 { 3136 3423 PtrField.pu32[1] = 0; … … 3149 3436 3150 3437 case 8: 3151 if ((unsigned)(idxField - BS3CG1DST_XMM0_LO_ZX) <= (unsigned)(BS3CG1DST_XMM15_LO_ZX - BS3CG1DST_XMM0_LO_ZX)) 3438 if ( (unsigned)(idxField - BS3CG1DST_XMM0_LO_ZX) <= (unsigned)(BS3CG1DST_XMM15_LO_ZX - BS3CG1DST_XMM0_LO_ZX) 3439 || fZxVlMax) 3152 3440 PtrField.pu64[1] = 0; 3153 3441 else if ((unsigned)(idxField - BS3CG1DST_MM0) <= (unsigned)(BS3CG1DST_MM7 - BS3CG1DST_MM0)) … … 3176 3464 } 3177 3465 #endif 3178 3466 if (fZxVlMax) 3467 { 3468 uintptr_t iReg = ((uintptr_t)PtrField.pu8 - (uintptr_t)&pThis->pExtCtx->Ctx.x87.aXMM[0]) 3469 / sizeof(pThis->pExtCtx->Ctx.x87.aXMM[0]); 3470 pThis->pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[0] = 0; 3471 pThis->pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[1] = 0; 3472 #ifdef BS3CG1_DEBUG_CTX_MOD 3473 BS3CG1_DPRINTF(("dbg: --> cleared YMM%u_HI\n", iReg)); 3474 #endif 3475 } 3179 3476 } 3180 3477 /* … … 3191 3488 uint8_t ab[sizeof(X86ZMMREG)]; 3192 3489 uint32_t au32[sizeof(X86ZMMREG) / sizeof(uint32_t)]; 3490 uint64_t au64[sizeof(X86ZMMREG) / sizeof(uint64_t)]; 3193 3491 } Value; 3194 unsigned const offField = g_aoffBs3Cg1DstFields[idxField]; 3492 unsigned const offField = g_aoffBs3Cg1DstFields[idxField]; 3493 unsigned iReg; 3195 3494 3196 3495 if (!pThis->fWorkExtCtx) … … 3237 3536 } 3238 3537 } 3239 /* The YMM (AVX) and the first 16 ZMM (AVX512) registers have split storage in 3240 the state, so they need special handling. */ 3538 /* The YMM (AVX) registers have split storage in the state, so they need special handling. */ 3539 else if ((iReg = idxField - BS3CG1DST_YMM0) < 16U) 3540 { 3541 /* The first 128-bits in XMM land. */ 3542 PtrField.pu64 = &pThis->pExtCtx->Ctx.x87.aXMM[iReg].au64[0]; 3543 switch (bOpcode & BS3CG1_CTXOP_OPERATOR_MASK) 3544 { 3545 case BS3CG1_CTXOP_ASSIGN: 3546 PtrField.pu64[0] = Value.au64[0]; 3547 PtrField.pu64[1] = Value.au64[1]; 3548 break; 3549 case BS3CG1_CTXOP_OR: 3550 PtrField.pu64[0] |= Value.au64[0]; 3551 PtrField.pu64[1] |= Value.au64[1]; 3552 break; 3553 case BS3CG1_CTXOP_AND: 3554 PtrField.pu64[0] &= Value.au64[0]; 3555 PtrField.pu64[1] &= Value.au64[1]; 3556 break; 3557 case BS3CG1_CTXOP_AND_INV: 3558 PtrField.pu64[0] &= ~Value.au64[0]; 3559 PtrField.pu64[1] &= ~Value.au64[1]; 3560 break; 3561 } 3562 3563 /* The second 128-bit in YMM_HI land. */ 3564 PtrField.pu64 = &pThis->pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[0]; 3565 switch (bOpcode & BS3CG1_CTXOP_OPERATOR_MASK) 3566 { 3567 case BS3CG1_CTXOP_ASSIGN: 3568 PtrField.pu64[0] = Value.au64[2]; 3569 PtrField.pu64[1] = Value.au64[3]; 3570 break; 3571 case BS3CG1_CTXOP_OR: 3572 PtrField.pu64[0] |= Value.au64[2]; 3573 PtrField.pu64[1] |= Value.au64[3]; 3574 break; 3575 case BS3CG1_CTXOP_AND: 3576 PtrField.pu64[0] &= Value.au64[2]; 3577 PtrField.pu64[1] &= Value.au64[3]; 3578 break; 3579 case BS3CG1_CTXOP_AND_INV: 3580 PtrField.pu64[0] &= ~Value.au64[2]; 3581 PtrField.pu64[1] &= ~Value.au64[3]; 3582 break; 3583 } 3584 PtrField.pb = NULL; 3585 } 3586 /* AVX512 needs handling like above, but more complicated. */ 3241 3587 else 3242 {3243 3588 return Bs3TestFailedF("TODO: implement me: cbDst=%d idxField=%d (AVX and other weird state)", cbDst, idxField); 3244 }3245 3589 3246 3590 if (PtrField.pb) … … 3271 3615 BS3CG1_DPRINTF(("dbg: --> %s: %.*Rhxs\n", g_aszBs3Cg1DstFields[idxField].sz, cbDst, PtrField.pb)); 3272 3616 #endif 3617 3618 if (fZxVlMax) 3619 { 3620 uintptr_t iReg = ((uintptr_t)PtrField.pu8 - (uintptr_t)&pThis->pExtCtx->Ctx.x87.aXMM[0]) 3621 / sizeof(pThis->pExtCtx->Ctx.x87.aXMM[0]); 3622 if (cbDst < 16) 3623 { 3624 for (i = cbDst / 4; i < 4; i++) 3625 PtrField.pu32[i++] = 0; 3626 #ifdef BS3CG1_DEBUG_CTX_MOD 3627 BS3CG1_DPRINTF(("dbg: --> cleared high %u bytes of XMM%u\n", 16 - cbDst, iReg)); 3628 #endif 3629 } 3630 pThis->pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[0] = 0; 3631 pThis->pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[1] = 0; 3632 #ifdef BS3CG1_DEBUG_CTX_MOD 3633 BS3CG1_DPRINTF(("dbg: --> cleared YMM%u_HI\n", iReg)); 3634 #endif 3635 } 3273 3636 } 3274 3637 } … … 3445 3808 pExpect->Ctx.x87.aXMM[i].au64[1], 3446 3809 pExpect->Ctx.x87.aXMM[i].au64[0]); 3810 if (pExpect->fXcr0Saved & XSAVE_C_YMM) 3811 for (i = 0; i < (ARCH_BITS == 64 ? 16 : 8); i++) 3812 if ( pResult->Ctx.x.u.YmmHi.aYmmHi[i].au64[0] != pExpect->Ctx.x.u.YmmHi.aYmmHi[i].au64[0] 3813 || pResult->Ctx.x.u.YmmHi.aYmmHi[i].au64[1] != pExpect->Ctx.x.u.YmmHi.aYmmHi[i].au64[1]) 3814 fOkay = Bs3TestFailedF("YMM%u_HI: %#010RX64'%016RX64, expected %#010RX64'%08RX64", i, 3815 pResult->Ctx.x.u.YmmHi.aYmmHi[i].au64[1], 3816 pResult->Ctx.x.u.YmmHi.aYmmHi[i].au64[0], 3817 pExpect->Ctx.x.u.YmmHi.aYmmHi[i].au64[1], 3818 pExpect->Ctx.x.u.YmmHi.aYmmHi[i].au64[0]); 3447 3819 } 3448 3820 else … … 3571 3943 Bs3TestPrintf("xcr0=%RX64\n", pThis->pResultExtCtx->fXcr0Saved); 3572 3944 Bs3TestPrintf("\n"); 3945 ASMHalt(); 3573 3946 return false; 3574 3947 } … … 3807 4180 for (i = 0; i < RT_ELEMENTS(pExtCtx->Ctx.x87.aXMM); i++) 3808 4181 { 3809 pExtCtx->Ctx.x87.aXMM[i].au16[0] = i ;3810 pExtCtx->Ctx.x87.aXMM[i].au16[1] = i ;3811 pExtCtx->Ctx.x87.aXMM[i].au16[2] = i ;3812 pExtCtx->Ctx.x87.aXMM[i].au16[3] = i ;3813 pExtCtx->Ctx.x87.aXMM[i].au16[4] = i ;3814 pExtCtx->Ctx.x87.aXMM[i].au16[5] = i ;3815 pExtCtx->Ctx.x87.aXMM[i].au16[6] = i ;3816 pExtCtx->Ctx.x87.aXMM[i].au16[7] = i ;4182 pExtCtx->Ctx.x87.aXMM[i].au16[0] = i | UINT16_C(0x8f00); 4183 pExtCtx->Ctx.x87.aXMM[i].au16[1] = i | UINT16_C(0x8e00); 4184 pExtCtx->Ctx.x87.aXMM[i].au16[2] = i | UINT16_C(0x8d00); 4185 pExtCtx->Ctx.x87.aXMM[i].au16[3] = i | UINT16_C(0x8c00); 4186 pExtCtx->Ctx.x87.aXMM[i].au16[4] = i | UINT16_C(0x8b00); 4187 pExtCtx->Ctx.x87.aXMM[i].au16[5] = i | UINT16_C(0x8a00); 4188 pExtCtx->Ctx.x87.aXMM[i].au16[6] = i | UINT16_C(0x8900); 4189 pExtCtx->Ctx.x87.aXMM[i].au16[7] = i | UINT16_C(0x8800); 3817 4190 } 3818 4191 if (pExtCtx->fXcr0Nominal & XSAVE_C_YMM) 3819 for (i = 0; i < RT_ELEMENTS(pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi); i++)4192 for (i = 0; i < RT_ELEMENTS(pExtCtx->Ctx.x.u.YmmHi.aYmmHi); i++) 3820 4193 { 3821 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[0] = i << 8;3822 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[1] = i << 8;3823 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[2] = i << 8;3824 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[3] = i << 8;3825 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[4] = i << 8;3826 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[5] = i << 8;3827 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[6] = i << 8;3828 pExtCtx->Ctx.x.u. Intel.YmmHi.aYmmHi[i].au16[7] = i <<8;4194 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[0] = (i << 8) | (i << 12) | 0xff; 4195 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[1] = (i << 8) | (i << 12) | 0xfe; 4196 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[2] = (i << 8) | (i << 12) | 0xfd; 4197 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[3] = (i << 8) | (i << 12) | 0xfc; 4198 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[4] = (i << 8) | (i << 12) | 0xfb; 4199 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[5] = (i << 8) | (i << 12) | 0xfa; 4200 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[6] = (i << 8) | (i << 12) | 0xf9; 4201 pExtCtx->Ctx.x.u.YmmHi.aYmmHi[i].au16[7] = (i << 8) | (i << 12) | 0xf8; 3829 4202 } 3830 4203 … … 4070 4443 #if 0 4071 4444 /* (for debugging) */ 4072 if (bMode != BS3_MODE_PP 32)4445 if (bMode != BS3_MODE_PPV86) 4073 4446 return BS3TESTDOMODE_SKIPPED; 4074 4447 #endif … … 4083 4456 #if 0 4084 4457 /* (for debugging) */ 4085 //if (bMode == BS3_MODE_PP32)4458 if (bMode == BS3_MODE_PPV86) 4086 4459 { 4087 4460 Bs3TestTerm();
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