Changeset 66920 in vbox for trunk/src/VBox/ValidationKit/bootsectors
- Timestamp:
- May 16, 2017 7:21:21 PM (8 years ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66919 r66920 1277 1277 { 1278 1278 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + iReg; 1279 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg, cbOp, cbMissalign, enmLocation); 1279 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, cbOp, cbMissalign, enmLocation); 1280 } 1281 1282 1283 /** Also encodes idxField of the register operand using idxFieldBase. */ 1284 static unsigned BS3_NEAR_CODE 1285 Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off, 1286 uint8_t iReg, uint8_t cbMissalign) 1287 { 1288 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + iReg; 1289 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, pThis->aOperands[pThis->iRmOp].cbOp, cbMissalign, 1290 pThis->aOperands[pThis->iRmOp].enmLocation); 1280 1291 } 1281 1292 … … 2415 2426 2416 2427 2417 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething(PBS3CG1STATE pThis, unsigned iEncoding) 2428 static unsigned BS3_NEAR_CODE 2429 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_OR_Vice_Versa(PBS3CG1STATE pThis, unsigned iEncoding) 2418 2430 { 2419 2431 unsigned off; … … 2424 2436 off = Bs3Cg1InsertOpcodes(pThis, off); 2425 2437 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2426 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 2;2427 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + 0;2428 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2438 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2439 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2440 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2429 2441 break; 2430 2442 case 1: … … 2432 2444 off = Bs3Cg1InsertOpcodes(pThis, off); 2433 2445 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 1); 2434 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 3;2435 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + 7;2436 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2446 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 3; 2447 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 7; 2448 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2437 2449 break; 2438 2450 case 2: … … 2443 2455 off = Bs3Cg1InsertOpcodes(pThis, off); 2444 2456 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2); 2445 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 11;2446 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + 15;2447 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 2;2457 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 2458 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 15; 2459 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 2448 2460 break; 2449 2461 } … … 2454 2466 off = Bs3Cg1InsertOpcodes(pThis, off); 2455 2467 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2456 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 2;2457 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + 0;2458 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2468 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2469 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2470 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2459 2471 break; 2460 2472 case 4: … … 2462 2474 off = Bs3Cg1InsertOpcodes(pThis, off); 2463 2475 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2464 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 2;2465 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + 0;2466 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2476 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2477 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2478 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2467 2479 break; 2468 2480 case 5: … … 2470 2482 off = Bs3Cg1InsertOpcodes(pThis, off); 2471 2483 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2472 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 2;2473 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + 3;2474 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2484 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2485 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 3; 2486 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2475 2487 break; 2476 2488 case 6: … … 2478 2490 off = Bs3Cg1InsertOpcodes(pThis, off); 2479 2491 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2480 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 2;2481 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2482 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2492 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2493 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7); 2494 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2483 2495 break; 2484 2496 case 7: … … 2486 2498 off = Bs3Cg1InsertOpcodes(pThis, off); 2487 2499 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2488 pThis->aOperands[ 0].idxField = pThis->aOperands[0].idxFieldBase + 2;2489 pThis->aOperands[1 ].idxField = pThis->aOperands[1].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2490 pThis->aOperands[ 2].idxField = pThis->aOperands[2].idxFieldBase + 1;2500 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2501 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7); 2502 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2491 2503 break; 2492 2504 default: … … 2498 2510 2499 2511 2500 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig(PBS3CG1STATE pThis, unsigned iEncoding) 2512 /** 2513 * Wip - VEX.W ignored. 2514 * Lig - VEX.L ignored. 2515 */ 2516 static unsigned BS3_NEAR_CODE 2517 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding) 2501 2518 { 2502 2519 unsigned off; … … 2506 2523 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2507 2524 off = Bs3Cg1InsertOpcodes(pThis, off); 2508 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 0, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2509 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 0; 2525 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 0, 0); 2510 2526 break; 2511 2527 case 1: 2512 2528 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 1 /*~R*/); 2513 2529 off = Bs3Cg1InsertOpcodes(pThis, off); 2514 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 7, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2515 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 7; 2530 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7, 0); 2516 2531 break; 2517 2532 case 2: … … 2521 2536 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 0 /*~R*/); 2522 2537 off = Bs3Cg1InsertOpcodes(pThis, off); 2523 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 7, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2524 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 15; 2538 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0); 2525 2539 break; 2526 2540 } … … 2531 2545 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V*/, 0 /*L*/, 1 /*~R*/); 2532 2546 off = Bs3Cg1InsertOpcodes(pThis, off); 2533 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 0, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2534 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 0; 2547 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 0, 0); 2535 2548 pThis->fInvalidEncoding = true; 2536 2549 break; … … 2538 2551 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2539 2552 off = Bs3Cg1InsertOpcodes(pThis, off); 2540 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2541 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 1; 2553 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2542 2554 break; 2543 2555 case 5: 2544 2556 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L-ignored*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2545 2557 off = Bs3Cg1InsertOpcodes(pThis, off); 2546 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2547 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 1; 2558 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2548 2559 break; 2549 2560 case 6: 2550 2561 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W-ignored*/); 2551 2562 off = Bs3Cg1InsertOpcodes(pThis, off); 2552 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 5, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2553 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 5; 2563 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2554 2564 break; 2555 2565 case 7: … … 2559 2569 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2560 2570 off = Bs3Cg1InsertOpcodes(pThis, off); 2561 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 5, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2562 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 13; 2571 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0); 2563 2572 break; 2564 2573 } … … 2571 2580 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/); 2572 2581 off = Bs3Cg1InsertOpcodes(pThis, off); 2573 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 1, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2574 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 1; 2582 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2575 2583 break; 2576 2584 } … … 2583 2591 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/); 2584 2592 off = Bs3Cg1InsertOpcodes(pThis, off); 2585 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2586 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 2; 2593 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0); 2587 2594 break; 2588 2595 } … … 2593 2600 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2594 2601 off = Bs3Cg1InsertOpcodes(pThis, off); 2595 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 5, pThis->aOperands[1].cbOp, 0, BS3CG1OPLOC_MEM); 2596 pThis->aOperands[0].idxField = pThis->aOperands[0].idxFieldBase + 5; 2602 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2597 2603 pThis->fInvalidEncoding = true; 2598 2604 break; … … 3026 3032 #ifdef BS3CG1_WITH_VEX 3027 3033 case BS3CG1ENC_VEX_MODRM_VssZx_WO_Md: 3028 return Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig (pThis, iEncoding);3034 return Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa(pThis, iEncoding); 3029 3035 3030 3036 case BS3CG1ENC_VEX_MODRM_Md_WO: … … 3276 3282 3277 3283 case BS3CG1ENC_VEX_MODRM_VssZx_WO_Md: 3278 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig ;3284 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa; 3279 3285 pThis->iRmOp = 1; 3280 3286 pThis->iRegOp = 0; … … 3288 3294 3289 3295 case BS3CG1ENC_VEX_MODRM_Vss_WO_HdqCss_Uss: 3290 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething ;3296 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_OR_Vice_Versa; 3291 3297 pThis->iRegOp = 0; 3292 3298 pThis->iRmOp = 2; … … 3303 3309 3304 3310 case BS3CG1ENC_VEX_MODRM_VsdZx_WO_Mq: 3305 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig ;3311 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa; 3306 3312 pThis->iRmOp = 1; 3307 3313 pThis->iRegOp = 0; … … 3315 3321 3316 3322 case BS3CG1ENC_VEX_MODRM_Vsd_WO_HdqCsd_Usd: 3317 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething ;3323 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_OR_Vice_Versa; 3318 3324 pThis->iRegOp = 0; 3319 3325 pThis->iRmOp = 2; … … 3327 3333 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0; 3328 3334 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_LO; 3335 break; 3336 3337 case BS3CG1ENC_VEX_MODRM_Md_WO_Vss: 3338 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa; 3339 pThis->iRmOp = 0; 3340 pThis->iRegOp = 1; 3341 pThis->aOperands[0].cbOp = 4; 3342 pThis->aOperands[1].cbOp = 4; 3343 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM_WO; 3344 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3345 pThis->aOperands[0].idxFieldBase = BS3CG1DST_INVALID; 3346 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_DW0; 3347 break; 3348 3349 case BS3CG1ENC_VEX_MODRM_Uss_WO_HdqCss_Vss: 3350 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_OR_Vice_Versa; 3351 pThis->iRegOp = 2; 3352 pThis->iRmOp = 0; 3353 pThis->aOperands[0].cbOp = 16; 3354 pThis->aOperands[1].cbOp = 16; 3355 pThis->aOperands[2].cbOp = 4; 3356 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; 3357 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3358 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3359 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3360 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0; 3361 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_DW0; 3329 3362 break; 3330 3363 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66919 r66920 68 68 BS3CG1OP_UqHi, 69 69 BS3CG1OP_Uss, 70 BS3CG1OP_Uss_WO, 70 71 BS3CG1OP_Usd, 72 BS3CG1OP_Usd_WO, 71 73 BS3CG1OP_Vss, 72 74 BS3CG1OP_Vss_WO, … … 153 155 BS3CG1ENC_VEX_MODRM_VsdZx_WO_Mq, 154 156 BS3CG1ENC_VEX_MODRM_Md_WO, 157 BS3CG1ENC_VEX_MODRM_Md_WO_Vss, 158 BS3CG1ENC_VEX_MODRM_Md_WO_Vsd, 159 BS3CG1ENC_VEX_MODRM_Uss_WO_HdqCss_Vss, 160 BS3CG1ENC_VEX_MODRM_Usd_WO_HdqCsd_Vsd, 155 161 BS3CG1ENC_VEX_MODRM_Wps_WO_Vps, 156 162 BS3CG1ENC_VEX_MODRM_Wpd_WO_Vpd,
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