Changeset 66937 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- May 17, 2017 12:55:04 PM (8 years ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py
r66935 r66937 306 306 self.sEncoding += '_' + oOp.sType; 307 307 if oInstr.fUnused: 308 print('DEBUG: Unused Bs3Cg1Instruction: %s\n' % (oInstr.sEncoding,));309 308 if oInstr.sInvalidStyle == 'immediate' and oInstr.sSubOpcode: 310 309 self.sEncoding += '_MOD_EQ_3' if oInstr.sSubOpcode == '11 mr/reg' else '_MOD_NE_3'; -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66935 r66937 552 552 /* [BS3CG1DST_XMM14_DW0_ZX] =*/ 4, 553 553 /* [BS3CG1DST_XMM15_DW0_ZX] =*/ 4, 554 /* [BS3CG1DST_XMM0_HI96] = */ 12, 555 /* [BS3CG1DST_XMM1_HI96] = */ 12, 556 /* [BS3CG1DST_XMM2_HI96] = */ 12, 557 /* [BS3CG1DST_XMM3_HI96] = */ 12, 558 /* [BS3CG1DST_XMM4_HI96] = */ 12, 559 /* [BS3CG1DST_XMM5_HI96] = */ 12, 560 /* [BS3CG1DST_XMM6_HI96] = */ 12, 561 /* [BS3CG1DST_XMM7_HI96] = */ 12, 562 /* [BS3CG1DST_XMM8_HI96] = */ 12, 563 /* [BS3CG1DST_XMM9_HI96] = */ 12, 564 /* [BS3CG1DST_XMM10_HI96] =*/ 12, 565 /* [BS3CG1DST_XMM11_HI96] =*/ 12, 566 /* [BS3CG1DST_XMM12_HI96] =*/ 12, 567 /* [BS3CG1DST_XMM13_HI96] =*/ 12, 568 /* [BS3CG1DST_XMM14_HI96] =*/ 12, 569 /* [BS3CG1DST_XMM15_HI96] =*/ 12, 554 570 /* [BS3CG1DST_YMM0] = */ 32, 555 571 /* [BS3CG1DST_YMM1] = */ 32, … … 800 816 /* [BS3CG1DST_XMM14_DW0_ZX] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[14]), 801 817 /* [BS3CG1DST_XMM15_DW0_ZX] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15]), 818 /* [BS3CG1DST_XMM0_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[0].au32[1]), 819 /* [BS3CG1DST_XMM1_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[1].au32[1]), 820 /* [BS3CG1DST_XMM2_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[2].au32[1]), 821 /* [BS3CG1DST_XMM3_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[3].au32[1]), 822 /* [BS3CG1DST_XMM4_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[4].au32[1]), 823 /* [BS3CG1DST_XMM5_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[5].au32[1]), 824 /* [BS3CG1DST_XMM6_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[6].au32[1]), 825 /* [BS3CG1DST_XMM7_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[7].au32[1]), 826 /* [BS3CG1DST_XMM8_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[8].au32[1]), 827 /* [BS3CG1DST_XMM9_HI96] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[9].au32[1]), 828 /* [BS3CG1DST_XMM10_HI96] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[10].au32[1]), 829 /* [BS3CG1DST_XMM11_HI96] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[11].au32[1]), 830 /* [BS3CG1DST_XMM12_HI96] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[12].au32[1]), 831 /* [BS3CG1DST_XMM13_HI96] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[13].au32[1]), 832 /* [BS3CG1DST_XMM14_HI96] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[14].au32[1]), 833 /* [BS3CG1DST_XMM15_HI96] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15].au32[1]), 802 834 803 835 /* [BS3CG1DST_YMM0] = */ ~0U, … … 1048 1080 { "XMM14_DW0_ZX" }, 1049 1081 { "XMM15_DW0_ZX" }, 1082 { "XMM0_HI96" }, 1083 { "XMM1_HI96" }, 1084 { "XMM2_HI96" }, 1085 { "XMM3_HI96" }, 1086 { "XMM4_HI96" }, 1087 { "XMM5_HI96" }, 1088 { "XMM6_HI96" }, 1089 { "XMM7_HI96" }, 1090 { "XMM8_HI96" }, 1091 { "XMM9_HI96" }, 1092 { "XMM10_HI96" }, 1093 { "XMM11_HI96" }, 1094 { "XMM12_HI96" }, 1095 { "XMM13_HI96" }, 1096 { "XMM14_HI96" }, 1097 { "XMM15_HI96" }, 1050 1098 { "YMM0" }, 1051 1099 { "YMM1" }, … … 2431 2479 */ 2432 2480 static unsigned BS3_NEAR_CODE 2433 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_H dqCsomething_Usomething_Lip_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding)2481 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding) 2434 2482 { 2435 2483 unsigned off; … … 3576 3624 break; 3577 3625 3578 case BS3CG1ENC_VEX_MODRM_Vss_WO_H dqCss_Uss:3579 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_H dqCsomething_Usomething_Lip_Wip_OR_ViceVersa;3626 case BS3CG1ENC_VEX_MODRM_Vss_WO_HssHi_Uss: 3627 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa; 3580 3628 pThis->iRegOp = 0; 3581 3629 pThis->iRmOp = 2; 3582 3630 pThis->aOperands[0].cbOp = 16; 3583 pThis->aOperands[1].cbOp = 1 6;3631 pThis->aOperands[1].cbOp = 12; 3584 3632 pThis->aOperands[2].cbOp = 4; 3585 3633 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; … … 3587 3635 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3588 3636 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3589 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0 ;3637 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI96; 3590 3638 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_DW0; 3591 3639 break; … … 3603 3651 break; 3604 3652 3605 case BS3CG1ENC_VEX_MODRM_Vsd_WO_H dqCsd_Usd:3606 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_H dqCsomething_Usomething_Lip_Wip_OR_ViceVersa;3653 case BS3CG1ENC_VEX_MODRM_Vsd_WO_HsdHi_Usd: 3654 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa; 3607 3655 pThis->iRegOp = 0; 3608 3656 pThis->iRmOp = 2; 3609 3657 pThis->aOperands[0].cbOp = 16; 3610 pThis->aOperands[1].cbOp = 16;3658 pThis->aOperands[1].cbOp = 8; 3611 3659 pThis->aOperands[2].cbOp = 8; 3612 3660 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; … … 3614 3662 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3615 3663 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3616 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0 ;3664 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI; 3617 3665 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_LO; 3618 3666 break; 3619 3667 3620 case BS3CG1ENC_VEX_MODRM_Vq_WO_H dqCq_UqHi:3668 case BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_UqHi: 3621 3669 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Wip_OR_ViceVersa; 3622 3670 pThis->iRegOp = 0; 3623 3671 pThis->iRmOp = 2; 3624 3672 pThis->aOperands[0].cbOp = 16; 3625 pThis->aOperands[1].cbOp = 16;3673 pThis->aOperands[1].cbOp = 8; 3626 3674 pThis->aOperands[2].cbOp = 8; 3627 3675 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; … … 3629 3677 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3630 3678 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3631 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0 ;3679 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI; 3632 3680 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_HI; 3633 break;3634 3635 case BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_Mq:3636 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Msomething_Wip_OR_ViceVersa;3637 pThis->iRegOp = 0;3638 pThis->iRmOp = 2;3639 pThis->aOperands[0].cbOp = 16;3640 pThis->aOperands[1].cbOp = 16;3641 pThis->aOperands[2].cbOp = 8;3642 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX;3643 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX;3644 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_MEM;3645 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;3646 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;3647 pThis->aOperands[2].idxFieldBase = BS3CG1DST_INVALID;3648 3681 break; 3649 3682 … … 3687 3720 break; 3688 3721 3689 case BS3CG1ENC_VEX_MODRM_Uss_WO_H dqCss_Vss:3690 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_H dqCsomething_Usomething_Lip_Wip_OR_ViceVersa;3722 case BS3CG1ENC_VEX_MODRM_Uss_WO_HssHi_Vss: 3723 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa; 3691 3724 pThis->iRegOp = 2; 3692 3725 pThis->iRmOp = 0; 3693 3726 pThis->aOperands[0].cbOp = 16; 3694 pThis->aOperands[1].cbOp = 16;3727 pThis->aOperands[1].cbOp = 96; 3695 3728 pThis->aOperands[2].cbOp = 4; 3696 3729 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; … … 3698 3731 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3699 3732 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3700 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0 ;3733 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI96; 3701 3734 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_DW0; 3702 3735 break; 3703 3736 3704 case BS3CG1ENC_VEX_MODRM_Usd_WO_H dqCsd_Vsd:3705 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_H dqCsomething_Usomething_Lip_Wip_OR_ViceVersa;3737 case BS3CG1ENC_VEX_MODRM_Usd_WO_HsdHi_Vsd: 3738 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa; 3706 3739 pThis->iRegOp = 2; 3707 3740 pThis->iRmOp = 0; 3708 3741 pThis->aOperands[0].cbOp = 16; 3709 pThis->aOperands[1].cbOp = 16;3742 pThis->aOperands[1].cbOp = 8; 3710 3743 pThis->aOperands[2].cbOp = 8; 3711 3744 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; … … 3713 3746 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3714 3747 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3715 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0 ;3748 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI; 3716 3749 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_LO; 3717 3750 break; … … 4426 4459 /* Optimized access to XMM and STx registers. */ 4427 4460 if ( pThis->pExtCtx->enmMethod != BS3EXTCTXMETHOD_ANCIENT 4428 && offField - sizeof(BS3REGCTX) < = RT_UOFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15]) )4461 && offField - sizeof(BS3REGCTX) < RT_UOFFSET_AFTER(BS3EXTCTX, Ctx.x87.aXMM[15]) ) 4429 4462 PtrField.pb = (uint8_t *)pThis->pExtCtx + offField - sizeof(BS3REGCTX); 4430 4463 /* Non-register operands: */ -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66935 r66937 61 61 BS3CG1OP_Gv, 62 62 BS3CG1OP_Gv_RO, 63 BS3CG1OP_HdqCss, 64 BS3CG1OP_HdqCsd, 65 BS3CG1OP_HdqCq, 63 BS3CG1OP_HssHi, 64 BS3CG1OP_HsdHi, 66 65 BS3CG1OP_HqHi, 67 66 BS3CG1OP_Nq, … … 152 151 BS3CG1ENC_VEX_MODRM_Vps_WO_Wps, 153 152 BS3CG1ENC_VEX_MODRM_Vpd_WO_Wpd, 154 BS3CG1ENC_VEX_MODRM_Vss_WO_HdqCss_Uss, 155 BS3CG1ENC_VEX_MODRM_Vsd_WO_HdqCsd_Usd, 156 BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_UqHi, 157 BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_Mq, 153 BS3CG1ENC_VEX_MODRM_Vss_WO_HssHi_Uss, 154 BS3CG1ENC_VEX_MODRM_Vsd_WO_HsdHi_Usd, 155 BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_UqHi, 158 156 BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_Mq, 159 157 BS3CG1ENC_VEX_MODRM_VssZx_WO_Md, … … 162 160 BS3CG1ENC_VEX_MODRM_Md_WO_Vss, 163 161 BS3CG1ENC_VEX_MODRM_Mq_WO_Vsd, 164 BS3CG1ENC_VEX_MODRM_Uss_WO_H dqCss_Vss,165 BS3CG1ENC_VEX_MODRM_Usd_WO_H dqCsd_Vsd,162 BS3CG1ENC_VEX_MODRM_Uss_WO_HssHi_Vss, 163 BS3CG1ENC_VEX_MODRM_Usd_WO_HsdHi_Vsd, 166 164 BS3CG1ENC_VEX_MODRM_Wps_WO_Vps, 167 165 BS3CG1ENC_VEX_MODRM_Wpd_WO_Vpd, … … 610 608 BS3CG1DST_XMM14_DW0_ZX, 611 609 BS3CG1DST_XMM15_DW0_ZX, 610 BS3CG1DST_XMM0_HI96, 611 BS3CG1DST_XMM1_HI96, 612 BS3CG1DST_XMM2_HI96, 613 BS3CG1DST_XMM3_HI96, 614 BS3CG1DST_XMM4_HI96, 615 BS3CG1DST_XMM5_HI96, 616 BS3CG1DST_XMM6_HI96, 617 BS3CG1DST_XMM7_HI96, 618 BS3CG1DST_XMM8_HI96, 619 BS3CG1DST_XMM9_HI96, 620 BS3CG1DST_XMM10_HI96, 621 BS3CG1DST_XMM11_HI96, 622 BS3CG1DST_XMM12_HI96, 623 BS3CG1DST_XMM13_HI96, 624 BS3CG1DST_XMM14_HI96, 625 BS3CG1DST_XMM15_HI96, 612 626 /* AVX registers. */ 613 627 BS3CG1DST_YMM0,
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