Changeset 73274 in vbox for trunk/include/VBox/vmm/hm_vmx.h
- Timestamp:
- Jul 20, 2018 3:40:10 PM (7 years ago)
- File:
-
- 1 edited
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trunk/include/VBox/vmm/hm_vmx.h
r73256 r73274 1091 1091 */ 1092 1092 /** VMCS revision identifier used by the processor. */ 1093 #define MSR_IA32_VMX_BASIC_INFO_VMCS_ID(a) ((a) & 0x7FFFFFFF) 1094 /** Size of the VMCS. */ 1095 #define MSR_IA32_VMX_BASIC_INFO_VMCS_SIZE(a) (((a) >> 32) & 0x1FFF) 1096 /** Width of physical address used for the VMCS. 1097 * 0 -> limited to the available amount of physical ram 1098 * 1 -> within the first 4 GB 1099 */ 1100 #define MSR_IA32_VMX_BASIC_INFO_VMCS_PHYS_WIDTH(a) (((a) >> 48) & 1) 1101 /** Whether the processor supports the dual-monitor treatment of 1102 * system-management interrupts and system-management code. (always 1) */ 1103 #define MSR_IA32_VMX_BASIC_INFO_VMCS_DUAL_MON(a) (((a) >> 49) & 1) 1104 /** Memory type that must be used for the VMCS. */ 1105 #define MSR_IA32_VMX_BASIC_INFO_VMCS_MEM_TYPE(a) (((a) >> 50) & 0xF) 1106 /** Whether the processor provides additional information for exits due to 1107 * INS/OUTS. */ 1108 #define MSR_IA32_VMX_BASIC_INFO_VMCS_INS_OUTS(a) (((a) >> 54) & 1) 1093 #define MSR_IA32_VMX_BASIC_VMCS_ID(a) ((a) & 0x7FFFFFFF) 1094 /** Shift to get the VMCS size. */ 1095 #define MSR_IA32_VMX_BASIC_VMCS_SIZE_SHIFT 32 1096 /** VMCS size in bytes. */ 1097 #define MSR_IA32_VMX_BASIC_VMCS_SIZE(a) (((a) >> 32) & 0x1FFF) 1098 /** Shift to get the width of physical addresses and associated memory regions. */ 1099 #define MSR_IA32_VMX_BASIC_VMCS_PHYS_WIDTH_SHIFT 48 1100 /** Width of physical addresses used for the VMCS and associated memory regions. */ 1101 #define MSR_IA32_VMX_BASIC_VMCS_PHYS_WIDTH(a) (((a) >> 48) & 1) 1102 /** Shift to get the dual-monitor treatment of SMI and SMM. */ 1103 #define MSR_IA32_VMX_BASIC_DUAL_MON_SHIFT 49 1104 /** Dual-monitor treatment of SMI and SMM supported. */ 1105 #define MSR_IA32_VMX_BASIC_DUAL_MON(a) (((a) >> 49) & 1) 1106 /** Shift to get the memory type that must be used for the VMCS and associated 1107 * memory regions. */ 1108 #define MSR_IA32_VMX_BASIC_VMCS_MEM_TYPE_SHIFT 50 1109 /** Memory type that must be used for the VMCS and associated memory regions. */ 1110 #define MSR_IA32_VMX_BASIC_VMCS_MEM_TYPE(a) (((a) >> 50) & 0xF) 1111 /** Shift to get the additional VM-exit information for INS/OUTS. */ 1112 #define MSR_IA32_VMX_BASIC_VMCS_INS_OUTS_SHIFT 54 1113 /** Additional VM-exit information for INS/OUTS. */ 1114 #define MSR_IA32_VMX_BASIC_VMCS_INS_OUTS(a) (((a) >> 54) & 1) 1115 /** Shift to get the VMCS true controls. */ 1116 #define MSR_IA32_VMX_BASIC_TRUE_CONTROLS_SHIFT 55 1109 1117 /** Whether default 1 bits in control MSRs (pin/proc/exit/entry) may be 1110 1118 * cleared to 0 and that 'true' control MSRs are supported. */ 1111 #define MSR_IA32_VMX_BASIC_ INFO_TRUE_CONTROLS(a) (((a) >> 55) & 1)1119 #define MSR_IA32_VMX_BASIC_TRUE_CONTROLS(a) (((a) >> 55) & 1) 1112 1120 /** @} */ 1113 1121 … … 1118 1126 /** Relationship between the preemption timer and tsc; count down every time bit 1119 1127 * x of the tsc changes. */ 1120 #define MSR_IA32_VMX_MISC_PREEMPT_TSC_BIT(a) ((a) & 0x1 f)1128 #define MSR_IA32_VMX_MISC_PREEMPT_TSC_BIT(a) ((a) & 0x1F) 1121 1129 /** Whether VM-exit stores EFER.LMA into the "IA32e mode guest" field. */ 1122 1130 #define MSR_IA32_VMX_MISC_STORE_EFERLMA_VMEXIT(a) (((a) >> 5) & 1) … … 1516 1524 * @{ 1517 1525 */ 1518 #define VMX_EXIT_REASON_BASIC(a) ((a) & 0x ffff)1526 #define VMX_EXIT_REASON_BASIC(a) ((a) & 0xFFFF) 1519 1527 /** @} */ 1520 1528 … … 1532 1540 * @{ 1533 1541 */ 1534 #define VMX_EXIT_INTERRUPTION_INFO_VECTOR(a) ((a) & 0x ff)1542 #define VMX_EXIT_INTERRUPTION_INFO_VECTOR(a) ((a) & 0xFF) 1535 1543 #define VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT 8 1536 1544 #define VMX_EXIT_INTERRUPTION_INFO_TYPE(a) (((a) >> VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT) & 7) … … 1561 1569 * @{ 1562 1570 */ 1563 #define VMX_IDT_VECTORING_INFO_VECTOR(a) ((a) & 0x ff)1571 #define VMX_IDT_VECTORING_INFO_VECTOR(a) ((a) & 0xFF) 1564 1572 #define VMX_IDT_VECTORING_INFO_TYPE_SHIFT 8 1565 1573 #define VMX_IDT_VECTORING_INFO_TYPE(a) (((a) >> VMX_IDT_VECTORING_INFO_TYPE_SHIFT) & 7) … … 1727 1735 * @{ 1728 1736 */ 1729 #define VMX_EXIT_QUAL_TASK_SWITCH_SELECTOR(a) ((a) & 0x ffff)1737 #define VMX_EXIT_QUAL_TASK_SWITCH_SELECTOR(a) ((a) & 0xFFFF) 1730 1738 #define VMX_EXIT_QUAL_TASK_SWITCH_TYPE(a) (((a) >> 30) & 0x3) 1731 1739 /** Task switch caused by a call instruction. */ … … 1779 1787 #define VMX_EXIT_QUAL_IO_ENCODING(a) (((a) >> 6) & 1) 1780 1788 /** 16-31: IO Port (0-0xffff). */ 1781 #define VMX_EXIT_QUAL_IO_PORT(a) (((a) >> 16) & 0x ffff)1789 #define VMX_EXIT_QUAL_IO_PORT(a) (((a) >> 16) & 0xFFFF) 1782 1790 /* Rest reserved. */ 1783 1791 /** @} */ … … 2003 2011 2004 2012 2013 /** VMCS revision identifier used for emulating VMX (bit 31 MBZ). Bump this 2014 * arbitarily chosen identifier if incompatible changes to the layout of our VMCS 2015 * structure is done. */ 2016 #define VMX_VMCS_REVISION_ID UINT32_C(0x1d000001) 2017 AssertCompile(!(VMX_VMCS_REVISION_ID & RT_BIT(31))); 2018 /** VMCS (and related regions) memory type - Uncacheable. */ 2019 #define VMX_VMCS_MEM_TYPE_UC 0 2020 /** VMCS (and related regions) memory type - Write back. */ 2021 #define VMX_VMCS_MEM_TYPE_WB 6 2022 2023 2005 2024 /** @defgroup grp_hm_vmx_asm VMX Assembly Helpers 2006 2025 * @{
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