Changeset 74603 in vbox for trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

Timestamp:

Oct 4, 2018 6:07:20 AM (6 years ago)

Author:

vboxsync

Message:

VMM/IEM, HM: Nested VMX: bugref:9180 VM-exit bits; LMSW intercept. Separated VINF_HM_INTERCEPT_NOT_ACTIVE into VMX and SVM
specific codes. Adjusted IEMExecDecodedLmsw to supply the additional memory operand parameter from the VMCS guest-linear address
field.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -78 +78 @@
 #define HMVMX_READ_EXIT_INTERRUPTION_ERROR_CODE  RT_BIT_32(5)
 #define HMVMX_READ_EXIT_INSTR_INFO               RT_BIT_32(6)
+#define HMVMX_READ_GUEST_LINEAR_ADDR             RT_BIT_32(7)
 /** @} */
 
@@ -263 +264 @@
     /** The VM-exit exit code qualification. */
     uint64_t            uExitQual;
+    /** The Guest-linear address. */
+    uint64_t            uGuestLinearAddr;
 
     /** The VM-exit interruption-information field. */
@@ -724 +727 @@
 
 /**
- * Reads the exit code qualification from the VMCS into the VMX transient
- * structure.
+ * Reads the VM-exit Qualification from the VMCS into the VMX transient structure.
  *
  * @returns VBox status code.
@@ -739 +741 @@
         AssertRCReturn(rc, rc);
         pVmxTransient->fVmcsFieldsRead |= HMVMX_READ_EXIT_QUALIFICATION;
+    }
+    return VINF_SUCCESS;
+}
+
+
+/**
+ * Reads the Guest-linear address from the VMCS into the VMX transient structure.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu           The cross context virtual CPU structure of the
+ *                          calling EMT. (Required for the VMCS cache case.)
+ * @param   pVmxTransient   Pointer to the VMX transient structure.
+ */
+DECLINLINE(int) hmR0VmxReadGuestLinearAddrVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+{
+    if (!(pVmxTransient->fVmcsFieldsRead & HMVMX_READ_GUEST_LINEAR_ADDR))
+    {
+        int rc = VMXReadVmcsGstN(VMX_VMCS_RO_GUEST_LINEAR_ADDR, &pVmxTransient->uGuestLinearAddr); NOREF(pVCpu);
+        AssertRCReturn(rc, rc);
+        pVmxTransient->fVmcsFieldsRead |= HMVMX_READ_GUEST_LINEAR_ADDR;
     }
     return VINF_SUCCESS;
@@ -12282 +12304 @@
         {
             /* Note! LMSW cannot clear CR0.PE, so no fRealOnV86Active kludge needed here. */
-            rcStrict = IEMExecDecodedLmsw(pVCpu, pVmxTransient->cbInstr, VMX_EXIT_QUAL_CRX_LMSW_DATA(uExitQual));
+            rc = hmR0VmxReadGuestLinearAddrVmcs(pVCpu, pVmxTransient);
+            AssertRCReturn(rc, rc);
+            rcStrict = IEMExecDecodedLmsw(pVCpu, pVmxTransient->cbInstr, VMX_EXIT_QUAL_CRX_LMSW_DATA(uExitQual),
+                                          pVmxTransient->uGuestLinearAddr);
             AssertMsg(   rcStrict == VINF_SUCCESS
                       || rcStrict == VINF_IEM_RAISED_XCPT