Changeset 77463 in vbox for trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
- Timestamp:
- Feb 26, 2019 4:39:10 AM (6 years ago)
- File:
-
- 1 edited
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- Added
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r76993 r77463 234 234 } while (0) 235 235 236 # ifdef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM237 /** Macro that executes a VMX instruction in IEM. */238 # define HMVMX_IEM_EXEC_VMX_INSTR_RET(a_pVCpu) \239 do { \240 int rc = HMVMX_CPUMCTX_IMPORT_STATE((a_pVCpu), HMVMX_CPUMCTX_EXTRN_ALL); \241 AssertRCReturn(rc, rc); \242 VBOXSTRICTRC rcStrict = IEMExecOne((a_pVCpu)); \243 if (rcStrict == VINF_SUCCESS) \244 ASMAtomicUoOrU64(&(a_pVCpu)->hm.s.fCtxChanged, HM_CHANGED_ALL_GUEST); \245 else if (rcStrict == VINF_IEM_RAISED_XCPT) \246 { \247 rcStrict = VINF_SUCCESS; \248 ASMAtomicUoOrU64(&(a_pVCpu)->hm.s.fCtxChanged, HM_CHANGED_RAISED_XCPT_MASK); \249 } \250 return VBOXSTRICTRC_VAL(rcStrict); \251 } while (0)252 253 # endif /* VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM */254 236 #endif /* VBOX_WITH_NESTED_HWVIRT_VMX */ 255 237 … … 5897 5879 5898 5880 5899 # ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM5900 5881 /** 5901 5882 * Decodes the memory operand of an instruction that caused a VM-exit. … … 6163 6144 return VINF_SUCCESS; 6164 6145 } 6165 # endif /* !VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM */6166 6146 #endif /* VBOX_WITH_NESTED_HWVIRT_VMX */ 6167 6147 … … 13465 13445 { 13466 13446 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13467 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13447 13468 13448 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13469 13449 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK … … 13492 13472 } 13493 13473 return rcStrict; 13494 #else13495 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13496 #endif13497 13474 } 13498 13475 … … 13504 13481 { 13505 13482 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13506 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13483 13507 13484 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13508 13485 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_VMX_VMENTRY_MASK); … … 13516 13493 Assert(rcStrict != VINF_IEM_RAISED_XCPT); 13517 13494 return rcStrict; 13518 #else13519 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13520 #endif13521 13495 } 13522 13496 … … 13528 13502 { 13529 13503 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13530 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13504 13531 13505 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13532 13506 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK … … 13555 13529 } 13556 13530 return rcStrict; 13557 #else13558 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13559 #endif13560 13531 } 13561 13532 … … 13567 13538 { 13568 13539 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13569 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13540 13570 13541 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13571 13542 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK … … 13594 13565 } 13595 13566 return rcStrict; 13596 #else13597 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13598 #endif13599 13567 } 13600 13568 … … 13606 13574 { 13607 13575 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13608 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13576 13609 13577 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13610 13578 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK … … 13634 13602 } 13635 13603 return rcStrict; 13636 #else13637 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13638 #endif13639 13604 } 13640 13605 … … 13646 13611 { 13647 13612 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13648 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13613 13649 13614 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13650 13615 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_VMX_VMENTRY_MASK); … … 13658 13623 Assert(rcStrict != VINF_IEM_RAISED_XCPT); 13659 13624 return rcStrict; 13660 #else13661 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13662 #endif13663 13625 } 13664 13626 … … 13670 13632 { 13671 13633 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13672 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13634 13673 13635 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13674 13636 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK … … 13698 13660 } 13699 13661 return rcStrict; 13700 #else13701 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13702 #endif13703 13662 } 13704 13663 … … 13710 13669 { 13711 13670 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13712 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13671 13713 13672 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13714 13673 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR4 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK); … … 13729 13688 } 13730 13689 return rcStrict; 13731 #else13732 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13733 #endif13734 13690 } 13735 13691 … … 13741 13697 { 13742 13698 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 13743 #ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM 13699 13744 13700 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13745 13701 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK … … 13768 13724 } 13769 13725 return rcStrict; 13770 #else13771 HMVMX_IEM_EXEC_VMX_INSTR_RET(pVCpu);13772 #endif13773 13726 } 13774 13727
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