Changeset 80274 in vbox for trunk/src/VBox

Timestamp:

Aug 14, 2019 2:34:38 PM (5 years ago)

Author:

vboxsync

Message:

VMM: Refactoring VMMR0/* and VMMRZ/* to use VMCC & VMMCPUCC. bugref:9217

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/NEMAllNativeTemplate-win.cpp.h (modified) (67 diffs)
• VMMR0/CPUMR0.cpp (modified) (15 diffs)
• VMMR0/EMR0.cpp (modified) (3 diffs)
• VMMR0/GIMR0.cpp (modified) (4 diffs)
• VMMR0/GIMR0Hv.cpp (modified) (5 diffs)
• VMMR0/GIMR0Kvm.cpp (modified) (6 diffs)
• VMMR0/GMMR0.cpp (modified) (32 diffs)
• VMMR0/GVMMR0.cpp (modified) (39 diffs)
• VMMR0/HMR0.cpp (modified) (30 diffs)
• VMMR0/HMSVMR0.cpp (modified) (147 diffs)
• VMMR0/HMSVMR0.h (modified) (3 diffs)
• VMMR0/HMVMXR0.cpp (modified) (269 diffs)
• VMMR0/HMVMXR0.h (modified) (1 diff)
• VMMR0/NEMR0Native-win.cpp (modified) (32 diffs)
• VMMR0/PDMR0Device.cpp (modified) (16 diffs)
• VMMR0/PDMR0Driver.cpp (modified) (2 diffs)
• VMMR0/PGMR0.cpp (modified) (11 diffs)
• VMMR0/PGMR0Bth.h (modified) (1 diff)
• VMMR0/PGMR0SharedPage.cpp (modified) (3 diffs)
• VMMR0/TRPMR0.cpp (modified) (2 diffs)
• VMMR0/VMMR0.cpp (modified) (36 diffs)
• VMMRZ/CPUMRZ.cpp (modified) (1 diff)
• VMMRZ/DBGFRZ.cpp (modified) (2 diffs)
• VMMRZ/VMMRZ.cpp (modified) (9 diffs)
• include/HMInternal.h (modified) (1 diff)
• include/NEMInternal.h (modified) (2 diffs)
• include/PDMInternal.h (modified) (2 diffs)
• include/VMMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h

@@ -87 +87 @@
 *   Internal Functions                                                                                                           *
 *********************************************************************************************************************************/
-NEM_TMPL_STATIC int nemHCNativeSetPhysPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
+NEM_TMPL_STATIC int nemHCNativeSetPhysPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
                                            uint32_t fPageProt, uint8_t *pu2State, bool fBackingChanged);
 
@@ -105 +105 @@
  * @param   fFlags      HV_MAP_GPA_XXX.
  */
-DECLINLINE(int) nemHCWinHypercallMapPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst, uint32_t fFlags)
+DECLINLINE(int) nemHCWinHypercallMapPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst, uint32_t fFlags)
 {
 #ifdef IN_RING0
@@ -133 +133 @@
  * @param   GCPhys      The page to unmap.  Does not need to be page aligned.
  */
-DECLINLINE(int) nemHCWinHypercallUnmapPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys)
+DECLINLINE(int) nemHCWinHypercallUnmapPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys)
 {
 # ifdef IN_RING0
@@ -149 +149 @@
 #ifndef IN_RING0
 
-NEM_TMPL_STATIC int nemHCWinCopyStateToHyperV(PVM pVM, PVMCPU pVCpu)
+NEM_TMPL_STATIC int nemHCWinCopyStateToHyperV(PVMCC pVM, PVMCPUCC pVCpu)
 {
 # if defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS) || defined(NEM_WIN_WITH_RING0_RUNLOOP)
@@ -483 +483 @@
 
 
-NEM_TMPL_STATIC int nemHCWinCopyStateFromHyperV(PVM pVM, PVMCPU pVCpu, uint64_t fWhat)
+NEM_TMPL_STATIC int nemHCWinCopyStateFromHyperV(PVMCC pVM, PVMCPUCC pVCpu, uint64_t fWhat)
 {
 # if defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS) || defined(NEM_WIN_WITH_RING0_RUNLOOP)
@@ -1125 +1125 @@
  * @param   fWhat       What to import, CPUMCTX_EXTRN_XXX.
  */
-VMM_INT_DECL(int) NEMImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat)
+VMM_INT_DECL(int) NEMImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat)
 {
     STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatImportOnDemand);
@@ -1132 +1132 @@
 # ifdef NEM_WIN_WITH_RING0_RUNLOOP
     /** @todo improve and secure this translation */
+#  ifdef VBOX_BUGREF_9217
+    return nemR0WinImportState(pVCpu->pGVM, pVCpu, &pVCpu->cpum.GstCtx, fWhat, true /*fCanUpdateCr3*/);
+#  else
     PGVM pGVM = GVMMR0ByHandle(pVCpu->pVMR0->hSelf);
     AssertReturn(pGVM, VERR_INVALID_VMCPU_HANDLE);
@@ -1139 +1142 @@
 
     return nemR0WinImportState(pGVM, &pGVM->aCpus[idCpu], &pVCpu->cpum.GstCtx, fWhat, true /*fCanUpdateCr3*/);
+#  endif
 # else
     RT_NOREF(pVCpu, fWhat);
@@ -1157 +1161 @@
  * @param   puAux       Where to return the TSC_AUX register value.
  */
-VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPU pVCpu, uint64_t *pcTicks, uint32_t *puAux)
+VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPUCC pVCpu, uint64_t *pcTicks, uint32_t *puAux)
 {
     STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatQueryCpuTick);
 
 #ifdef IN_RING3
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     VMCPU_ASSERT_EMT_RETURN(pVCpu, VERR_VM_THREAD_NOT_EMT);
     AssertReturn(VM_IS_NEM_ENABLED(pVM), VERR_NEM_IPE_9);
@@ -1198 +1202 @@
 #else  /* IN_RING0 */
 # ifdef NEM_WIN_WITH_RING0_RUNLOOP
+#  ifdef VBOX_BUGREF_9217
+    int rc = nemR0WinQueryCpuTick(pVCpu->pGVM, pVCpu, pcTicks, puAux);
+#  else
     /** @todo improve and secure this translation */
     PGVM pGVM = GVMMR0ByHandle(pVCpu->pVMR0->hSelf);
@@ -1204 +1211 @@
     ASMCompilerBarrier();
     AssertReturn(idCpu < pGVM->cCpus, VERR_INVALID_VMCPU_HANDLE);
-
     int rc = nemR0WinQueryCpuTick(pGVM, &pGVM->aCpus[idCpu], pcTicks, puAux);
+#  endif
     if (RT_SUCCESS(rc) && puAux && !(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_TSC_AUX))
         *puAux = CPUMGetGuestTscAux(pVCpu);
@@ -1227 +1234 @@
  * @param   uPausedTscValue The TSC value at the time of pausing.
  */
-VMM_INT_DECL(int) NEMHCResumeCpuTickOnAll(PVM pVM, PVMCPU pVCpu, uint64_t uPausedTscValue)
+VMM_INT_DECL(int) NEMHCResumeCpuTickOnAll(PVMCC pVM, PVMCPUCC pVCpu, uint64_t uPausedTscValue)
 {
 #ifdef IN_RING0
 # ifdef NEM_WIN_WITH_RING0_RUNLOOP
+#  ifdef VBOX_BUGREF_9217
+    return nemR0WinResumeCpuTickOnAll(pVM, pVCpu, uPausedTscValue);
+#  else
     /** @todo improve and secure this translation */
     PGVM pGVM = GVMMR0ByHandle(pVM->hSelf);
@@ -1239 +1249 @@
 
     return nemR0WinResumeCpuTickOnAll(pGVM, &pGVM->aCpus[idCpu], uPausedTscValue);
+#  endif
 # else
     RT_NOREF(pVM, pVCpu, uPausedTscValue);
@@ -1296 +1307 @@
 # if defined(IN_RING0) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
 /** Worker for assertion macro. */
-NEM_TMPL_STATIC int nemHCWinGetRegister(PVMCPU pVCpu, PGVMCPU pGVCpu, uint32_t enmReg, HV_REGISTER_VALUE *pRetValue)
+NEM_TMPL_STATIC int nemHCWinGetRegister(PVMCPUCC pVCpu, PGVMCPU pGVCpu, uint32_t enmReg, HV_REGISTER_VALUE *pRetValue)
 {
     RT_ZERO(*pRetValue);
@@ -1336 +1347 @@
 # else
 /** Worker for assertion macro. */
-NEM_TMPL_STATIC int nemR3WinGetRegister(PVMCPU a_pVCpu, uint32_t a_enmReg, WHV_REGISTER_VALUE pValue)
+NEM_TMPL_STATIC int nemR3WinGetRegister(PVMCPUCC a_pVCpu, uint32_t a_enmReg, WHV_REGISTER_VALUE pValue)
 {
     RT_ZERO(*pRetValue);
@@ -1350 +1361 @@
  * Get the virtual processor running status.
  */
-DECLINLINE(VID_PROCESSOR_STATUS) nemHCWinCpuGetRunningStatus(PVMCPU pVCpu)
+DECLINLINE(VID_PROCESSOR_STATUS) nemHCWinCpuGetRunningStatus(PVMCPUCC pVCpu)
 {
 # ifdef IN_RING0
@@ -1386 +1397 @@
  *                          calling EMT.
  */
-NEM_TMPL_STATIC int nemHCWinCancelRunVirtualProcessor(PVM pVM, PVMCPU pVCpu)
+NEM_TMPL_STATIC int nemHCWinCancelRunVirtualProcessor(PVMCC pVM, PVMCPUCC pVCpu)
 {
     /*
@@ -1448 +1459 @@
  * Logs the current CPU state.
  */
-NEM_TMPL_STATIC void nemHCWinLogState(PVM pVM, PVMCPU pVCpu)
+NEM_TMPL_STATIC void nemHCWinLogState(PVMCC pVM, PVMCPUCC pVCpu)
 {
     if (LogIs3Enabled())
@@ -1565 +1576 @@
  */
 DECLINLINE(void)
-nemHCWinAdvanceGuestRipAndClearRF(PVMCPU pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pMsgHdr, uint8_t cbMinInstr)
+nemHCWinAdvanceGuestRipAndClearRF(PVMCPUCC pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pMsgHdr, uint8_t cbMinInstr)
 {
     Assert(!(pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS)));
@@ -1590 +1601 @@
  * @param   cbMinInstr      The minimum instruction length, or 1 if not unknown.
  */
-DECLINLINE(void) nemR3WinAdvanceGuestRipAndClearRF(PVMCPU pVCpu, WHV_VP_EXIT_CONTEXT const *pExitCtx, uint8_t cbMinInstr)
+DECLINLINE(void) nemR3WinAdvanceGuestRipAndClearRF(PVMCPUCC pVCpu, WHV_VP_EXIT_CONTEXT const *pExitCtx, uint8_t cbMinInstr)
 {
     Assert(!(pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS)));
@@ -1610 +1621 @@
 
 NEM_TMPL_STATIC DECLCALLBACK(int)
-nemHCWinUnmapOnePageCallback(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint8_t *pu2NemState, void *pvUser)
+nemHCWinUnmapOnePageCallback(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, uint8_t *pu2NemState, void *pvUser)
 {
     RT_NOREF_PV(pvUser);
@@ -1663 +1674 @@
  */
 NEM_TMPL_STATIC DECLCALLBACK(int)
-nemHCWinHandleMemoryAccessPageCheckerCallback(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, PPGMPHYSNEMPAGEINFO pInfo, void *pvUser)
+nemHCWinHandleMemoryAccessPageCheckerCallback(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, PPGMPHYSNEMPAGEINFO pInfo, void *pvUser)
 {
     NEMHCWINHMACPCCSTATE *pState = (NEMHCWINHMACPCCSTATE *)pvUser;
@@ -1848 +1859 @@
  * @param   pszCaller       Who is doing the importing.
  */
-DECLINLINE(VBOXSTRICTRC) nemR0WinImportStateStrict(PGVM pGVM, PGVMCPU pGVCpu, PVMCPU pVCpu, uint64_t fWhat, const char *pszCaller)
+DECLINLINE(VBOXSTRICTRC) nemR0WinImportStateStrict(PGVM pGVM, PGVMCPU pGVCpu, PVMCPUCC pVCpu, uint64_t fWhat, const char *pszCaller)
 {
     int rc = nemR0WinImportState(pGVM, pGVCpu, &pVCpu->cpum.GstCtx, fWhat, true /*fCanUpdateCr3*/);
@@ -1879 +1890 @@
  * @param   pszCaller       Who is doing the importing.
  */
-DECLINLINE(VBOXSTRICTRC) nemHCWinImportStateIfNeededStrict(PVMCPU pVCpu, PGVMCPU pGVCpu, uint64_t fWhat, const char *pszCaller)
+DECLINLINE(VBOXSTRICTRC) nemHCWinImportStateIfNeededStrict(PVMCPUCC pVCpu, PGVMCPU pGVCpu, uint64_t fWhat, const char *pszCaller)
 {
     if (pVCpu->cpum.GstCtx.fExtrn & fWhat)
@@ -1905 +1916 @@
  * @sa      nemR3WinCopyStateFromX64Header
  */
-DECLINLINE(void) nemHCWinCopyStateFromX64Header(PVMCPU pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pHdr)
+DECLINLINE(void) nemHCWinCopyStateFromX64Header(PVMCPUCC pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pHdr)
 {
     Assert(   (pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT))
@@ -1936 +1947 @@
  * @sa      nemHCWinCopyStateFromX64Header
  */
-DECLINLINE(void) nemR3WinCopyStateFromX64Header(PVMCPU pVCpu, WHV_VP_EXIT_CONTEXT const *pExitCtx)
+DECLINLINE(void) nemR3WinCopyStateFromX64Header(PVMCPUCC pVCpu, WHV_VP_EXIT_CONTEXT const *pExitCtx)
 {
     Assert(   (pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT))
@@ -1972 +1983 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemHCWinHandleMessageMemory(PVM pVM, PVMCPU pVCpu, HV_X64_MEMORY_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
+nemHCWinHandleMessageMemory(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_MEMORY_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
 {
     uint64_t const uHostTsc = ASMReadTSC();
@@ -2098 +2109 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemR3WinHandleExitMemory(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+nemR3WinHandleExitMemory(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     uint64_t const uHostTsc = ASMReadTSC();
@@ -2196 +2207 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemHCWinHandleMessageIoPort(PVM pVM, PVMCPU pVCpu, HV_X64_IO_PORT_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
+nemHCWinHandleMessageIoPort(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_IO_PORT_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
 {
     /*
@@ -2411 +2422 @@
  * @sa      nemHCWinHandleMessageIoPort
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitIoPort(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitIoPort(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     Assert(   pExit->IoPortAccess.AccessInfo.AccessSize == 1
@@ -2579 +2590 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemHCWinHandleMessageInterruptWindow(PVM pVM, PVMCPU pVCpu, HV_X64_INTERRUPT_WINDOW_MESSAGE const *pMsg, PGVMCPU pGVCpu)
+nemHCWinHandleMessageInterruptWindow(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_INTERRUPT_WINDOW_MESSAGE const *pMsg, PGVMCPU pGVCpu)
 {
     /*
@@ -2614 +2625 @@
  * @sa      nemHCWinHandleMessageInterruptWindow
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitInterruptWindow(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitInterruptWindow(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     /*
@@ -2653 +2664 @@
  * @sa      nemR3WinHandleExitCpuId
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageCpuId(PVM pVM, PVMCPU pVCpu, HV_X64_CPUID_INTERCEPT_MESSAGE const *pMsg,
+NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageCpuId(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_CPUID_INTERCEPT_MESSAGE const *pMsg,
                                                         PGVMCPU pGVCpu)
 {
@@ -2745 +2756 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemR3WinHandleExitCpuId(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+nemR3WinHandleExitCpuId(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     PCEMEXITREC pExitRec = EMHistoryAddExit(pVCpu, EMEXIT_MAKE_FT(EMEXIT_F_KIND_EM, EMEXITTYPE_CPUID),
@@ -2820 +2831 @@
  * @sa      nemR3WinHandleExitMsr
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageMsr(PVMCPU pVCpu, HV_X64_MSR_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
+NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageMsr(PVMCPUCC pVCpu, HV_X64_MSR_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
 {
     /*
@@ -2972 +2983 @@
  * @sa      nemHCWinHandleMessageMsr
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitMsr(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitMsr(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     /*
@@ -3168 +3179 @@
  */
 DECLINLINE(void)
-nemHCWinCopyStateFromExceptionMessage(PVMCPU pVCpu, HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *pMsg, bool fClearXcpt)
+nemHCWinCopyStateFromExceptionMessage(PVMCPUCC pVCpu, HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *pMsg, bool fClearXcpt)
 {
     nemHCWinCopyStateFromX64Header(pVCpu, &pMsg->Header);
@@ -3200 +3211 @@
  * @param   fClearXcpt      Clear pending exception.
  */
-DECLINLINE(void) nemR3WinCopyStateFromExceptionMessage(PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit, bool fClearXcpt)
+DECLINLINE(void) nemR3WinCopyStateFromExceptionMessage(PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit, bool fClearXcpt)
 {
     nemR3WinCopyStateFromX64Header(pVCpu, &pExit->VpContext);
@@ -3220 +3231 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemHCWinHandleMessageException(PVMCPU pVCpu, HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
+nemHCWinHandleMessageException(PVMCPUCC pVCpu, HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
 {
     /*
@@ -3347 +3358 @@
  * @sa      nemR3WinHandleExitException
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitException(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitException(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     /*
@@ -3456 +3467 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemHCWinHandleMessageUnrecoverableException(PVMCPU pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pMsgHdr, PGVMCPU pGVCpu)
+nemHCWinHandleMessageUnrecoverableException(PVMCPUCC pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pMsgHdr, PGVMCPU pGVCpu)
 {
     /* Check message register value sanity. */
@@ -3514 +3525 @@
  * @sa      nemHCWinHandleMessageUnrecoverableException
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitUnrecoverableException(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitUnrecoverableException(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
 # if 0
@@ -3574 +3585 @@
  */
 NEM_TMPL_STATIC VBOXSTRICTRC
-nemHCWinHandleMessage(PVM pVM, PVMCPU pVCpu, VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader, PGVMCPU pGVCpu)
+nemHCWinHandleMessage(PVMCC pVM, PVMCPUCC pVCpu, VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader, PGVMCPU pGVCpu)
 {
     if (pMappingHeader->enmVidMsgType == VidMessageHypervisorMessage)
@@ -3668 +3679 @@
  * @sa      nemHCWinHandleMessage
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExit(PVM pVM, PVMCPU pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
+NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExit(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
 {
     switch (pExit->ExitReason)
@@ -3738 +3749 @@
  * @param   cMillies        The timeout in milliseconds
  */
-static NTSTATUS nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(PGVM pGVM, PGVMCPU pGVCpu, PVMCPU pVCpu,
+static NTSTATUS nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(PGVM pGVM, PGVMCPU pGVCpu, PVMCPUCC pVCpu,
                                                                uint32_t fFlags, uint32_t cMillies)
 {
@@ -3744 +3755 @@
     pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = fFlags;
     pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMillies;
-    NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
+    NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
                                             &pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
                                             pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
@@ -3768 +3779 @@
         pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = fFlags & ~VID_MSHAGN_F_HANDLE_MESSAGE;
         pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMillies;
-        rcNt = nemR0NtPerformIoControl(pGVM, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
+        rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
                                        &pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
                                        pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
@@ -3798 +3809 @@
  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinStopCpu(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict,
+NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinStopCpu(PVMCC pVM, PVMCPUCC pVCpu, VBOXSTRICTRC rcStrict,
                                              VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader,
                                              PGVM pGVM, PGVMCPU pGVCpu)
@@ -3813 +3824 @@
 # ifdef IN_RING0
     pVCpu->nem.s.uIoCtlBuf.idCpu = pGVCpu->idCpu;
-    NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pGVM->nemr0.s.IoCtlStopVirtualProcessor.uFunction,
+    NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlStopVirtualProcessor.uFunction,
                                             &pVCpu->nem.s.uIoCtlBuf.idCpu, sizeof(pVCpu->nem.s.uIoCtlBuf.idCpu),
                                             NULL, 0);
@@ -3951 +3962 @@
  * @param   pfInterruptWindows  Where to return interrupt window flags.
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleInterruptFF(PVM pVM, PVMCPU pVCpu, PGVMCPU pGVCpu, uint8_t *pfInterruptWindows)
+NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleInterruptFF(PVMCC pVM, PVMCPUCC pVCpu, PGVMCPU pGVCpu, uint8_t *pfInterruptWindows)
 {
     Assert(!TRPMHasTrap(pVCpu));
@@ -4059 +4070 @@
  * @param   pGVCpu          The ring-0 per CPU structure (NULL in ring-3).
  */
-NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinRunGC(PVM pVM, PVMCPU pVCpu, PGVM pGVM, PGVMCPU pGVCpu)
+NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinRunGC(PVMCC pVM, PVMCPUCC pVCpu, PGVM pGVM, PGVMCPU pGVCpu)
 {
     LogFlow(("NEM/%u: %04x:%08RX64 efl=%#08RX64 <=\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rflags));
@@ -4198 +4209 @@
 #  ifdef IN_RING0
                 pVCpu->nem.s.uIoCtlBuf.idCpu = pGVCpu->idCpu;
-                NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pGVM->nemr0.s.IoCtlStartVirtualProcessor.uFunction,
+                NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlStartVirtualProcessor.uFunction,
                                                         &pVCpu->nem.s.uIoCtlBuf.idCpu, sizeof(pVCpu->nem.s.uIoCtlBuf.idCpu),
                                                         NULL, 0);
@@ -4235 +4246 @@
                 pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = pVCpu->nem.s.fHandleAndGetFlags;
                 pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMsWait;
-                NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
+                NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
                                                         &pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
                                                         pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
@@ -4412 +4423 @@
  * @callback_method_impl{FNPGMPHYSNEMCHECKPAGE}
  */
-NEM_TMPL_STATIC DECLCALLBACK(int) nemHCWinUnsetForA20CheckerCallback(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys,
+NEM_TMPL_STATIC DECLCALLBACK(int) nemHCWinUnsetForA20CheckerCallback(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys,
                                                                      PPGMPHYSNEMPAGEINFO pInfo, void *pvUser)
 {
@@ -4456 +4467 @@
  * @param   GCPhys          The page to unmap.
  */
-NEM_TMPL_STATIC int nemHCWinUnmapPageForA20Gate(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys)
+NEM_TMPL_STATIC int nemHCWinUnmapPageForA20Gate(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys)
 {
     PGMPHYSNEMPAGEINFO Info;
@@ -4464 +4475 @@
 
 
-void nemHCNativeNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb)
+void nemHCNativeNotifyHandlerPhysicalRegister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb)
 {
     Log5(("nemHCNativeNotifyHandlerPhysicalRegister: %RGp LB %RGp enmKind=%d\n", GCPhys, cb, enmKind));
@@ -4471 +4482 @@
 
 
-void nemHCNativeNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb,
+void nemHCNativeNotifyHandlerPhysicalDeregister(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb,
                                                 int fRestoreAsRAM, bool fRestoreAsRAM2)
 {
@@ -4480 +4491 @@
 
 
-void nemHCNativeNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld,
+void nemHCNativeNotifyHandlerPhysicalModify(PVMCC pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld,
                                             RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fRestoreAsRAM)
 {
@@ -4507 +4518 @@
  * @thread  EMT(pVCpu)
  */
-NEM_TMPL_STATIC int nemHCNativeSetPhysPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
+NEM_TMPL_STATIC int nemHCNativeSetPhysPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
                                            uint32_t fPageProt, uint8_t *pu2State, bool fBackingChanged)
 {
@@ -4727 +4738 @@
 
 
-NEM_TMPL_STATIC int nemHCJustUnmapPageFromHyperV(PVM pVM, RTGCPHYS GCPhysDst, uint8_t *pu2State)
+NEM_TMPL_STATIC int nemHCJustUnmapPageFromHyperV(PVMCC pVM, RTGCPHYS GCPhysDst, uint8_t *pu2State)
 {
     if (*pu2State <= NEM_WIN_PAGE_STATE_UNMAPPED)
@@ -4737 +4748 @@
 
 #if defined(NEM_WIN_USE_HYPERCALLS_FOR_PAGES) || defined(IN_RING0)
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPUCC pVCpu = VMMGetCpu(pVM);
     int rc = nemHCWinHypercallUnmapPage(pVM, pVCpu, GCPhysDst);
     AssertRC(rc);
@@ -4765 +4776 @@
 
 
-int nemHCNativeNotifyPhysPageAllocated(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
+int nemHCNativeNotifyPhysPageAllocated(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
                                        PGMPAGETYPE enmType, uint8_t *pu2State)
 {
@@ -4774 +4785 @@
     int rc;
 #if defined(NEM_WIN_USE_HYPERCALLS_FOR_PAGES) || defined(IN_RING0)
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPUCC pVCpu = VMMGetCpu(pVM);
     if (   pVM->nem.s.fA20Enabled
         || !NEM_WIN_IS_RELEVANT_TO_A20(GCPhys))
@@ -4800 +4811 @@
 
 
-void nemHCNativeNotifyPhysPageProtChanged(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
+void nemHCNativeNotifyPhysPageProtChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint32_t fPageProt,
                                           PGMPAGETYPE enmType, uint8_t *pu2State)
 {
@@ -4808 +4819 @@
 
 #if defined(NEM_WIN_USE_HYPERCALLS_FOR_PAGES) || defined(IN_RING0)
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPUCC pVCpu = VMMGetCpu(pVM);
     if (   pVM->nem.s.fA20Enabled
         || !NEM_WIN_IS_RELEVANT_TO_A20(GCPhys))
@@ -4831 +4842 @@
 
 
-void nemHCNativeNotifyPhysPageChanged(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew,
+void nemHCNativeNotifyPhysPageChanged(PVMCC pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhysPrev, RTHCPHYS HCPhysNew,
                                      uint32_t fPageProt, PGMPAGETYPE enmType, uint8_t *pu2State)
 {
@@ -4839 +4850 @@
 
 #if defined(NEM_WIN_USE_HYPERCALLS_FOR_PAGES) || defined(IN_RING0)
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPUCC pVCpu = VMMGetCpu(pVM);
     if (   pVM->nem.s.fA20Enabled
         || !NEM_WIN_IS_RELEVANT_TO_A20(GCPhys))

trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_CPUM
 #include <VBox/vmm/cpum.h>
 #include "CPUMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvm.h>
 #include <VBox/err.h>
@@ -102 +103 @@
 static void cpumR0UnmapLocalApics(void);
 #endif
-static int  cpumR0SaveHostDebugState(PVMCPU pVCpu);
+static int  cpumR0SaveHostDebugState(PVMCPUCC pVCpu);
 
 
@@ -145 +146 @@
 static DECLCALLBACK(void) cpumR0CheckCpuid(RTCPUID idCpu, void *pvUser1, void *pvUser2)
 {
-    PVM     pVM   = (PVM)pvUser1;
+    PVMCC     pVM   = (PVMCC)pvUser1;
 
     NOREF(idCpu); NOREF(pvUser2);
@@ -183 +184 @@
  * @param   pVM         The cross context VM structure.
  */
-VMMR0_INT_DECL(int) CPUMR0InitVM(PVM pVM)
+VMMR0_INT_DECL(int) CPUMR0InitVM(PVMCC pVM)
 {
     LogFlow(("CPUMR0Init: %p\n", pVM));
@@ -297 +298 @@
 
                 if (pVM->cpum.s.GuestFeatures.fArchCap)
-                    for (VMCPUID i = 0; i < pVM->cCpus; i++)
-                        pVM->aCpus[i].cpum.s.GuestMsrs.msr.ArchCaps = fArchVal;
+                    VMCC_FOR_EACH_VMCPU_STMT(pVM, pVCpu->cpum.s.GuestMsrs.msr.ArchCaps = fArchVal);
             }
             else
@@ -347 +347 @@
     if (u32DR7 & X86_DR7_ENABLED_MASK)
     {
-#ifdef VBOX_BUGREF_9217
-        PGVM pGVM = (PGVM)pVM;
-        for (VMCPUID i = 0; i < pGVM->cCpusSafe; i++)
-            pGVM->aCpus[i].cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST;
-#else
-        for (VMCPUID i = 0; i < pVM->cCpus; i++)
-            pVM->aCpus[i].cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST;
-#endif
+        VMCC_FOR_EACH_VMCPU_STMT(pVM, pVCpu->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST);
         Log(("CPUMR0Init: host uses debug registers (dr7=%x)\n", u32DR7));
     }
@@ -374 +367 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(int) CPUMR0Trap07Handler(PVM pVM, PVMCPU pVCpu)
+VMMR0_INT_DECL(int) CPUMR0Trap07Handler(PVMCC pVM, PVMCPUCC pVCpu)
 {
     Assert(pVM->cpum.s.HostFeatures.fFxSaveRstor);
@@ -436 +429 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu)
+VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVMCC pVM, PVMCPUCC pVCpu)
 {
     int rc;
@@ -480 +473 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(bool) CPUMR0FpuStateMaybeSaveGuestAndRestoreHost(PVMCPU pVCpu)
+VMMR0_INT_DECL(bool) CPUMR0FpuStateMaybeSaveGuestAndRestoreHost(PVMCPUCC pVCpu)
 {
     bool fSavedGuest;
@@ -523 +516 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-static int cpumR0SaveHostDebugState(PVMCPU pVCpu)
+static int cpumR0SaveHostDebugState(PVMCPUCC pVCpu)
 {
     /*
@@ -564 +557 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuestAndRestoreHost(PVMCPU pVCpu, bool fDr6)
+VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuestAndRestoreHost(PVMCPUCC pVCpu, bool fDr6)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -623 +616 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuest(PVMCPU pVCpu, bool fDr6)
+VMMR0_INT_DECL(bool) CPUMR0DebugStateMaybeSaveGuest(PVMCPUCC pVCpu, bool fDr6)
 {
     /*
@@ -650 +643 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0_INT_DECL(void) CPUMR0LoadGuestDebugState(PVMCPU pVCpu, bool fDr6)
+VMMR0_INT_DECL(void) CPUMR0LoadGuestDebugState(PVMCPUCC pVCpu, bool fDr6)
 {
     /*
@@ -681 +674 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0_INT_DECL(void) CPUMR0LoadHyperDebugState(PVMCPU pVCpu, bool fDr6)
+VMMR0_INT_DECL(void) CPUMR0LoadHyperDebugState(PVMCPUCC pVCpu, bool fDr6)
 {
     /*
@@ -944 +937 @@
  * @param   iHostCpuSet The CPU set index of the current host CPU.
  */
-VMMR0_INT_DECL(void) CPUMR0SetLApic(PVMCPU pVCpu, uint32_t iHostCpuSet)
+VMMR0_INT_DECL(void) CPUMR0SetLApic(PVMCPUCC pVCpu, uint32_t iHostCpuSet)
 {
     Assert(iHostCpuSet <= RT_ELEMENTS(g_aLApics));

trunk/src/VBox/VMM/VMMR0/EMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_EM
 #include <VBox/vmm/em.h>
 #include "EMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvm.h>
 #include <iprt/errcore.h>
@@ -41 +42 @@
 #ifdef VBOX_BUGREF_9217
 VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM)
-# define pVM pGVM /* temp hack */
 #else
-VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM, PVM pVM)
+VMMR0_INT_DECL(int) EMR0InitVM(PGVM pGVM, PVMCC pVM)
 #endif
 {
@@ -49 +49 @@
      * Override ring-0 exit optimizations settings.
      */
-    bool fEnabledR0                = pVM->aCpus[0].em.s.fExitOptimizationEnabled
-                                  && pVM->aCpus[0].em.s.fExitOptimizationEnabledR0
+#ifdef VBOX_BUGREF_9217
+    PVMCPUCC pVCpu0 = &pGVM->aCpus[0];
+#else
+    PVMCPUCC pVCpu0 = VMCC_GET_CPU_0(pVM);
+#endif
+
+    bool fEnabledR0                = pVCpu0->em.s.fExitOptimizationEnabled
+                                  && pVCpu0->em.s.fExitOptimizationEnabledR0
                                   && (RTThreadPreemptIsPossible() || RTThreadPreemptIsPendingTrusty());
     bool fEnabledR0PreemptDisabled = fEnabledR0
-                                  && pVM->aCpus[0].em.s.fExitOptimizationEnabledR0PreemptDisabled
+                                  && pVCpu0->em.s.fExitOptimizationEnabledR0PreemptDisabled
                                   && RTThreadPreemptIsPendingTrusty();
+    for (VMCPUID idCpu = 0; idCpu < pGVM->cCpus; idCpu++)
+    {
 #ifdef VBOX_BUGREF_9217
-    for (VMCPUID i = 0; i < pGVM->cCpusSafe; i++)
+        PVMCPUCC pVCpu = &pGVM->aCpus[idCpu];
 #else
-    for (VMCPUID i = 0; i < pGVM->cCpus; i++)
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
 #endif
-    {
-        pVM->aCpus[i].em.s.fExitOptimizationEnabledR0                = fEnabledR0;
-        pVM->aCpus[i].em.s.fExitOptimizationEnabledR0PreemptDisabled = fEnabledR0PreemptDisabled;
+        pVCpu->em.s.fExitOptimizationEnabledR0                = fEnabledR0;
+        pVCpu->em.s.fExitOptimizationEnabledR0PreemptDisabled = fEnabledR0PreemptDisabled;
     }
 

trunk/src/VBox/VMM/VMMR0/GIMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_GIM
 #include <VBox/vmm/gim.h>
 #include "GIMInternal.h"
 #include "GIMHvInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 
 #include <VBox/err.h>
@@ -35 +36 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0_INT_DECL(int) GIMR0InitVM(PVM pVM)
+VMMR0_INT_DECL(int) GIMR0InitVM(PVMCC pVM)
 {
     if (!GIMIsEnabled(pVM))
@@ -61 +62 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0_INT_DECL(int) GIMR0TermVM(PVM pVM)
+VMMR0_INT_DECL(int) GIMR0TermVM(PVMCC pVM)
 {
     if (!GIMIsEnabled(pVM))
@@ -97 +98 @@
  * @thread EMT(pVCpu)
  */
-VMMR0_INT_DECL(int) GIMR0UpdateParavirtTsc(PVM pVM, uint64_t u64Offset)
+VMMR0_INT_DECL(int) GIMR0UpdateParavirtTsc(PVMCC pVM, uint64_t u64Offset)
 {
     switch (pVM->gim.s.enmProviderId)

trunk/src/VBox/VMM/VMMR0/GIMR0Hv.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_GIM
 #include <VBox/vmm/gim.h>
@@ -25 +26 @@
 #include "GIMInternal.h"
 #include "GIMHvInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 
 #include <VBox/err.h>
@@ -93 +94 @@
  * @thread  EMT.
  */
-VMM_INT_DECL(int) gimR0HvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset)
+VMM_INT_DECL(int) gimR0HvUpdateParavirtTsc(PVMCC pVM, uint64_t u64Offset)
 {
     Assert(GIMIsEnabled(pVM));
@@ -150 +151 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0_INT_DECL(int) gimR0HvInitVM(PVM pVM)
+VMMR0_INT_DECL(int) gimR0HvInitVM(PVMCC pVM)
 {
     AssertPtr(pVM);
@@ -169 +170 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0_INT_DECL(int) gimR0HvTermVM(PVM pVM)
+VMMR0_INT_DECL(int) gimR0HvTermVM(PVMCC pVM)
 {
     AssertPtr(pVM);

trunk/src/VBox/VMM/VMMR0/GIMR0Kvm.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_GIM
 #include <VBox/vmm/gim.h>
@@ -25 +26 @@
 #include "GIMInternal.h"
 #include "GIMKvmInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 
 #include <VBox/err.h>
@@ -41 +42 @@
  * @remarks Can be called with preemption disabled!
  */
-VMM_INT_DECL(int) gimR0KvmUpdateSystemTime(PVM pVM, PVMCPU pVCpu)
+VMM_INT_DECL(int) gimR0KvmUpdateSystemTime(PVMCC pVM, PVMCPUCC pVCpu)
 {
     /*
@@ -65 +66 @@
      */
     RTSpinlockAcquire(pKvm->hSpinlockR0);
-    for (uint32_t i = 0; i < pVM->cCpus; i++)
+    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     {
-        PGIMKVMCPU pKvmCpu = &pVM->aCpus[i].gim.s.u.KvmCpu;
+        PGIMKVMCPU pKvmCpu = &VMCC_GET_CPU(pVM, idCpu)->gim.s.u.KvmCpu;
         if (   !pKvmCpu->uTsc
             && !pKvmCpu->uVirtNanoTS)
@@ -87 +88 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0_INT_DECL(int) gimR0KvmInitVM(PVM pVM)
+VMMR0_INT_DECL(int) gimR0KvmInitVM(PVMCC pVM)
 {
     AssertPtr(pVM);
@@ -106 +107 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0_INT_DECL(int) gimR0KvmTermVM(PVM pVM)
+VMMR0_INT_DECL(int) gimR0KvmTermVM(PVMCC pVM)
 {
     AssertPtr(pVM);

trunk/src/VBox/VMM/VMMR0/GMMR0.cpp

@@ -150 +150 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_GMM
 #include <VBox/rawpci.h>
-#include <VBox/vmm/vm.h>
 #include <VBox/vmm/gmm.h>
 #include "GMMR0Internal.h"
-#include <VBox/vmm/gvm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/pgm.h>
 #include <VBox/log.h>
@@ -1226 +1226 @@
 GMMR0DECL(void) GMMR0CleanupVM(PGVM pGVM)
 {
+#ifdef VBOX_BUGREF_9217
+    LogFlow(("GMMR0CleanupVM: pGVM=%p:{.hSelf=%#x}\n", pGVM, pGVM->hSelf));
+#else
     LogFlow(("GMMR0CleanupVM: pGVM=%p:{.pVM=%p, .hSelf=%#x}\n", pGVM, pGVM->pVM, pGVM->hSelf));
+#endif
 
     PGMM pGMM;
@@ -1554 +1558 @@
  * @thread  The creator thread / EMT(0).
  */
-GMMR0DECL(int) GMMR0InitialReservation(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t cBasePages, uint32_t cShadowPages,
+GMMR0DECL(int) GMMR0InitialReservation(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint64_t cBasePages, uint32_t cShadowPages,
                                        uint32_t cFixedPages, GMMOCPOLICY enmPolicy, GMMPRIORITY enmPriority)
 {
@@ -1624 +1628 @@
  * @param   pReq            Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0InitialReservationReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMINITIALRESERVATIONREQ pReq)
+GMMR0DECL(int) GMMR0InitialReservationReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMINITIALRESERVATIONREQ pReq)
 {
     /*
@@ -1655 +1659 @@
  * @thread  EMT(idCpu)
  */
-GMMR0DECL(int) GMMR0UpdateReservation(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t cBasePages,
+GMMR0DECL(int) GMMR0UpdateReservation(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint64_t cBasePages,
                                       uint32_t cShadowPages, uint32_t cFixedPages)
 {
@@ -1721 +1725 @@
  * @param   pReq            Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0UpdateReservationReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMUPDATERESERVATIONREQ pReq)
+GMMR0DECL(int) GMMR0UpdateReservationReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMUPDATERESERVATIONREQ pReq)
 {
     /*
@@ -2738 +2742 @@
  * @thread  EMT(idCpu)
  */
-GMMR0DECL(int) GMMR0AllocateHandyPages(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint32_t cPagesToUpdate,
+GMMR0DECL(int) GMMR0AllocateHandyPages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint32_t cPagesToUpdate,
                                        uint32_t cPagesToAlloc, PGMMPAGEDESC paPages)
 {
@@ -2936 +2940 @@
  * @thread  EMT.
  */
-GMMR0DECL(int) GMMR0AllocatePages(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint32_t cPages, PGMMPAGEDESC paPages, GMMACCOUNT enmAccount)
+GMMR0DECL(int) GMMR0AllocatePages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint32_t cPages, PGMMPAGEDESC paPages, GMMACCOUNT enmAccount)
 {
     LogFlow(("GMMR0AllocatePages: pGVM=%p pVM=%p cPages=%#x paPages=%p enmAccount=%d\n", pGVM, pVM, cPages, paPages, enmAccount));
@@ -2996 +3000 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0AllocatePagesReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMALLOCATEPAGESREQ pReq)
+GMMR0DECL(int) GMMR0AllocatePagesReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMALLOCATEPAGESREQ pReq)
 {
     /*
@@ -3034 +3038 @@
  * @param   pHCPhys     Where to return the host physical address of the page.
  */
-GMMR0DECL(int)  GMMR0AllocateLargePage(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint32_t cbPage, uint32_t *pIdPage, RTHCPHYS *pHCPhys)
+GMMR0DECL(int)  GMMR0AllocateLargePage(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint32_t cbPage, uint32_t *pIdPage, RTHCPHYS *pHCPhys)
 {
     LogFlow(("GMMR0AllocateLargePage: pGVM=%p pVM=%p cbPage=%x\n", pGVM, pVM, cbPage));
@@ -3139 +3143 @@
  * @param   idPage      The large page id.
  */
-GMMR0DECL(int)  GMMR0FreeLargePage(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint32_t idPage)
+GMMR0DECL(int)  GMMR0FreeLargePage(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint32_t idPage)
 {
     LogFlow(("GMMR0FreeLargePage: pGVM=%p pVM=%p idPage=%x\n", pGVM, pVM, idPage));
@@ -3206 +3210 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0FreeLargePageReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMFREELARGEPAGEREQ pReq)
+GMMR0DECL(int) GMMR0FreeLargePageReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMFREELARGEPAGEREQ pReq)
 {
     /*
@@ -3571 +3575 @@
  * @thread  EMT.
  */
-GMMR0DECL(int) GMMR0FreePages(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint32_t cPages, PGMMFREEPAGEDESC paPages, GMMACCOUNT enmAccount)
+GMMR0DECL(int) GMMR0FreePages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint32_t cPages, PGMMFREEPAGEDESC paPages, GMMACCOUNT enmAccount)
 {
     LogFlow(("GMMR0FreePages: pGVM=%p pVM=%p cPages=%#x paPages=%p enmAccount=%d\n", pGVM, pVM, cPages, paPages, enmAccount));
@@ -3619 +3623 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0FreePagesReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMFREEPAGESREQ pReq)
+GMMR0DECL(int) GMMR0FreePagesReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMFREEPAGESREQ pReq)
 {
     /*
@@ -3660 +3664 @@
  * @thread  EMT(idCpu)
  */
-GMMR0DECL(int) GMMR0BalloonedPages(PGVM pGVM, PVM pVM, VMCPUID idCpu, GMMBALLOONACTION enmAction, uint32_t cBalloonedPages)
+GMMR0DECL(int) GMMR0BalloonedPages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, GMMBALLOONACTION enmAction, uint32_t cBalloonedPages)
 {
     LogFlow(("GMMR0BalloonedPages: pGVM=%p pVM=%p enmAction=%d cBalloonedPages=%#x\n",
@@ -3789 +3793 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0BalloonedPagesReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMBALLOONEDPAGESREQ pReq)
+GMMR0DECL(int) GMMR0BalloonedPagesReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMBALLOONEDPAGESREQ pReq)
 {
     /*
@@ -3846 +3850 @@
  * @thread  EMT(idCpu)
  */
-GMMR0DECL(int) GMMR0QueryMemoryStatsReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMMEMSTATSREQ pReq)
+GMMR0DECL(int) GMMR0QueryMemoryStatsReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMMEMSTATSREQ pReq)
 {
     /*
@@ -4138 +4142 @@
  * @thread  EMT ???
  */
-GMMR0DECL(int) GMMR0MapUnmapChunk(PGVM pGVM, PVM pVM, uint32_t idChunkMap, uint32_t idChunkUnmap, PRTR3PTR ppvR3)
+GMMR0DECL(int) GMMR0MapUnmapChunk(PGVM pGVM, PVMCC pVM, uint32_t idChunkMap, uint32_t idChunkUnmap, PRTR3PTR ppvR3)
 {
     LogFlow(("GMMR0MapUnmapChunk: pGVM=%p pVM=%p idChunkMap=%#x idChunkUnmap=%#x ppvR3=%p\n",
@@ -4227 +4231 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int)  GMMR0MapUnmapChunkReq(PGVM pGVM, PVM pVM, PGMMMAPUNMAPCHUNKREQ pReq)
+GMMR0DECL(int)  GMMR0MapUnmapChunkReq(PGVM pGVM, PVMCC pVM, PGMMMAPUNMAPCHUNKREQ pReq)
 {
     /*
@@ -4251 +4255 @@
  * @param   pvR3        Pointer to the chunk size memory block to lock down.
  */
-GMMR0DECL(int) GMMR0SeedChunk(PGVM pGVM, PVM pVM, VMCPUID idCpu, RTR3PTR pvR3)
+GMMR0DECL(int) GMMR0SeedChunk(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, RTR3PTR pvR3)
 {
     /*
@@ -4542 +4546 @@
  * @thread  EMT(idCpu)
  */
-GMMR0DECL(int) GMMR0RegisterSharedModule(PGVM pGVM, PVM pVM, VMCPUID idCpu, VBOXOSFAMILY enmGuestOS, char *pszModuleName,
+GMMR0DECL(int) GMMR0RegisterSharedModule(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, VBOXOSFAMILY enmGuestOS, char *pszModuleName,
                                          char *pszVersion, RTGCPTR GCPtrModBase, uint32_t cbModule,
                                          uint32_t cRegions, struct VMMDEVSHAREDREGIONDESC const *paRegions)
@@ -4683 +4687 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0RegisterSharedModuleReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMREGISTERSHAREDMODULEREQ pReq)
+GMMR0DECL(int) GMMR0RegisterSharedModuleReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMREGISTERSHAREDMODULEREQ pReq)
 {
     /*
@@ -4712 +4716 @@
  * @param   cbModule        The module size.
  */
-GMMR0DECL(int) GMMR0UnregisterSharedModule(PGVM pGVM, PVM pVM, VMCPUID idCpu, char *pszModuleName, char *pszVersion,
+GMMR0DECL(int) GMMR0UnregisterSharedModule(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, char *pszModuleName, char *pszVersion,
                                            RTGCPTR GCPtrModBase, uint32_t cbModule)
 {
@@ -4779 +4783 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int)  GMMR0UnregisterSharedModuleReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGMMUNREGISTERSHAREDMODULEREQ pReq)
+GMMR0DECL(int)  GMMR0UnregisterSharedModuleReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGMMUNREGISTERSHAREDMODULEREQ pReq)
 {
     /*
@@ -5085 +5089 @@
  * @param   idCpu       The VCPU id.
  */
-GMMR0DECL(int) GMMR0ResetSharedModules(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GMMR0DECL(int) GMMR0ResetSharedModules(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
 #ifdef VBOX_WITH_PAGE_SHARING
@@ -5138 +5142 @@
          pGblMod->szName, pGblMod->szVersion, pGblMod->Core.Key, pGblMod->cbModule));
 
+# ifdef VBOX_BUGREF_9217
+    int rc = PGMR0SharedModuleCheck(pArgs->pGVM, pArgs->pGVM, pArgs->idCpu, pGblMod, pRecVM->aRegionsGCPtrs);
+#else
     int rc = PGMR0SharedModuleCheck(pArgs->pGVM->pVM, pArgs->pGVM, pArgs->idCpu, pGblMod, pRecVM->aRegionsGCPtrs);
+# endif
     if (RT_FAILURE(rc))
         return rc;
@@ -5155 +5163 @@
  * @thread  EMT(idCpu)
  */
-GMMR0DECL(int) GMMR0CheckSharedModules(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GMMR0DECL(int) GMMR0CheckSharedModules(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
 #ifdef VBOX_WITH_PAGE_SHARING
@@ -5256 +5264 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0FindDuplicatePageReq(PGVM pGVM, PVM pVM, PGMMFINDDUPLICATEPAGEREQ pReq)
+GMMR0DECL(int) GMMR0FindDuplicatePageReq(PGVM pGVM, PVMCC pVM, PGMMFINDDUPLICATEPAGEREQ pReq)
 {
     /*
@@ -5328 +5336 @@
  * @param   pVM         The VM structure corresponding to @a pGVM.
  */
-GMMR0DECL(int) GMMR0QueryStatistics(PGMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVM pVM)
+GMMR0DECL(int) GMMR0QueryStatistics(PGMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVMCC pVM)
 {
     LogFlow(("GVMMR0QueryStatistics: pStats=%p pSession=%p pGVM=%p pVM=%p\n", pStats, pSession, pGVM, pVM));
@@ -5394 +5402 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0QueryStatisticsReq(PGVM pGVM, PVM pVM, PGMMQUERYSTATISTICSSREQ pReq)
+GMMR0DECL(int) GMMR0QueryStatisticsReq(PGVM pGVM, PVMCC pVM, PGMMQUERYSTATISTICSSREQ pReq)
 {
     /*
@@ -5417 +5425 @@
  * @param   pVM         The VM structure corresponding to @a pGVM.
  */
-GMMR0DECL(int) GMMR0ResetStatistics(PCGMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVM pVM)
+GMMR0DECL(int) GMMR0ResetStatistics(PCGMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVMCC pVM)
 {
     NOREF(pStats); NOREF(pSession); NOREF(pVM); NOREF(pGVM);
@@ -5433 +5441 @@
  * @param   pReq        Pointer to the request packet.
  */
-GMMR0DECL(int) GMMR0ResetStatisticsReq(PGVM pGVM, PVM pVM, PGMMRESETSTATISTICSSREQ pReq)
+GMMR0DECL(int) GMMR0ResetStatisticsReq(PGVM pGVM, PVMCC pVM, PGMMRESETSTATISTICSSREQ pReq)
 {
     /*

trunk/src/VBox/VMM/VMMR0/GVMMR0.cpp

@@ -54 +54 @@
 #include <VBox/vmm/gmm.h>
 #include "GVMMR0Internal.h"
-#include <VBox/vmm/gvm.h>
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/vmcpuset.h>
 #include <VBox/vmm/vmm.h>
@@ -161 +160 @@
     PGVM                pGVM;
     /** The ring-0 mapping of the shared VM instance data. */
-    PVM                 pVM;
+    PVMCC                 pVM;
     /** The virtual machine object. */
     void               *pvObj;
@@ -366 +365 @@
 #endif
 static DECLCALLBACK(void) gvmmR0HandleObjDestructor(void *pvObj, void *pvGVMM, void *pvHandle);
-static int gvmmR0ByGVMandVM(PGVM pGVM, PVM pVM, PGVMM *ppGVMM, bool fTakeUsedLock);
-static int gvmmR0ByGVMandVMandEMT(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGVMM *ppGVMM);
+static int gvmmR0ByGVMandVM(PGVM pGVM, PVMCC pVM, PGVMM *ppGVMM, bool fTakeUsedLock);
+static int gvmmR0ByGVMandVMandEMT(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGVMM *ppGVMM);
 
 #ifdef GVMM_SCHED_WITH_PPT
@@ -794 +793 @@
      * Execute it.
      */
-    PVM pVM;
+    PVMCC pVM;
     pReq->pVMR0 = NULL;
     pReq->pVMR3 = NIL_RTR3PTR;
@@ -819 +818 @@
  * @thread  EMT.
  */
-GVMMR0DECL(int) GVMMR0CreateVM(PSUPDRVSESSION pSession, uint32_t cCpus, PVM *ppVM)
+GVMMR0DECL(int) GVMMR0CreateVM(PSUPDRVSESSION pSession, uint32_t cCpus, PVMCC *ppVM)
 {
     LogFlow(("GVMMR0CreateVM: pSession=%p\n", pSession));
@@ -959 +958 @@
                                     pGVM->aCpus[i].pVMR3 = pVMR3;
                                     pGVM->apCpusR3[i] = RTR0MemObjAddressR3(pGVM->aCpus[i].gvmm.s.VMCpuMapObj);
+                                    pGVM->aCpus[i].pVCpuR3 = pGVM->apCpusR3[i];
                                     pGVM->apCpusR0[i] = &pGVM->aCpus[i];
                                     AssertPtr((void *)pGVM->apCpusR3[i]);
@@ -1052 +1052 @@
                         if (RT_SUCCESS(rc))
                         {
-                            PVM pVM = (PVM)RTR0MemObjAddress(pGVM->gvmm.s.VMMemObj); AssertPtr(pVM);
+                            PVMCC pVM = (PVMCC)RTR0MemObjAddress(pGVM->gvmm.s.VMMemObj); AssertPtr(pVM);
                             memset(pVM, 0, cPages << PAGE_SHIFT);
                             pVM->enmVMState       = VMSTATE_CREATING;
@@ -1219 +1219 @@
     /* GVM: */
     pGVM->u32Magic         = GVM_MAGIC;
-    pGVM->hSelfSafe        = hSelf;
-    pGVM->cCpusSafe        = cCpus;
-    pGVM->pSessionSafe     = pSession;
+    pGVM->hSelf            = hSelf;
+    pGVM->cCpus            = cCpus;
+    pGVM->pSession         = pSession;
 
     /* VM: */
     pGVM->enmVMState       = VMSTATE_CREATING;
-    pGVM->pVMR0            = pGVM;
-    pGVM->pSession         = pSession;
-    pGVM->hSelf            = hSelf;
-    pGVM->cCpus            = cCpus;
+    pGVM->pSessionUnsafe   = pSession;
+    pGVM->hSelfUnsafe      = hSelf;
+    pGVM->cCpusUnsafe      = cCpus;
     pGVM->uCpuExecutionCap = 100; /* default is no cap. */
     pGVM->uStructVersion   = 1;
@@ -1250 +1249 @@
         pGVM->aCpus[i].idCpu                 = i;
 #ifdef VBOX_BUGREF_9217
-        pGVM->aCpus[i].idCpuSafe             = i;
+        pGVM->aCpus[i].idCpuUnsafe           = i;
 #endif
         pGVM->aCpus[i].gvmm.s.HaltEventMulti = NIL_RTSEMEVENTMULTI;
@@ -1353 +1352 @@
  * @thread  EMT(0) if it's associated with the VM, otherwise any thread.
  */
-GVMMR0DECL(int) GVMMR0DestroyVM(PGVM pGVM, PVM pVM)
+GVMMR0DECL(int) GVMMR0DestroyVM(PGVM pGVM, PVMCC pVM)
 {
     LogFlow(("GVMMR0DestroyVM: pGVM=%p pVM=%p\n", pGVM, pVM));
@@ -1475 +1474 @@
 
     AssertCompile(NIL_RTTHREADCTXHOOK == (RTTHREADCTXHOOK)0); /* Depends on zero initialized memory working for NIL at the moment. */
-#ifdef VBOX_BUGREF_9217
-    for (VMCPUID idCpu = 0; idCpu < pGVM->cCpusSafe; idCpu++)
-#else
     for (VMCPUID idCpu = 0; idCpu < pGVM->cCpus; idCpu++)
-#endif
     {
         /** @todo Can we busy wait here for all thread-context hooks to be
@@ -1683 +1678 @@
  * @param   idCpu       VCPU id to register the current thread as.
  */
-GVMMR0DECL(int) GVMMR0RegisterVCpu(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0RegisterVCpu(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     AssertReturn(idCpu != 0, VERR_INVALID_FUNCTION);
@@ -1753 +1748 @@
  * @param   idCpu       VCPU id to register the current thread as.
  */
-GVMMR0DECL(int) GVMMR0DeregisterVCpu(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0DeregisterVCpu(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     AssertReturn(idCpu != 0, VERR_INVALID_FUNCTION);
@@ -1856 +1851 @@
  * @remark  This will not assert on an invalid pVM but try return silently.
  */
-static int gvmmR0ByVM(PVM pVM, PGVM *ppGVM, PGVMM *ppGVMM, bool fTakeUsedLock)
+static int gvmmR0ByVM(PVMCC pVM, PGVM *ppGVM, PGVMM *ppGVMM, bool fTakeUsedLock)
 {
     RTPROCESS ProcId = RTProcSelf();
@@ -1945 +1940 @@
  * @note    Do not use this on pVM structures from userland!
  */
-GVMMR0DECL(PGVM) GVMMR0FastGetGVMByVM(PVM pVM)
+GVMMR0DECL(PGVM) GVMMR0FastGetGVMByVM(PVMCC pVM)
 {
     AssertPtr(pVM);
@@ -1996 +1991 @@
  * @remark  This will not assert on an invalid pVM but try return silently.
  */
-static int gvmmR0ByGVMandVM(PGVM pGVM, PVM pVM, PGVMM *ppGVMM, bool fTakeUsedLock)
+static int gvmmR0ByGVMandVM(PGVM pGVM, PVMCC pVM, PGVMM *ppGVMM, bool fTakeUsedLock)
 {
     /*
@@ -2039 +2034 @@
                          * Some more VM data consistency checks.
                          */
+#ifdef VBOX_BUGREF_9217
                         if (RT_LIKELY(   pVM->cCpus == pGVM->cCpus
                                       && pVM->hSelf == hGVM
                                       && pVM->enmVMState >= VMSTATE_CREATING
                                       && pVM->enmVMState <= VMSTATE_TERMINATED
-                                      && pVM->pVMR0 == pVM))
+                                      && pVM->pSelf == pVM
+                                      ))
+#else
+                        if (RT_LIKELY(   pVM->cCpus == pGVM->cCpus
+                                      && pVM->hSelf == hGVM
+                                      && pVM->enmVMState >= VMSTATE_CREATING
+                                      && pVM->enmVMState <= VMSTATE_TERMINATED
+                                      && pVM->pVMR0 == pVM
+                                      ))
+#endif
                         {
                             *ppGVMM = pGVMM;
@@ -2080 +2085 @@
  * @remarks This will assert in all failure paths.
  */
-static int gvmmR0ByGVMandVMandEMT(PGVM pGVM, PVM pVM, VMCPUID idCpu, PGVMM *ppGVMM)
+static int gvmmR0ByGVMandVMandEMT(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, PGVMM *ppGVMM)
 {
     /*
@@ -2127 +2132 @@
     AssertReturn(pVM->cCpus == pGVM->cCpus, VERR_INCONSISTENT_VM_HANDLE);
     AssertReturn(pVM->hSelf == hGVM, VERR_INCONSISTENT_VM_HANDLE);
+#ifndef VBOX_BUGREF_9217
     AssertReturn(pVM->pVMR0 == pVM, VERR_INCONSISTENT_VM_HANDLE);
+#endif
     AssertReturn(   pVM->enmVMState >= VMSTATE_CREATING
                  && pVM->enmVMState <= VMSTATE_TERMINATED, VERR_INCONSISTENT_VM_HANDLE);
@@ -2143 +2150 @@
  * @param   pVM         The cross context VM structure.
  */
-GVMMR0DECL(int) GVMMR0ValidateGVMandVM(PGVM pGVM, PVM pVM)
+GVMMR0DECL(int) GVMMR0ValidateGVMandVM(PGVM pGVM, PVMCC pVM)
 {
     PGVMM pGVMM;
@@ -2160 +2167 @@
  * @thread  EMT(idCpu)
  */
-GVMMR0DECL(int) GVMMR0ValidateGVMandVMandEMT(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0ValidateGVMandVMandEMT(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     PGVMM pGVMM;
@@ -2178 +2185 @@
  *                  NIL_RTNATIVETHREAD means the current thread
  */
-GVMMR0DECL(PVM) GVMMR0GetVMByEMT(RTNATIVETHREAD hEMT)
+GVMMR0DECL(PVMCC) GVMMR0GetVMByEMT(RTNATIVETHREAD hEMT)
 {
     /*
@@ -2445 +2452 @@
  * @thread  EMT(pGVCpu).
  */
-GVMMR0DECL(int) GVMMR0SchedHalt(PGVM pGVM, PVM pVM, PGVMCPU pGVCpu, uint64_t u64ExpireGipTime)
+GVMMR0DECL(int) GVMMR0SchedHalt(PGVM pGVM, PVMCC pVM, PGVMCPU pGVCpu, uint64_t u64ExpireGipTime)
 {
     LogFlow(("GVMMR0SchedHalt: pGVM=%p pVM=%p pGVCpu=%p(%d) u64ExpireGipTime=%#RX64\n",
@@ -2556 +2563 @@
  * @thread  EMT(idCpu).
  */
-GVMMR0DECL(int) GVMMR0SchedHaltReq(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t u64ExpireGipTime)
+GVMMR0DECL(int) GVMMR0SchedHaltReq(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint64_t u64ExpireGipTime)
 {
     GVMM_CHECK_SMAP_SETUP();
@@ -2628 +2635 @@
  * @thread  Any but EMT(idCpu).
  */
-GVMMR0DECL(int) GVMMR0SchedWakeUpEx(PGVM pGVM, PVM pVM, VMCPUID idCpu, bool fTakeUsedLock)
+GVMMR0DECL(int) GVMMR0SchedWakeUpEx(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, bool fTakeUsedLock)
 {
     GVMM_CHECK_SMAP_SETUP();
@@ -2688 +2695 @@
  * @thread  Any but EMT(idCpu).
  */
-GVMMR0DECL(int) GVMMR0SchedWakeUp(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0SchedWakeUp(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     return GVMMR0SchedWakeUpEx(pGVM, pVM, idCpu, true /* fTakeUsedLock */);
@@ -2707 +2714 @@
  * @deprecated  Don't use in new code if possible!  Use the GVM variant.
  */
-GVMMR0DECL(int) GVMMR0SchedWakeUpNoGVMNoLock(PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0SchedWakeUpNoGVMNoLock(PVMCC pVM, VMCPUID idCpu)
 {
     GVMM_CHECK_SMAP_SETUP();
@@ -2732 +2739 @@
  * @param   pVCpu               The cross context virtual CPU structure.
  */
-DECLINLINE(int) gvmmR0SchedPokeOne(PGVM pGVM, PVMCPU pVCpu)
+DECLINLINE(int) gvmmR0SchedPokeOne(PGVM pGVM, PVMCPUCC pVCpu)
 {
     pGVM->gvmm.s.StatsSched.cPokeCalls++;
@@ -2762 +2769 @@
  * @param   fTakeUsedLock       Take the used lock or not
  */
-GVMMR0DECL(int) GVMMR0SchedPokeEx(PGVM pGVM, PVM pVM, VMCPUID idCpu, bool fTakeUsedLock)
+GVMMR0DECL(int) GVMMR0SchedPokeEx(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, bool fTakeUsedLock)
 {
     /*
@@ -2803 +2810 @@
  * @param   idCpu               The ID of the virtual CPU to poke.
  */
-GVMMR0DECL(int) GVMMR0SchedPoke(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0SchedPoke(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     return GVMMR0SchedPokeEx(pGVM, pVM, idCpu, true /* fTakeUsedLock */);
@@ -2822 +2829 @@
  * @deprecated  Don't use in new code if possible!  Use the GVM variant.
  */
-GVMMR0DECL(int) GVMMR0SchedPokeNoGVMNoLock(PVM pVM, VMCPUID idCpu)
+GVMMR0DECL(int) GVMMR0SchedPokeNoGVMNoLock(PVMCC pVM, VMCPUID idCpu)
 {
     PGVM pGVM;
@@ -2852 +2859 @@
  * @param   pPokeSet            The set of CPUs to poke.
  */
-GVMMR0DECL(int) GVMMR0SchedWakeUpAndPokeCpus(PGVM pGVM, PVM pVM, PCVMCPUSET pSleepSet, PCVMCPUSET pPokeSet)
+GVMMR0DECL(int) GVMMR0SchedWakeUpAndPokeCpus(PGVM pGVM, PVMCC pVM, PCVMCPUSET pSleepSet, PCVMCPUSET pPokeSet)
 {
     AssertPtrReturn(pSleepSet, VERR_INVALID_POINTER);
@@ -2911 +2918 @@
  * @param   pReq            Pointer to the request packet.
  */
-GVMMR0DECL(int) GVMMR0SchedWakeUpAndPokeCpusReq(PGVM pGVM, PVM pVM, PGVMMSCHEDWAKEUPANDPOKECPUSREQ pReq)
+GVMMR0DECL(int) GVMMR0SchedWakeUpAndPokeCpusReq(PGVM pGVM, PVMCC pVM, PGVMMSCHEDWAKEUPANDPOKECPUSREQ pReq)
 {
     /*
@@ -2939 +2946 @@
  * @thread  EMT(idCpu).
  */
-GVMMR0DECL(int) GVMMR0SchedPoll(PGVM pGVM, PVM pVM, VMCPUID idCpu, bool fYield)
+GVMMR0DECL(int) GVMMR0SchedPoll(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, bool fYield)
 {
     /*
@@ -3072 +3079 @@
  * @param   uHz         The desired frequency.
  */
-GVMMR0DECL(void) GVMMR0SchedUpdatePeriodicPreemptionTimer(PVM pVM, RTCPUID idHostCpu, uint32_t uHz)
+GVMMR0DECL(void) GVMMR0SchedUpdatePeriodicPreemptionTimer(PVMCC pVM, RTCPUID idHostCpu, uint32_t uHz)
 {
     NOREF(pVM);
@@ -3155 +3162 @@
  * @param   pVM         The VM structure corresponding to @a pGVM.
  */
-GVMMR0DECL(int) GVMMR0QueryStatistics(PGVMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVM pVM)
+GVMMR0DECL(int) GVMMR0QueryStatistics(PGVMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVMCC pVM)
 {
     LogFlow(("GVMMR0QueryStatistics: pStats=%p pSession=%p pGVM=%p pVM=%p\n", pStats, pSession, pGVM, pVM));
@@ -3270 +3277 @@
  * @param   pSession        The current session.
  */
-GVMMR0DECL(int) GVMMR0QueryStatisticsReq(PGVM pGVM, PVM pVM, PGVMMQUERYSTATISTICSSREQ pReq, PSUPDRVSESSION pSession)
+GVMMR0DECL(int) GVMMR0QueryStatisticsReq(PGVM pGVM, PVMCC pVM, PGVMMQUERYSTATISTICSSREQ pReq, PSUPDRVSESSION pSession)
 {
     /*
@@ -3293 +3300 @@
  * @param   pVM         The VM structure corresponding to @a pGVM.
  */
-GVMMR0DECL(int) GVMMR0ResetStatistics(PCGVMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVM pVM)
+GVMMR0DECL(int) GVMMR0ResetStatistics(PCGVMMSTATS pStats, PSUPDRVSESSION pSession, PGVM pGVM, PVMCC pVM)
 {
     LogFlow(("GVMMR0ResetStatistics: pStats=%p pSession=%p pGVM=%p pVM=%p\n", pStats, pSession, pGVM, pVM));
@@ -3388 +3395 @@
  * @param   pSession        The current session.
  */
-GVMMR0DECL(int) GVMMR0ResetStatisticsReq(PGVM pGVM, PVM pVM, PGVMMRESETSTATISTICSSREQ pReq, PSUPDRVSESSION pSession)
+GVMMR0DECL(int) GVMMR0ResetStatisticsReq(PGVM pGVM, PVMCC pVM, PGVMMRESETSTATISTICSSREQ pReq, PSUPDRVSESSION pSession)
 {
     /*

trunk/src/VBox/VMM/VMMR0/HMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_HM
 #define VMCPU_INCL_CPUM_GST_CTX
@@ -25 +26 @@
 #include <VBox/vmm/pgm.h>
 #include "HMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/hm_svm.h>
 #include <VBox/vmm/hmvmxinline.h>
@@ -87 +88 @@
     /** @name Ring-0 method table for AMD-V and VT-x specific operations.
      * @{ */
-    DECLR0CALLBACKMEMBER(int,  pfnEnterSession, (PVMCPU pVCpu));
-    DECLR0CALLBACKMEMBER(void, pfnThreadCtxCallback, (RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit));
-    DECLR0CALLBACKMEMBER(int,  pfnExportHostState, (PVMCPU pVCpu));
-    DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnRunGuestCode, (PVMCPU pVCpu));
-    DECLR0CALLBACKMEMBER(int,  pfnEnableCpu, (PHMPHYSCPU pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
+    DECLR0CALLBACKMEMBER(int,  pfnEnterSession, (PVMCPUCC pVCpu));
+    DECLR0CALLBACKMEMBER(void, pfnThreadCtxCallback, (RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit));
+    DECLR0CALLBACKMEMBER(int,  pfnExportHostState, (PVMCPUCC pVCpu));
+    DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnRunGuestCode, (PVMCPUCC pVCpu));
+    DECLR0CALLBACKMEMBER(int,  pfnEnableCpu, (PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
                                               bool fEnabledByHost, PCSUPHWVIRTMSRS pHwvirtMsrs));
     DECLR0CALLBACKMEMBER(int,  pfnDisableCpu, (void *pvCpuPage, RTHCPHYS HCPhysCpuPage));
-    DECLR0CALLBACKMEMBER(int,  pfnInitVM, (PVM pVM));
-    DECLR0CALLBACKMEMBER(int,  pfnTermVM, (PVM pVM));
-    DECLR0CALLBACKMEMBER(int,  pfnSetupVM, (PVM pVM));
+    DECLR0CALLBACKMEMBER(int,  pfnInitVM, (PVMCC pVM));
+    DECLR0CALLBACKMEMBER(int,  pfnTermVM, (PVMCC pVM));
+    DECLR0CALLBACKMEMBER(int,  pfnSetupVM, (PVMCC pVM));
     /** @} */
 
@@ -227 +228 @@
  * @{ */
 
-static DECLCALLBACK(int) hmR0DummyEnter(PVMCPU pVCpu)
+static DECLCALLBACK(int) hmR0DummyEnter(PVMCPUCC pVCpu)
 {
     RT_NOREF1(pVCpu);
@@ -233 +234 @@
 }
 
-static DECLCALLBACK(void) hmR0DummyThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit)
+static DECLCALLBACK(void) hmR0DummyThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit)
 {
     RT_NOREF3(enmEvent, pVCpu, fGlobalInit);
 }
 
-static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
+static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
                                             bool fEnabledBySystem, PCSUPHWVIRTMSRS pHwvirtMsrs)
 {
@@ -251 +252 @@
 }
 
-static DECLCALLBACK(int) hmR0DummyInitVM(PVM pVM)
+static DECLCALLBACK(int) hmR0DummyInitVM(PVMCC pVM)
 {
     RT_NOREF1(pVM);
@@ -257 +258 @@
 }
 
-static DECLCALLBACK(int) hmR0DummyTermVM(PVM pVM)
+static DECLCALLBACK(int) hmR0DummyTermVM(PVMCC pVM)
 {
     RT_NOREF1(pVM);
@@ -263 +264 @@
 }
 
-static DECLCALLBACK(int) hmR0DummySetupVM(PVM pVM)
+static DECLCALLBACK(int) hmR0DummySetupVM(PVMCC pVM)
 {
     RT_NOREF1(pVM);
@@ -269 +270 @@
 }
 
-static DECLCALLBACK(VBOXSTRICTRC) hmR0DummyRunGuestCode(PVMCPU pVCpu)
+static DECLCALLBACK(VBOXSTRICTRC) hmR0DummyRunGuestCode(PVMCPUCC pVCpu)
 {
     RT_NOREF(pVCpu);
@@ -275 +276 @@
 }
 
-static DECLCALLBACK(int) hmR0DummyExportHostState(PVMCPU pVCpu)
+static DECLCALLBACK(int) hmR0DummyExportHostState(PVMCPUCC pVCpu)
 {
     RT_NOREF1(pVCpu);
@@ -788 +789 @@
  * @remarks Maybe called with interrupts disabled!
  */
-static int hmR0EnableCpu(PVM pVM, RTCPUID idCpu)
+static int hmR0EnableCpu(PVMCC pVM, RTCPUID idCpu)
 {
     PHMPHYSCPU pHostCpu = &g_HmR0.aCpuInfo[idCpu];
@@ -824 +825 @@
 static DECLCALLBACK(void) hmR0EnableCpuCallback(RTCPUID idCpu, void *pvUser1, void *pvUser2)
 {
-    PVM             pVM      = (PVM)pvUser1;     /* can be NULL! */
+    PVMCC             pVM      = (PVMCC)pvUser1;     /* can be NULL! */
     PHMR0FIRSTRC    pFirstRc = (PHMR0FIRSTRC)pvUser2;
     AssertReturnVoid(g_HmR0.fGlobalInit);
@@ -840 +841 @@
 static DECLCALLBACK(int32_t) hmR0EnableAllCpuOnce(void *pvUser)
 {
-    PVM pVM = (PVM)pvUser;
+    PVMCC pVM = (PVMCC)pvUser;
 
     /*
@@ -956 +957 @@
  * @param   pVM                 The cross context VM structure.
  */
-VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM)
+VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVMCC pVM)
 {
     /* Make sure we don't touch HM after we've disabled HM in preparation of a suspend. */
@@ -1042 +1043 @@
  * @param   enmEvent            The Mp event.
  * @param   idCpu               The identifier for the CPU the function is called on.
- * @param   pvData              Opaque data (PVM pointer).
+ * @param   pvData              Opaque data (PVMCC pointer).
  */
 static DECLCALLBACK(void) hmR0MpEventCallback(RTMPEVENT enmEvent, RTCPUID idCpu, void *pvData)
@@ -1158 +1159 @@
  *          vmR3InitRing3().
  */
-VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM)
+VMMR0_INT_DECL(int) HMR0InitVM(PVMCC pVM)
 {
     AssertReturn(pVM, VERR_INVALID_PARAMETER);
@@ -1235 +1236 @@
      * Initialize some per-VCPU fields.
      */
-    for (VMCPUID i = 0; i < pVM->cCpus; i++)
-    {
-        PVMCPU pVCpu = &pVM->aCpus[i];
+    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
+    {
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         pVCpu->hm.s.idEnteredCpu   = NIL_RTCPUID;
         pVCpu->hm.s.idLastCpu      = NIL_RTCPUID;
@@ -1267 +1268 @@
  * @param   pVM         The cross context VM structure.
  */
-VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM)
+VMMR0_INT_DECL(int) HMR0TermVM(PVMCC pVM)
 {
     Log(("HMR0TermVM: %p\n", pVM));
@@ -1290 +1291 @@
  * @param   pVM         The cross context VM structure.
  */
-VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM)
+VMMR0_INT_DECL(int) HMR0SetupVM(PVMCC pVM)
 {
     Log(("HMR0SetupVM: %p\n", pVM));
@@ -1299 +1300 @@
 
     /* On first entry we'll sync everything. */
-    for (VMCPUID i = 0; i < pVM->cCpus; i++)
-    {
-        PVMCPU pVCpu = &pVM->aCpus[i];
-        pVCpu->hm.s.fCtxChanged |= HM_CHANGED_HOST_CONTEXT | HM_CHANGED_ALL_GUEST;
-    }
+    VMCC_FOR_EACH_VMCPU_STMT(pVM, pVCpu->hm.s.fCtxChanged |= HM_CHANGED_HOST_CONTEXT | HM_CHANGED_ALL_GUEST);
 
     /*
@@ -1351 +1348 @@
  * @remarks No-long-jump zone!!!
  */
-VMMR0_INT_DECL(int) hmR0EnterCpu(PVMCPU pVCpu)
+VMMR0_INT_DECL(int) hmR0EnterCpu(PVMCPUCC pVCpu)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1384 +1381 @@
  * @remarks This is called with preemption disabled.
  */
-VMMR0_INT_DECL(int) HMR0Enter(PVMCPU pVCpu)
+VMMR0_INT_DECL(int) HMR0Enter(PVMCPUCC pVCpu)
 {
     /* Make sure we can't enter a session after we've disabled HM in preparation of a suspend. */
@@ -1437 +1434 @@
  * @remarks No-long-jump zone!!!
  */
-VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu)
+VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPUCC pVCpu)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1472 +1469 @@
 VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser)
 {
-    PVMCPU pVCpu = (PVMCPU)pvUser;
+    PVMCPUCC pVCpu = (PVMCPUCC)pvUser;
     Assert(pVCpu);
     Assert(g_HmR0.pfnThreadCtxCallback);
@@ -1491 +1488 @@
  *          used!!!
  */
-VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu)
+VMMR0_INT_DECL(int) HMR0RunGuestCode(PVMCC pVM, PVMCPUCC pVCpu)
 {
     RT_NOREF(pVM);
@@ -1527 +1524 @@
  * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
  */
-VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPU pVCpu)
+VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPUCC pVCpu)
 {
     ASMAtomicUoOrU64(&pVCpu->hm.s.fCtxChanged, HM_CHANGED_GUEST_CR0);
@@ -1538 +1535 @@
  * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
  */
-VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPU pVCpu)
+VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPUCC pVCpu)
 {
     ASMAtomicUoOrU64(&pVCpu->hm.s.fCtxChanged, HM_CHANGED_HOST_CONTEXT);
@@ -1561 +1558 @@
  * @param   GCVirt      Page to invalidate.
  */
-VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (pVM->hm.s.vmx.fSupported)
         return VMXR0InvalidatePage(pVCpu, GCVirt);
@@ -1592 +1589 @@
  * @param   fWhat       What to import, CPUMCTX_EXTRN_XXX.
  */
-VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat)
+VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat)
 {
     if (pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fSupported)
@@ -1730 +1727 @@
  * @param   fFlags  The dumping flags (HM_DUMP_REG_FLAGS_XXX).
  */
-VMMR0_INT_DECL(void) hmR0DumpRegs(PVMCPU pVCpu, uint32_t fFlags)
+VMMR0_INT_DECL(void) hmR0DumpRegs(PVMCPUCC pVCpu, uint32_t fFlags)
 {
     /*

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_HM
 #define VMCPU_INCL_CPUM_GST_CTX
@@ -34 +35 @@
 #include <VBox/vmm/apic.h>
 #include "HMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/err.h>
 #include "HMSVMR0.h"
@@ -354 +355 @@
  * @param   pSvmTransient   Pointer to the SVM-transient structure.
  */
-typedef int FNSVMEXITHANDLER(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient);
+typedef int FNSVMEXITHANDLER(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient);
 
 
@@ -360 +361 @@
 *   Internal Functions                                                                                                           *
 *********************************************************************************************************************************/
-static void hmR0SvmPendingEventToTrpmTrap(PVMCPU pVCpu);
-static void hmR0SvmLeave(PVMCPU pVCpu, bool fImportState);
+static void hmR0SvmPendingEventToTrpmTrap(PVMCPUCC pVCpu);
+static void hmR0SvmLeave(PVMCPUCC pVCpu, bool fImportState);
 
 
@@ -416 +417 @@
 /** @} */
 
-static int hmR0SvmHandleExit(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient);
+static int hmR0SvmHandleExit(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient);
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
-static int hmR0SvmHandleExitNested(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient);
+static int hmR0SvmHandleExitNested(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient);
 #endif
 
@@ -457 +458 @@
  * @param   uVerbose    The verbosity level, currently unused.
  */
-static void hmR0SvmLogState(PVMCPU pVCpu, PCSVMVMCB pVmcb, const char *pszPrefix, uint32_t fFlags, uint8_t uVerbose)
+static void hmR0SvmLogState(PVMCPUCC pVCpu, PCSVMVMCB pVmcb, const char *pszPrefix, uint32_t fFlags, uint8_t uVerbose)
 {
     RT_NOREF2(pVCpu, uVerbose);
@@ -526 +527 @@
  *                          unused).
  */
-VMMR0DECL(int) SVMR0EnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost,
+VMMR0DECL(int) SVMR0EnableCpu(PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost,
                               PCSUPHWVIRTMSRS pHwvirtMsrs)
 {
@@ -661 +662 @@
  * @param   pVM     The cross context VM structure.
  */
-DECLINLINE(void) hmR0SvmFreeStructs(PVM pVM)
-{
-    for (uint32_t i = 0; i < pVM->cCpus; i++)
-    {
-        PVMCPU pVCpu = &pVM->aCpus[i];
+DECLINLINE(void) hmR0SvmFreeStructs(PVMCC pVM)
+{
+    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
+    {
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         AssertPtr(pVCpu);
 
@@ -700 +701 @@
  * @param   pVM         The cross context VM structure.
  */
-VMMR0DECL(int) SVMR0InitVM(PVM pVM)
+VMMR0DECL(int) SVMR0InitVM(PVMCC pVM)
 {
     int rc = VERR_INTERNAL_ERROR_5;
@@ -719 +720 @@
      * Initialize the R0 memory objects up-front so we can properly cleanup on allocation failures.
      */
-    for (VMCPUID i = 0; i < pVM->cCpus; i++)
-    {
-        PVMCPU pVCpu = &pVM->aCpus[i];
+    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
+    {
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         pVCpu->hm.s.svm.hMemObjVmcbHost  = NIL_RTR0MEMOBJ;
         pVCpu->hm.s.svm.hMemObjVmcb      = NIL_RTR0MEMOBJ;
@@ -727 +728 @@
     }
 
-    for (VMCPUID i = 0; i < pVM->cCpus; i++)
-    {
-        PVMCPU pVCpu = &pVM->aCpus[i];
+    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
+    {
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
 
         /*
@@ -785 +786 @@
  * @param   pVM         The cross context VM structure.
  */
-VMMR0DECL(int) SVMR0TermVM(PVM pVM)
+VMMR0DECL(int) SVMR0TermVM(PVMCC pVM)
 {
     hmR0SvmFreeStructs(pVM);
@@ -798 +799 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(bool) hmR0SvmSupportsVmcbCleanBits(PVMCPU pVCpu)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+DECLINLINE(bool) hmR0SvmSupportsVmcbCleanBits(PVMCPUCC pVCpu)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
     if (CPUMIsGuestInSvmNestedHwVirtMode(&pVCpu->cpum.GstCtx))
@@ -818 +819 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(bool) hmR0SvmSupportsDecodeAssists(PVMCPU pVCpu)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+DECLINLINE(bool) hmR0SvmSupportsDecodeAssists(PVMCPUCC pVCpu)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
     if (CPUMIsGuestInSvmNestedHwVirtMode(&pVCpu->cpum.GstCtx))
@@ -838 +839 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(bool) hmR0SvmSupportsNextRipSave(PVMCPU pVCpu)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+DECLINLINE(bool) hmR0SvmSupportsNextRipSave(PVMCPUCC pVCpu)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
     if (CPUMIsGuestInSvmNestedHwVirtMode(&pVCpu->cpum.GstCtx))
@@ -864 +865 @@
  *          caller needs to take care of this.
  */
-static void hmR0SvmSetMsrPermission(PVMCPU pVCpu, uint8_t *pbMsrBitmap, uint32_t idMsr, SVMMSREXITREAD enmRead,
+static void hmR0SvmSetMsrPermission(PVMCPUCC pVCpu, uint8_t *pbMsrBitmap, uint32_t idMsr, SVMMSREXITREAD enmRead,
                                     SVMMSREXITWRITE enmWrite)
 {
@@ -926 +927 @@
  * @param   pVM         The cross context VM structure.
  */
-VMMR0DECL(int) SVMR0SetupVM(PVM pVM)
+VMMR0DECL(int) SVMR0SetupVM(PVMCC pVM)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -947 +948 @@
 #endif
 
-    PVMCPU       pVCpu = &pVM->aCpus[0];
-    PSVMVMCB     pVmcb = pVCpu->hm.s.svm.pVmcb;
-    AssertMsgReturn(pVmcb, ("Invalid pVmcb for vcpu[0]\n"), VERR_SVM_INVALID_PVMCB);
-    PSVMVMCBCTRL pVmcbCtrl = &pVmcb->ctrl;
+    PVMCPUCC     pVCpu0 = VMCC_GET_CPU_0(pVM);
+    PSVMVMCB     pVmcb0 = pVCpu0->hm.s.svm.pVmcb;
+    AssertMsgReturn(RT_VALID_PTR(pVmcb0), ("Invalid pVmcb (%p) for vcpu[0]\n", pVmcb0), VERR_SVM_INVALID_PVMCB);
+    PSVMVMCBCTRL pVmcbCtrl0 = &pVmcb0->ctrl;
 
     /* Always trap #AC for reasons of security. */
-    pVmcbCtrl->u32InterceptXcpt |= RT_BIT_32(X86_XCPT_AC);
+    pVmcbCtrl0->u32InterceptXcpt |= RT_BIT_32(X86_XCPT_AC);
 
     /* Always trap #DB for reasons of security. */
-    pVmcbCtrl->u32InterceptXcpt |= RT_BIT_32(X86_XCPT_DB);
+    pVmcbCtrl0->u32InterceptXcpt |= RT_BIT_32(X86_XCPT_DB);
 
     /* Trap exceptions unconditionally (debug purposes). */
 #ifdef HMSVM_ALWAYS_TRAP_PF
-    pVmcbCtrl->u32InterceptXcpt |=   RT_BIT(X86_XCPT_PF);
+    pVmcbCtrl0->u32InterceptXcpt |= RT_BIT_32(X86_XCPT_PF);
 #endif
 #ifdef HMSVM_ALWAYS_TRAP_ALL_XCPTS
     /* If you add any exceptions here, make sure to update hmR0SvmHandleExit(). */
-    pVmcbCtrl->u32InterceptXcpt |= 0
-                                 | RT_BIT(X86_XCPT_BP)
-                                 | RT_BIT(X86_XCPT_DE)
-                                 | RT_BIT(X86_XCPT_NM)
-                                 | RT_BIT(X86_XCPT_UD)
-                                 | RT_BIT(X86_XCPT_NP)
-                                 | RT_BIT(X86_XCPT_SS)
-                                 | RT_BIT(X86_XCPT_GP)
-                                 | RT_BIT(X86_XCPT_PF)
-                                 | RT_BIT(X86_XCPT_MF)
-                                 ;
+    pVmcbCtrl0->u32InterceptXcpt |= RT_BIT_32(X86_XCPT_BP)
+                                  | RT_BIT_32(X86_XCPT_DE)
+                                  | RT_BIT_32(X86_XCPT_NM)
+                                  | RT_BIT_32(X86_XCPT_UD)
+                                  | RT_BIT_32(X86_XCPT_NP)
+                                  | RT_BIT_32(X86_XCPT_SS)
+                                  | RT_BIT_32(X86_XCPT_GP)
+                                  | RT_BIT_32(X86_XCPT_PF)
+                                  | RT_BIT_32(X86_XCPT_MF)
+                                  ;
 #endif
 
     /* Apply the exceptions intercepts needed by the GIM provider. */
-    if (pVCpu->hm.s.fGIMTrapXcptUD)
-        pVmcbCtrl->u32InterceptXcpt |= RT_BIT(X86_XCPT_UD);
+    if (pVCpu0->hm.s.fGIMTrapXcptUD)
+        pVmcbCtrl0->u32InterceptXcpt |= RT_BIT(X86_XCPT_UD);
 
     /* The mesa 3d driver hack needs #GP. */
-    if (pVCpu->hm.s.fTrapXcptGpForLovelyMesaDrv)
-        pVmcbCtrl->u32InterceptXcpt |= RT_BIT(X86_XCPT_GP);
+    if (pVCpu0->hm.s.fTrapXcptGpForLovelyMesaDrv)
+        pVmcbCtrl0->u32InterceptXcpt |= RT_BIT(X86_XCPT_GP);
 
     /* Set up unconditional intercepts and conditions. */
-    pVmcbCtrl->u64InterceptCtrl = HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS
-                                | SVM_CTRL_INTERCEPT_VMMCALL;
+    pVmcbCtrl0->u64InterceptCtrl = HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS
+                                 | SVM_CTRL_INTERCEPT_VMMCALL;
 
 #ifdef HMSVM_ALWAYS_TRAP_TASK_SWITCH
-    pVmcbCtrl->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_TASK_SWITCH;
+    pVmcbCtrl0->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_TASK_SWITCH;
 #endif
 
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
     /* Virtualized VMSAVE/VMLOAD. */
-    pVmcbCtrl->LbrVirt.n.u1VirtVmsaveVmload = fUseVirtVmsaveVmload;
+    pVmcbCtrl0->LbrVirt.n.u1VirtVmsaveVmload = fUseVirtVmsaveVmload;
     if (!fUseVirtVmsaveVmload)
-    {
-        pVmcbCtrl->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_VMSAVE
-                                     | SVM_CTRL_INTERCEPT_VMLOAD;
-    }
+        pVmcbCtrl0->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_VMSAVE
+                                      | SVM_CTRL_INTERCEPT_VMLOAD;
 
     /* Virtual GIF. */
-    pVmcbCtrl->IntCtrl.n.u1VGifEnable = fUseVGif;
+    pVmcbCtrl0->IntCtrl.n.u1VGifEnable = fUseVGif;
     if (!fUseVGif)
-    {
-        pVmcbCtrl->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_CLGI
-                                     | SVM_CTRL_INTERCEPT_STGI;
-    }
+        pVmcbCtrl0->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_CLGI
+                                      | SVM_CTRL_INTERCEPT_STGI;
 #endif
 
     /* CR4 writes must always be intercepted for tracking PGM mode changes. */
-    pVmcbCtrl->u16InterceptWrCRx = RT_BIT(4);
+    pVmcbCtrl0->u16InterceptWrCRx = RT_BIT(4);
 
     /* Intercept all DRx reads and writes by default. Changed later on. */
-    pVmcbCtrl->u16InterceptRdDRx = 0xffff;
-    pVmcbCtrl->u16InterceptWrDRx = 0xffff;
+    pVmcbCtrl0->u16InterceptRdDRx = 0xffff;
+    pVmcbCtrl0->u16InterceptWrDRx = 0xffff;
 
     /* Virtualize masking of INTR interrupts. (reads/writes from/to CR8 go to the V_TPR register) */
-    pVmcbCtrl->IntCtrl.n.u1VIntrMasking = 1;
+    pVmcbCtrl0->IntCtrl.n.u1VIntrMasking = 1;
 
     /* Ignore the priority in the virtual TPR. This is necessary for delivering PIC style (ExtInt) interrupts
        and we currently deliver both PIC and APIC interrupts alike, see hmR0SvmEvaluatePendingEvent() */
-    pVmcbCtrl->IntCtrl.n.u1IgnoreTPR = 1;
+    pVmcbCtrl0->IntCtrl.n.u1IgnoreTPR = 1;
 
     /* Set the IO permission bitmap physical addresses. */
-    pVmcbCtrl->u64IOPMPhysAddr = g_HCPhysIOBitmap;
+    pVmcbCtrl0->u64IOPMPhysAddr = g_HCPhysIOBitmap;
 
     /* LBR virtualization. */
-    pVmcbCtrl->LbrVirt.n.u1LbrVirt = fUseLbrVirt;
+    pVmcbCtrl0->LbrVirt.n.u1LbrVirt = fUseLbrVirt;
 
     /* The host ASID MBZ, for the guest start with 1. */
-    pVmcbCtrl->TLBCtrl.n.u32ASID = 1;
+    pVmcbCtrl0->TLBCtrl.n.u32ASID = 1;
 
     /* Setup Nested Paging. This doesn't change throughout the execution time of the VM. */
-    pVmcbCtrl->NestedPagingCtrl.n.u1NestedPaging = pVM->hm.s.fNestedPaging;
+    pVmcbCtrl0->NestedPagingCtrl.n.u1NestedPaging = pVM->hm.s.fNestedPaging;
 
     /* Without Nested Paging, we need additionally intercepts. */
@@ -1041 +1037 @@
     {
         /* CR3 reads/writes must be intercepted; our shadow values differ from the guest values. */
-        pVmcbCtrl->u16InterceptRdCRx |= RT_BIT(3);
-        pVmcbCtrl->u16InterceptWrCRx |= RT_BIT(3);
+        pVmcbCtrl0->u16InterceptRdCRx |= RT_BIT(3);
+        pVmcbCtrl0->u16InterceptWrCRx |= RT_BIT(3);
 
         /* Intercept INVLPG and task switches (may change CR3, EFLAGS, LDT). */
-        pVmcbCtrl->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_INVLPG
-                                     | SVM_CTRL_INTERCEPT_TASK_SWITCH;
+        pVmcbCtrl0->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_INVLPG
+                                      | SVM_CTRL_INTERCEPT_TASK_SWITCH;
 
         /* Page faults must be intercepted to implement shadow paging. */
-        pVmcbCtrl->u32InterceptXcpt |= RT_BIT(X86_XCPT_PF);
+        pVmcbCtrl0->u32InterceptXcpt |= RT_BIT(X86_XCPT_PF);
     }
 
@@ -1056 +1052 @@
     {
         Assert(pVM->hm.s.svm.cPauseFilter > 0);
-        pVmcbCtrl->u16PauseFilterCount = pVM->hm.s.svm.cPauseFilter;
+        pVmcbCtrl0->u16PauseFilterCount = pVM->hm.s.svm.cPauseFilter;
         if (fPauseFilterThreshold)
-            pVmcbCtrl->u16PauseFilterThreshold = pVM->hm.s.svm.cPauseFilterThresholdTicks;
-        pVmcbCtrl->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_PAUSE;
+            pVmcbCtrl0->u16PauseFilterThreshold = pVM->hm.s.svm.cPauseFilterThresholdTicks;
+        pVmcbCtrl0->u64InterceptCtrl |= SVM_CTRL_INTERCEPT_PAUSE;
     }
 
@@ -1067 +1063 @@
      * Don't intercept guest read/write accesses to these MSRs.
      */
-    uint8_t *pbMsrBitmap = (uint8_t *)pVCpu->hm.s.svm.pvMsrBitmap;
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K8_LSTAR,          SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K8_CSTAR,          SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K6_STAR,           SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K8_SF_MASK,        SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K8_FS_BASE,        SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K8_GS_BASE,        SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_K8_KERNEL_GS_BASE, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_IA32_SYSENTER_CS,  SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_IA32_SYSENTER_ESP, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    hmR0SvmSetMsrPermission(pVCpu, pbMsrBitmap, MSR_IA32_SYSENTER_EIP, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
-    pVmcbCtrl->u64MSRPMPhysAddr = pVCpu->hm.s.svm.HCPhysMsrBitmap;
+    uint8_t *pbMsrBitmap0 = (uint8_t *)pVCpu0->hm.s.svm.pvMsrBitmap;
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_LSTAR,          SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_CSTAR,          SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K6_STAR,           SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_SF_MASK,        SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_FS_BASE,        SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_GS_BASE,        SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_KERNEL_GS_BASE, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_IA32_SYSENTER_CS,  SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_IA32_SYSENTER_ESP, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_IA32_SYSENTER_EIP, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
+    pVmcbCtrl0->u64MSRPMPhysAddr = pVCpu0->hm.s.svm.HCPhysMsrBitmap;
 
     /* Initially all VMCB clean bits MBZ indicating that everything should be loaded from the VMCB in memory. */
-    Assert(pVmcbCtrl->u32VmcbCleanBits == 0);
-
-    for (VMCPUID i = 1; i < pVM->cCpus; i++)
-    {
-        PVMCPU       pVCpuCur = &pVM->aCpus[i];
-        PSVMVMCB     pVmcbCur = pVM->aCpus[i].hm.s.svm.pVmcb;
-        AssertMsgReturn(pVmcbCur, ("Invalid pVmcb for vcpu[%u]\n", i), VERR_SVM_INVALID_PVMCB);
+    Assert(pVmcbCtrl0->u32VmcbCleanBits == 0);
+
+    for (VMCPUID idCpu = 1; idCpu < pVM->cCpus; idCpu++)
+    {
+        PVMCPUCC     pVCpuCur = VMCC_GET_CPU(pVM, idCpu);
+        PSVMVMCB     pVmcbCur = pVCpuCur->hm.s.svm.pVmcb;
+        AssertMsgReturn(RT_VALID_PTR(pVmcbCur), ("Invalid pVmcb (%p) for vcpu[%u]\n", pVmcbCur, idCpu), VERR_SVM_INVALID_PVMCB);
         PSVMVMCBCTRL pVmcbCtrlCur = &pVmcbCur->ctrl;
 
         /* Copy the VMCB control area. */
-        memcpy(pVmcbCtrlCur, pVmcbCtrl, sizeof(*pVmcbCtrlCur));
+        memcpy(pVmcbCtrlCur, pVmcbCtrl0, sizeof(*pVmcbCtrlCur));
 
         /* Copy the MSR bitmap and setup the VCPU-specific host physical address. */
         uint8_t *pbMsrBitmapCur = (uint8_t *)pVCpuCur->hm.s.svm.pvMsrBitmap;
-        memcpy(pbMsrBitmapCur, pbMsrBitmap, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT);
+        memcpy(pbMsrBitmapCur, pbMsrBitmap0, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT);
         pVmcbCtrlCur->u64MSRPMPhysAddr = pVCpuCur->hm.s.svm.HCPhysMsrBitmap;
 
@@ -1102 +1098 @@
 
         /* Verify our assumption that GIM providers trap #UD uniformly across VCPUs initially. */
-        Assert(pVCpuCur->hm.s.fGIMTrapXcptUD == pVCpu->hm.s.fGIMTrapXcptUD);
+        Assert(pVCpuCur->hm.s.fGIMTrapXcptUD == pVCpu0->hm.s.fGIMTrapXcptUD);
     }
 
@@ -1121 +1117 @@
  * @param   pVCpu           The cross context virtual CPU structure.
  */
-DECLINLINE(PSVMVMCB) hmR0SvmGetCurrentVmcb(PVMCPU pVCpu)
+DECLINLINE(PSVMVMCB) hmR0SvmGetCurrentVmcb(PVMCPUCC pVCpu)
 {
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
@@ -1137 +1133 @@
  * @param   pVCpu           The cross context virtual CPU structure.
  */
-DECLINLINE(PSVMNESTEDVMCBCACHE) hmR0SvmGetNestedVmcbCache(PVMCPU pVCpu)
+DECLINLINE(PSVMNESTEDVMCBCACHE) hmR0SvmGetNestedVmcbCache(PVMCPUCC pVCpu)
 {
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
@@ -1156 +1152 @@
  * @param   GCVirt      Guest virtual address of the page to invalidate.
  */
-VMMR0DECL(int) SVMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt)
+VMMR0DECL(int) SVMR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt)
 {
     Assert(pVCpu->CTX_SUFF(pVM)->hm.s.svm.fSupported);
@@ -1184 +1180 @@
  * @param   pVmcb       Pointer to the VM control block.
  */
-static void hmR0SvmFlushTaggedTlb(PHMPHYSCPU pHostCpu, PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmFlushTaggedTlb(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     /*
@@ -1225 +1221 @@
      * This Host CPU requirement takes precedence.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (pVM->hm.s.svm.fAlwaysFlushTLB)
     {
@@ -1340 +1336 @@
  *          are not intercepting it.
  */
-DECLINLINE(void) hmR0SvmClearXcptIntercept(PVMCPU pVCpu, PSVMVMCB pVmcb, uint8_t uXcpt)
+DECLINLINE(void) hmR0SvmClearXcptIntercept(PVMCPUCC pVCpu, PSVMVMCB pVmcb, uint8_t uXcpt)
 {
     Assert(uXcpt != X86_XCPT_DB);
@@ -1400 +1396 @@
  *          are not intercepting it.
  */
-static bool hmR0SvmClearCtrlIntercept(PVMCPU pVCpu, PSVMVMCB pVmcb, uint64_t fCtrlIntercept)
+static bool hmR0SvmClearCtrlIntercept(PVMCPUCC pVCpu, PSVMVMCB pVmcb, uint64_t fCtrlIntercept)
 {
     if (pVmcb->ctrl.u64InterceptCtrl & fCtrlIntercept)
@@ -1435 +1431 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportGuestCR0(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportGuestCR0(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1518 +1514 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportGuestCR3(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportGuestCR3(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
 
-    PVM      pVM  = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM  = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
     if (pVM->hm.s.fNestedPaging)
@@ -1546 +1542 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0SvmExportGuestCR4(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static int hmR0SvmExportGuestCR4(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1623 +1619 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0SvmExportGuestControlRegs(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static int hmR0SvmExportGuestControlRegs(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1664 +1660 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportGuestSegmentRegs(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportGuestSegmentRegs(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1733 +1729 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportGuestMsrs(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportGuestMsrs(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1813 +1809 @@
  * @remarks Requires EFLAGS to be up-to-date in the VMCB!
  */
-static void hmR0SvmExportSharedDebugState(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportSharedDebugState(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     PCCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -1938 +1934 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportGuestHwvirtStateNested(PVMCPU pVCpu, PSVMVMCB pVmcbNstGst)
+static void hmR0SvmExportGuestHwvirtStateNested(PVMCPUCC pVCpu, PSVMVMCB pVmcbNstGst)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -1952 +1948 @@
          * and may continue execution in SVM R0 without a nested-guest #VMEXIT in between.
          */
-        PVM            pVM = pVCpu->CTX_SUFF(pVM);
+        PVMCC            pVM = pVCpu->CTX_SUFF(pVM);
         PSVMVMCBCTRL   pVmcbNstGstCtrl = &pVmcbNstGst->ctrl;
         uint16_t const uGuestPauseFilterCount     = pVM->hm.s.svm.cPauseFilter;
@@ -1981 +1977 @@
  * @param   pVmcb       Pointer to the VM control block.
  */
-static int hmR0SvmExportGuestApicTpr(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static int hmR0SvmExportGuestApicTpr(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_APIC_TPR)
     {
-        PVM pVM = pVCpu->CTX_SUFF(pVM);
+        PVMCC pVM = pVCpu->CTX_SUFF(pVM);
         if (   PDMHasApic(pVM)
             && APICIsEnabled(pVCpu))
@@ -2048 +2044 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportGuestXcptIntercepts(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportGuestXcptIntercepts(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2085 +2081 @@
  * @param   pVmcbNstGst     Pointer to the nested-guest VM control block.
  */
-static void hmR0SvmMergeVmcbCtrlsNested(PVMCPU pVCpu)
-{
-    PVM          pVM             = pVCpu->CTX_SUFF(pVM);
+static void hmR0SvmMergeVmcbCtrlsNested(PVMCPUCC pVCpu)
+{
+    PVMCC          pVM             = pVCpu->CTX_SUFF(pVM);
     PCSVMVMCB    pVmcb           = pVCpu->hm.s.svm.pVmcb;
     PSVMVMCB     pVmcbNstGst     = pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pVmcb);
@@ -2166 +2162 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0SvmSelectVMRunHandler(PVMCPU pVCpu)
+static int hmR0SvmSelectVMRunHandler(PVMCPUCC pVCpu)
 {
     if (CPUMIsGuestInLongMode(pVCpu))
@@ -2196 +2192 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0DECL(int) SVMR0Enter(PVMCPU pVCpu)
+VMMR0DECL(int) SVMR0Enter(PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -2219 +2215 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0DECL(void) SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit)
+VMMR0DECL(void) SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit)
 {
     NOREF(fGlobalInit);
@@ -2289 +2285 @@
  * @remarks No-long-jump zone!!!
  */
-VMMR0DECL(int) SVMR0ExportHostState(PVMCPU pVCpu)
+VMMR0DECL(int) SVMR0ExportHostState(PVMCPUCC pVCpu)
 {
     NOREF(pVCpu);
@@ -2311 +2307 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0SvmExportGuestState(PVMCPU pVCpu)
+static int hmR0SvmExportGuestState(PVMCPUCC pVCpu)
 {
     STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExportGuestState, x);
@@ -2399 +2395 @@
  * @remarks No-long-jmp zone!!!
  */
-DECLINLINE(void) hmR0SvmMergeMsrpmNested(PHMPHYSCPU pHostCpu, PVMCPU pVCpu)
+DECLINLINE(void) hmR0SvmMergeMsrpmNested(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu)
 {
     uint64_t const *pu64GstMsrpm    = (uint64_t const *)pVCpu->hm.s.svm.pvMsrBitmap;
@@ -2421 +2417 @@
  * @sa      HMNotifySvmNstGstVmexit.
  */
-static bool hmR0SvmCacheVmcbNested(PVMCPU pVCpu)
+static bool hmR0SvmCacheVmcbNested(PVMCPUCC pVCpu)
 {
     /*
@@ -2465 +2461 @@
  * @param   pVCpu           The cross context virtual CPU structure.
  */
-static void hmR0SvmSetupVmcbNested(PVMCPU pVCpu)
+static void hmR0SvmSetupVmcbNested(PVMCPUCC pVCpu)
 {
     PSVMVMCB     pVmcbNstGst     = pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pVmcb);
@@ -2548 +2544 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0SvmExportGuestStateNested(PVMCPU pVCpu)
+static int hmR0SvmExportGuestStateNested(PVMCPUCC pVCpu)
 {
     STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExportGuestState, x);
@@ -2626 +2622 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmExportSharedState(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmExportSharedState(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2656 +2652 @@
  * @param   fWhat   What to import, CPUMCTX_EXTRN_XXX.
  */
-static void hmR0SvmImportGuestState(PVMCPU pVCpu, uint64_t fWhat)
+static void hmR0SvmImportGuestState(PVMCPUCC pVCpu, uint64_t fWhat)
 {
     STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatImportGuestState, x);
@@ -2925 +2921 @@
  * @param   fWhat   What to import, CPUMCTX_EXTRN_XXX.
  */
-VMMR0DECL(int) SVMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat)
+VMMR0DECL(int) SVMR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat)
 {
     hmR0SvmImportGuestState(pVCpu, fWhat);
@@ -2942 +2938 @@
  * @remarks No-long-jmp zone!!!
  */
-static void hmR0SvmLeave(PVMCPU pVCpu, bool fImportState)
+static void hmR0SvmLeave(PVMCPUCC pVCpu, bool fImportState)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2997 +2993 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-static int hmR0SvmLeaveSession(PVMCPU pVCpu)
+static int hmR0SvmLeaveSession(PVMCPUCC pVCpu)
 {
     HM_DISABLE_PREEMPT(pVCpu);
@@ -3036 +3032 @@
  * @remarks No-long-jmp zone!!!
  */
-static int hmR0SvmLongJmpToRing3(PVMCPU pVCpu)
+static int hmR0SvmLongJmpToRing3(PVMCPUCC pVCpu)
 {
     return hmR0SvmLeaveSession(pVCpu);
@@ -3051 +3047 @@
  * @param   pvUser          The user argument, NULL (currently unused).
  */
-static DECLCALLBACK(int) hmR0SvmCallRing3Callback(PVMCPU pVCpu, VMMCALLRING3 enmOperation, void *pvUser)
+static DECLCALLBACK(int) hmR0SvmCallRing3Callback(PVMCPUCC pVCpu, VMMCALLRING3 enmOperation, void *pvUser)
 {
     RT_NOREF_PV(pvUser);
@@ -3114 +3110 @@
  *                      VINF_VMM_UNKNOWN_RING3_CALL.
  */
-static int hmR0SvmExitToRing3(PVMCPU pVCpu, int rcExit)
+static int hmR0SvmExitToRing3(PVMCPUCC pVCpu, int rcExit)
 {
     Assert(pVCpu);
@@ -3189 +3185 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmUpdateTscOffsetting(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmUpdateTscOffsetting(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     /*
@@ -3240 +3236 @@
  *          the guest i.e. 'StatInjectPendingReflect' is incremented always.
  */
-DECLINLINE(void) hmR0SvmSetPendingEvent(PVMCPU pVCpu, PSVMEVENT pEvent, RTGCUINTPTR GCPtrFaultAddress)
+DECLINLINE(void) hmR0SvmSetPendingEvent(PVMCPUCC pVCpu, PSVMEVENT pEvent, RTGCUINTPTR GCPtrFaultAddress)
 {
     Assert(!pVCpu->hm.s.Event.fPending);
@@ -3259 +3255 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0SvmSetPendingXcptUD(PVMCPU pVCpu)
+DECLINLINE(void) hmR0SvmSetPendingXcptUD(PVMCPUCC pVCpu)
 {
     SVMEVENT Event;
@@ -3275 +3271 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0SvmSetPendingXcptDB(PVMCPU pVCpu)
+DECLINLINE(void) hmR0SvmSetPendingXcptDB(PVMCPUCC pVCpu)
 {
     SVMEVENT Event;
@@ -3295 +3291 @@
  * @remarks This updates the guest CR2 with @a uFaultAddress!
  */
-DECLINLINE(void) hmR0SvmSetPendingXcptPF(PVMCPU pVCpu, uint32_t u32ErrCode, RTGCUINTPTR uFaultAddress)
+DECLINLINE(void) hmR0SvmSetPendingXcptPF(PVMCPUCC pVCpu, uint32_t u32ErrCode, RTGCUINTPTR uFaultAddress)
 {
     SVMEVENT Event;
@@ -3323 +3319 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0SvmSetPendingXcptMF(PVMCPU pVCpu)
+DECLINLINE(void) hmR0SvmSetPendingXcptMF(PVMCPUCC pVCpu)
 {
     SVMEVENT Event;
@@ -3339 +3335 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0SvmSetPendingXcptDF(PVMCPU pVCpu)
+DECLINLINE(void) hmR0SvmSetPendingXcptDF(PVMCPUCC pVCpu)
 {
     SVMEVENT Event;
@@ -3363 +3359 @@
  * @remarks Requires CR0!
  */
-DECLINLINE(void) hmR0SvmInjectEventVmcb(PVMCPU pVCpu, PSVMVMCB pVmcb, PSVMEVENT pEvent)
+DECLINLINE(void) hmR0SvmInjectEventVmcb(PVMCPUCC pVCpu, PSVMVMCB pVmcb, PSVMEVENT pEvent)
 {
     Assert(!pVmcb->ctrl.EventInject.n.u1Valid);
@@ -3382 +3378 @@
  * @param   pVCpu           The cross context virtual CPU structure.
  */
-static void hmR0SvmTrpmTrapToPendingEvent(PVMCPU pVCpu)
+static void hmR0SvmTrpmTrapToPendingEvent(PVMCPUCC pVCpu)
 {
     Assert(TRPMHasTrap(pVCpu));
@@ -3455 +3451 @@
  * @param   pVCpu           The cross context virtual CPU structure.
  */
-static void hmR0SvmPendingEventToTrpmTrap(PVMCPU pVCpu)
+static void hmR0SvmPendingEventToTrpmTrap(PVMCPUCC pVCpu)
 {
     Assert(pVCpu->hm.s.Event.fPending);
@@ -3496 +3492 @@
  * @remarks Has side-effects with VMCPU_FF_INHIBIT_INTERRUPTS force-flag.
  */
-static bool hmR0SvmIsIntrShadowActive(PVMCPU pVCpu)
+static bool hmR0SvmIsIntrShadowActive(PVMCPUCC pVCpu)
 {
     /*
@@ -3527 +3523 @@
  * @param   pVmcb   Pointer to the VM control block.
  */
-static void hmR0SvmSetIntWindowExiting(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmSetIntWindowExiting(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     /*
@@ -3578 +3574 @@
  * @param   pVmcb   Pointer to the VM control block.
  */
-static void hmR0SvmClearIntWindowExiting(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmClearIntWindowExiting(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     PSVMVMCBCTRL pVmcbCtrl = &pVmcb->ctrl;
@@ -3599 +3595 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-static VBOXSTRICTRC hmR0SvmEvaluatePendingEventNested(PVMCPU pVCpu)
+static VBOXSTRICTRC hmR0SvmEvaluatePendingEventNested(PVMCPUCC pVCpu)
 {
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -3725 +3721 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-static void hmR0SvmEvaluatePendingEvent(PVMCPU pVCpu)
+static void hmR0SvmEvaluatePendingEvent(PVMCPUCC pVCpu)
 {
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -3827 +3823 @@
  *          prematurely.
  */
-static void hmR0SvmInjectPendingEvent(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static void hmR0SvmInjectPendingEvent(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     Assert(!TRPMHasTrap(pVCpu));
@@ -3928 +3924 @@
  *                          guest-state).
  */
-static void hmR0SvmReportWorldSwitchError(PVMCPU pVCpu, int rcVMRun)
+static void hmR0SvmReportWorldSwitchError(PVMCPUCC pVCpu, int rcVMRun)
 {
     HMSVM_ASSERT_PREEMPT_SAFE(pVCpu);
@@ -4086 +4082 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-static int hmR0SvmCheckForceFlags(PVMCPU pVCpu)
+static int hmR0SvmCheckForceFlags(PVMCPUCC pVCpu)
 {
     Assert(VMMRZCallRing3IsEnabled(pVCpu));
@@ -4099 +4095 @@
         APICUpdatePendingInterrupts(pVCpu);
 
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (   VM_FF_IS_ANY_SET(pVM, !pVCpu->hm.s.fSingleInstruction
                             ? VM_FF_HP_R0_PRE_HM_MASK : VM_FF_HP_R0_PRE_HM_STEP_MASK)
@@ -4172 +4168 @@
  * @sa      hmR0SvmPreRunGuest.
  */
-static int hmR0SvmPreRunGuestNested(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+static int hmR0SvmPreRunGuestNested(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -4208 +4204 @@
      * NB: If we could continue a task switch exit we wouldn't need to do this.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (RT_UNLIKELY(   !pVM->hm.s.svm.u32Features
                     &&  pVCpu->hm.s.Event.fPending
@@ -4294 +4290 @@
  * @param   pSvmTransient   Pointer to the SVM transient structure.
  */
-static int hmR0SvmPreRunGuest(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+static int hmR0SvmPreRunGuest(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_ASSERT_PREEMPT_SAFE(pVCpu);
@@ -4314 +4310 @@
      * NB: If we could continue a task switch exit we wouldn't need to do this.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (RT_UNLIKELY(pVCpu->hm.s.Event.fPending && (((pVCpu->hm.s.Event.u64IntInfo >> 8) & 7) == SVM_EVENT_NMI)))
         if (RT_UNLIKELY(!pVM->hm.s.svm.u32Features))
@@ -4400 +4396 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0SvmPreRunGuestCommitted(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+static void hmR0SvmPreRunGuestCommitted(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
@@ -4409 +4405 @@
     VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);            /* Indicate the start of guest execution. */
 
-    PVM      pVM   = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM   = pVCpu->CTX_SUFF(pVM);
     PSVMVMCB pVmcb = pSvmTransient->pVmcb;
 
@@ -4524 +4520 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0SvmRunGuest(PVMCPU pVCpu, RTHCPHYS HCPhysVmcb)
+DECLINLINE(int) hmR0SvmRunGuest(PVMCPUCC pVCpu, RTHCPHYS HCPhysVmcb)
 {
     /* Mark that HM is the keeper of all guest-CPU registers now that we're going to execute guest code. */
@@ -4537 +4533 @@
      * Refer MSDN "Configuring Programs for 64-bit/x64 Software Conventions / Register Usage".
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 #ifdef VBOX_WITH_KERNEL_USING_XMM
     return hmR0SVMRunWrapXMM(pVCpu->hm.s.svm.HCPhysVmcbHost, HCPhysVmcb, pCtx, pVM, pVCpu, pVCpu->hm.s.svm.pfnVMRun);
@@ -4558 +4554 @@
  *          unconditionally when it is safe to do so.
  */
-static void hmR0SvmPostRunGuest(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient, int rcVMRun)
+static void hmR0SvmPostRunGuest(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient, int rcVMRun)
 {
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
@@ -4683 +4679 @@
  * @param   pcLoops     Pointer to the number of executed loops.
  */
-static int hmR0SvmRunGuestCodeNormal(PVMCPU pVCpu, uint32_t *pcLoops)
+static int hmR0SvmRunGuestCodeNormal(PVMCPUCC pVCpu, uint32_t *pcLoops)
 {
     uint32_t const cMaxResumeLoops = pVCpu->CTX_SUFF(pVM)->hm.s.cMaxResumeLoops;
@@ -4758 +4754 @@
  * @param   pcLoops     Pointer to the number of executed loops.
  */
-static int hmR0SvmRunGuestCodeStep(PVMCPU pVCpu, uint32_t *pcLoops)
+static int hmR0SvmRunGuestCodeStep(PVMCPUCC pVCpu, uint32_t *pcLoops)
 {
     uint32_t const cMaxResumeLoops = pVCpu->CTX_SUFF(pVM)->hm.s.cMaxResumeLoops;
@@ -4865 +4861 @@
  *                      execution loop pass the remainder value, else pass 0.
  */
-static int hmR0SvmRunGuestCodeNested(PVMCPU pVCpu, uint32_t *pcLoops)
+static int hmR0SvmRunGuestCodeNested(PVMCPUCC pVCpu, uint32_t *pcLoops)
 {
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -4957 +4953 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0DECL(VBOXSTRICTRC) SVMR0RunGuestCode(PVMCPU pVCpu)
+VMMR0DECL(VBOXSTRICTRC) SVMR0RunGuestCode(PVMCPUCC pVCpu)
 {
     Assert(VMMRZCallRing3IsEnabled(pVCpu));
@@ -5036 +5032 @@
  * @param   pSvmTransient   Pointer to the SVM transient structure.
  */
-static int hmR0SvmHandleExitNested(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+static int hmR0SvmHandleExitNested(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_ASSERT_IN_NESTED_GUEST(&pVCpu->cpum.GstCtx);
@@ -5162 +5158 @@
         case SVM_EXIT_XCPT_PF:
         {
-            PVM pVM = pVCpu->CTX_SUFF(pVM);
+            PVMCC pVM = pVCpu->CTX_SUFF(pVM);
             if (pVM->hm.s.fNestedPaging)
             {
@@ -5495 +5491 @@
  * @param   pSvmTransient   Pointer to the SVM transient structure.
  */
-static int hmR0SvmHandleExit(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+static int hmR0SvmHandleExit(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     Assert(pSvmTransient->u64ExitCode != SVM_EXIT_INVALID);
@@ -5757 +5753 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0SvmCheckExitDueToEventDelivery(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+static int hmR0SvmCheckExitDueToEventDelivery(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     int rc = VINF_SUCCESS;
@@ -5906 +5902 @@
  * @param   cb          RIP increment value in bytes.
  */
-DECLINLINE(void) hmR0SvmAdvanceRip(PVMCPU pVCpu, uint32_t cb)
+DECLINLINE(void) hmR0SvmAdvanceRip(PVMCPUCC pVCpu, uint32_t cb)
 {
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -5930 +5926 @@
  * signals (SVM_EXIT_INTR, SVM_EXIT_NMI, SVM_EXIT_FERR_FREEZE, SVM_EXIT_INIT).
  */
-HMSVM_EXIT_DECL hmR0SvmExitIntr(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitIntr(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -5955 +5951 @@
  * \#VMEXIT handler for WBINVD (SVM_EXIT_WBINVD). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitWbinvd(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitWbinvd(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -5987 +5983 @@
  * \#VMEXIT handler for INVD (SVM_EXIT_INVD). Unconditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitInvd(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitInvd(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6019 +6015 @@
  * \#VMEXIT handler for INVD (SVM_EXIT_CPUID). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitCpuid(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitCpuid(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6073 +6069 @@
  * \#VMEXIT handler for RDTSC (SVM_EXIT_RDTSC). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitRdtsc(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitRdtsc(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6107 +6103 @@
  * \#VMEXIT handler for RDTSCP (SVM_EXIT_RDTSCP). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitRdtscp(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitRdtscp(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6141 +6137 @@
  * \#VMEXIT handler for RDPMC (SVM_EXIT_RDPMC). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitRdpmc(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitRdpmc(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6173 +6169 @@
  * \#VMEXIT handler for INVLPG (SVM_EXIT_INVLPG). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitInvlpg(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitInvlpg(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6209 +6205 @@
  * \#VMEXIT handler for HLT (SVM_EXIT_HLT). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitHlt(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitHlt(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6246 +6242 @@
  * \#VMEXIT handler for MONITOR (SVM_EXIT_MONITOR). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitMonitor(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitMonitor(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6283 +6279 @@
  * \#VMEXIT handler for MWAIT (SVM_EXIT_MWAIT). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitMwait(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitMwait(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6319 +6315 @@
  * \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitShutdown(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitShutdown(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6330 +6326 @@
  * \#VMEXIT handler for unexpected exits. Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitUnexpected(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitUnexpected(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     PCSVMVMCB pVmcb = hmR0SvmGetCurrentVmcb(pVCpu);
@@ -6345 +6341 @@
  * \#VMEXIT handler for CRx reads (SVM_EXIT_READ_CR*). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitReadCRx(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitReadCRx(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6403 +6399 @@
  * \#VMEXIT handler for CRx writes (SVM_EXIT_WRITE_CR*). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitWriteCRx(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitWriteCRx(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6501 +6497 @@
  * @param   pVmcb       Pointer to the VM control block.
  */
-static VBOXSTRICTRC hmR0SvmExitReadMsr(PVMCPU pVCpu, PSVMVMCB pVmcb)
+static VBOXSTRICTRC hmR0SvmExitReadMsr(PVMCPUCC pVCpu, PSVMVMCB pVmcb)
 {
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdmsr);
@@ -6545 +6541 @@
  * @param   pSvmTransient   Pointer to the SVM-transient structure.
  */
-static VBOXSTRICTRC hmR0SvmExitWriteMsr(PVMCPU pVCpu, PSVMVMCB pVmcb, PSVMTRANSIENT pSvmTransient)
+static VBOXSTRICTRC hmR0SvmExitWriteMsr(PVMCPUCC pVCpu, PSVMVMCB pVmcb, PSVMTRANSIENT pSvmTransient)
 {
     PCPUMCTX pCtx  = &pVCpu->cpum.GstCtx;
@@ -6653 +6649 @@
  * \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitMsr(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitMsr(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6669 +6665 @@
  * \#VMEXIT handler for DRx read (SVM_EXIT_READ_DRx). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitReadDRx(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitReadDRx(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6740 +6736 @@
  * \#VMEXIT handler for DRx write (SVM_EXIT_WRITE_DRx). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitWriteDRx(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitWriteDRx(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6754 +6750 @@
  * \#VMEXIT handler for XCRx write (SVM_EXIT_XSETBV). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXsetbv(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXsetbv(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6781 +6777 @@
  * \#VMEXIT handler for I/O instructions (SVM_EXIT_IOIO). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitIOInstr(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitIOInstr(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -6790 +6786 @@
     static uint32_t const s_aIOOpAnd[8] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 };  /* AND masks for saving
                                                                                            the result (in AL/AX/EAX). */
-    PVM      pVM   = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM   = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX pCtx  = &pVCpu->cpum.GstCtx;
     PSVMVMCB pVmcb = hmR0SvmGetCurrentVmcb(pVCpu);
@@ -7020 +7016 @@
  * \#VMEXIT handler for Nested Page-faults (SVM_EXIT_NPF). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitNestedPF(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitNestedPF(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7026 +7022 @@
     HMSVM_CHECK_EXIT_DUE_TO_EVENT_DELIVERY(pVCpu, pSvmTransient);
 
-    PVM      pVM  = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM  = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
     Assert(pVM->hm.s.fNestedPaging);
@@ -7171 +7167 @@
  * \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitVIntr(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitVIntr(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7190 +7186 @@
  * \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitTaskSwitch(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitTaskSwitch(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7221 +7217 @@
  * \#VMEXIT handler for VMMCALL (SVM_EXIT_VMMCALL). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitVmmCall(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitVmmCall(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
     HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, HMSVM_CPUMCTX_EXTRN_ALL);
 
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (pVM->hm.s.fTprPatchingAllowed)
     {
@@ -7278 +7274 @@
  * \#VMEXIT handler for VMMCALL (SVM_EXIT_VMMCALL). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitPause(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitPause(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7311 +7307 @@
  * \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitFerrFreeze(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitFerrFreeze(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7325 +7321 @@
  * \#VMEXIT handler for IRET (SVM_EXIT_IRET). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitIret(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitIret(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7346 +7342 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptPF(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptPF(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7353 +7349 @@
 
     /* See AMD spec. 15.12.15 "#PF (Page Fault)". */
-    PVM             pVM           = pVCpu->CTX_SUFF(pVM);
+    PVMCC             pVM           = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX        pCtx          = &pVCpu->cpum.GstCtx;
     PSVMVMCB        pVmcb         = hmR0SvmGetCurrentVmcb(pVCpu);
@@ -7487 +7483 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptUD(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptUD(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7534 +7530 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptMF(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptMF(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7550 +7546 @@
     if (!(pCtx->cr0 & X86_CR0_NE))
     {
-        PVM       pVM  = pVCpu->CTX_SUFF(pVM);
+        PVMCC       pVM  = pVCpu->CTX_SUFF(pVM);
         PDISSTATE pDis = &pVCpu->hm.s.DisState;
         unsigned  cbInstr;
@@ -7575 +7571 @@
  * \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptDB(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptDB(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7595 +7591 @@
      * handler expects. See AMD spec. 15.12.2 "#DB (Debug)".
      */
-    PVM      pVM   = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM   = pVCpu->CTX_SUFF(pVM);
     PSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb;
     PCPUMCTX pCtx  = &pVCpu->cpum.GstCtx;
@@ -7633 +7629 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptAC(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptAC(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7654 +7650 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptBP(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptBP(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7683 +7679 @@
  * @sa hmR0VmxHandleMesaDrvGp
  */
-static int hmR0SvmHandleMesaDrvGp(PVMCPU pVCpu, PCPUMCTX pCtx, PCSVMVMCB pVmcb)
+static int hmR0SvmHandleMesaDrvGp(PVMCPUCC pVCpu, PCPUMCTX pCtx, PCSVMVMCB pVmcb)
 {
     HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CS  | CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_GPRS_MASK);
@@ -7706 +7702 @@
  * @sa      hmR0VmxIsMesaDrvGp
  */
-DECLINLINE(bool) hmR0SvmIsMesaDrvGp(PVMCPU pVCpu, PCPUMCTX pCtx, PCSVMVMCB pVmcb)
+DECLINLINE(bool) hmR0SvmIsMesaDrvGp(PVMCPUCC pVCpu, PCPUMCTX pCtx, PCSVMVMCB pVmcb)
 {
     /* Check magic and port. */
@@ -7754 +7750 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptGP(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptGP(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7785 +7781 @@
  * \#VMEXIT handler for generic exceptions. Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitXcptGeneric(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitXcptGeneric(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7853 +7849 @@
  * \#VMEXIT handler for CLGI (SVM_EXIT_CLGI). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitClgi(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitClgi(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7891 +7887 @@
  * \#VMEXIT handler for STGI (SVM_EXIT_STGI). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitStgi(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitStgi(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7933 +7929 @@
  * \#VMEXIT handler for VMLOAD (SVM_EXIT_VMLOAD). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitVmload(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitVmload(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -7978 +7974 @@
  * \#VMEXIT handler for VMSAVE (SVM_EXIT_VMSAVE). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitVmsave(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitVmsave(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -8012 +8008 @@
  * \#VMEXIT handler for INVLPGA (SVM_EXIT_INVLPGA). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitInvlpga(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitInvlpga(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -8044 +8040 @@
  * \#VMEXIT handler for STGI (SVM_EXIT_VMRUN). Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmExitVmrun(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmExitVmrun(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -8089 +8085 @@
  * Unconditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmNestedExitXcptDB(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmNestedExitXcptDB(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
@@ -8109 +8105 @@
  * Conditional \#VMEXIT.
  */
-HMSVM_EXIT_DECL hmR0SvmNestedExitXcptBP(PVMCPU pVCpu, PSVMTRANSIENT pSvmTransient)
+HMSVM_EXIT_DECL hmR0SvmNestedExitXcptBP(PVMCPUCC pVCpu, PSVMTRANSIENT pSvmTransient)
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);

trunk/src/VBox/VMM/VMMR0/HMSVMR0.h

@@ -39 +39 @@
 VMMR0DECL(int)          SVMR0GlobalInit(void);
 VMMR0DECL(void)         SVMR0GlobalTerm(void);
-VMMR0DECL(int)          SVMR0Enter(PVMCPU pVCpu);
-VMMR0DECL(void)         SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit);
-VMMR0DECL(int)          SVMR0EnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage,
+VMMR0DECL(int)          SVMR0Enter(PVMCPUCC pVCpu);
+VMMR0DECL(void)         SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit);
+VMMR0DECL(int)          SVMR0EnableCpu(PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage,
                                        bool fEnabledBySystem, PCSUPHWVIRTMSRS pHwvirtMsrs);
 VMMR0DECL(int)          SVMR0DisableCpu(void *pvPageCpu, RTHCPHYS pPageCpuPhys);
-VMMR0DECL(int)          SVMR0InitVM(PVM pVM);
-VMMR0DECL(int)          SVMR0TermVM(PVM pVM);
-VMMR0DECL(int)          SVMR0SetupVM(PVM pVM);
-VMMR0DECL(VBOXSTRICTRC) SVMR0RunGuestCode(PVMCPU pVCpu);
-VMMR0DECL(int)          SVMR0ExportHostState(PVMCPU pVCpu);
-VMMR0DECL(int)          SVMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat);
-VMMR0DECL(int)          SVMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
+VMMR0DECL(int)          SVMR0InitVM(PVMCC pVM);
+VMMR0DECL(int)          SVMR0TermVM(PVMCC pVM);
+VMMR0DECL(int)          SVMR0SetupVM(PVMCC pVM);
+VMMR0DECL(VBOXSTRICTRC) SVMR0RunGuestCode(PVMCPUCC pVCpu);
+VMMR0DECL(int)          SVMR0ExportHostState(PVMCPUCC pVCpu);
+VMMR0DECL(int)          SVMR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat);
+VMMR0DECL(int)          SVMR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
 
 /**
@@ -62 +62 @@
  * @param   pVCpu           The cross context virtual CPU structure. (Not used.)
  */
-DECLASM(int) SVMR0VMRun(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
+DECLASM(int) SVMR0VMRun(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVMCC pVM, PVMCPUCC pVCpu);
 
 
@@ -75 +75 @@
  * @param   pVCpu           The cross context virtual CPU structure. (Not used.)
  */
-DECLASM(int) SVMR0VMRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
+DECLASM(int) SVMR0VMRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVMCC pVM, PVMCPUCC pVCpu);
 
 /**

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_HM
 #define VMCPU_INCL_CPUM_GST_CTX
@@ -40 +41 @@
 #endif
 #include "HMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/hmvmxinline.h>
 #include "HMVMXR0.h"
@@ -292 +293 @@
  */
 #ifndef HMVMX_USE_FUNCTION_TABLE
-typedef VBOXSTRICTRC               FNVMXEXITHANDLER(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient);
+typedef VBOXSTRICTRC               FNVMXEXITHANDLER(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient);
 #else
-typedef DECLCALLBACK(VBOXSTRICTRC) FNVMXEXITHANDLER(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient);
+typedef DECLCALLBACK(VBOXSTRICTRC) FNVMXEXITHANDLER(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient);
 /** Pointer to VM-exit handler. */
 typedef FNVMXEXITHANDLER          *PFNVMXEXITHANDLER;
@@ -313 +314 @@
  */
 #ifndef HMVMX_USE_FUNCTION_TABLE
-typedef int                        FNVMXEXITHANDLERNSRC(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient);
+typedef int                        FNVMXEXITHANDLERNSRC(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient);
 #else
 typedef FNVMXEXITHANDLER           FNVMXEXITHANDLERNSRC;
@@ -323 +324 @@
 *********************************************************************************************************************************/
 #ifndef HMVMX_USE_FUNCTION_TABLE
-DECLINLINE(VBOXSTRICTRC)           hmR0VmxHandleExit(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient);
+DECLINLINE(VBOXSTRICTRC)           hmR0VmxHandleExit(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient);
 # define HMVMX_EXIT_DECL           DECLINLINE(VBOXSTRICTRC)
 # define HMVMX_EXIT_NSRC_DECL      DECLINLINE(int)
@@ -331 +332 @@
 #endif
 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
-DECLINLINE(VBOXSTRICTRC)           hmR0VmxHandleExitNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient);
+DECLINLINE(VBOXSTRICTRC)           hmR0VmxHandleExitNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient);
 #endif
 
-static int hmR0VmxImportGuestState(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint64_t fWhat);
+static int hmR0VmxImportGuestState(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint64_t fWhat);
 
 /** @name VM-exit handler prototypes.
@@ -844 +845 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECL_FORCE_INLINE(uint64_t) hmR0VmxGetFixedCr0Mask(PCVMCPU pVCpu)
+DECL_FORCE_INLINE(uint64_t) hmR0VmxGetFixedCr0Mask(PCVMCPUCC pVCpu)
 {
     /*
@@ -853 +854 @@
      *        enmGuestMode to be in-sync with the current mode. See @bugref{6398}
      *        and @bugref{6944}. */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     return (  X86_CR0_PE
             | X86_CR0_NE
@@ -873 +874 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECL_FORCE_INLINE(uint64_t) hmR0VmxGetFixedCr4Mask(PCVMCPU pVCpu)
+DECL_FORCE_INLINE(uint64_t) hmR0VmxGetFixedCr4Mask(PCVMCPUCC pVCpu)
 {
     /*
@@ -881 +882 @@
      * these  bits and handle it depending on whether we expose them to the guest.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     bool const fXSaveRstor = pVM->cpum.ro.HostFeatures.fXSaveRstor;
     bool const fPcid       = pVM->cpum.ro.HostFeatures.fPcid;
@@ -936 +937 @@
  *          controls if the guest hypervisor has set any one of them.
  */
-static void hmR0VmxRemoveProcCtlsVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t uProcCtls)
+static void hmR0VmxRemoveProcCtlsVmcs(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t uProcCtls)
 {
     PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
@@ -1022 +1023 @@
  * @param   uXcptMask       The exception(s) to remove.
  */
-static int hmR0VmxRemoveXcptInterceptMask(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t uXcptMask)
+static int hmR0VmxRemoveXcptInterceptMask(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t uXcptMask)
 {
     PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
@@ -1084 +1085 @@
  * @param   uXcpt           The exception to remove.
  */
-static int hmR0VmxRemoveXcptIntercept(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint8_t uXcpt)
+static int hmR0VmxRemoveXcptIntercept(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint8_t uXcpt)
 {
     return hmR0VmxRemoveXcptInterceptMask(pVCpu, pVmxTransient, RT_BIT(uXcpt));
@@ -1234 +1235 @@
  *                                  true) or guest VMCS (pass false).
  */
-static int hmR0VmxSwitchToGstOrNstGstVmcs(PVMCPU pVCpu, bool fSwitchToNstGstVmcs)
+static int hmR0VmxSwitchToGstOrNstGstVmcs(PVMCPUCC pVCpu, bool fSwitchToNstGstVmcs)
 {
     /* Ensure we have synced everything from the guest-CPU context to the VMCS before switching. */
@@ -1307 +1308 @@
  * @param   rc      The error code.
  */
-static void hmR0VmxUpdateErrorRecord(PVMCPU pVCpu, int rc)
+static void hmR0VmxUpdateErrorRecord(PVMCPUCC pVCpu, int rc)
 {
     if (   rc == VERR_VMX_INVALID_VMCS_FIELD
@@ -1550 +1551 @@
  * @param   pvCpuPage       Pointer to the VMXON region.
  */
-static int hmR0VmxEnterRootMode(PVM pVM, RTHCPHYS HCPhysCpuPage, void *pvCpuPage)
+static int hmR0VmxEnterRootMode(PVMCC pVM, RTHCPHYS HCPhysCpuPage, void *pvCpuPage)
 {
     Assert(HCPhysCpuPage && HCPhysCpuPage != NIL_RTHCPHYS);
@@ -1698 +1699 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static void hmR0VmxFreeVmcsInfo(PVM pVM, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxFreeVmcsInfo(PVMCC pVM, PVMXVMCSINFO pVmcsInfo)
 {
     hmR0VmxPageFree(&pVmcsInfo->hMemObjVmcs, &pVmcsInfo->pvVmcs, &pVmcsInfo->HCPhysVmcs);
@@ -1726 +1727 @@
  * @param   fIsNstGstVmcs   Whether this is a nested-guest VMCS.
  */
-static int hmR0VmxAllocVmcsInfo(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxAllocVmcsInfo(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 
     /* Allocate the guest VM control structure (VMCS). */
@@ -1828 +1829 @@
  * @param   pVM     The cross context VM structure.
  */
-static void hmR0VmxStructsFree(PVM pVM)
+static void hmR0VmxStructsFree(PVMCC pVM)
 {
 #ifdef VBOX_WITH_CRASHDUMP_MAGIC
@@ -1847 +1848 @@
     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     {
-        PVMCPU pVCpu = &pVM->aCpus[idCpu];
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         PVMXVMCSINFO pVmcsInfo = &pVCpu->hm.s.vmx.VmcsInfo;
         hmR0VmxFreeVmcsInfo(pVM, pVmcsInfo);
@@ -1867 +1868 @@
  * @param   pVM     The cross context VM structure.
  */
-static int hmR0VmxStructsAlloc(PVM pVM)
+static int hmR0VmxStructsAlloc(PVMCC pVM)
 {
     /*
@@ -1880 +1881 @@
     else
     {
-         pVM->aCpus[0].hm.s.u32HMError = VMX_UFC_INVALID_VMCS_SIZE;
-         return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
+        VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_INVALID_VMCS_SIZE;
+        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
     }
 
@@ -1899 +1900 @@
     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     {
-        PVMCPU pVCpu = &pVM->aCpus[idCpu];
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         hmR0VmxInitVmcsInfo(&pVCpu->hm.s.vmx.VmcsInfo);
         hmR0VmxInitVmcsInfo(&pVCpu->hm.s.vmx.VmcsInfoNstGst);
@@ -1968 +1969 @@
     {
         /* Allocate the guest VMCS structures. */
-        PVMCPU pVCpu = &pVM->aCpus[idCpu];
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         rc = hmR0VmxAllocVmcsInfo(pVCpu, &pVCpu->hm.s.vmx.VmcsInfo, false /* fIsNstGstVmcs */);
         if (RT_SUCCESS(rc))
@@ -2033 +2034 @@
  * @remarks Can be called with interrupts disabled.
  */
-static void hmR0VmxSetMsrPermission(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs, uint32_t idMsr, uint32_t fMsrpm)
+static void hmR0VmxSetMsrPermission(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs, uint32_t idMsr, uint32_t fMsrpm)
 {
     uint8_t *pbMsrBitmap = (uint8_t *)pVmcsInfo->pvMsrBitmap;
@@ -2121 +2122 @@
  * @param   cMsrs       The number of MSRs.
  */
-static int hmR0VmxSetAutoLoadStoreMsrCount(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint32_t cMsrs)
+static int hmR0VmxSetAutoLoadStoreMsrCount(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint32_t cMsrs)
 {
     /* Shouldn't ever happen but there -is- a number. We're well within the recommended 512. */
@@ -2161 +2162 @@
  *                          necessary.
  */
-static int hmR0VmxAddAutoLoadStoreMsr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t idMsr, uint64_t uGuestMsrValue,
+static int hmR0VmxAddAutoLoadStoreMsr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t idMsr, uint64_t uGuestMsrValue,
                                       bool fSetReadWrite, bool fUpdateHostMsr)
 {
@@ -2251 +2252 @@
  * @param   idMsr           The MSR.
  */
-static int hmR0VmxRemoveAutoLoadStoreMsr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t idMsr)
+static int hmR0VmxRemoveAutoLoadStoreMsr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t idMsr)
 {
     PVMXVMCSINFO pVmcsInfo     = pVmxTransient->pVmcsInfo;
@@ -2345 +2346 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxUpdateAutoLoadHostMsrs(PCVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxUpdateAutoLoadHostMsrs(PCVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2376 +2377 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxLazySaveHostMsrs(PVMCPU pVCpu)
+static void hmR0VmxLazySaveHostMsrs(PVMCPUCC pVCpu)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2406 +2407 @@
  * @param   idMsr   The MSR to check.
  */
-static bool hmR0VmxIsLazyGuestMsr(PCVMCPU pVCpu, uint32_t idMsr)
+static bool hmR0VmxIsLazyGuestMsr(PCVMCPUCC pVCpu, uint32_t idMsr)
 {
     if (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests)
@@ -2435 +2436 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxLazyLoadGuestMsrs(PVMCPU pVCpu)
+static void hmR0VmxLazyLoadGuestMsrs(PVMCPUCC pVCpu)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2489 +2490 @@
  *          context by hmR0VmxImportGuestState()!!!
  */
-static void hmR0VmxLazyRestoreHostMsrs(PVMCPU pVCpu)
+static void hmR0VmxLazyRestoreHostMsrs(PVMCPUCC pVCpu)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2522 +2523 @@
  * @param   fIsNstGstVmcs   Whether this is a nested-guest VMCS.
  */
-static int hmR0VmxCheckVmcsCtls(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
+static int hmR0VmxCheckVmcsCtls(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
 {
     const char * const pcszVmcs = fIsNstGstVmcs ? "Nested-guest VMCS" : "VMCS";
@@ -2592 +2593 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static void hmR0VmxCheckHostEferMsr(PCVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxCheckHostEferMsr(PCVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2620 +2621 @@
  * @param   fIsNstGstVmcs   Whether this is a nested-guest VMCS.
  */
-static void hmR0VmxCheckAutoLoadStoreMsrs(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
+static void hmR0VmxCheckAutoLoadStoreMsrs(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -2735 +2736 @@
  * @remarks Can be called with interrupts disabled.
  */
-static void hmR0VmxFlushEpt(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo, VMXTLBFLUSHEPT enmTlbFlush)
+static void hmR0VmxFlushEpt(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo, VMXTLBFLUSHEPT enmTlbFlush)
 {
     uint64_t au64Descriptor[2];
@@ -2769 +2770 @@
  * @remarks Can be called with interrupts disabled.
  */
-static void hmR0VmxFlushVpid(PVMCPU pVCpu, VMXTLBFLUSHVPID enmTlbFlush, RTGCPTR GCPtr)
+static void hmR0VmxFlushVpid(PVMCPUCC pVCpu, VMXTLBFLUSHVPID enmTlbFlush, RTGCPTR GCPtr)
 {
     Assert(pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fVpid);
@@ -2807 +2808 @@
  * @param   GCVirt  Guest virtual address of the page to invalidate.
  */
-VMMR0DECL(int) VMXR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt)
+VMMR0DECL(int) VMXR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt)
 {
     AssertPtr(pVCpu);
@@ -2821 +2822 @@
          * as this function maybe called in a loop with individual addresses.
          */
-        PVM pVM = pVCpu->CTX_SUFF(pVM);
+        PVMCC pVM = pVCpu->CTX_SUFF(pVM);
         if (pVM->hm.s.vmx.fVpid)
         {
@@ -2850 +2851 @@
  * @remarks Called with interrupts disabled.
  */
-static void hmR0VmxFlushTaggedTlbNone(PHMPHYSCPU pHostCpu, PVMCPU pVCpu)
+static void hmR0VmxFlushTaggedTlbNone(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -2878 +2879 @@
  * @remarks  Called with interrupts disabled.
  */
-static void hmR0VmxFlushTaggedTlbBoth(PHMPHYSCPU pHostCpu, PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxFlushTaggedTlbBoth(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
 #ifdef VBOX_WITH_STATISTICS
@@ -2896 +2897 @@
     Assert(pHostCpu->idCpu != NIL_RTCPUID);
 
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     AssertMsg(pVM->hm.s.fNestedPaging && pVM->hm.s.vmx.fVpid,
               ("hmR0VmxFlushTaggedTlbBoth cannot be invoked unless NestedPaging & VPID are enabled."
@@ -2991 +2992 @@
  * @remarks Called with interrupts disabled.
  */
-static void hmR0VmxFlushTaggedTlbEpt(PHMPHYSCPU pHostCpu, PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxFlushTaggedTlbEpt(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
     AssertPtr(pVCpu);
@@ -3044 +3045 @@
  * @remarks Called with interrupts disabled.
  */
-static void hmR0VmxFlushTaggedTlbVpid(PHMPHYSCPU pHostCpu, PVMCPU pVCpu)
+static void hmR0VmxFlushTaggedTlbVpid(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -3086 +3087 @@
     }
 
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     pVCpu->hm.s.idLastCpu = pHostCpu->idCpu;
     if (pVCpu->hm.s.fForceTLBFlush)
@@ -3140 +3141 @@
  * @remarks Called with interrupts disabled.
  */
-static void hmR0VmxFlushTaggedTlb(PHMPHYSCPU pHostCpu, PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxFlushTaggedTlb(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
 #ifdef HMVMX_ALWAYS_FLUSH_TLB
     VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
 #endif
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     switch (pVM->hm.s.vmx.enmTlbFlushType)
     {
@@ -3167 +3168 @@
  * @param   pVM     The cross context VM structure.
  */
-static int hmR0VmxSetupTaggedTlb(PVM pVM)
+static int hmR0VmxSetupTaggedTlb(PVMCC pVM)
 {
     /*
@@ -3186 +3187 @@
                 /* Shouldn't happen. EPT is supported but no suitable flush-types supported. */
                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
-                pVM->aCpus[0].hm.s.u32HMError = VMX_UFC_EPT_FLUSH_TYPE_UNSUPPORTED;
+                VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_FLUSH_TYPE_UNSUPPORTED;
                 return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
             }
@@ -3194 +3195 @@
             {
                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
-                pVM->aCpus[0].hm.s.u32HMError = VMX_UFC_EPT_MEM_TYPE_NOT_WB;
+                VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_MEM_TYPE_NOT_WB;
                 return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
             }
@@ -3202 +3203 @@
             {
                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
-                pVM->aCpus[0].hm.s.u32HMError = VMX_UFC_EPT_PAGE_WALK_LENGTH_UNSUPPORTED;
+                VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_PAGE_WALK_LENGTH_UNSUPPORTED;
                 return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
             }
@@ -3210 +3211 @@
             /* Shouldn't happen. EPT is supported but INVEPT instruction is not supported. */
             pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
-            pVM->aCpus[0].hm.s.u32HMError = VMX_UFC_EPT_INVEPT_UNAVAILABLE;
+            VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_INVEPT_UNAVAILABLE;
             return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
         }
@@ -3271 +3272 @@
  * @param   pVM     The cross context VM structure.
  */
-static int hmR0VmxSetupShadowVmcsFieldsArrays(PVM pVM)
+static int hmR0VmxSetupShadowVmcsFieldsArrays(PVMCC pVM)
 {
     /*
@@ -3337 +3338 @@
  * @param   pVM     The cross context VM structure.
  */
-static void hmR0VmxSetupVmreadVmwriteBitmaps(PVM pVM)
+static void hmR0VmxSetupVmreadVmwriteBitmaps(PVMCC pVM)
 {
     /*
@@ -3420 +3421 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetupVmcsApicAccessAddr(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetupVmcsApicAccessAddr(PVMCPUCC pVCpu)
 {
     RTHCPHYS const HCPhysApicAccess = pVCpu->CTX_SUFF(pVM)->hm.s.vmx.HCPhysApicAccess;
@@ -3436 +3437 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetupVmcsVmreadBitmapAddr(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetupVmcsVmreadBitmapAddr(PVMCPUCC pVCpu)
 {
     RTHCPHYS const HCPhysVmreadBitmap = pVCpu->CTX_SUFF(pVM)->hm.s.vmx.HCPhysVmreadBitmap;
@@ -3451 +3452 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetupVmcsVmwriteBitmapAddr(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetupVmcsVmwriteBitmapAddr(PVMCPUCC pVCpu)
 {
     RTHCPHYS const HCPhysVmwriteBitmap = pVCpu->CTX_SUFF(pVM)->hm.s.vmx.HCPhysVmwriteBitmap;
@@ -3496 +3497 @@
  * @param   pVmcsInfo       The VMCS info. object.
  */
-static void hmR0VmxSetupVmcsMsrPermissions(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxSetupVmcsMsrPermissions(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     Assert(pVmcsInfo->u32ProcCtls & VMX_PROC_CTLS_USE_MSR_BITMAPS);
@@ -3504 +3505 @@
      * VM-exits; they are loaded/stored automatically using fields in the VMCS.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, false, MSR_IA32_SYSENTER_CS,  VMXMSRPM_ALLOW_RD_WR);
     hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, false, MSR_IA32_SYSENTER_ESP, VMXMSRPM_ALLOW_RD_WR);
@@ -3557 +3558 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static int hmR0VmxSetupVmcsPinCtls(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxSetupVmcsPinCtls(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     uint32_t       fVal = pVM->hm.s.vmx.Msrs.PinCtls.n.allowed0;      /* Bits set here must always be set. */
     uint32_t const fZap = pVM->hm.s.vmx.Msrs.PinCtls.n.allowed1;      /* Bits cleared here must always be cleared. */
@@ -3610 +3611 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static int hmR0VmxSetupVmcsProcCtls2(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxSetupVmcsProcCtls2(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     uint32_t       fVal = pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed0;    /* Bits set here must be set in the VMCS. */
     uint32_t const fZap = pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1;    /* Bits cleared here must be cleared in the VMCS. */
@@ -3702 +3703 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static int hmR0VmxSetupVmcsProcCtls(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxSetupVmcsProcCtls(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 
     uint32_t       fVal = pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0;     /* Bits set here must be set in the VMCS. */
@@ -3809 +3810 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static int hmR0VmxSetupVmcsMiscCtls(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static int hmR0VmxSetupVmcsMiscCtls(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
@@ -3852 +3853 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static void hmR0VmxSetupVmcsXcptBitmap(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxSetupVmcsXcptBitmap(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     /*
@@ -3884 +3885 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static int hmR0VmxSetupVmcsCtlsNested(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static int hmR0VmxSetupVmcsCtlsNested(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     Assert(pVmcsInfo->u64VmcsLinkPtr == NIL_RTHCPHYS);
@@ -3913 +3914 @@
  * @param   fIsNstGstVmcs   Whether this is a nested-guest VMCS.
  */
-static int hmR0VmxSetupVmcs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
+static int hmR0VmxSetupVmcs(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, bool fIsNstGstVmcs)
 {
     Assert(pVmcsInfo->pvVmcs);
@@ -3919 +3920 @@
 
     /* Set the CPU specified revision identifier at the beginning of the VMCS structure. */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     *(uint32_t *)pVmcsInfo->pvVmcs = RT_BF_GET(pVM->hm.s.vmx.Msrs.u64Basic, VMX_BF_BASIC_VMCS_ID);
     const char * const pszVmcs     = fIsNstGstVmcs ? "nested-guest VMCS" : "guest VMCS";
@@ -4057 +4058 @@
  * @param   pHwvirtMsrs     Pointer to the hardware-virtualization MSRs.
  */
-VMMR0DECL(int) VMXR0EnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost,
+VMMR0DECL(int) VMXR0EnableCpu(PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost,
                               PCSUPHWVIRTMSRS pHwvirtMsrs)
 {
@@ -4117 +4118 @@
  * @param   pVM             The cross context VM structure.
  */
-VMMR0DECL(int) VMXR0InitVM(PVM pVM)
+VMMR0DECL(int) VMXR0InitVM(PVMCC pVM)
 {
     AssertPtr(pVM);
@@ -4139 +4140 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0DECL(int) VMXR0TermVM(PVM pVM)
+VMMR0DECL(int) VMXR0TermVM(PVMCC pVM)
 {
     AssertPtr(pVM);
@@ -4163 +4164 @@
  * @param   pVM     The cross context VM structure.
  */
-VMMR0DECL(int) VMXR0SetupVM(PVM pVM)
+VMMR0DECL(int) VMXR0SetupVM(PVMCC pVM)
 {
     AssertPtr(pVM);
@@ -4222 +4223 @@
     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     {
-        PVMCPU pVCpu = &pVM->aCpus[idCpu];
+        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
         Log4Func(("pVCpu=%p idCpu=%RU32\n", pVCpu, pVCpu->idCpu));
 
@@ -4272 +4273 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-static int hmR0VmxExportHostSegmentRegs(PVMCPU pVCpu)
+static int hmR0VmxExportHostSegmentRegs(PVMCPUCC pVCpu)
 {
 /**
@@ -4414 +4415 @@
      * [2] See Intel spec. 7.2.3 "TSS Descriptor in 64-bit mode".
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     Assert(pDesc->System.u4Type == 11);
     if (   pDesc->System.u16LimitLow != 0x67
@@ -4476 +4477 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxExportHostMsrs(PVMCPU pVCpu)
+static void hmR0VmxExportHostMsrs(PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -4499 +4500 @@
      * done as part of auto-load/store MSR area in the VMCS, see hmR0VmxExportGuestMsrs().
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (pVM->hm.s.vmx.fSupportsVmcsEfer)
     {
@@ -4523 +4524 @@
  * @remarks No-long-jump zone!!!
  */
-static bool hmR0VmxShouldSwapEferMsr(PCVMCPU pVCpu)
+static bool hmR0VmxShouldSwapEferMsr(PCVMCPUCC pVCpu)
 {
 #ifdef HMVMX_ALWAYS_SWAP_EFER
@@ -4530 +4531 @@
 #else
     PCCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     uint64_t const u64HostEfer  = pVM->hm.s.vmx.u64HostMsrEfer;
     uint64_t const u64GuestEfer = pCtx->msrEFER;
@@ -4580 +4581 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestEntryExitCtls(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestEntryExitCtls(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_VMX_ENTRY_EXIT_CTLS)
     {
-        PVM          pVM = pVCpu->CTX_SUFF(pVM);
+        PVMCC          pVM = pVCpu->CTX_SUFF(pVM);
         PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
 
@@ -4764 +4765 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestApicTpr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestApicTpr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_APIC_TPR)
@@ -4825 +4826 @@
  * @remarks No-long-jump zone!!!
  */
-static uint32_t hmR0VmxGetGuestIntrState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static uint32_t hmR0VmxGetGuestIntrState(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     /*
@@ -4882 +4883 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestXcptIntercepts(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestXcptIntercepts(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_VMX_XCPT_INTERCEPTS)
@@ -4908 +4909 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestRip(PVMCPU pVCpu)
+static int hmR0VmxExportGuestRip(PVMCPUCC pVCpu)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_RIP)
@@ -4932 +4933 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestRsp(PVMCPU pVCpu)
+static int hmR0VmxExportGuestRsp(PVMCPUCC pVCpu)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_RSP)
@@ -4957 +4958 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestRflags(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestRflags(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_RFLAGS)
@@ -5023 +5024 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxCopyNstGstToShadowVmcs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxCopyNstGstToShadowVmcs(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     PCVMXVVMCS pVmcsNstGst = pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs);
 
@@ -5092 +5093 @@
  * @remarks Called with interrupts disabled.
  */
-static int hmR0VmxCopyShadowToNstGstVmcs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static int hmR0VmxCopyShadowToNstGstVmcs(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     PVMXVVMCS pVmcsNstGst = pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs);
 
@@ -5189 +5190 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestHwvirtState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestHwvirtState(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_HWVIRT)
@@ -5253 +5254 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestCR0(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestCR0(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_CR0)
     {
-        PVM          pVM       = pVCpu->CTX_SUFF(pVM);
+        PVMCC          pVM       = pVCpu->CTX_SUFF(pVM);
         PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
 
@@ -5437 +5438 @@
  * @remarks No-long-jump zone!!!
  */
-static VBOXSTRICTRC hmR0VmxExportGuestCR3AndCR4(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExportGuestCR3AndCR4(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     int rc  = VINF_SUCCESS;
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 
     /*
@@ -5674 +5675 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportSharedDebugState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportSharedDebugState(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -5709 +5710 @@
     {
         /* If the CPU supports the monitor trap flag, use it for single stepping in DBGF and avoid intercepting #DB. */
-        PVM pVM = pVCpu->CTX_SUFF(pVM);
+        PVMCC pVM = pVCpu->CTX_SUFF(pVM);
         if (pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_MONITOR_TRAP_FLAG)
         {
@@ -5839 +5840 @@
  *          segments.
  */
-static void hmR0VmxValidateSegmentRegs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxValidateSegmentRegs(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     /*
@@ -5848 +5849 @@
      * unusable bit and doesn't change the guest-context value.
      */
-    PVM       pVM  = pVCpu->CTX_SUFF(pVM);
+    PVMCC       pVM  = pVCpu->CTX_SUFF(pVM);
     PCCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
     hmR0VmxImportGuestState(pVCpu, pVmcsInfo, CPUMCTX_EXTRN_CR0);
@@ -6018 +6019 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestSegReg(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo, uint8_t iSegReg, PCCPUMSELREG pSelReg)
+static int hmR0VmxExportGuestSegReg(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo, uint8_t iSegReg, PCCPUMSELREG pSelReg)
 {
     Assert(iSegReg < X86_SREG_COUNT);
@@ -6075 +6076 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestSegRegsXdtr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestSegRegsXdtr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     int          rc        = VERR_INTERNAL_ERROR_5;
-    PVM          pVM       = pVCpu->CTX_SUFF(pVM);
+    PVMCC          pVM       = pVCpu->CTX_SUFF(pVM);
     PCCPUMCTX    pCtx      = &pVCpu->cpum.GstCtx;
     PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
@@ -6337 +6338 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportGuestMsrs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxExportGuestMsrs(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     AssertPtr(pVCpu);
     AssertPtr(pVmxTransient);
 
-    PVM       pVM  = pVCpu->CTX_SUFF(pVM);
+    PVMCC       pVM  = pVCpu->CTX_SUFF(pVM);
     PCCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
 
@@ -6457 +6458 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxSelectVMRunHandler(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxSelectVMRunHandler(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     PCCPUMCTX    pCtx      = &pVCpu->cpum.GstCtx;
@@ -6491 +6492 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxRunGuest(PVMCPU pVCpu, PCVMXTRANSIENT pVmxTransient)
+DECLINLINE(int) hmR0VmxRunGuest(PVMCPUCC pVCpu, PCVMXTRANSIENT pVmxTransient)
 {
     /* Mark that HM is the keeper of all guest-CPU registers now that we're going to execute guest code. */
@@ -6508 +6509 @@
     PCVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
     bool const fResumeVM = RT_BOOL(pVmcsInfo->fVmcsState & VMX_V_VMCS_LAUNCH_STATE_LAUNCHED);
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
 #ifdef VBOX_WITH_KERNEL_USING_XMM
     int rc = hmR0VMXStartVMWrapXMM(fResumeVM, pCtx, NULL /*pvUnused*/, pVM, pVCpu, pVmcsInfo->pfnStartVM);
@@ -6527 +6528 @@
  *                          exitReason updated).
  */
-static void hmR0VmxReportWorldSwitchError(PVMCPU pVCpu, int rcVMRun, PVMXTRANSIENT pVmxTransient)
+static void hmR0VmxReportWorldSwitchError(PVMCPUCC pVCpu, int rcVMRun, PVMXTRANSIENT pVmxTransient)
 {
     Assert(pVCpu);
@@ -6634 +6635 @@
                     else
                     {
-                        PVM pVM = pVCpu->CTX_SUFF(pVM);
+                        PVMCC pVM = pVCpu->CTX_SUFF(pVM);
                         switch (uVmcsField)
                         {
@@ -6730 +6731 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxUpdateTscOffsettingAndPreemptTimer(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static void hmR0VmxUpdateTscOffsettingAndPreemptTimer(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     bool         fOffsettedTsc;
     bool         fParavirtTsc;
     uint64_t     uTscOffset;
-    PVM          pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC          pVM = pVCpu->CTX_SUFF(pVM);
     PVMXVMCSINFO pVmcsInfo = hmGetVmxActiveVmcsInfo(pVCpu);
 
@@ -6855 +6856 @@
  *                              page-fault.
  */
-DECLINLINE(void) hmR0VmxSetPendingEvent(PVMCPU pVCpu, uint32_t u32IntInfo, uint32_t cbInstr, uint32_t u32ErrCode,
+DECLINLINE(void) hmR0VmxSetPendingEvent(PVMCPUCC pVCpu, uint32_t u32IntInfo, uint32_t cbInstr, uint32_t u32ErrCode,
                                         RTGCUINTPTR GCPtrFaultAddress)
 {
@@ -6873 +6874 @@
  * @param   u8Interrupt     The external interrupt vector.
  */
-DECLINLINE(void) hmR0VmxSetPendingExtInt(PVMCPU pVCpu, uint8_t u8Interrupt)
+DECLINLINE(void) hmR0VmxSetPendingExtInt(PVMCPUCC pVCpu, uint8_t u8Interrupt)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_EXIT_INT_INFO_VECTOR,          u8Interrupt)
@@ -6888 +6889 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetPendingXcptNmi(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetPendingXcptNmi(PVMCPUCC pVCpu)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_ENTRY_INT_INFO_VECTOR,         X86_XCPT_NMI)
@@ -6903 +6904 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetPendingXcptDF(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetPendingXcptDF(PVMCPUCC pVCpu)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_ENTRY_INT_INFO_VECTOR,         X86_XCPT_DF)
@@ -6918 +6919 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetPendingXcptUD(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetPendingXcptUD(PVMCPUCC pVCpu)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_ENTRY_INT_INFO_VECTOR,         X86_XCPT_UD)
@@ -6933 +6934 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-DECLINLINE(void) hmR0VmxSetPendingXcptDB(PVMCPU pVCpu)
+DECLINLINE(void) hmR0VmxSetPendingXcptDB(PVMCPUCC pVCpu)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_ENTRY_INT_INFO_VECTOR,         X86_XCPT_DB)
@@ -6950 +6951 @@
  * @param   u32ErrCode  The error code for the general-protection exception.
  */
-DECLINLINE(void) hmR0VmxSetPendingXcptGP(PVMCPU pVCpu, uint32_t u32ErrCode)
+DECLINLINE(void) hmR0VmxSetPendingXcptGP(PVMCPUCC pVCpu, uint32_t u32ErrCode)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_ENTRY_INT_INFO_VECTOR,         X86_XCPT_GP)
@@ -6966 +6967 @@
  * @param   u32ErrCode  The error code for the stack exception.
  */
-DECLINLINE(void) hmR0VmxSetPendingXcptSS(PVMCPU pVCpu, uint32_t u32ErrCode)
+DECLINLINE(void) hmR0VmxSetPendingXcptSS(PVMCPUCC pVCpu, uint32_t u32ErrCode)
 {
     uint32_t const u32IntInfo = RT_BF_MAKE(VMX_BF_ENTRY_INT_INFO_VECTOR,         X86_XCPT_SS)
@@ -6984 +6985 @@
  * @param   idxSel      The VMCS field for the corresponding segment register.
  */
-static void hmR0VmxFixUnusableSegRegAttr(PVMCPU pVCpu, PCPUMSELREG pSelReg, uint32_t idxSel)
+static void hmR0VmxFixUnusableSegRegAttr(PVMCPUCC pVCpu, PCPUMSELREG pSelReg, uint32_t idxSel)
 {
     Assert(pSelReg->Attr.u & X86DESCATTR_UNUSABLE);
@@ -7038 +7039 @@
  * @remarks Called with interrupts and/or preemption disabled.
  */
-static void hmR0VmxImportGuestSegReg(PVMCPU pVCpu, uint8_t iSegReg)
+static void hmR0VmxImportGuestSegReg(PVMCPUCC pVCpu, uint8_t iSegReg)
 {
     Assert(iSegReg < X86_SREG_COUNT);
@@ -7074 +7075 @@
  * @remarks Called with interrupts and/or preemption disabled.
  */
-static void hmR0VmxImportGuestLdtr(PVMCPU pVCpu)
+static void hmR0VmxImportGuestLdtr(PVMCPUCC pVCpu)
 {
     uint16_t u16Sel;
@@ -7102 +7103 @@
  * @remarks Called with interrupts and/or preemption disabled.
  */
-static void hmR0VmxImportGuestTr(PVMCPU pVCpu)
+static void hmR0VmxImportGuestTr(PVMCPUCC pVCpu)
 {
     uint16_t u16Sel;
@@ -7132 +7133 @@
  *          instead!!!
  */
-static void hmR0VmxImportGuestRip(PVMCPU pVCpu)
+static void hmR0VmxImportGuestRip(PVMCPUCC pVCpu)
 {
     uint64_t u64Val;
@@ -7158 +7159 @@
  *          instead!!!
  */
-static void hmR0VmxImportGuestRFlags(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxImportGuestRFlags(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
@@ -7190 +7191 @@
  *          instead!!!
  */
-static void hmR0VmxImportGuestIntrState(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxImportGuestIntrState(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
     uint32_t u32Val;
@@ -7229 +7230 @@
  * @param   fWhat       What to import, CPUMCTX_EXTRN_XXX.
  */
-static int hmR0VmxImportGuestState(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint64_t fWhat)
+static int hmR0VmxImportGuestState(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint64_t fWhat)
 {
     int      rc   = VINF_SUCCESS;
-    PVM      pVM  = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM  = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
     uint32_t u32Val;
@@ -7572 +7573 @@
  * @param   fWhat   What to import, CPUMCTX_EXTRN_XXX.
  */
-VMMR0DECL(int) VMXR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat)
+VMMR0DECL(int) VMXR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat)
 {
     AssertPtr(pVCpu);
@@ -7603 +7604 @@
  *          is no longer in VMX non-root mode.
  */
-static VBOXSTRICTRC hmR0VmxCheckForceFlags(PVMCPU pVCpu, bool fStepping)
+static VBOXSTRICTRC hmR0VmxCheckForceFlags(PVMCPUCC pVCpu, bool fStepping)
 {
     Assert(VMMRZCallRing3IsEnabled(pVCpu));
@@ -7616 +7617 @@
      * Anything pending?  Should be more likely than not if we're doing a good job.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (  !fStepping
         ?    !VM_FF_IS_ANY_SET(pVM, VM_FF_HP_R0_PRE_HM_MASK)
@@ -7696 +7697 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-static void hmR0VmxTrpmTrapToPendingEvent(PVMCPU pVCpu)
+static void hmR0VmxTrpmTrapToPendingEvent(PVMCPUCC pVCpu)
 {
     Assert(TRPMHasTrap(pVCpu));
@@ -7728 +7729 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-static void hmR0VmxPendingEventToTrpmTrap(PVMCPU pVCpu)
+static void hmR0VmxPendingEventToTrpmTrap(PVMCPUCC pVCpu)
 {
     Assert(pVCpu->hm.s.Event.fPending);
@@ -7764 +7765 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static void hmR0VmxSetIntWindowExitVmcs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxSetIntWindowExitVmcs(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     if (pVCpu->CTX_SUFF(pVM)->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_INT_WINDOW_EXIT)
@@ -7801 +7802 @@
  * @param   pVmcsInfo   The VMCS info. object.
  */
-static void hmR0VmxSetNmiWindowExitVmcs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
+static void hmR0VmxSetNmiWindowExitVmcs(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo)
 {
     if (pVCpu->CTX_SUFF(pVM)->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_NMI_WINDOW_EXIT)
@@ -7843 +7844 @@
  * @remarks No-long-jmp zone!!!
  */
-static int hmR0VmxLeave(PVMCPU pVCpu, bool fImportState)
+static int hmR0VmxLeave(PVMCPUCC pVCpu, bool fImportState)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -7962 +7963 @@
  * @remarks No-long-jmp zone!!!
  */
-static int hmR0VmxLeaveSession(PVMCPU pVCpu)
+static int hmR0VmxLeaveSession(PVMCPUCC pVCpu)
 {
     HM_DISABLE_PREEMPT(pVCpu);
@@ -8006 +8007 @@
  * @remarks No-long-jmp zone!!!
  */
-DECLINLINE(int) hmR0VmxLongJmpToRing3(PVMCPU pVCpu)
+DECLINLINE(int) hmR0VmxLongJmpToRing3(PVMCPUCC pVCpu)
 {
     return hmR0VmxLeaveSession(pVCpu);
@@ -8025 +8026 @@
  *                  VINF_VMM_UNKNOWN_RING3_CALL.
  */
-static int hmR0VmxExitToRing3(PVMCPU pVCpu, VBOXSTRICTRC rcExit)
+static int hmR0VmxExitToRing3(PVMCPUCC pVCpu, VBOXSTRICTRC rcExit)
 {
     HMVMX_ASSERT_PREEMPT_SAFE(pVCpu);
@@ -8148 +8149 @@
  * @param   pvUser          User argument, currently unused, NULL.
  */
-static DECLCALLBACK(int) hmR0VmxCallRing3Callback(PVMCPU pVCpu, VMMCALLRING3 enmOperation, void *pvUser)
+static DECLCALLBACK(int) hmR0VmxCallRing3Callback(PVMCPUCC pVCpu, VMMCALLRING3 enmOperation, void *pvUser)
 {
     RT_NOREF(pvUser);
@@ -8220 +8221 @@
  * @param   uValue  The value to push to the guest stack.
  */
-static VBOXSTRICTRC hmR0VmxRealModeGuestStackPush(PVMCPU pVCpu, uint16_t uValue)
+static VBOXSTRICTRC hmR0VmxRealModeGuestStackPush(PVMCPUCC pVCpu, uint16_t uValue)
 {
     /*
@@ -8255 +8256 @@
  *                          VM-entry).
  */
-static VBOXSTRICTRC hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PCHMEVENT pEvent, bool fStepping,
+static VBOXSTRICTRC hmR0VmxInjectEventVmcs(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PCHMEVENT pEvent, bool fStepping,
                                            uint32_t *pfIntrState)
 {
@@ -8326 +8327 @@
         else
         {
-            PVM pVM = pVCpu->CTX_SUFF(pVM);
+            PVMCC pVM = pVCpu->CTX_SUFF(pVM);
             Assert(PDMVmmDevHeapIsEnabled(pVM));
             Assert(pVM->hm.s.vmx.pRealModeTSS);
@@ -8490 +8491 @@
  * @param   pfIntrState     Where to store the VT-x guest-interruptibility state.
  */
-static VBOXSTRICTRC hmR0VmxEvaluatePendingEvent(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t *pfIntrState)
+static VBOXSTRICTRC hmR0VmxEvaluatePendingEvent(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t *pfIntrState)
 {
     Assert(pfIntrState);
@@ -8639 +8640 @@
  *                          directly.
  */
-static VBOXSTRICTRC hmR0VmxInjectPendingEvent(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t fIntrState, bool fStepping)
+static VBOXSTRICTRC hmR0VmxInjectPendingEvent(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t fIntrState, bool fStepping)
 {
     HMVMX_ASSERT_PREEMPT_SAFE(pVCpu);
@@ -8725 +8726 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-VMMR0DECL(int) VMXR0Enter(PVMCPU pVCpu)
+VMMR0DECL(int) VMXR0Enter(PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -8781 +8782 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0DECL(void) VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit)
+VMMR0DECL(void) VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit)
 {
     AssertPtr(pVCpu);
@@ -8869 +8870 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxExportHostState(PVMCPU pVCpu)
+static int hmR0VmxExportHostState(PVMCPUCC pVCpu)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -8897 +8898 @@
  * @remarks No-long-jump zone!!!
  */
-VMMR0DECL(int) VMXR0ExportHostState(PVMCPU pVCpu)
+VMMR0DECL(int) VMXR0ExportHostState(PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -8932 +8933 @@
  * @remarks No-long-jump zone!!!
  */
-static VBOXSTRICTRC hmR0VmxExportGuestState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExportGuestState(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     AssertPtr(pVCpu);
@@ -9027 +9028 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxExportSharedState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static void hmR0VmxExportSharedState(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
@@ -9070 +9071 @@
  * @remarks No-long-jump zone!!!
  */
-static VBOXSTRICTRC hmR0VmxExportGuestStateOptimal(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExportGuestStateOptimal(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_ASSERT_PREEMPT_SAFE(pVCpu);
@@ -9138 +9139 @@
  *          are valid, i.e. hmR0VmxCheckVmcsCtls() succeeded.
  */
-static uint32_t hmR0VmxCheckGuestState(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static uint32_t hmR0VmxCheckGuestState(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
 #define HMVMX_ERROR_BREAK(err)              { uError = (err); break; }
@@ -9146 +9147 @@
 
     int        rc;
-    PVM        pVM    = pVCpu->CTX_SUFF(pVM);
+    PVMCC        pVM    = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX   pCtx   = &pVCpu->cpum.GstCtx;
     uint32_t   uError = VMX_IGS_ERROR;
@@ -9710 +9711 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-static int hmR0VmxMapHCApicAccessPage(PVMCPU pVCpu)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxMapHCApicAccessPage(PVMCPUCC pVCpu)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     uint64_t const u64MsrApicBase = APICGetBaseMsrNoCheck(pVCpu);
 
@@ -9760 +9761 @@
  *                      operation.
  */
-static int hmR0VmxExitHostNmi(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
+static int hmR0VmxExitHostNmi(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)
 {
     RTCPUID const idCpu = pVmcsInfo->idHostCpu;
@@ -9814 +9815 @@
  * @param   pVmcsInfoGst        The guest VMCS info. object.
  */
-static void hmR0VmxMergeMsrBitmapNested(PCVMCPU pVCpu, PVMXVMCSINFO pVmcsInfoNstGst, PCVMXVMCSINFO pVmcsInfoGst)
+static void hmR0VmxMergeMsrBitmapNested(PCVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfoNstGst, PCVMXVMCSINFO pVmcsInfoGst)
 {
     uint32_t const cbMsrBitmap    = X86_PAGE_4K_SIZE;
@@ -9865 +9866 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-static int hmR0VmxMergeVmcsNested(PVMCPU pVCpu)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+static int hmR0VmxMergeVmcsNested(PVMCPUCC pVCpu)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     PCVMXVMCSINFO pVmcsInfoGst = &pVCpu->hm.s.vmx.VmcsInfo;
     PCVMXVVMCS    pVmcsNstGst  = pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs);
@@ -10187 +10188 @@
  *                          if event dispatching took place.
  */
-static VBOXSTRICTRC hmR0VmxPreRunGuest(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, bool fStepping)
+static VBOXSTRICTRC hmR0VmxPreRunGuest(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, bool fStepping)
 {
     Assert(VMMRZCallRing3IsEnabled(pVCpu));
@@ -10231 +10232 @@
      *        VERR_IOM_MMIO_RANGE_NOT_FOUND guru while booting Visa 64 SMP VM. No
      *        idea why atm. */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (   !pVCpu->hm.s.vmx.u64GstMsrApicBase
         && (pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1 & VMX_PROC_CTLS2_VIRT_APIC_ACCESS)
@@ -10431 +10432 @@
  * @remarks No-long-jump zone!!!
  */
-static void hmR0VmxPreRunGuestCommitted(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static void hmR0VmxPreRunGuestCommitted(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
@@ -10444 +10445 @@
     VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
 
-    PVM          pVM           = pVCpu->CTX_SUFF(pVM);
+    PVMCC          pVM           = pVCpu->CTX_SUFF(pVM);
     PVMXVMCSINFO pVmcsInfo     = pVmxTransient->pVmcsInfo;
     PHMPHYSCPU   pHostCpu      = hmR0GetCurrentCpu();
@@ -10588 +10589 @@
  *          unconditionally when it is safe to do so.
  */
-static void hmR0VmxPostRunGuest(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, int rcVMRun)
+static void hmR0VmxPostRunGuest(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, int rcVMRun)
 {
     uint64_t const uHostTsc = ASMReadTSC();                     /** @todo We can do a lot better here, see @bugref{9180#c38}. */
@@ -10763 +10764 @@
  * @param   pcLoops     Pointer to the number of executed loops.
  */
-static VBOXSTRICTRC hmR0VmxRunGuestCodeNormal(PVMCPU pVCpu, uint32_t *pcLoops)
+static VBOXSTRICTRC hmR0VmxRunGuestCodeNormal(PVMCPUCC pVCpu, uint32_t *pcLoops)
 {
     uint32_t const cMaxResumeLoops = pVCpu->CTX_SUFF(pVM)->hm.s.cMaxResumeLoops;
@@ -10876 +10877 @@
  * @sa      hmR0VmxRunGuestCodeNormal.
  */
-static VBOXSTRICTRC hmR0VmxRunGuestCodeNested(PVMCPU pVCpu, uint32_t *pcLoops)
+static VBOXSTRICTRC hmR0VmxRunGuestCodeNested(PVMCPUCC pVCpu, uint32_t *pcLoops)
 {
     uint32_t const cMaxResumeLoops = pVCpu->CTX_SUFF(pVM)->hm.s.cMaxResumeLoops;
@@ -11057 +11058 @@
  * @param   pDbgState       The debug state to initialize.
  */
-static void hmR0VmxRunDebugStateInit(PVMCPU pVCpu, PCVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
+static void hmR0VmxRunDebugStateInit(PVMCPUCC pVCpu, PCVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
 {
     pDbgState->uRipStart            = pVCpu->cpum.GstCtx.rip;
@@ -11089 +11090 @@
  * @param   pDbgState       The debug state.
  */
-static void hmR0VmxPreRunGuestDebugStateApply(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
+static void hmR0VmxPreRunGuestDebugStateApply(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
 {
     /*
@@ -11154 +11155 @@
  *                          stepping.
  */
-static VBOXSTRICTRC hmR0VmxRunDebugStateRevert(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState,
+static VBOXSTRICTRC hmR0VmxRunDebugStateRevert(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState,
                                                VBOXSTRICTRC rcStrict)
 {
@@ -11204 +11205 @@
  * @param   pDbgState       The debug state.
  */
-static void hmR0VmxPreRunGuestDebugStateUpdate(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
+static void hmR0VmxPreRunGuestDebugStateUpdate(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
 {
     /*
@@ -11226 +11227 @@
      * Software interrupts (INT XXh) - no idea how to trigger these...
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (   DBGF_IS_EVENT_ENABLED(pVM, DBGFEVENT_INTERRUPT_SOFTWARE)
         || VBOXVMM_INT_SOFTWARE_ENABLED())
@@ -11500 +11501 @@
  *          and to the point. No longer than 33 chars long, please.
  */
-static VBOXSTRICTRC hmR0VmxHandleExitDtraceEvents(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t uExitReason)
+static VBOXSTRICTRC hmR0VmxHandleExitDtraceEvents(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, uint32_t uExitReason)
 {
     /*
@@ -11850 +11851 @@
      *       one, in order to avoid event nesting.
      */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (   enmEvent1 != DBGFEVENT_END
         && DBGF_IS_EVENT_ENABLED(pVM, enmEvent1))
@@ -11884 +11885 @@
  * @param   pDbgState       The debug state.
  */
-DECLINLINE(VBOXSTRICTRC) hmR0VmxRunDebugHandleExit(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
+DECLINLINE(VBOXSTRICTRC) hmR0VmxRunDebugHandleExit(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PVMXRUNDBGSTATE pDbgState)
 {
     /*
@@ -12038 +12039 @@
  * @note    Mostly the same as hmR0VmxRunGuestCodeNormal().
  */
-static VBOXSTRICTRC hmR0VmxRunGuestCodeDebug(PVMCPU pVCpu, uint32_t *pcLoops)
+static VBOXSTRICTRC hmR0VmxRunGuestCodeDebug(PVMCPUCC pVCpu, uint32_t *pcLoops)
 {
     uint32_t const cMaxResumeLoops = pVCpu->CTX_SUFF(pVM)->hm.s.cMaxResumeLoops;
@@ -12330 +12331 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-VMMR0DECL(VBOXSTRICTRC) VMXR0RunGuestCode(PVMCPU pVCpu)
+VMMR0DECL(VBOXSTRICTRC) VMXR0RunGuestCode(PVMCPUCC pVCpu)
 {
     AssertPtr(pVCpu);
@@ -12404 +12405 @@
  * @param   pVmxTransient   The VMX-transient structure.
  */
-DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExit(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExit(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
 #ifdef DEBUG_ramshankar
@@ -12519 +12520 @@
  * @param   pVmxTransient   The VMX-transient structure.
  */
-DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExitNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExitNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     /** @todo NSTVMX: Remove after debugging regression.  */
@@ -12760 +12761 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(void) hmR0VmxAdvanceGuestRipBy(PVMCPU pVCpu, uint32_t cbInstr)
+DECLINLINE(void) hmR0VmxAdvanceGuestRipBy(PVMCPUCC pVCpu, uint32_t cbInstr)
 {
     /* Advance the RIP. */
@@ -12782 +12783 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxAdvanceGuestRip(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static int hmR0VmxAdvanceGuestRip(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
@@ -12813 +12814 @@
  * @remarks No-long-jump zone!!!
  */
-static VBOXSTRICTRC hmR0VmxCheckExitDueToEventDelivery(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxCheckExitDueToEventDelivery(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     Assert(!pVCpu->hm.s.Event.fPending);
@@ -13034 +13035 @@
  * @remarks No-long-jump zone!!!
  */
-static VBOXSTRICTRC hmR0VmxCheckExitDueToVmxInstr(PVMCPU pVCpu, uint32_t uExitReason)
+static VBOXSTRICTRC hmR0VmxCheckExitDueToVmxInstr(PVMCPUCC pVCpu, uint32_t uExitReason)
 {
     HMVMX_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS
@@ -13102 +13103 @@
  *          segment is valid.
  */
-static VBOXSTRICTRC hmR0VmxDecodeMemOperand(PVMCPU pVCpu, uint32_t uExitInstrInfo, RTGCPTR GCPtrDisp, VMXMEMACCESS enmMemAccess,
+static VBOXSTRICTRC hmR0VmxDecodeMemOperand(PVMCPUCC pVCpu, uint32_t uExitInstrInfo, RTGCPTR GCPtrDisp, VMXMEMACCESS enmMemAccess,
                                             PRTGCPTR pGCPtrMem)
 {
@@ -13278 +13279 @@
  * VM-exit helper for LMSW.
  */
-static VBOXSTRICTRC hmR0VmxExitLmsw(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr, uint16_t uMsw, RTGCPTR GCPtrEffDst)
+static VBOXSTRICTRC hmR0VmxExitLmsw(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr, uint16_t uMsw, RTGCPTR GCPtrEffDst)
 {
     int rc = hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK);
@@ -13303 +13304 @@
  * VM-exit helper for CLTS.
  */
-static VBOXSTRICTRC hmR0VmxExitClts(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr)
+static VBOXSTRICTRC hmR0VmxExitClts(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr)
 {
     int rc = hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK);
@@ -13328 +13329 @@
  * VM-exit helper for MOV from CRx (CRx read).
  */
-static VBOXSTRICTRC hmR0VmxExitMovFromCrX(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr, uint8_t iGReg, uint8_t iCrReg)
+static VBOXSTRICTRC hmR0VmxExitMovFromCrX(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr, uint8_t iGReg, uint8_t iCrReg)
 {
     Assert(iCrReg < 16);
@@ -13362 +13363 @@
  * VM-exit helper for MOV to CRx (CRx write).
  */
-static VBOXSTRICTRC hmR0VmxExitMovToCrX(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr, uint8_t iGReg, uint8_t iCrReg)
+static VBOXSTRICTRC hmR0VmxExitMovToCrX(PVMCPUCC pVCpu, PVMXVMCSINFO pVmcsInfo, uint8_t cbInstr, uint8_t iGReg, uint8_t iCrReg)
 {
     int rc = hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK);
@@ -13423 +13424 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptPF(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptPF(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     hmR0VmxReadExitQualVmcs(pVmxTransient);
 
@@ -13521 +13522 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptMF(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptMF(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13553 +13554 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptBP(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptBP(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13582 +13583 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptAC(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptAC(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13599 +13600 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptDB(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptDB(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13685 +13686 @@
  * @sa hmR0SvmHandleMesaDrvGp.
  */
-static int hmR0VmxHandleMesaDrvGp(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PCPUMCTX pCtx)
+static int hmR0VmxHandleMesaDrvGp(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PCPUMCTX pCtx)
 {
     LogFunc(("cs:rip=%#04x:%#RX64 rcx=%#RX64 rbx=%#RX64\n", pCtx->cs.Sel, pCtx->rip, pCtx->rcx, pCtx->rbx));
@@ -13705 +13706 @@
  * @sa      hmR0SvmIsMesaDrvGp.
  */
-DECLINLINE(bool) hmR0VmxIsMesaDrvGp(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient, PCPUMCTX pCtx)
+DECLINLINE(bool) hmR0VmxIsMesaDrvGp(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient, PCPUMCTX pCtx)
 {
     /* 0xed:  IN eAX,dx */
@@ -13752 +13753 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptGP(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptGP(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13834 +13835 @@
  * @remarks Requires all fields in HMVMX_READ_XCPT_INFO to be read from the VMCS.
  */
-static VBOXSTRICTRC hmR0VmxExitXcptOthers(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcptOthers(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13901 +13902 @@
  *          executing a nested-guest (e.g., Mesa driver hacks).
  */
-static VBOXSTRICTRC hmR0VmxExitXcpt(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+static VBOXSTRICTRC hmR0VmxExitXcpt(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_ASSERT_READ(pVmxTransient, HMVMX_READ_XCPT_INFO);
@@ -13959 +13960 @@
  * VM-exit handler for external interrupts (VMX_EXIT_EXT_INT).
  */
-HMVMX_EXIT_DECL hmR0VmxExitExtInt(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitExtInt(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -13974 +13975 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitXcptOrNmi(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitXcptOrNmi(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14049 +14050 @@
  * VM-exit handler for interrupt-window exiting (VMX_EXIT_INT_WINDOW).
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitIntWindow(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitIntWindow(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14066 +14067 @@
  * VM-exit handler for NMI-window exiting (VMX_EXIT_NMI_WINDOW).
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitNmiWindow(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitNmiWindow(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14108 +14109 @@
  * VM-exit handler for WBINVD (VMX_EXIT_WBINVD). Conditional VM-exit.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitWbinvd(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitWbinvd(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14118 +14119 @@
  * VM-exit handler for INVD (VMX_EXIT_INVD). Unconditional VM-exit.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitInvd(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitInvd(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14128 +14129 @@
  * VM-exit handler for CPUID (VMX_EXIT_CPUID). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitCpuid(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitCpuid(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14184 +14185 @@
  * VM-exit handler for GETSEC (VMX_EXIT_GETSEC). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitGetsec(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitGetsec(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14203 +14204 @@
  * VM-exit handler for RDTSC (VMX_EXIT_RDTSC). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdtsc(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdtsc(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14233 +14234 @@
  * VM-exit handler for RDTSCP (VMX_EXIT_RDTSCP). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdtscp(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdtscp(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14263 +14264 @@
  * VM-exit handler for RDPMC (VMX_EXIT_RDPMC). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdpmc(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdpmc(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14291 +14292 @@
  * VM-exit handler for VMCALL (VMX_EXIT_VMCALL). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmcall(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmcall(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14335 +14336 @@
  * VM-exit handler for INVLPG (VMX_EXIT_INVLPG). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInvlpg(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInvlpg(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14365 +14366 @@
  * VM-exit handler for MONITOR (VMX_EXIT_MONITOR). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMonitor(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMonitor(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14390 +14391 @@
  * VM-exit handler for MWAIT (VMX_EXIT_MWAIT). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMwait(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMwait(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14415 +14416 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitTripleFault(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitTripleFault(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14425 +14426 @@
  * VM-exit handler for HLT (VMX_EXIT_HLT). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitHlt(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitHlt(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14448 +14449 @@
  * the guest.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitSetPendingXcptUD(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitSetPendingXcptUD(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14459 +14460 @@
  * VM-exit handler for expiry of the VMX-preemption timer.
  */
-HMVMX_EXIT_DECL hmR0VmxExitPreemptTimer(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitPreemptTimer(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14467 +14468 @@
 
     /* If there are any timer events pending, fall back to ring-3, otherwise resume guest execution. */
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     bool fTimersPending = TMTimerPollBool(pVM, pVCpu);
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitPreemptTimer);
@@ -14477 +14478 @@
  * VM-exit handler for XSETBV (VMX_EXIT_XSETBV). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitXsetbv(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitXsetbv(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14500 +14501 @@
  * VM-exit handler for INVPCID (VMX_EXIT_INVPCID). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInvpcid(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInvpcid(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14512 +14513 @@
  * VM-exit.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrInvalidGuestState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrInvalidGuestState(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
@@ -14563 +14564 @@
  * VM-exit handler for all undefined/unexpected reasons. Should never happen.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrUnexpected(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrUnexpected(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     /*
@@ -14650 +14651 @@
  * VM-exit handler for RDMSR (VMX_EXIT_RDMSR).
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdmsr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdmsr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14716 +14717 @@
  * VM-exit handler for WRMSR (VMX_EXIT_WRMSR).
  */
-HMVMX_EXIT_DECL hmR0VmxExitWrmsr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitWrmsr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14859 +14860 @@
  * VM-exit handler for PAUSE (VMX_EXIT_PAUSE). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitPause(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitPause(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14878 +14879 @@
  * threshold (VMX_EXIT_TPR_BELOW_THRESHOLD). Conditional VM-exit.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitTprBelowThreshold(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitTprBelowThreshold(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14902 +14903 @@
  *         incompatible guest state for VMX execution (real-on-v86 case).
  */
-HMVMX_EXIT_DECL hmR0VmxExitMovCRx(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMovCRx(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -14912 +14913 @@
 
     VBOXSTRICTRC rcStrict;
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     uint64_t const uExitQual   = pVmxTransient->uExitQual;
     uint32_t const uAccessType = VMX_EXIT_QUAL_CRX_ACCESS(uExitQual);
@@ -15052 +15053 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitIoInstr(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitIoInstr(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15099 +15100 @@
         uint32_t const cbInstr  = pVmxTransient->cbInstr;
         bool fUpdateRipAlready  = false; /* ugly hack, should be temporary. */
-        PVM pVM                 = pVCpu->CTX_SUFF(pVM);
+        PVMCC pVM                 = pVCpu->CTX_SUFF(pVM);
         if (fIOString)
         {
@@ -15288 +15289 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitTaskSwitch(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitTaskSwitch(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15335 +15336 @@
  * VM-exit handler for monitor-trap-flag (VMX_EXIT_MTF). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMtf(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMtf(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15350 +15351 @@
  * VM-exit handler for APIC access (VMX_EXIT_APIC_ACCESS). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitApicAccess(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitApicAccess(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15403 +15404 @@
                  VMX_EXIT_QUAL_APIC_ACCESS_OFFSET(pVmxTransient->uExitQual)));
 
-            PVM      pVM  = pVCpu->CTX_SUFF(pVM);
+            PVMCC      pVM  = pVCpu->CTX_SUFF(pVM);
             PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
             rcStrict = IOMMMIOPhysHandler(pVM, pVCpu,
@@ -15438 +15439 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMovDRx(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMovDRx(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15498 +15499 @@
     Log4Func(("cs:rip=%#04x:%#RX64\n", pCtx->cs.Sel, pCtx->rip));
 
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     if (VMX_EXIT_QUAL_DRX_DIRECTION(pVmxTransient->uExitQual) == VMX_EXIT_QUAL_DRX_DIRECTION_WRITE)
     {
@@ -15531 +15532 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitEptMisconfig(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitEptMisconfig(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15593 +15594 @@
          * weird case. See @bugref{6043}.
          */
-        PVM      pVM  = pVCpu->CTX_SUFF(pVM);
+        PVMCC      pVM  = pVCpu->CTX_SUFF(pVM);
         PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
         rcStrict = PGMR0Trap0eHandlerNPMisconfig(pVM, pVCpu, PGMMODE_EPT, CPUMCTX2CORE(pCtx), GCPhys, UINT32_MAX);
@@ -15630 +15631 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitEptViolation(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitEptViolation(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15678 +15679 @@
         uErrorCode |= X86_TRAP_PF_P;
 
-    PVM      pVM  = pVCpu->CTX_SUFF(pVM);
+    PVMCC      pVM  = pVCpu->CTX_SUFF(pVM);
     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
     Log4Func(("at %#RX64 (%#RX64 errcode=%#x) cs:rip=%#04x:%#RX64\n", GCPhys, uExitQual, uErrorCode, pCtx->cs.Sel, pCtx->rip));
@@ -15709 +15710 @@
  * VM-exit handler for VMCLEAR (VMX_EXIT_VMCLEAR). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmclear(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmclear(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15746 +15747 @@
  * VM-exit handler for VMLAUNCH (VMX_EXIT_VMLAUNCH). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmlaunch(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmlaunch(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15775 +15776 @@
  * VM-exit handler for VMPTRLD (VMX_EXIT_VMPTRLD). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmptrld(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmptrld(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15812 +15813 @@
  * VM-exit handler for VMPTRST (VMX_EXIT_VMPTRST). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmptrst(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmptrst(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15849 +15850 @@
  * VM-exit handler for VMREAD (VMX_EXIT_VMREAD). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmread(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmread(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15892 +15893 @@
  * VM-exit handler for VMRESUME (VMX_EXIT_VMRESUME). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmresume(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmresume(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15921 +15922 @@
  * VM-exit handler for VMWRITE (VMX_EXIT_VMWRITE). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmwrite(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmwrite(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15964 +15965 @@
  * VM-exit handler for VMXOFF (VMX_EXIT_VMXOFF). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmxoff(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmxoff(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -15991 +15992 @@
  * VM-exit handler for VMXON (VMX_EXIT_VMXON). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmxon(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmxon(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16028 +16029 @@
  * VM-exit handler for INVVPID (VMX_EXIT_INVVPID). Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInvvpid(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInvvpid(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16075 +16076 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitXcptOrNmiNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitXcptOrNmiNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16186 +16187 @@
  * Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitTripleFaultNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitTripleFaultNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16196 +16197 @@
  * Nested-guest VM-exit handler for interrupt-window exiting (VMX_EXIT_INT_WINDOW).
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitIntWindowNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitIntWindowNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16209 +16210 @@
  * Nested-guest VM-exit handler for NMI-window exiting (VMX_EXIT_NMI_WINDOW).
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitNmiWindowNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitNmiWindowNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16223 +16224 @@
  * Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitTaskSwitchNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitTaskSwitchNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16249 +16250 @@
  * Nested-guest VM-exit handler for HLT (VMX_EXIT_HLT). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitHltNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitHltNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16265 +16266 @@
  * Nested-guest VM-exit handler for INVLPG (VMX_EXIT_INVLPG). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInvlpgNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInvlpgNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16288 +16289 @@
  * Nested-guest VM-exit handler for RDPMC (VMX_EXIT_RDPMC). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdpmcNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdpmcNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16305 +16306 @@
  * (VMX_EXIT_VMWRITE). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVmreadVmwriteNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVmreadVmwriteNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16345 +16346 @@
  * Nested-guest VM-exit handler for RDTSC (VMX_EXIT_RDTSC). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdtscNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdtscNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16363 +16364 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMovCRxNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMovCRxNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16522 +16523 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMovDRxNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMovDRxNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16546 +16547 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitIoInstrNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitIoInstrNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16569 +16570 @@
          *   - Optionally provides VM-exit instruction info (depends on CPU feature).
          */
-        PVM pVM = pVCpu->CTX_SUFF(pVM);
+        PVMCC pVM = pVCpu->CTX_SUFF(pVM);
         hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
 
@@ -16604 +16605 @@
  * Nested-guest VM-exit handler for RDMSR (VMX_EXIT_RDMSR).
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdmsrNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdmsrNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16626 +16627 @@
  * Nested-guest VM-exit handler for WRMSR (VMX_EXIT_WRMSR).
  */
-HMVMX_EXIT_DECL hmR0VmxExitWrmsrNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitWrmsrNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16648 +16649 @@
  * Nested-guest VM-exit handler for MWAIT (VMX_EXIT_MWAIT). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMwaitNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMwaitNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16665 +16666 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMtfNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMtfNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16677 +16678 @@
  * Nested-guest VM-exit handler for MONITOR (VMX_EXIT_MONITOR). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitMonitorNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitMonitorNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16693 +16694 @@
  * Nested-guest VM-exit handler for PAUSE (VMX_EXIT_PAUSE). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitPauseNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitPauseNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16716 +16717 @@
  * specified threshold (VMX_EXIT_TPR_BELOW_THRESHOLD). Conditional VM-exit.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitTprBelowThresholdNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitTprBelowThresholdNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16730 +16731 @@
  * VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitApicAccessNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitApicAccessNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16762 +16763 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitApicWriteNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitApicWriteNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16776 +16777 @@
  * Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitVirtEoiNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitVirtEoiNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16789 +16790 @@
  * Nested-guest VM-exit handler for RDTSCP (VMX_EXIT_RDTSCP). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitRdtscpNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitRdtscpNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16806 +16807 @@
  * Nested-guest VM-exit handler for WBINVD (VMX_EXIT_WBINVD). Conditional VM-exit.
  */
-HMVMX_EXIT_NSRC_DECL hmR0VmxExitWbinvdNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_NSRC_DECL hmR0VmxExitWbinvdNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16822 +16823 @@
  * Nested-guest VM-exit handler for INVPCID (VMX_EXIT_INVPCID). Conditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInvpcidNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInvpcidNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16849 +16850 @@
  * (VMX_EXIT_ERR_INVALID_GUEST_STATE). Error VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitErrInvalidGuestStateNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitErrInvalidGuestStateNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16871 +16872 @@
  * Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInstrNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInstrNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
@@ -16900 +16901 @@
  * Unconditional VM-exit.
  */
-HMVMX_EXIT_DECL hmR0VmxExitInstrWithInfoNested(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
+HMVMX_EXIT_DECL hmR0VmxExitInstrWithInfoNested(PVMCPUCC pVCpu, PVMXTRANSIENT pVmxTransient)
 {
     HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);

trunk/src/VBox/VMM/VMMR0/HMVMXR0.h

@@ -31 +31 @@
 
 #ifdef IN_RING0
-VMMR0DECL(int)          VMXR0Enter(PVMCPU pVCpu);
-VMMR0DECL(void)         VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit);
-VMMR0DECL(int)          VMXR0EnableCpu(PHMPHYSCPU pHostCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys,
+VMMR0DECL(int)          VMXR0Enter(PVMCPUCC pVCpu);
+VMMR0DECL(void)         VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit);
+VMMR0DECL(int)          VMXR0EnableCpu(PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys,
                                        bool fEnabledBySystem, PCSUPHWVIRTMSRS pHwvirtMsrs);
 VMMR0DECL(int)          VMXR0DisableCpu(void *pvPageCpu, RTHCPHYS pPageCpuPhys);
 VMMR0DECL(int)          VMXR0GlobalInit(void);
 VMMR0DECL(void)         VMXR0GlobalTerm(void);
-VMMR0DECL(int)          VMXR0InitVM(PVM pVM);
-VMMR0DECL(int)          VMXR0TermVM(PVM pVM);
-VMMR0DECL(int)          VMXR0SetupVM(PVM pVM);
-VMMR0DECL(int)          VMXR0ExportHostState(PVMCPU pVCpu);
-VMMR0DECL(int)          VMXR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
-VMMR0DECL(int)          VMXR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat);
-VMMR0DECL(VBOXSTRICTRC) VMXR0RunGuestCode(PVMCPU pVCpu);
-DECLASM(int)            VMXR0StartVM32(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVM pVM, PVMCPU pVCpu);
-DECLASM(int)            VMXR0StartVM64(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVM pVM, PVMCPU pVCpu);
+VMMR0DECL(int)          VMXR0InitVM(PVMCC pVM);
+VMMR0DECL(int)          VMXR0TermVM(PVMCC pVM);
+VMMR0DECL(int)          VMXR0SetupVM(PVMCC pVM);
+VMMR0DECL(int)          VMXR0ExportHostState(PVMCPUCC pVCpu);
+VMMR0DECL(int)          VMXR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
+VMMR0DECL(int)          VMXR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat);
+VMMR0DECL(VBOXSTRICTRC) VMXR0RunGuestCode(PVMCPUCC pVCpu);
+DECLASM(int)            VMXR0StartVM32(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVMCC pVM, PVMCPUCC pVCpu);
+DECLASM(int)            VMXR0StartVM64(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVMCC pVM, PVMCPUCC pVCpu);
 #endif /* IN_RING0 */
 

trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp

@@ -35 +35 @@
 #include "NEMInternal.h"
 #include <VBox/vmm/gvm.h>
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvmm.h>
 #include <VBox/param.h>
@@ -80 +80 @@
 *   Internal Functions                                                                                                           *
 *********************************************************************************************************************************/
-NEM_TMPL_STATIC int  nemR0WinMapPages(PGVM pGVM, PVM pVM, PGVMCPU pGVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
+NEM_TMPL_STATIC int  nemR0WinMapPages(PGVM pGVM, PVMCC pVM, PGVMCPU pGVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
                                       uint32_t cPages, uint32_t fFlags);
 NEM_TMPL_STATIC int  nemR0WinUnmapPages(PGVM pGVM, PGVMCPU pGVCpu, RTGCPHYS GCPhys, uint32_t cPages);
@@ -89 +89 @@
 NEM_TMPL_STATIC int  nemR0WinResumeCpuTickOnAll(PGVM pGVM, PGVMCPU pGVCpu, uint64_t uPausedTscValue);
 #endif
-DECLINLINE(NTSTATUS) nemR0NtPerformIoControl(PGVM pGVM, uint32_t uFunction, void *pvInput, uint32_t cbInput,
+DECLINLINE(NTSTATUS) nemR0NtPerformIoControl(PGVM pGVM, PVMCPUCC pVCpu, uint32_t uFunction, void *pvInput, uint32_t cbInput,
                                              void *pvOutput, uint32_t cbOutput);
 
@@ -159 +159 @@
  * @thread  EMT(0)
  */
-VMMR0_INT_DECL(int) NEMR0InitVM(PGVM pGVM, PVM pVM)
+VMMR0_INT_DECL(int) NEMR0InitVM(PGVM pGVM, PVMCC pVM)
 {
     AssertCompile(sizeof(pGVM->nemr0.s) <= sizeof(pGVM->nemr0.padding));
@@ -238 +238 @@
  * @returns NT status code.
  * @param   pGVM            The ring-0 VM structure.
+ * @param   pVCpu           The cross context CPU structure of the calling EMT.
  * @param   uFunction       The function to perform.
  * @param   pvInput         The input buffer.  This must point within the VM
@@ -248 +249 @@
  * @param   cbOutput        The size of the output.  @a pvOutput must be NULL
  *                          when zero.
+ * @thread  EMT(pVCpu)
  */
-DECLINLINE(NTSTATUS) nemR0NtPerformIoControl(PGVM pGVM, uint32_t uFunction, void *pvInput, uint32_t cbInput,
+DECLINLINE(NTSTATUS) nemR0NtPerformIoControl(PGVM pGVM, PVMCPUCC pVCpu, uint32_t uFunction, void *pvInput, uint32_t cbInput,
                                              void *pvOutput, uint32_t cbOutput)
 {
@@ -256 +258 @@
      * Input and output parameters are part of the VM CPU structure.
      */
-    PVM          pVM  = pGVM->pVM;
+    VMCPU_ASSERT_EMT(pVCpu);
+# ifdef VBOX_BUGREF_9217
+    if (pvInput)
+        AssertReturn(((uintptr_t)pvInput + cbInput) - (uintptr_t)pVCpu <= sizeof(*pVCpu), VERR_INVALID_PARAMETER);
+    if (pvOutput)
+        AssertReturn(((uintptr_t)pvOutput + cbOutput) - (uintptr_t)pVCpu <= sizeof(*pVCpu), VERR_INVALID_PARAMETER);
+# else
+    PVMCC        pVM  = pGVM->pVM;
     size_t const cbVM = RT_UOFFSETOF_DYN(VM, aCpus[pGVM->cCpus]);
     if (pvInput)
@@ -262 +271 @@
     if (pvOutput)
         AssertReturn(((uintptr_t)pvOutput + cbOutput) - (uintptr_t)pVM <= cbVM, VERR_INVALID_PARAMETER);
+# endif
 #endif
 
@@ -267 +277 @@
     int rc = SUPR0IoCtlPerform(pGVM->nemr0.s.pIoCtlCtx, uFunction,
                                pvInput,
+#ifdef VBOX_BUGREF_9217
+                               pvInput  ? (uintptr_t)pvInput  + pVCpu->nemr0.s.offRing3ConversionDelta : NIL_RTR3PTR,
+#else
                                pvInput  ? (uintptr_t)pvInput  + pGVM->nemr0.s.offRing3ConversionDelta : NIL_RTR3PTR,
+#endif
                                cbInput,
                                pvOutput,
+#ifdef VBOX_BUGREF_9217
+                               pvOutput ? (uintptr_t)pvOutput + pVCpu->nemr0.s.offRing3ConversionDelta : NIL_RTR3PTR,
+#else
                                pvOutput ? (uintptr_t)pvOutput + pGVM->nemr0.s.offRing3ConversionDelta : NIL_RTR3PTR,
+#endif
                                cbOutput,
                                &rcNt);
     if (RT_SUCCESS(rc) || !NT_SUCCESS((NTSTATUS)rcNt))
         return (NTSTATUS)rcNt;
+#ifndef VBOX_BUGREF_9217
+    RT_NOREF(pVCpu);
+#endif
     return STATUS_UNSUCCESSFUL;
 }
@@ -287 +308 @@
  * @thread  EMT(0)
  */
-VMMR0_INT_DECL(int) NEMR0InitVMPart2(PGVM pGVM, PVM pVM)
+VMMR0_INT_DECL(int) NEMR0InitVMPart2(PGVM pGVM, PVMCC pVM)
 {
     int rc = GVMMR0ValidateGVMandVMandEMT(pGVM, pVM, 0);
@@ -342 +363 @@
         rc = SUPR0IoCtlSetupForHandle(pGVM->pSession, pVM->nem.s.hPartitionDevice, 0, &pGVM->nemr0.s.pIoCtlCtx);
         AssertLogRelRCReturn(rc, rc);
+#ifdef VBOX_BUGREF_9217
+        for (VMCPUID idCpu = 0; idCpu < pGVM->cCpus; idCpu++)
+        {
+            PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
+            pGVCpu->nemr0.s.offRing3ConversionDelta = (uintptr_t)pGVM->aCpus[idCpu].pVCpuR3 - (uintptr_t)pGVCpu;
+        }
+#else
         pGVM->nemr0.s.offRing3ConversionDelta = (uintptr_t)pVM->pVMR3 - (uintptr_t)pGVM->pVM;
+#endif
 
         /*
          * Get the partition ID.
          */
-        PVMCPU pVCpu = &pGVM->pVM->aCpus[0];
-        NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pGVM->nemr0.s.IoCtlGetHvPartitionId.uFunction, NULL, 0,
-                                                &pVCpu->nem.s.uIoCtlBuf.idPartition, sizeof(pVCpu->nem.s.uIoCtlBuf.idPartition));
+#ifdef VBOX_BUGREF_9217
+        PVMCPUCC pVCpu0 = &pGVM->aCpus[0];
+#else
+        PVMCPUCC pVCpu0 = &pGVM->pVM->aCpus[0];
+#endif
+        NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu0, pGVM->nemr0.s.IoCtlGetHvPartitionId.uFunction, NULL, 0,
+                                                &pVCpu0->nem.s.uIoCtlBuf.idPartition, sizeof(pVCpu0->nem.s.uIoCtlBuf.idPartition));
         AssertLogRelMsgReturn(NT_SUCCESS(rcNt), ("IoCtlGetHvPartitionId failed: %#x\n", rcNt), VERR_NEM_INIT_FAILED);
-        pGVM->nemr0.s.idHvPartition = pVCpu->nem.s.uIoCtlBuf.idPartition;
+        pGVM->nemr0.s.idHvPartition = pVCpu0->nem.s.uIoCtlBuf.idPartition;
         AssertLogRelMsgReturn(pGVM->nemr0.s.idHvPartition == pVM->nem.s.idHvPartition,
                               ("idHvPartition mismatch: r0=%#RX64, r3=%#RX64\n", pGVM->nemr0.s.idHvPartition, pVM->nem.s.idHvPartition),
@@ -419 +452 @@
  * Worker for NEMR0MapPages and others.
  */
-NEM_TMPL_STATIC int nemR0WinMapPages(PGVM pGVM, PVM pVM, PGVMCPU pGVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
+NEM_TMPL_STATIC int nemR0WinMapPages(PGVM pGVM, PVMCC pVM, PGVMCPU pGVCpu, RTGCPHYS GCPhysSrc, RTGCPHYS GCPhysDst,
                                      uint32_t cPages, uint32_t fFlags)
 {
@@ -501 +534 @@
  * @thread  EMT(idCpu)
  */
-VMMR0_INT_DECL(int) NEMR0MapPages(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) NEMR0MapPages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -509 +542 @@
     if (RT_SUCCESS(rc))
     {
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
 
@@ -581 +614 @@
  * @thread  EMT(idCpu)
  */
-VMMR0_INT_DECL(int) NEMR0UnmapPages(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) NEMR0UnmapPages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -589 +622 @@
     if (RT_SUCCESS(rc))
     {
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
 
@@ -617 +650 @@
 NEM_TMPL_STATIC int nemR0WinExportState(PGVM pGVM, PGVMCPU pGVCpu, PCPUMCTX pCtx)
 {
-    PVMCPU                     pVCpu  = &pGVM->pVM->aCpus[pGVCpu->idCpu];
+#ifdef VBOX_BUGREF_9217
+    PVMCPUCC                   pVCpu  = pGVCpu;
+#else
+    PVMCPUCC                   pVCpu  = &pGVM->pVM->aCpus[pGVCpu->idCpu];
+#endif
     HV_INPUT_SET_VP_REGISTERS *pInput = (HV_INPUT_SET_VP_REGISTERS *)pGVCpu->nemr0.s.HypercallData.pbPage;
     AssertPtrReturn(pInput, VERR_INTERNAL_ERROR_3);
@@ -1295 +1332 @@
  *                      hypercall page and arguments.
  */
-VMMR0_INT_DECL(int)  NEMR0ExportState(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int)  NEMR0ExportState(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
 #if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
@@ -1304 +1341 @@
     if (RT_SUCCESS(rc))
     {
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
         AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API);
@@ -1339 +1376 @@
     AssertPtrReturn(pInput, VERR_INTERNAL_ERROR_3);
     AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API);
+#ifdef VBOX_BUGREF_9217
+    Assert(pCtx == &pGVCpu->cpum.GstCtx);
+#else
     Assert(pCtx == &pGVCpu->pVCpu->cpum.GstCtx);
+#endif
 
     fWhat &= pCtx->fExtrn;
@@ -1507 +1548 @@
 
 # ifdef LOG_ENABLED
+#  ifdef VBOX_BUGREF_9217
+    const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pGVM);
+#  else
     const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pGVM->pVM);
+#  endif
 # endif
     if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS)
@@ -1571 +1616 @@
      * Copy information to the CPUM context.
      */
-    PVMCPU pVCpu = &pGVM->pVM->aCpus[pGVCpu->idCpu];
+# ifdef VBOX_BUGREF_9217
+    PVMCPUCC pVCpu = pGVCpu;
+# else
+    PVMCPUCC pVCpu = &pGVM->pVM->aCpus[pGVCpu->idCpu];
+# endif
     iReg = 0;
 
@@ -2215 +2264 @@
  *                      CPUMCTX_EXTERN_ALL for everything.
  */
-VMMR0_INT_DECL(int) NEMR0ImportState(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t fWhat)
+VMMR0_INT_DECL(int) NEMR0ImportState(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint64_t fWhat)
 {
 #if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
@@ -2224 +2273 @@
     if (RT_SUCCESS(rc))
     {
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
         AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API);
@@ -2299 +2348 @@
  *                      hypercall page and arguments.
  */
-VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
 #if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
@@ -2308 +2357 @@
     if (RT_SUCCESS(rc))
     {
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
         AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API);
@@ -2409 +2458 @@
  * @param   uPausedTscValue The TSC value at the time of pausing.
  */
-VMMR0_INT_DECL(int) NEMR0ResumeCpuTickOnAll(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t uPausedTscValue)
+VMMR0_INT_DECL(int) NEMR0ResumeCpuTickOnAll(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint64_t uPausedTscValue)
 {
 #if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
@@ -2418 +2467 @@
     if (RT_SUCCESS(rc))
     {
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
         AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API);
@@ -2441 +2490 @@
 #ifdef NEM_WIN_WITH_RING0_RUNLOOP
     if (pGVM->nemr0.s.fMayUseRing0Runloop)
-    {
-        PVM pVM = pGVM->pVM;
+# ifdef VBOX_BUGREF_9217
+        return nemHCWinRunGC(pGVM, &pGVM->aCpus[idCpu], pGVM, &pGVM->aCpus[idCpu]);
+# else
+    {
+        PVMCC pVM = pGVM->pVM;
         return nemHCWinRunGC(pVM, &pVM->aCpus[idCpu], pGVM, &pGVM->aCpus[idCpu]);
     }
+# endif
     return VERR_NEM_RING3_ONLY;
 #else
@@ -2462 +2515 @@
  *                      page and arguments.
  */
-VMMR0_INT_DECL(int)  NEMR0UpdateStatistics(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int)  NEMR0UpdateStatistics(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -2535 +2588 @@
  * @param   u64Arg      What to query.  0 == registers.
  */
-VMMR0_INT_DECL(int) NEMR0DoExperiment(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t u64Arg)
+VMMR0_INT_DECL(int) NEMR0DoExperiment(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, uint64_t u64Arg)
 {
     /*
@@ -2546 +2599 @@
 
         PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
-        PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+        PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
         if (u64Arg == 0)
         {

trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_PDM_DEVICE
 #define PDMPCIDEV_INCLUDE_PRIVATE  /* Hack to get pdmpcidevint.h included at the right point. */
@@ -26 +27 @@
 #include <VBox/vmm/pgm.h>
 #include <VBox/vmm/mm.h>
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvm.h>
 #include <VBox/vmm/vmm.h>
@@ -60 +61 @@
 *   Internal Functions                                                                                                           *
 *********************************************************************************************************************************/
-static bool pdmR0IsaSetIrq(PVM pVM, int iIrq, int iLevel, uint32_t uTagSrc);
+static bool pdmR0IsaSetIrq(PVMCC pVM, int iIrq, int iLevel, uint32_t uTagSrc);
 
 
@@ -132 +133 @@
     LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: pPciDev=%p:{%#x} iIrq=%d iLevel=%d\n",
              pDevIns, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel));
-    PVM          pVM     = pDevIns->Internal.s.pVMR0;
+    PVMCC        pVM     = pDevIns->Internal.s.pVMR0;
     PPDMPCIBUS   pPciBus = pPciDev->Int.s.pPdmBusR0;
 
@@ -185 +186 @@
     PDMDEV_ASSERT_DEVINS(pDevIns);
     LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
-    PVM pVM = pDevIns->Internal.s.pVMR0;
+    PVMCC pVM = pDevIns->Internal.s.pVMR0;
 
     pdmLock(pVM);
@@ -214 +215 @@
     PDMDEV_ASSERT_DEVINS(pDevIns);
     LogFlow(("pdmR0DevHlp_IoApicSendMsi: caller=%p/%d: GCPhys=%RGp uValue=%#x\n", pDevIns, pDevIns->iInstance, GCPhys, uValue));
-    PVM pVM = pDevIns->Internal.s.pVMR0;
+    PVMCC pVM = pDevIns->Internal.s.pVMR0;
 
     uint32_t uTagSrc;
@@ -341 +342 @@
 
 /** @interface_method_impl{PDMDEVHLPR0,pfnGetVM} */
-static DECLCALLBACK(PVM)  pdmR0DevHlp_GetVM(PPDMDEVINS pDevIns)
+static DECLCALLBACK(PVMCC)  pdmR0DevHlp_GetVM(PPDMDEVINS pDevIns)
 {
     PDMDEV_ASSERT_DEVINS(pDevIns);
@@ -350 +351 @@
 
 /** @interface_method_impl{PDMDEVHLPR0,pfnGetVMCPU} */
-static DECLCALLBACK(PVMCPU) pdmR0DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
+static DECLCALLBACK(PVMCPUCC) pdmR0DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
 {
     PDMDEV_ASSERT_DEVINS(pDevIns);
@@ -460 +461 @@
 #ifdef VBOX_BUGREF_9217
     PGVM   pGVM  = (PGVM)pDevIns->Internal.s.pVMR0;
-    PVMCPU pVCpu = &pGVM->aCpus[0];     /* for PIC we always deliver to CPU 0, MP use APIC */
+    PVMCPUCC pVCpu = &pGVM->aCpus[0];     /* for PIC we always deliver to CPU 0, MP use APIC */
 #else
-    PVM    pVM   = pDevIns->Internal.s.pVMR0;
-    PVMCPU pVCpu = &pVM->aCpus[0];      /* for PIC we always deliver to CPU 0, MP use APIC */
+    PVMCC    pVM   = pDevIns->Internal.s.pVMR0;
+    PVMCPUCC pVCpu = VMCC_GET_CPU_0(pVM); /* for PIC we always deliver to CPU 0, MP use APIC */
 #endif
     /** @todo r=ramshankar: Propagating rcRZ and make all callers handle it? */
@@ -476 +477 @@
 #ifdef VBOX_BUGREF_9217
     PGVM   pGVM  = (PGVM)pDevIns->Internal.s.pVMR0;
-    PVMCPU pVCpu = &pGVM->aCpus[0];     /* for PIC we always deliver to CPU 0, MP use APIC */
+    PVMCPUCC pVCpu = &pGVM->aCpus[0];     /* for PIC we always deliver to CPU 0, MP use APIC */
 #else
-    PVM    pVM   = pDevIns->Internal.s.pVMR0;
-    PVMCPU pVCpu = &pVM->aCpus[0];      /* for PIC we always deliver to CPU 0, MP use APIC */
+    PVMCC    pVM   = pDevIns->Internal.s.pVMR0;
+    PVMCPUCC pVCpu = VMCC_GET_CPU_0(pVM); /* for PIC we always deliver to CPU 0, MP use APIC */
 #endif
     /** @todo r=ramshankar: Propagating rcRZ and make all callers handle it? */
@@ -528 +529 @@
 {
     PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR0;
+    PVMCC pVM = pDevIns->Internal.s.pVMR0;
     LogFlow(("pdmR0IoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 uVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
              pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc));
@@ -577 +578 @@
     PDMDEV_ASSERT_DEVINS(pDevIns);
     Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
-    PVM pVM = pDevIns->Internal.s.pVMR0;
+    PVMCC pVM = pDevIns->Internal.s.pVMR0;
 
     pdmLock(pVM);
@@ -590 +591 @@
     PDMDEV_ASSERT_DEVINS(pDevIns);
     Log4(("pdmR0PciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
-    PVM pVM = pDevIns->Internal.s.pVMR0;
+    PVMCC pVM = pDevIns->Internal.s.pVMR0;
 
     if (pVM->pdm.s.IoApic.pDevInsR0)
@@ -619 +620 @@
     PDMDEV_ASSERT_DEVINS(pDevIns);
     Log4(("pdmR0PciHlp_IoApicSendMsi: GCPhys=%p uValue=%d uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
-    PVM pVM = pDevIns->Internal.s.pVMR0;
+    PVMCC pVM = pDevIns->Internal.s.pVMR0;
     if (pVM->pdm.s.IoApic.pDevInsR0)
         pVM->pdm.s.IoApic.pfnSendMsiR0(pVM->pdm.s.IoApic.pDevInsR0, GCPhys, uValue, uTagSrc);
@@ -801 +802 @@
  * @remarks The caller holds the PDM lock.
  */
-static bool pdmR0IsaSetIrq(PVM pVM, int iIrq, int iLevel, uint32_t uTagSrc)
+static bool pdmR0IsaSetIrq(PVMCC pVM, int iIrq, int iLevel, uint32_t uTagSrc)
 {
     if (RT_LIKELY(    (   pVM->pdm.s.IoApic.pDevInsR0
@@ -838 +839 @@
  * @param   pReq    Pointer to the request buffer.
  */
-VMMR0_INT_DECL(int) PDMR0DeviceCallReqHandler(PGVM pGVM, PVM pVM, PPDMDEVICECALLREQHANDLERREQ pReq)
+VMMR0_INT_DECL(int) PDMR0DeviceCallReqHandler(PGVM pGVM, PVMCC pVM, PPDMDEVICECALLREQHANDLERREQ pReq)
 {
     /*

trunk/src/VBox/VMM/VMMR0/PDMR0Driver.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_PDM_DRIVER
 #include "PDMInternal.h"
 #include <VBox/vmm/pdm.h>
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvmm.h>
 
@@ -40 +41 @@
  * @param   pReq    Pointer to the request buffer.
  */
-VMMR0_INT_DECL(int) PDMR0DriverCallReqHandler(PGVM pGVM, PVM pVM, PPDMDRIVERCALLREQHANDLERREQ pReq)
+VMMR0_INT_DECL(int) PDMR0DriverCallReqHandler(PGVM pGVM, PVMCC pVM, PPDMDRIVERCALLREQHANDLERREQ pReq)
 {
     /*

trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_PGM
 #include <VBox/rawpci.h>
@@ -25 +26 @@
 #include <VBox/vmm/gmm.h>
 #include "PGMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvm.h>
 #include "PGMInline.h"
@@ -71 +72 @@
  *          must clear the new pages.
  */
-VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -81 +82 @@
     PGM_LOCK_ASSERT_OWNER_EX(pVM, &pGVM->aCpus[idCpu]);
 #else
-    PGM_LOCK_ASSERT_OWNER_EX(pVM, &pVM->aCpus[idCpu]);
+    PGM_LOCK_ASSERT_OWNER_EX(pVM, VMCC_GET_CPU(pVM, idCpu));
 #endif
 
@@ -198 +199 @@
  * @remarks Must be called from within the PGM critical section.
  */
-VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -208 +209 @@
     PGM_LOCK_ASSERT_OWNER_EX(pVM, &pGVM->aCpus[idCpu]);
 #else
-    PGM_LOCK_ASSERT_OWNER_EX(pVM, &pVM->aCpus[idCpu]);
+    PGM_LOCK_ASSERT_OWNER_EX(pVM, VMCC_GET_CPU(pVM, idCpu));
 #endif
 
@@ -242 +243 @@
  *          must clear the new pages.
  */
-VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -252 +253 @@
     PGM_LOCK_ASSERT_OWNER_EX(pVM, &pGVM->aCpus[idCpu]);
 #else
-    PGM_LOCK_ASSERT_OWNER_EX(pVM, &pVM->aCpus[idCpu]);
+    PGM_LOCK_ASSERT_OWNER_EX(pVM, VMCC_GET_CPU(pVM, idCpu));
 #endif
     Assert(!pVM->pgm.s.cLargeHandyPages);
@@ -397 +398 @@
  * @param   pVM                 The cross context VM structure.
  */
-VMMR0_INT_DECL(int) PGMR0PhysSetupIoMmu(PGVM pGVM, PVM pVM)
+VMMR0_INT_DECL(int) PGMR0PhysSetupIoMmu(PGVM pGVM, PVMCC pVM)
 {
     int rc = GVMMR0ValidateGVMandVM(pGVM, pVM);
@@ -459 +460 @@
  * @param   GCPhysFault         The fault address.
  */
-VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
+VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVMCC pVM, PVMCPUCC pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
                                               PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault)
 {
@@ -588 +589 @@
  *                              (VT-x).
  */
-VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode,
+VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PVMCC pVM, PVMCPUCC pVCpu, PGMMODE enmShwPagingMode,
                                                       PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, uint32_t uErr)
 {

trunk/src/VBox/VMM/VMMR0/PGMR0Bth.h

@@ -21 +21 @@
 *******************************************************************************/
 RT_C_DECLS_BEGIN
-PGM_BTH_DECL(int, Trap0eHandler)(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, bool *pfLockTaken);
+PGM_BTH_DECL(int, Trap0eHandler)(PVMCPUCC pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, bool *pfLockTaken);
 RT_C_DECLS_END
 

trunk/src/VBox/VMM/VMMR0/PGMR0SharedPage.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_PGM_SHARED
 #include <VBox/vmm/pgm.h>
 #include <VBox/vmm/gmm.h>
 #include "PGMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvm.h>
 #include "PGMInline.h"
@@ -49 +50 @@
  *                              process.
  */
-VMMR0DECL(int) PGMR0SharedModuleCheck(PVM pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule, PCRTGCPTR64 paRegionsGCPtrs)
+VMMR0DECL(int) PGMR0SharedModuleCheck(PVMCC pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule, PCRTGCPTR64 paRegionsGCPtrs)
 {
 #ifdef VBOX_BUGREF_9217
-    PVMCPU              pVCpu         = &pGVM->aCpus[idCpu];
+    PVMCPUCC              pVCpu         = &pGVM->aCpus[idCpu];
 #else
-    PVMCPU              pVCpu         = &pVM->aCpus[idCpu];
+    PVMCPUCC              pVCpu         = VMCC_GET_CPU(pVM, idCpu);
 #endif
     int                 rc            = VINF_SUCCESS;
@@ -172 +173 @@
 #else
         for (VMCPUID idCurCpu = 0; idCurCpu < pVM->cCpus; idCurCpu++)
-            CPUMSetChangedFlags(&pVM->aCpus[idCurCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
+            CPUMSetChangedFlags(VMCC_GET_CPU(pVM, idCurCpu), CPUM_CHANGED_GLOBAL_TLB_FLUSH);
 #endif
 

trunk/src/VBox/VMM/VMMR0/TRPMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_TRPM
 #include <VBox/vmm/trpm.h>
 #include "TRPMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/vmm.h>
 #include <iprt/errcore.h>
@@ -42 +43 @@
  * @remark  Must be called with interrupts disabled.
  */
-VMMR0DECL(void) TRPMR0DispatchHostInterrupt(PVM pVM)
+VMMR0DECL(void) TRPMR0DispatchHostInterrupt(PVMCC pVM)
 {
     /*
      * Get the active interrupt vector number.
      */
-    PVMCPU pVCpu = VMMGetCpu0(pVM);
+    PVMCPUCC pVCpu = VMMGetCpu0(pVM);
     RTUINT uActiveVector = pVCpu->trpm.s.uActiveVector;
     pVCpu->trpm.s.uActiveVector = UINT32_MAX;

trunk/src/VBox/VMM/VMMR0/VMMR0.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_VMM
 #include <VBox/vmm/vmm.h>
@@ -34 +35 @@
 #include <VBox/vmm/tm.h>
 #include "VMMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/vmm/gvm.h>
 #ifdef VBOX_WITH_PCI_PASSTHROUGH
@@ -366 +367 @@
  * @thread  EMT(0)
  */
-static int vmmR0InitVM(PGVM pGVM, PVM pVM, uint32_t uSvnRev, uint32_t uBuildType)
+static int vmmR0InitVM(PGVM pGVM, PVMCC pVM, uint32_t uSvnRev, uint32_t uBuildType)
 {
     VMM_CHECK_SMAP_SETUP();
@@ -396 +397 @@
      */
 #ifdef VBOX_BUGREF_9217
-    PVMCPU pVCpu = &pGVM->aCpus[0];
+    PVMCPUCC pVCpu = &pGVM->aCpus[0];
 #else
-    PVMCPU pVCpu = &pVM->aCpus[0];
+    PVMCPUCC pVCpu = VMCC_GET_CPU_0(pVM);
 #endif
 
@@ -534 +535 @@
  * @param   idCpu       The EMT that's calling.
  */
-static int vmmR0InitVMEmt(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+static int vmmR0InitVMEmt(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /* Paranoia (caller checked these already). */
@@ -545 +546 @@
      */
 #ifdef VBOX_BUGREF_9217
-    PVMCPU       pVCpu     = &pGVM->aCpus[idCpu];
+    PVMCPUCC       pVCpu     = &pGVM->aCpus[idCpu];
 #else
-    PVMCPU       pVCpu     = &pVM->aCpus[idCpu];
+    PVMCPUCC       pVCpu     = VMCC_GET_CPU(pVM, idCpu);
 #endif
     PVMMR0LOGGER pR0Logger = pVCpu->vmm.s.pR0LoggerR0;
@@ -579 +580 @@
  * @thread  EMT(0) or session clean up thread.
  */
-VMMR0_INT_DECL(int) VMMR0TermVM(PGVM pGVM, PVM pVM, VMCPUID idCpu)
+VMMR0_INT_DECL(int) VMMR0TermVM(PGVM pGVM, PVMCC pVM, VMCPUID idCpu)
 {
     /*
@@ -627 +628 @@
  * @param   enmInterruptibility     Guest CPU interruptbility level.
  */
-static int vmmR0DoHaltInterrupt(PVMCPU pVCpu, unsigned uMWait, CPUMINTERRUPTIBILITY enmInterruptibility)
+static int vmmR0DoHaltInterrupt(PVMCPUCC pVCpu, unsigned uMWait, CPUMINTERRUPTIBILITY enmInterruptibility)
 {
     Assert(!TRPMHasTrap(pVCpu));
@@ -727 +728 @@
  *       parameters and statistics.
  */
-static int vmmR0DoHalt(PGVM pGVM, PVM pVM, PGVMCPU pGVCpu, PVMCPU pVCpu)
+static int vmmR0DoHalt(PGVM pGVM, PVMCC pVM, PGVMCPU pGVCpu, PVMCPUCC pVCpu)
 {
 #ifdef VBOX_BUGREF_9217
@@ -908 +909 @@
 static DECLCALLBACK(void) vmmR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser)
 {
-    PVMCPU pVCpu = (PVMCPU)pvUser;
+    PVMCPUCC pVCpu = (PVMCPUCC)pvUser;
 
     switch (enmEvent)
@@ -980 +981 @@
  * @thread  EMT(pVCpu)
  */
-VMMR0_INT_DECL(int) VMMR0ThreadCtxHookCreateForEmt(PVMCPU pVCpu)
+VMMR0_INT_DECL(int) VMMR0ThreadCtxHookCreateForEmt(PVMCPUCC pVCpu)
 {
     VMCPU_ASSERT_EMT(pVCpu);
@@ -1009 +1010 @@
  * @remarks Can be called from any thread.
  */
-VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDestroyForEmt(PVMCPU pVCpu)
+VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDestroyForEmt(PVMCPUCC pVCpu)
 {
     int rc = RTThreadCtxHookDestroy(pVCpu->vmm.s.hCtxHook);
@@ -1026 +1027 @@
  *          this call.  This means you have to be careful with what you do!
  */
-VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDisable(PVMCPU pVCpu)
+VMMR0_INT_DECL(void) VMMR0ThreadCtxHookDisable(PVMCPUCC pVCpu)
 {
     /*
@@ -1063 +1064 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-DECLINLINE(bool) vmmR0ThreadCtxHookIsEnabled(PVMCPU pVCpu)
+DECLINLINE(bool) vmmR0ThreadCtxHookIsEnabled(PVMCPUCC pVCpu)
 {
     return RTThreadCtxHookIsEnabled(pVCpu->vmm.s.hCtxHook);
@@ -1075 +1076 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(bool) VMMR0ThreadCtxHookIsEnabled(PVMCPU pVCpu)
+VMMR0_INT_DECL(bool) VMMR0ThreadCtxHookIsEnabled(PVMCPUCC pVCpu)
 {
     return vmmR0ThreadCtxHookIsEnabled(pVCpu);
@@ -1088 +1089 @@
  * @param   rc          The status code.
  */
-static void vmmR0RecordRC(PVM pVM, PVMCPU pVCpu, int rc)
+static void vmmR0RecordRC(PVMCC pVM, PVMCPUCC pVCpu, int rc)
 {
     /*
@@ -1295 +1296 @@
  * @remarks Assume called with interrupts _enabled_.
  */
-VMMR0DECL(void) VMMR0EntryFast(PGVM pGVM, PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation)
+VMMR0DECL(void) VMMR0EntryFast(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation)
 {
     /*
@@ -1311 +1312 @@
     PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
 #ifdef VBOX_BUGREF_9217
-    PVMCPU  pVCpu  = pGVCpu;
+    PVMCPUCC  pVCpu  = pGVCpu;
 #else
-    PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+    PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
 #endif
     RTNATIVETHREAD const hNativeThread = RTThreadNativeSelf();
@@ -1581 +1582 @@
  * @param   pSession        The session argument.
  */
-DECLINLINE(bool) vmmR0IsValidSession(PVM pVM, PSUPDRVSESSION pClaimedSession, PSUPDRVSESSION pSession)
+DECLINLINE(bool) vmmR0IsValidSession(PVMCC pVM, PSUPDRVSESSION pClaimedSession, PSUPDRVSESSION pSession)
 {
     /* This must be set! */
@@ -1613 +1614 @@
  * @remarks Assume called with interrupts _enabled_.
  */
-static int vmmR0EntryExWorker(PGVM pGVM, PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation,
+static int vmmR0EntryExWorker(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation,
                               PSUPVMMR0REQHDR pReqHdr, uint64_t u64Arg, PSUPDRVSESSION pSession)
 {
@@ -1656 +1657 @@
         }
 
+#ifdef VBOX_BUGREF_9217
+        if (RT_LIKELY(   pVM->enmVMState >= VMSTATE_CREATING
+                      && pVM->enmVMState <= VMSTATE_TERMINATED
+                      && pVM->cCpus      == pGVM->cCpus
+                      && pVM->pSession   == pSession
+                      && pVM->pSelf      == pVM))
+#else
         if (RT_LIKELY(   pVM->enmVMState >= VMSTATE_CREATING
                       && pVM->enmVMState <= VMSTATE_TERMINATED
@@ -1661 +1669 @@
                       && pVM->pSession   == pSession
                       && pVM->pVMR0      == pVM))
+#endif
         { /* likely */ }
         else
         {
+#ifdef VBOX_BUGREF_9217
+            SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p:{.enmVMState=%d, .cCpus=%#x(==%#x), .pSession=%p(==%p), .pSelf=%p(==%p)}! (op=%d)\n",
+                        pVM, pVM->enmVMState, pVM->cCpus, pGVM->cCpus, pVM->pSession, pSession, pVM->pSelf, pVM, enmOperation);
+#else
             SUPR0Printf("vmmR0EntryExWorker: Invalid pVM=%p:{.enmVMState=%d, .cCpus=%#x(==%#x), .pSession=%p(==%p), .pVMR0=%p(==%p)}! (op=%d)\n",
                         pVM, pVM->enmVMState, pVM->cCpus, pGVM->cCpus, pVM->pSession, pSession, pVM->pVMR0, pVM, enmOperation);
+#endif
             return VERR_INVALID_POINTER;
         }
@@ -2228 +2242 @@
 {
     PGVM                pGVM;
-    PVM                 pVM;
+    PVMCC               pVM;
     VMCPUID             idCpu;
     VMMR0OPERATION      enmOperation;
@@ -2270 +2284 @@
  * @remarks Assume called with interrupts _enabled_.
  */
-VMMR0DECL(int) VMMR0EntryEx(PGVM pGVM, PVM pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation,
+VMMR0DECL(int) VMMR0EntryEx(PGVM pGVM, PVMCC pVM, VMCPUID idCpu, VMMR0OPERATION enmOperation,
                             PSUPVMMR0REQHDR pReq, uint64_t u64Arg, PSUPDRVSESSION pSession)
 {
@@ -2280 +2294 @@
         && pGVM != NULL
         && idCpu < pGVM->cCpus
-        && pVM->pVMR0 != NULL)
+        && pVM->pSession == pSession
+#ifdef VBOX_BUGREF_9217
+        && pVM->pSelf != NULL
+#else
+        && pVM->pVMR0 != NULL
+#endif
+       )
     {
         switch (enmOperation)
@@ -2296 +2316 @@
                 PGVMCPU pGVCpu = &pGVM->aCpus[idCpu];
 #ifdef VBOX_BUGREF_9217
-                PVMCPU  pVCpu  = pGVCpu;
+                PVMCPUCC  pVCpu  = pGVCpu;
 #else
-                PVMCPU  pVCpu  = &pVM->aCpus[idCpu];
+                PVMCPUCC  pVCpu  = VMCC_GET_CPU(pVM, idCpu);
 #endif
                 RTNATIVETHREAD hNativeThread = RTThreadNativeSelf();
@@ -2337 +2357 @@
  * @sa      VMMIsLongJumpArmed
  */
-VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPU pVCpu)
+VMMR0_INT_DECL(bool) VMMR0IsLongJumpArmed(PVMCPUCC pVCpu)
 {
 #ifdef RT_ARCH_X86
@@ -2356 +2376 @@
  * @thread  EMT
  */
-VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPU pVCpu)
+VMMR0_INT_DECL(bool) VMMR0IsInRing3LongJump(PVMCPUCC pVCpu)
 {
     return pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call;
@@ -2388 +2408 @@
         return; /* quietly */
 
-    PVM pVM = pR0Logger->pVM;
+    PVMCC pVM = pR0Logger->pVM;
     if (    !VALID_PTR(pVM)
-        ||  pVM->pVMR0 != pVM)
+# ifdef VBOX_BUGREF_9217
+        ||  pVM->pSelf != pVM
+# else
+        ||  pVM->pVMR0 != pVM
+# endif
+       )
     {
 # ifdef DEBUG
+#  ifdef VBOX_BUGREF_9217
+        SUPR0Printf("vmmR0LoggerFlush: pVM=%p! pSelf=%p! pLogger=%p\n", pVM, pVM->pSelf, pLogger);
+#  else
         SUPR0Printf("vmmR0LoggerFlush: pVM=%p! pVMR0=%p! pLogger=%p\n", pVM, pVM->pVMR0, pLogger);
+#  endif
 # endif
         return;
     }
 
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPUCC pVCpu = VMMGetCpu(pVM);
     if (pVCpu)
     {
@@ -2435 +2464 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(void) VMMR0LogFlushDisable(PVMCPU pVCpu)
+VMMR0_INT_DECL(void) VMMR0LogFlushDisable(PVMCPUCC pVCpu)
 {
     if (pVCpu->vmm.s.pR0LoggerR0)
@@ -2449 +2478 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(void) VMMR0LogFlushEnable(PVMCPU pVCpu)
+VMMR0_INT_DECL(void) VMMR0LogFlushEnable(PVMCPUCC pVCpu)
 {
     if (pVCpu->vmm.s.pR0LoggerR0)
@@ -2463 +2492 @@
  * @param   pVCpu       The cross context virtual CPU structure.
  */
-VMMR0_INT_DECL(bool) VMMR0IsLogFlushDisabled(PVMCPU pVCpu)
+VMMR0_INT_DECL(bool) VMMR0IsLogFlushDisabled(PVMCPUCC pVCpu)
 {
     if (pVCpu->vmm.s.pR0LoggerR0)
@@ -2483 +2512 @@
     {
 #ifdef VBOX_BUGREF_9217
-        PVMCPU pVCpu = pGVCpu;
+        PVMCPUCC pVCpu = pGVCpu;
 #else
-        PVMCPU pVCpu = pGVCpu->pVCpu;
+        PVMCPUCC pVCpu = pGVCpu->pVCpu;
 #endif
         if (RT_VALID_PTR(pVCpu))
@@ -2528 +2557 @@
     return true;
 #else
-    PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
+    PVMCC pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
     if (pVM)
     {
-        PVMCPU pVCpu = VMMGetCpu(pVM);
+        PVMCPUCC pVCpu = VMMGetCpu(pVM);
 
         if (pVCpu)
@@ -2578 +2607 @@
      * To the global VMM buffer.
      */
-    PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
+    PVMCC pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
     if (pVM)
         RTStrPrintf(pVM->vmm.s.szRing0AssertMsg1, sizeof(pVM->vmm.s.szRing0AssertMsg1),
@@ -2641 +2670 @@
      * Push it to the global VMM buffer.
      */
-    PVM pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
+    PVMCC pVM = GVMMR0GetVMByEMT(NIL_RTNATIVETHREAD);
     if (pVM)
     {

trunk/src/VBox/VMM/VMMRZ/CPUMRZ.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_CPUM
 #include <VBox/vmm/cpum.h>

trunk/src/VBox/VMM/VMMRZ/DBGFRZ.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
 #define LOG_GROUP LOG_GROUP_DBGF
 #include <VBox/vmm/dbgf.h>
@@ -28 +29 @@
 #include <VBox/log.h>
 #include "DBGFInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/err.h>
 #include <iprt/assert.h>

trunk/src/VBox/VMM/VMMRZ/VMMRZ.cpp

@@ -20 +20 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define VBOX_BUGREF_9217_PART_I
+#define LOG_GROUP LOG_GROUP_VMM
 #include <VBox/vmm/vmm.h>
 #include "VMMInternal.h"
-#include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmcc.h>
 #include <VBox/err.h>
 
@@ -44 +46 @@
  * @param   uArg            The argument to the operation.
  */
-VMMRZDECL(int) VMMRZCallRing3(PVM pVM, PVMCPU pVCpu, VMMCALLRING3 enmOperation, uint64_t uArg)
+VMMRZDECL(int) VMMRZCallRing3(PVMCC pVM, PVMCPUCC pVCpu, VMMCALLRING3 enmOperation, uint64_t uArg)
 {
     VMCPU_ASSERT_EMT(pVCpu);
@@ -116 +118 @@
  * @param   uArg            The argument to the operation.
  */
-VMMRZDECL(int) VMMRZCallRing3NoCpu(PVM pVM, VMMCALLRING3 enmOperation, uint64_t uArg)
+VMMRZDECL(int) VMMRZCallRing3NoCpu(PVMCC pVM, VMMCALLRING3 enmOperation, uint64_t uArg)
 {
     return VMMRZCallRing3(pVM, VMMGetCpu(pVM), enmOperation, uArg);
@@ -128 +130 @@
  * @thread  EMT.
  */
-VMMRZDECL(void) VMMRZCallRing3Disable(PVMCPU pVCpu)
+VMMRZDECL(void) VMMRZCallRing3Disable(PVMCPUCC pVCpu)
 {
     VMCPU_ASSERT_EMT(pVCpu);
@@ -164 +166 @@
  * @thread  EMT.
  */
-VMMRZDECL(void) VMMRZCallRing3Enable(PVMCPU pVCpu)
+VMMRZDECL(void) VMMRZCallRing3Enable(PVMCPUCC pVCpu)
 {
     VMCPU_ASSERT_EMT(pVCpu);
@@ -198 +200 @@
  * @param   pVCpu               The cross context virtual CPU structure of the calling EMT.
  */
-VMMRZDECL(bool) VMMRZCallRing3IsEnabled(PVMCPU pVCpu)
+VMMRZDECL(bool) VMMRZCallRing3IsEnabled(PVMCPUCC pVCpu)
 {
     VMCPU_ASSERT_EMT(pVCpu);
@@ -215 +217 @@
  * @return VBox status code.
  */
-VMMRZDECL(int) VMMRZCallRing3SetNotification(PVMCPU pVCpu, R0PTRTYPE(PFNVMMR0CALLRING3NOTIFICATION) pfnCallback, RTR0PTR pvUser)
+VMMRZDECL(int) VMMRZCallRing3SetNotification(PVMCPUCC pVCpu, R0PTRTYPE(PFNVMMR0CALLRING3NOTIFICATION) pfnCallback, RTR0PTR pvUser)
 {
     AssertPtrReturn(pVCpu, VERR_INVALID_POINTER);
@@ -234 +236 @@
  * @param   pVCpu   The cross context virtual CPU structure.
  */
-VMMRZDECL(void) VMMRZCallRing3RemoveNotification(PVMCPU pVCpu)
+VMMRZDECL(void) VMMRZCallRing3RemoveNotification(PVMCPUCC pVCpu)
 {
     pVCpu->vmm.s.pfnCallRing3CallbackR0 = NULL;
@@ -246 +248 @@
  * @returns true if there the notification is active, false otherwise.
  */
-VMMRZDECL(bool) VMMRZCallRing3IsNotificationSet(PVMCPU pVCpu)
+VMMRZDECL(bool) VMMRZCallRing3IsNotificationSet(PVMCPUCC pVCpu)
 {
     return pVCpu->vmm.s.pfnCallRing3CallbackR0 != NULL;

trunk/src/VBox/VMM/include/HMInternal.h

@@ -675 +675 @@
  * @param   pVCpu       Pointer to the cross context per-CPU structure.
  */
-typedef DECLCALLBACK(int) FNHMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVM pVM, PVMCPU pVCpu);
+typedef DECLCALLBACK(int) FNHMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, void *pvUnused, PVMCC pVM, PVMCPUCC pVCpu);
 /** Pointer to a VMX StartVM function. */
 typedef R0PTRTYPE(FNHMVMXSTARTVM *) PFNHMVMXSTARTVM;
 
 /** SVM VMRun function. */
-typedef DECLCALLBACK(int) FNHMSVMVMRUN(RTHCPHYS pVmcbHostPhys, RTHCPHYS pVmcbPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
+typedef DECLCALLBACK(int) FNHMSVMVMRUN(RTHCPHYS pVmcbHostPhys, RTHCPHYS pVmcbPhys, PCPUMCTX pCtx, PVMCC pVM, PVMCPUCC pVCpu);
 /** Pointer to a SVM VMRun function. */
 typedef R0PTRTYPE(FNHMSVMVMRUN *) PFNHMSVMVMRUN;

trunk/src/VBox/VMM/include/NEMInternal.h

@@ -361 +361 @@
     /** Hypercall input/ouput page. */
     NEMR0HYPERCALLDATA          HypercallData;
+#  ifdef VBOX_BUGREF_9217
+    /** Delta to add to convert a ring-0 pointer to a ring-3 one.   */
+    uintptr_t                   offRing3ConversionDelta;
+#  endif
 # else
     uint32_t                    uDummy;
@@ -376 +380 @@
     /** I/O control context. */
     PSUPR0IOCTLCTX              pIoCtlCtx;
+# ifndef VBOX_BUGREF_9217
     /** Delta to add to convert a ring-0 pointer to a ring-3 one.   */
     uintptr_t                   offRing3ConversionDelta;
+# endif
     /** Info about the VidGetHvPartitionId I/O control interface. */
     NEMWINIOCTL                 IoCtlGetHvPartitionId;

trunk/src/VBox/VMM/include/PDMInternal.h

@@ -148 +148 @@
 
     /** R0 pointer to the VM this instance was created for. */
-    PVMR0                           pVMR0;
+    R0PTRTYPE(PVMCC)                pVMR0;
     /** Associated PCI device list head (first is default). (R0 ptr) */
     R0PTRTYPE(PPDMPCIDEV)           pHeadPciDevR0;
@@ -244 +244 @@
     PVMR3                           pVMR3;
     /** Pointer to the VM this instance was created for, ring-0 context. */
-    PVMR0                           pVMR0;
+    R0PTRTYPE(PVMCC)                pVMR0;
     /** Pointer to the VM this instance was created for, raw-mode context. */
     PVMRC                           pVMRC;

trunk/src/VBox/VMM/include/VMMInternal.h

@@ -75 +75 @@
 {
     /** Pointer to Pointer to the VM. */
-    R0PTRTYPE(PVM)              pVM;
+    R0PTRTYPE(PVMCC)            pVM;
     /** Size of the allocated logger instance (Logger). */
     uint32_t                    cbLogger;