VirtualBox

Changeset 80943 in vbox for trunk/include/VBox/vmm


Ignore:
Timestamp:
Sep 23, 2019 9:36:14 AM (5 years ago)
Author:
vboxsync
Message:

Devices/PCI: Device model refactoring, part I. bugref:9218

Location:
trunk/include/VBox/vmm
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/gvm.h

    r80641 r80943  
    202202        struct PDMR0PERVM   s;
    203203#endif
    204         uint8_t             padding[1536];
     204        uint8_t             padding[1792];
    205205    } pdmr0;
    206206
     
    215215    /** Padding so aCpus starts on a page boundrary.  */
    216216#ifdef VBOX_WITH_NEM_R0
    217     uint8_t         abPadding2[4096 - 64 - 256 - 512 - 256 - 64 - 1536 - 256 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
    218 #else
    219     uint8_t         abPadding2[4096 - 64 - 256 - 512       - 64 - 1536 - 256 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
     217    uint8_t         abPadding2[4096 - 64 - 256 - 512 - 256 - 64 - 1792 - 256 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
     218#else
     219    uint8_t         abPadding2[4096 - 64 - 256 - 512       - 64 - 1792 - 256 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
    220220#endif
    221221
  • trunk/include/VBox/vmm/pdmdev.h

    r80722 r80943  
    806806 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
    807807 */
    808 typedef struct PDMPCIBUSREG
    809 {
    810     /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
     808typedef struct PDMPCIBUSREGR3
     809{
     810    /** Structure version number. PDM_PCIBUSREGR3_VERSION defines the current version. */
    811811    uint32_t            u32Version;
    812812
     
    868868
    869869    /**
    870      * Register PCI configuration space read/write callbacks.
     870     * Register PCI configuration space read/write intercept callbacks.
    871871     *
    872872     * @param   pDevIns         Device instance of the PCI Bus.
    873873     * @param   pPciDev         The PCI device structure.
    874874     * @param   pfnRead         Pointer to the user defined PCI config read function.
    875      * @param   ppfnReadOld     Pointer to function pointer which will receive the old (default)
    876      *                          PCI config read function. This way, user can decide when (and if)
    877      *                          to call default PCI config read function. Can be NULL.
    878875     * @param   pfnWrite        Pointer to the user defined PCI config write function.
    879      * @param   ppfnWriteOld    Pointer to function pointer which will receive the old (default)
    880      *                          PCI config write function. This way, user can decide when (and if)
    881876     *                          to call default PCI config write function. Can be NULL.
    882877     * @remarks Caller enters the PDM critical section.
    883878     * @thread  EMT
    884879     */
    885     DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
    886                                                         PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    887                                                         PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
     880    DECLR3CALLBACKMEMBER(void, pfnInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     881                                                           PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite));
     882
     883    /**
     884     * Perform a PCI configuration space write, bypassing interception.
     885     *
     886     * This is for devices that make use of PDMDevHlpPCIInterceptConfigAccesses().
     887     *
     888     * @returns Strict VBox status code (mainly DBGFSTOP).
     889     * @param   pDevIns         Device instance of the PCI Bus.
     890     * @param   pPciDev         The PCI device which config space is being read.
     891     * @param   uAddress        The config space address.
     892     * @param   cb              The size of the read: 1, 2 or 4 bytes.
     893     * @param   u32Value        The value to write.
     894     * @note    The caller (PDM) does not enter the PDM critsect, but it is possible
     895     *          that the (root) bus will have done that already.
     896     */
     897    DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     898                                                       uint32_t uAddress, unsigned cb, uint32_t u32Value));
     899
     900    /**
     901     * Perform a PCI configuration space read, bypassing interception.
     902     *
     903     * This is for devices that make use of PDMDevHlpPCIInterceptConfigAccesses().
     904     *
     905     * @returns Strict VBox status code (mainly DBGFSTOP).
     906     * @param   pDevIns         Device instance of the PCI Bus.
     907     * @param   pPciDev         The PCI device which config space is being read.
     908     * @param   uAddress        The config space address.
     909     * @param   cb              The size of the read: 1, 2 or 4 bytes.
     910     * @param   pu32Value       Where to return the value.
     911     * @note    The caller (PDM) does not enter the PDM critsect, but it is possible
     912     *          that the (root) bus will have done that already.
     913     */
     914    DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     915                                                      uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
    888916
    889917    /**
     
    899927    DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
    900928
    901     /** The name of the SetIrq RC entry point. */
    902     const char         *pszSetIrqRC;
    903 
    904     /** The name of the SetIrq R0 entry point. */
    905     const char         *pszSetIrqR0;
    906 
    907 } PDMPCIBUSREG;
     929    /** Marks the end of the structure with PDM_PCIBUSREGR3_VERSION. */
     930    uint32_t            u32EndVersion;
     931} PDMPCIBUSREGR3;
    908932/** Pointer to a PCI bus registration structure. */
    909 typedef PDMPCIBUSREG *PPDMPCIBUSREG;
    910 
    911 /** Current PDMPCIBUSREG version number. */
    912 #define PDM_PCIBUSREG_VERSION                   PDM_VERSION_MAKE(0xfffe, 7, 0)
     933typedef PDMPCIBUSREGR3 *PPDMPCIBUSREGR3;
     934/** Current PDMPCIBUSREGR3 version number. */
     935#define PDM_PCIBUSREGR3_VERSION                 PDM_VERSION_MAKE(0xff86, 1, 0)
     936
     937/**
     938 * PCI Bus registration structure for ring-0.
     939 */
     940typedef struct PDMPCIBUSREGR0
     941{
     942    /** Structure version number. PDM_PCIBUSREGR0_VERSION defines the current version. */
     943    uint32_t            u32Version;
     944    /** The PCI bus number (from ring-3 registration). */
     945    uint32_t            iBus;
     946    /**
     947     * Set the IRQ for a PCI device.
     948     *
     949     * @param   pDevIns         Device instance of the PCI Bus.
     950     * @param   pPciDev         The PCI device structure.
     951     * @param   iIrq            IRQ number to set.
     952     * @param   iLevel          IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
     953     * @param   uTagSrc         The IRQ tag and source (for tracing).
     954     * @remarks Caller enters the PDM critical section.
     955     */
     956    DECLR0CALLBACKMEMBER(void, pfnSetIrq,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
     957    /** Marks the end of the structure with PDM_PCIBUSREGR0_VERSION. */
     958    uint32_t            u32EndVersion;
     959} PDMPCIBUSREGR0;
     960/** Pointer to a PCI bus ring-0 registration structure. */
     961typedef PDMPCIBUSREGR0 *PPDMPCIBUSREGR0;
     962/** Current PDMPCIBUSREGR0 version number. */
     963#define PDM_PCIBUSREGR0_VERSION                  PDM_VERSION_MAKE(0xff87, 1, 0)
     964
     965/**
     966 * PCI Bus registration structure for raw-mode.
     967 */
     968typedef struct PDMPCIBUSREGRC
     969{
     970    /** Structure version number. PDM_PCIBUSREGRC_VERSION defines the current version. */
     971    uint32_t            u32Version;
     972    /** The PCI bus number (from ring-3 registration). */
     973    uint32_t            iBus;
     974    /**
     975     * Set the IRQ for a PCI device.
     976     *
     977     * @param   pDevIns         Device instance of the PCI Bus.
     978     * @param   pPciDev         The PCI device structure.
     979     * @param   iIrq            IRQ number to set.
     980     * @param   iLevel          IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
     981     * @param   uTagSrc         The IRQ tag and source (for tracing).
     982     * @remarks Caller enters the PDM critical section.
     983     */
     984    DECLRCCALLBACKMEMBER(void, pfnSetIrq,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
     985    /** Marks the end of the structure with PDM_PCIBUSREGRC_VERSION. */
     986    uint32_t            u32EndVersion;
     987} PDMPCIBUSREGRC;
     988/** Pointer to a PCI bus raw-mode registration structure. */
     989typedef PDMPCIBUSREGRC *PPDMPCIBUSREGRC;
     990/** Current PDMPCIBUSREGRC version number. */
     991#define PDM_PCIBUSREGRC_VERSION                  PDM_VERSION_MAKE(0xff88, 1, 0)
     992
     993/** PCI bus registration structure for the current context. */
     994typedef CTX_SUFF(PDMPCIBUSREG)  PDMPCIBUSREGCC;
     995/** Pointer to a PCI bus registration structure for the current context. */
     996typedef CTX_SUFF(PPDMPCIBUSREG) PPDMPCIBUSREGCC;
     997/** PCI bus registration structure version for the current context. */
     998#define PDM_PCIBUSREGCC_VERSION CTX_MID(PDM_PCIBUSREG,_VERSION)
     999
    9131000
    9141001/**
     
    33743461     * Register PCI configuration space read/write callbacks.
    33753462     *
     3463     * @returns VBox status code.
    33763464     * @param   pDevIns             The device instance.
    33773465     * @param   pPciDev             The PCI device structure.  If NULL the default
    33783466     *                              PCI device for this device instance is used.
    33793467     * @param   pfnRead             Pointer to the user defined PCI config read function.
    3380      * @param   ppfnReadOld         Pointer to function pointer which will receive the old (default)
    3381      *                              PCI config read function. This way, user can decide when (and if)
    33823468     *                              to call default PCI config read function. Can be NULL.
    33833469     * @param   pfnWrite            Pointer to the user defined PCI config write function.
    3384      * @param   ppfnWriteOld        Pointer to function pointer which will receive
    3385      *                              the old (default) PCI config write function.
    3386      *                              This way, user can decide when (and if) to call
    3387      *                              default PCI config write function. Can be NULL.
    33883470     * @remarks The callbacks will be invoked holding the PDM lock. The device lock
    33893471     *          is NOT take because that is very likely be a lock order violation.
    3390      * @thread  EMT
    3391      */
    3392     DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
    3393                                                          PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    3394                                                          PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
     3472     * @thread  EMT(0)
     3473     * @note    Only callable during VM creation.
     3474     * @sa      PDMDevHlpPCIConfigRead, PDMDevHlpPCIConfigWrite
     3475     */
     3476    DECLR3CALLBACKMEMBER(int, pfnPCIInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     3477                                                             PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite));
     3478
     3479    /**
     3480     * Perform a PCI configuration space write.
     3481     *
     3482     * This is for devices that make use of PDMDevHlpPCIInterceptConfigAccesses().
     3483     *
     3484     * @returns Strict VBox status code (mainly DBGFSTOP).
     3485     * @param   pDevIns             The device instance.
     3486     * @param   pPciDev             The PCI device which config space is being read.
     3487     * @param   uAddress            The config space address.
     3488     * @param   cb                  The size of the read: 1, 2 or 4 bytes.
     3489     * @param   u32Value            The value to write.
     3490     */
     3491    DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnPCIConfigWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     3492                                                          uint32_t uAddress, unsigned cb, uint32_t u32Value));
     3493
     3494    /**
     3495     * Perform a PCI configuration space read.
     3496     *
     3497     * This is for devices that make use of PDMDevHlpPCIInterceptConfigAccesses().
     3498     *
     3499     * @returns Strict VBox status code (mainly DBGFSTOP).
     3500     * @param   pDevIns             The device instance.
     3501     * @param   pPciDev             The PCI device which config space is being read.
     3502     * @param   uAddress            The config space address.
     3503     * @param   cb                  The size of the read: 1, 2 or 4 bytes.
     3504     * @param   pu32Value           Where to return the value.
     3505     */
     3506    DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnPCIConfigRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     3507                                                         uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
    33953508
    33963509    /**
     
    36713784     * @param   piBus               Where to return the PDM bus number. Optional.
    36723785     */
    3673     DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg,
    3674                                                  PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus));
     3786    DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREGR3 pPciBusReg,
     3787                                                 PCPDMPCIHLPR3 *ppPciHlp, uint32_t *piBus));
    36753788
    36763789    /**
     
    45784691     */
    45794692    DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
     4693
     4694    /**
     4695     * Sets up the PCI bus for the raw-mode context.
     4696     *
     4697     * This must be called after ring-3 has registered the PCI bus using
     4698     * PDMDevHlpPCIBusRegister().
     4699     *
     4700     * @returns VBox status code.
     4701     * @param   pDevIns     The device instance.
     4702     * @param   pPciBusReg  The PCI bus registration information for raw-mode,
     4703     *                      considered volatile.
     4704     * @param   ppPciHlp    Where to return the raw-mode PCI bus helpers.
     4705     */
     4706    DECLRCCALLBACKMEMBER(int, pfnPCIBusSetUpContext,(PPDMDEVINS pDevIns, PPDMPCIBUSREGRC pPciBusReg, PCPDMPCIHLPRC *ppPciHlp));
    45804707
    45814708    /** Space reserved for future members.
     
    49515078    DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
    49525079
     5080    /**
     5081     * Sets up the PCI bus for the ring-0 context.
     5082     *
     5083     * This must be called after ring-3 has registered the PCI bus using
     5084     * PDMDevHlpPCIBusRegister().
     5085     *
     5086     * @returns VBox status code.
     5087     * @param   pDevIns     The device instance.
     5088     * @param   pPciBusReg  The PCI bus registration information for ring-0,
     5089     *                      considered volatile.
     5090     * @param   ppPciHlp    Where to return the ring-0 PCI bus helpers.
     5091     */
     5092    DECLR0CALLBACKMEMBER(int, pfnPCIBusSetUpContext,(PPDMDEVINS pDevIns, PPDMPCIBUSREGR0 pPciBusReg, PCPDMPCIHLPR0 *ppPciHlp));
     5093
    49535094    /** Space reserved for future members.
    49545095     * @{ */
     
    52245365                              ("DevIns=%#x  mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
    52255366                              VERR_PDM_DEVINS_VERSION_MISMATCH); \
    5226         AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
    5227                               ("DevHlp=%#x  mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
    5228                               VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
     5367        AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->CTX_SUFF(pHlp)->u32Version, CTX_MID(PDM_DEVHLP,_VERSION)), \
     5368                              ("DevHlp=%#x  mine=%#x\n", (pDevIns)->CTX_SUFF(pHlp)->u32Version, CTX_MID(PDM_DEVHLP,_VERSION)), \
     5369                              VERR_PDM_DEVHLP_VERSION_MISMATCH); \
    52295370    } while (0)
    52305371
     
    52435384        if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
    52445385        { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
    5245         if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
    5246         { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
     5386        if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->CTX_SUFF(pHlp)->u32Version, CTX_MID(PDM_DEVHLP,_VERSION)) )) \
     5387        { /* likely */ } else return VERR_PDM_DEVHLP_VERSION_MISMATCH; \
    52475388    } while (0)
    52485389
     
    63106451
    63116452/**
    6312  * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
    6313  */
    6314 DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
    6315                                                 PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    6316                                                 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
    6317 {
    6318     pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
     6453 * @copydoc PDMDEVHLPR3::pfnPCIInterceptConfigAccesses
     6454 */
     6455DECLINLINE(int) PDMDevHlpPCIInterceptConfigAccesses(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     6456                                                    PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite)
     6457{
     6458    return pDevIns->pHlpR3->pfnPCIInterceptConfigAccesses(pDevIns, pPciDev, pfnRead, pfnWrite);
     6459}
     6460
     6461/**
     6462 * @copydoc PDMDEVHLPR3::pfnPCIConfigRead
     6463 */
     6464DECLINLINE(VBOXSTRICTRC) PDMDevHlpPCIConfigRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress,
     6465                                                unsigned cb, uint32_t *pu32Value)
     6466{
     6467    return pDevIns->pHlpR3->pfnPCIConfigRead(pDevIns, pPciDev, uAddress, cb, pu32Value);
     6468}
     6469
     6470/**
     6471 * @copydoc PDMDEVHLPR3::pfnPCIConfigWrite
     6472 */
     6473DECLINLINE(VBOXSTRICTRC) PDMDevHlpPCIConfigWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress,
     6474                                                 unsigned cb, uint32_t u32Value)
     6475{
     6476    return pDevIns->pHlpR3->pfnPCIConfigWrite(pDevIns, pPciDev, uAddress, cb, u32Value);
    63196477}
    63206478
     
    66646822 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
    66656823 */
    6666 DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus)
    6667 {
    6668     return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3, piBus);
     6824DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREGR3 pPciBusReg, PCPDMPCIHLPR3 *ppPciHlp, uint32_t *piBus)
     6825{
     6826    return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlp, piBus);
    66696827}
    66706828
     
    68136971}
    68146972
    6815 #endif /* IN_RING3 */
     6973#else  /* !IN_RING3 */
     6974
     6975/**
     6976 * @copydoc PDMDEVHLPR0::pfnPCIBusSetUp
     6977 */
     6978DECLINLINE(int) PDMDevHlpPCIBusSetUpContext(PPDMDEVINS pDevIns, CTX_SUFF(PPDMPCIBUSREG) pPciBusReg, CTX_SUFF(PCPDMPCIHLP) *ppPciHlp)
     6979{
     6980    return pDevIns->CTX_SUFF(pHlp)->pfnPCIBusSetUpContext(pDevIns, pPciBusReg, ppPciHlp);
     6981}
     6982
     6983#endif /* !IN_RING3 */
    68166984
    68176985/**
  • trunk/include/VBox/vmm/pdmpcidev.h

    r77299 r80943  
    4040
    4141/**
    42  * Callback function for reading from the PCI configuration space.
    43  *
    44  * @returns The register value.
     42 * Callback function for intercept reading from the PCI configuration space.
     43 *
     44 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
     45 * @retval  VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
     46 *          PDMDevHlpPCIConfigRead()).
     47 *
    4548 * @param   pDevIns         Pointer to the device instance the PCI device
    4649 *                          belongs to.
     
    4851 * @param   uAddress        The configuration space register address. [0..4096]
    4952 * @param   cb              The register size. [1,2,4]
     53 * @param   pu32Value       Where to return the register value.
    5054 *
    5155 * @remarks Called with the PDM lock held.  The device lock is NOT take because
    5256 *          that is very likely be a lock order violation.
    5357 */
    54 typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress, unsigned cb);
     58typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
     59                                                   uint32_t uAddress, unsigned cb, uint32_t *pu32Value);
    5560/** Pointer to a FNPCICONFIGREAD() function. */
    5661typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
     
    6166 * Callback function for writing to the PCI configuration space.
    6267 *
    63  * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status.
     68 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
     69 * @retval  VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
     70 *          PDMDevHlpPCIConfigWrite()).
    6471 *
    6572 * @param   pDevIns         Pointer to the device instance the PCI device
     
    6774 * @param   pPciDev         Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
    6875 * @param   uAddress        The configuration space register address. [0..4096]
     76 * @param   cb              The register size. [1,2,4]
    6977 * @param   u32Value        The value that's being written. The number of bits actually used from
    7078 *                          this value is determined by the cb parameter.
    71  * @param   cb              The register size. [1,2,4]
    7279 *
    7380 * @remarks Called with the PDM lock held.  The device lock is NOT take because
     
    7582 */
    7683typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
    77                                                     uint32_t uAddress, uint32_t u32Value, unsigned cb);
     84                                                    uint32_t uAddress, unsigned cb, uint32_t u32Value);
    7885/** Pointer to a FNPCICONFIGWRITE() function. */
    7986typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
  • trunk/include/VBox/vmm/pdmpcidevint.h

    r80722 r80943  
    6363 * Callback function for reading from the PCI configuration space.
    6464 *
    65  * @returns The register value.
     65 * @returns Strict VBox status code.
    6666 * @param   pDevIns         Pointer to the device instance of the PCI bus.
    6767 * @param   iBus            The bus number this device is on.
     
    6969 * @param   u32Address      The configuration space register address. [0..255]
    7070 * @param   cb              The register size. [1,2,4]
    71  */
    72 typedef DECLCALLBACK(uint32_t) FNPCIBRIDGECONFIGREAD(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, unsigned cb);
     71 * @param   pu32Value       Where to return the register value.
     72 */
     73typedef DECLCALLBACK(VBOXSTRICTRC) FNPCIBRIDGECONFIGREAD(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice,
     74                                                         uint32_t u32Address, unsigned cb, uint32_t *pu32Value);
    7375/** Pointer to a FNPCICONFIGREAD() function. */
    7476typedef FNPCIBRIDGECONFIGREAD *PFNPCIBRIDGECONFIGREAD;
     
    7981 * Callback function for writing to the PCI configuration space.
    8082 *
     83 * @returns Strict VBox status code.
    8184 * @param   pDevIns         Pointer to the device instance of the PCI bus.
    8285 * @param   iBus            The bus number this device is on.
    8386 * @param   iDevice         The number of the device on the bus.
    8487 * @param   u32Address      The configuration space register address. [0..255]
     88 * @param   cb              The register size. [1,2,4]
    8589 * @param   u32Value        The value that's being written. The number of bits actually used from
    8690 *                          this value is determined by the cb parameter.
    87  * @param   cb              The register size. [1,2,4]
    88  */
    89 typedef DECLCALLBACK(void) FNPCIBRIDGECONFIGWRITE(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, uint32_t u32Value, unsigned cb);
     91 */
     92typedef DECLCALLBACK(VBOXSTRICTRC) FNPCIBRIDGECONFIGWRITE(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice,
     93                                                          uint32_t u32Address, unsigned cb, uint32_t u32Value);
    9094/** Pointer to a FNPCICONFIGWRITE() function. */
    9195typedef FNPCIBRIDGECONFIGWRITE *PFNPCIBRIDGECONFIGWRITE;
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