Changeset 8454 in vbox

Timestamp:

Apr 29, 2008 11:31:44 AM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

30316

Message:

Long mode changes

Location:

trunk/src/VBox/VMM

Files:

• PGM.cpp (modified) (2 diffs)
• PGMInternal.h (modified) (2 diffs)
• VMMAll/PGMAllGst.h (modified) (5 diffs)
• VMMAll/PGMAllPool.cpp (modified) (1 diff)
• testcase/tstVMStructGC.cpp (modified) (1 diff)

trunk/src/VBox/VMM/PGM.cpp

@@ -1537 +1537 @@
     GCPtr += PAGE_SIZE; /* reserved page */
 
-    rc = PGMMap(pVM, GCPtr, pVM->pgm.s.HCPhysPaePML4, PAGE_SIZE, 0);
-    AssertRCReturn(rc, rc);
-    pVM->pgm.s.pGCPaePML4 = GCPtr;
-    GCPtr += PAGE_SIZE;
-    GCPtr += PAGE_SIZE; /* reserved page */
-
 
     /*
@@ -1600 +1594 @@
     pVM->pgm.s.pGstPaePDPTGC += offDelta;
     pVM->pgm.s.pGCPaePDPT    += offDelta;
-    pVM->pgm.s.pGCPaePML4    += offDelta;
 
     pgmR3ModeDataInit(pVM, true /* resolve GC/R0 symbols */);

trunk/src/VBox/VMM/PGMInternal.h

@@ -1978 +1978 @@
      * @{ */
     /** The Page Map Level 4 table - HC Ptr. */
-    GCPTRTYPE(PX86PML4)         pGCPaePML4;
-    /** The Page Map Level 4 table - GC Ptr. */
     R3R0PTRTYPE(PX86PML4)       pHCPaePML4;
     /** The Physical Address (HC) of the Page Map Level 4 table. */
@@ -3319 +3317 @@
 }
 
+#ifndef IN_GC
+/**
+ * Gets the page directory entry for the specified address.
+ *
+ * @returns The page directory entry in question.
+ * @returns A non-present entry if the page directory is not present or on an invalid page.
+ * @param   pPGM        Pointer to the PGM instance data.
+ * @param   GCPtr       The address.
+ * @param   ppPml4e     Page Map Level-4 Entry (out)
+ * @param   pPdpe       Page directory pointer table entry (out)
+ */
+DECLINLINE(uint64_t) pgmGstGetLongModePDE(PPGM pPGM, RTGCUINTPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPE pPdpe)
+{
+    const unsigned iPml4e = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK;
+
+    *ppPml4e = &pPGM->pHCPaePML4->a[iPml4e];
+    if ((*ppPml4e)->n.u1Present)
+    {
+        PX86PDPT pPdptTemp;
+        int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), (*ppPml4e)->u & X86_PML4E_PG_MASK, &pPdptTemp);
+        if (VBOX_FAILURE(rc))
+        {
+            AssertFailed();
+            return 0ULL;
+        }
+
+        const unsigned iPdPt  = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
+        *pPdpe = pPdptTemp->a[iPdPt];
+        if (pPdpe->n.u1Present)
+        {
+            PX86PDPAE pPD;
+
+            rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), pPdpe->u & X86_PDPE_PG_MASK, &pPD);
+            if (VBOX_FAILURE(rc))
+            {
+                AssertFailed();
+                return 0ULL;
+            }
+            const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
+            return pPD->a[iPD].u;
+        }
+    }
+    return 0ULL;
+}
+
+/**
+ * Gets the page directory entry for the specified address.
+ *
+ * @returns The page directory entry in question.
+ * @returns A non-present entry if the page directory is not present or on an invalid page.
+ * @param   pPGM        Pointer to the PGM instance data.
+ * @param   GCPtr       The address.
+ */
+DECLINLINE(uint64_t) pgmGstGetLongModePDE(PPGM pPGM, RTGCUINTPTR64 GCPtr)
+{
+    const unsigned iPml4e = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK;
+
+    if (pPGM->pHCPaePML4->a[iPml4e].n.u1Present)
+    {
+        PX86PDPT pPdptTemp;
+        int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), pPGM->pHCPaePML4->a[iPml4e].u & X86_PML4E_PG_MASK, &pPdptTemp);
+        if (VBOX_FAILURE(rc))
+        {
+            AssertFailed();
+            return 0ULL;
+        }
+
+        const unsigned iPdPt  = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
+        if (pPdptTemp->a[iPdPt].n.u1Present)
+        {
+            PX86PDPAE pPD;
+
+            rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), pPdptTemp->a[iPdPt].u & X86_PDPE_PG_MASK, &pPD);
+            if (VBOX_FAILURE(rc))
+            {
+                AssertFailed();
+                return 0ULL;
+            }
+            const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
+            return pPD->a[iPD].u;
+        }
+    }
+    return 0ULL;
+}
+#endif /* !IN_GC */
 
 /**

trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

@@ -154 +154 @@
     return VINF_SUCCESS;
 
-#elif PGM_GST_TYPE == PGM_TYPE_AMD64
-    /* later */
-    /* check level 3 & 4 bits as well (r/w, u/s, nxe) */
-    AssertFailed();
-    return VERR_NOT_IMPLEMENTED;
-
-#elif PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
+#elif PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64
 
     /*
@@ -167 +161 @@
 # if PGM_GST_TYPE == PGM_TYPE_32BIT
     const X86PDE Pde = CTXSUFF(pVM->pgm.s.pGuestPD)->a[GCPtr >> X86_PD_SHIFT];
-# else /* PAE */
+#elif PGM_GST_TYPE == PGM_TYPE_PAE
     X86PDEPAE    Pde;
     bool         fNoExecuteBitValid = !!(CPUMGetGuestEFER(pVM) & MSR_K6_EFER_NXE);
@@ -175 +169 @@
      */
     Pde.u = pgmGstGetPaePDE(&pVM->pgm.s, GCPtr);
+#elif PGM_GST_TYPE == PGM_TYPE_AMD64
+    PX86PML4E    pPml4e;
+    X86PDPE      Pdpe;
+    X86PDEPAE    Pde;
+    bool         fNoExecuteBitValid = !!(CPUMGetGuestEFER(pVM) & MSR_K6_EFER_NXE);
+
+    Pde.u = pgmGstGetLongModePDE(&pVM->pgm.s, GCPtr, &pPml4e, &Pdpe);
+    Assert(pPml4e);
+    if (!(pPml4e->n.u1Present & Pdpe.n.u1Present))
+        return VERR_PAGE_TABLE_NOT_PRESENT;
+
+    /* Merge accessed, write, user and no-execute bits into the PDE. */
+    Pde.n.u1Accessed  &= pPml4e->n.u1Accessed & Pdpe.n.u1Accessed;
+    Pde.n.u1Write     &= pPml4e->n.u1Write & Pdpe.n.u1Write;
+    Pde.n.u1User      &= pPml4e->n.u1User & Pdpe.n.u1User;
+    Pde.n.u1NoExecute &= pPml4e->n.u1NoExecute& Pdpe.n.u1NoExecute;
 # endif
 
@@ -358 +368 @@
  || PGM_GST_TYPE == PGM_TYPE_AMD64
 
-#if PGM_GST_TYPE == PGM_TYPE_AMD64
-    /* later */
-    AssertFailed();
-    return VERR_NOT_IMPLEMENTED;
-#endif
-
 # if PGM_GST_TYPE == PGM_TYPE_32BIT
     X86PDE    Pde;
     Pde   = CTXSUFF(pVM->pgm.s.pGuestPD)->a[GCPtr >> GST_PD_SHIFT];
-# else
+# elif PGM_GST_TYPE == PGM_TYPE_PAE
     X86PDEPAE Pde;
     Pde.u = pgmGstGetPaePDE(&pVM->pgm.s, GCPtr);
+# elif PGM_GST_TYPE == PGM_TYPE_AMD64
+    X86PDEPAE    Pde;
+    Pde.u = pgmGstGetLongModePDE(&pVM->pgm.s, GCPtr);
 # endif
 
@@ -720 +727 @@
 #if PGM_GST_TYPE == PGM_TYPE_32BIT
         X86PDE      Pde = pPDSrc->a[GCPtr >> X86_PD_SHIFT];
-#else
+#elif PGM_GST_TYPE == PGM_TYPE_PAE
         X86PDEPAE   Pde;
         Pde.u = pgmGstGetPaePDE(&pState->pVM->pgm.s, GCPtr);
+#elif PGM_GST_TYPE == PGM_TYPE_AMD64
+        X86PDEPAE    Pde;
+        Pde.u = pgmGstGetLongModePDE(&pVM->pgm.s, GCPtr);
 #endif
         if (Pde.n.u1Present)

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -122 +122 @@
         case PGMPOOL_IDX_PDPT:
             return pVM->pgm.s.pGCPaePDPT;
-        case PGMPOOL_IDX_PML4:
-            return pVM->pgm.s.pGCPaePML4;
         default:
             AssertReleaseMsgFailed(("Invalid index %d\n", pPage->idx));

trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

@@ -394 +394 @@
     GEN_CHECK_OFF(PGM, HCPhysPaePDPT);
     GEN_CHECK_OFF(PGM, pHCPaePML4);
-    GEN_CHECK_OFF(PGM, pGCPaePML4);
     GEN_CHECK_OFF(PGM, HCPhysPaePML4);
     GEN_CHECK_OFF(PGM, pfnR3ShwRelocate);