Changeset 87504 in vbox for trunk/src/VBox/VMM/include

Timestamp:

Feb 1, 2021 3:12:21 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

142528

Message:

VMM/HMSVM: Moving more stuff to HMR0PERVCPU. bugref:9217

Location:

trunk/src/VBox/VMM/include

Files:

• HMInternal.h (modified) (3 diffs)
• HMInternal.mac (modified) (2 diffs)

trunk/src/VBox/VMM/include/HMInternal.h

@@ -1018 +1018 @@
     struct HMCPUSVM
     {
-        /** Whether VTPR with V_INTR_MASKING set is in effect, indicating
-         *  we should check if the VTPR changed on every VM-exit. */
-        bool                        fSyncVTpr;
         /** Whether to emulate long mode support for sysenter/sysexit like intel CPUs
          *  does.   This means intercepting \#UD to emulate the instructions in
@@ -1026 +1023 @@
          *  preserve the upper 32 bits written to them (AMD will ignore and discard). */
         bool                        fEmulateLongModeSysEnterExit;
-        uint8_t                     au8Alignment0[6];
-
-        /** Host's TSC_AUX MSR (used when RDTSCP doesn't cause VM-exits). */
-        uint64_t                    u64HostTscAux;
+        uint8_t                     au8Alignment0[7];
 
         /** Cache of the nested-guest's VMCB fields that we modify in order to run the
@@ -1317 +1311 @@
         R0PTRTYPE(void *)           pvMsrBitmap;
 
+        /** Whether VTPR with V_INTR_MASKING set is in effect, indicating
+         *  we should check if the VTPR changed on every VM-exit. */
+        bool                        fSyncVTpr;
+        bool                        afAlignment[7];
+
+        /** Host's TSC_AUX MSR (used when RDTSCP doesn't cause VM-exits). */
+        uint64_t                    u64HostTscAux;
+
         /** For saving stack space, the disassembler state is allocated here
          * instead of on the stack. */

trunk/src/VBox/VMM/include/HMInternal.mac

@@ -137 +137 @@
 
 struc HMCPUSVM
-    .fSyncVTpr                      resb    1
     .fEmulateLongModeSysEnterExit   resb    1
 
     alignb 8
-    .u64HostTscAux                  resq    1
-
     .NstGstVmcbCache                resb    40
 endstruc
@@ -222 +219 @@
     .pvMsrBitmap                    RTR0PTR_RES  1
 
+    .fSyncVTpr                      resb    1
+
+    alignb 8
+    .u64HostTscAux                  resq    1
+
+    alignb 8
     .DisState                       resb    0d8h
 endstruc