VirtualBox

Changeset 88638 in vbox


Ignore:
Timestamp:
Apr 22, 2021 5:40:05 AM (4 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
143951
Message:

Intel IOMMU: bugref:9967 Refactor some PDM-IOMMU interfaces to differentiate between device present vs. device instance available in current context (ring-0/ring-3).
This should help us to support IOMMU as ring-3-only device in the future.
Still more work to do in that regard (PDM task queue), but one step at a time.

Location:
trunk
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/err.h

    r88579 r88638  
    30533053 * @{
    30543054 */
    3055 /** Internal processing error \#1 in the IOMMU device code. */
    3056 #define VERR_IOMMU_IPE_1                            (-7201)
    3057 /** Internal processing error \#2 in the IOMMU device code. */
    3058 #define VERR_IOMMU_IPE_2                            (-7202)
    3059 /** Internal processing error \#3 in the IOMMU device code. */
    3060 #define VERR_IOMMU_IPE_3                            (-7203)
    3061 /** Internal processing error \#4 in the IOMMU device code. */
    3062 #define VERR_IOMMU_IPE_4                            (-7204)
    3063 /** Internal processing error \#5 in the IOMMU device code. */
    3064 #define VERR_IOMMU_IPE_5                            (-7205)
    30653055/** Failed to read the device table entry from guest memory. */
    3066 #define VERR_IOMMU_DTE_READ_FAILED                  (-7206)
     3056#define VERR_IOMMU_DTE_READ_FAILED                  (-7200)
    30673057/** Failed to read the device table entry due to an invalid offset. */
    3068 #define VERR_IOMMU_DTE_BAD_OFFSET                   (-7207)
     3058#define VERR_IOMMU_DTE_BAD_OFFSET                   (-7201)
    30693059/** Address translation failed. */
    3070 #define VERR_IOMMU_ADDR_TRANSLATION_FAILED          (-7208)
     3060#define VERR_IOMMU_ADDR_TRANSLATION_FAILED          (-7202)
     3061/** Access denied for the address. */
     3062#define VERR_IOMMU_ADDR_ACCESS_DENIED               (-7203)
     3063/** Remapping failed for the interrupt. */
     3064#define VERR_IOMMU_INTR_REMAP_FAILED                (-7204)
     3065/** Remapping denied for the interrupt (might have caused a PCI target abort). */
     3066#define VERR_IOMMU_INTR_REMAP_DENIED                (-7205)
     3067/** Command not supported. */
     3068#define VERR_IOMMU_CMD_NOT_SUPPORTED                (-7206)
     3069/** Command format (or reserved bits) invalid. */
     3070#define VERR_IOMMU_CMD_INVALID_FORMAT               (-7207)
     3071/** Command hardware failure. */
     3072#define VERR_IOMMU_CMD_HW_ERROR                     (-7208)
     3073/** IOMMU device is not present. */
     3074#define VERR_IOMMU_NOT_PRESENT                      (-7209)
     3075/** IOMMU instance cannot call itself (for remapping interrupts or translating
     3076 *  addresses). */
     3077#define VERR_IOMMU_CANNOT_CALL_SELF                 (-7210)
    30713078/** Address translation disabled (but permission bits apply). */
    3072 #define VINF_IOMMU_ADDR_TRANSLATION_DISABLED        7209
    3073 /** Access denied for the address. */
    3074 #define VERR_IOMMU_ADDR_ACCESS_DENIED               (-7210)
    3075 /** Remapping failed for the interrupt. */
    3076 #define VERR_IOMMU_INTR_REMAP_FAILED                (-7211)
    3077 /** Remapping denied for the interrupt (might have caused a PCI target abort). */
    3078 #define VERR_IOMMU_INTR_REMAP_DENIED                (-7212)
    3079 /** Command not supported. */
    3080 #define VERR_IOMMU_CMD_NOT_SUPPORTED                (-7213)
    3081 /** Command format (or reserved bits) invalid. */
    3082 #define VERR_IOMMU_CMD_INVALID_FORMAT               (-7214)
    3083 /** Command hardware failure. */
    3084 #define VERR_IOMMU_CMD_HW_ERROR                     (-7215)
    3085 /** IOMMU device is not present. */
    3086 #define VERR_IOMMU_NOT_PRESENT                      (-7216)
     3079#define VINF_IOMMU_ADDR_TRANSLATION_DISABLED        7211
     3080
     3081/** IOMMU Internal processing error \#0. */
     3082#define VERR_IOMMU_IPE_0                            (-7290)
     3083/** IOMMU Internal processing error \#1. */
     3084#define VERR_IOMMU_IPE_1                            (-7291)
     3085/** IOMMU Internal processing error \#2. */
     3086#define VERR_IOMMU_IPE_2                            (-7292)
     3087/** IOMMU Internal processing error \#3. */
     3088#define VERR_IOMMU_IPE_3                            (-7293)
     3089/** IOMMU Internal processing error \#4. */
     3090#define VERR_IOMMU_IPE_4                            (-7294)
     3091/** IOMMU Internal processing error \#5. */
     3092#define VERR_IOMMU_IPE_5                            (-7295)
     3093/** IOMMU Internal processing error \#6. */
     3094#define VERR_IOMMU_IPE_6                            (-7296)
     3095/** IOMMU Internal processing error \#7. */
     3096#define VERR_IOMMU_IPE_7                            (-7297)
     3097/** IOMMU Internal processing error \#8. */
     3098#define VERR_IOMMU_IPE_8                            (-7298)
     3099/** IOMMU Internal processing error \#9. */
     3100#define VERR_IOMMU_IPE_9                            (-7299)
    30873101/** @} */
    30883102

  • trunk/src/VBox/Devices/PC/DevIoApic.cpp

    r88631 r88638  
    537537        ioapicGetMsiFromApicIntr(&ApicIntr, &MsiIn);
    538538        int const rcRemap = pThisCC->pIoApicHlp->pfnIommuMsiRemap(pDevIns, VBOX_PCI_BDF_SB_IOAPIC, &MsiIn, &MsiOut);
    539         if (RT_SUCCESS(rcRemap))
     539        if (   rcRemap == VERR_IOMMU_NOT_PRESENT
     540            || rcRemap == VERR_IOMMU_CANNOT_CALL_SELF)
     541            MsiOut = MsiIn;
     542        else if (RT_SUCCESS(rcRemap))
    540543            STAM_COUNTER_INC(&pThis->StatIommuRemappedIntr);
    541         else if (rcRemap == VERR_IOMMU_NOT_PRESENT)
    542             MsiOut = MsiIn;
    543544        else
    544545        {
    … …  
    924925     *
    925926     * If the Bus:Dev:Fn isn't valid, it is ASSUMED the device generating the
    926      * MSI is the IOMMU itself and hence is not subject to remapping.
     927     * MSI may be the IOMMU itself and hence is not subject to remapping.
     928     *
     929     * For AMD IOMMUs, since it's a full fledged PCI device, the BDF will be
     930     * valid but will be handled by VERR_IOMMU_CANNOT_CALL_SELF case.
    927931     */
    928932    if (PCIBDF_IS_VALID(uBusDevFn))
    … …  
    931935        RT_ZERO(MsiOut);
    932936        int const rcRemap = pThisCC->pIoApicHlp->pfnIommuMsiRemap(pDevIns, uBusDevFn, pMsi, &MsiOut);
    933         if (RT_SUCCESS(rcRemap))
     937        if (   rcRemap == VERR_IOMMU_NOT_PRESENT
     938            || rcRemap == VERR_IOMMU_CANNOT_CALL_SELF)
     939            MsiOut = *pMsi;
     940        else if (RT_SUCCESS(rcRemap))
    934941            STAM_COUNTER_INC(&pThis->StatIommuRemappedMsi);
    935         else if (rcRemap == VERR_IOMMU_NOT_PRESENT)
    936             MsiOut = *pMsi;
    937942        else
    938943        {

  • trunk/src/VBox/VMM/VMMAll/PDMAllIommu.cpp

    r88636 r88638  
    8989    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    9090    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    91     if (   pDevInsIommu
    92         && pDevInsIommu != pDevIns)
    93     {
    94         int rc = pIommu->pfnMsiRemap(pDevInsIommu, idDevice, pMsiIn, pMsiOut);
    95         if (RT_FAILURE(rc))
    96         {
    97             LogFunc(("MSI remap failed. idDevice=%#x pMsiIn=(%#RX64, %#RU32) rc=%Rrc\n", idDevice, pMsiIn->Addr.u64,
    98                      pMsiIn->Data.u32, rc));
    99         }
    100         return rc;
    101     }
    102     /** @todo Should we return an rc such that we can reschedule to R3 if R0 isn't
    103      *        enabled?  Is that even viable with the state the I/O APIC would be in? */
    104     return VERR_IOMMU_NOT_PRESENT;
     91    Assert(pDevInsIommu);
     92    if (pDevInsIommu != pDevIns)
     93        return pIommu->pfnMsiRemap(pDevInsIommu, idDevice, pMsiIn, pMsiOut);
     94    return VERR_IOMMU_CANNOT_CALL_SELF;
    10595}
    10696
    … …  
    126116    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    127117    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    128     if (   pDevInsIommu
    129         && pDevInsIommu != pDevIns)
    130     {
     118    if (pDevInsIommu)
     119    {
     120        if (pDevInsIommu != pDevIns)
     121        { /* likely */ }
     122        else
     123            return VERR_IOMMU_CANNOT_CALL_SELF;
     124
    131125        uint16_t const idDevice = pdmIommuGetPciDeviceId(pDevIns, pPciDev);
    132126        int rc = VINF_SUCCESS;
    … …  
    190184    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    191185    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    192     if (   pDevInsIommu
    193         && pDevInsIommu != pDevIns)
    194     {
     186    if (pDevInsIommu)
     187    {
     188        if (pDevInsIommu != pDevIns)
     189        { /* likely */ }
     190        else
     191            return VERR_IOMMU_CANNOT_CALL_SELF;
     192
    195193        uint16_t const idDevice = pdmIommuGetPciDeviceId(pDevIns, pPciDev);
    196194        int rc = VINF_SUCCESS;
    … …  
    251249    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    252250    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    253     if (   pDevInsIommu
    254         && pDevInsIommu != pDevIns)
    255     {
     251    if (pDevInsIommu)
     252    {
     253        if (pDevInsIommu != pDevIns)
     254        { /* likely */ }
     255        else
     256            return VERR_IOMMU_CANNOT_CALL_SELF;
     257
    256258        uint16_t const idDevice = pdmIommuGetPciDeviceId(pDevIns, pPciDev);
    257259        size_t   cbContig  = 0;
    … …  
    296298    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    297299    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    298     if (   pDevInsIommu
    299         && pDevInsIommu != pDevIns)
    300     {
     300    if (pDevInsIommu)
     301    {
     302        if (pDevInsIommu != pDevIns)
     303        { /* likely */ }
     304        else
     305            return VERR_IOMMU_CANNOT_CALL_SELF;
     306
    301307        uint16_t const idDevice = pdmIommuGetPciDeviceId(pDevIns, pPciDev);
    302308        size_t   cbContig  = 0;
    … …  
    344350    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    345351    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    346     if (   pDevInsIommu
    347         && pDevInsIommu != pDevIns)
    348     {
     352    if (pDevInsIommu)
     353    {
     354        if (pDevInsIommu != pDevIns)
     355        { /* likely */ }
     356        else
     357            return VERR_IOMMU_CANNOT_CALL_SELF;
     358
    349359        /* Allocate space for translated addresses. */
    350360        size_t const cbIovas  = cPages * sizeof(uint64_t);
    … …  
    407417    PPDMIOMMU  pIommu       = PDMDEVINS_TO_IOMMU(pDevIns);
    408418    PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
    409     if (   pDevInsIommu
    410         && pDevInsIommu != pDevIns)
    411     {
     419    if (pDevInsIommu)
     420    {
     421        if (pDevInsIommu != pDevIns)
     422        { /* likely */ }
     423        else
     424            return VERR_IOMMU_CANNOT_CALL_SELF;
     425
    412426        /* Allocate space for translated addresses. */
    413427        size_t const cbIovas  = cPages * sizeof(uint64_t);

  • trunk/src/VBox/VMM/VMMR0/PDMR0DevHlp.cpp

    r88631 r88638  
    153153#ifdef VBOX_WITH_IOMMU_AMD
    154154    int rc = pdmIommuMemAccessRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, fFlags);
    155     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     155    if (   rc == VERR_IOMMU_NOT_PRESENT
     156        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     157    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     158    else
    156159        return rc;
    157160#endif
    … …  
    187190#ifdef VBOX_WITH_IOMMU_AMD
    188191    int rc = pdmIommuMemAccessWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, fFlags);
    189     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     192    if (   rc == VERR_IOMMU_NOT_PRESENT
     193        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     194    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     195    else
    190196        return rc;
    191197#endif
    … …  
    15321538#ifdef VBOX_WITH_IOMMU_AMD
    15331539    if (pdmIommuIsPresent(pDevIns))
    1534         return pdmIommuMsiRemap(pDevIns, idDevice, pMsiIn, pMsiOut);
     1540    {
     1541        PGVM pGVM = pDevIns->Internal.s.pGVM;
     1542        PPDMIOMMUR0 pIommu = &pGVM->pdmr0.s.aIommus[0];
     1543        if (pIommu->pDevInsR0)
     1544            return pdmIommuMsiRemap(pDevIns, idDevice, pMsiIn, pMsiOut);
     1545        AssertMsgFailedReturn(("Implement queueing PDM task for remapping MSI via IOMMU in ring-3"), VERR_IOMMU_IPE_0);
     1546    }
    15351547#else
    15361548    RT_NOREF(pDevIns, idDevice);

  • trunk/src/VBox/VMM/VMMR0/PDMR0DevHlpTracing.cpp

    r87477 r88638  
    314314#ifdef VBOX_WITH_IOMMU_AMD
    315315    int rc = pdmIommuMemAccessRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, fFlags);
    316     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     316    if (   rc == VERR_IOMMU_NOT_PRESENT
     317        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     318    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     319    else
    317320        return rc;
    318321#endif
    … …  
    348351#ifdef VBOX_WITH_IOMMU_AMD
    349352    int rc = pdmIommuMemAccessWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, fFlags);
    350     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     353    if (   rc == VERR_IOMMU_NOT_PRESENT
     354        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     355    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     356    else
    351357        return rc;
    352358#endif

  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r88565 r88638  
    18701870#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
    18711871    int rc = pdmIommuMemAccessRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, fFlags);
    1872     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     1872    if (   rc == VERR_IOMMU_NOT_PRESENT
     1873        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     1874    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     1875    else
    18731876        return rc;
    18741877#endif
    … …  
    19041907#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
    19051908    int rc = pdmIommuMemAccessWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, fFlags);
    1906     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     1909    if (   rc == VERR_IOMMU_NOT_PRESENT
     1910        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     1911    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     1912    else
    19071913        return rc;
    19081914#endif
    … …  
    19351941#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
    19361942    int rc = pdmR3IommuMemAccessWriteCCPtr(pDevIns, pPciDev, GCPhys, fFlags, ppv, pLock);
    1937     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     1943    if (   rc == VERR_IOMMU_NOT_PRESENT
     1944        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     1945    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     1946    else
    19381947        return rc;
    19391948#endif
    … …  
    19661975#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
    19671976    int rc = pdmR3IommuMemAccessReadCCPtr(pDevIns, pPciDev, GCPhys, fFlags, ppv, pLock);
    1968     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     1977    if (   rc == VERR_IOMMU_NOT_PRESENT
     1978        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     1979    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     1980    else
    19691981        return rc;
    19701982#endif
    … …  
    19982010#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
    19992011    int rc = pdmR3IommuMemAccessBulkWriteCCPtr(pDevIns, pPciDev, cPages, paGCPhysPages, fFlags, papvPages, paLocks);
    2000     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     2012    if (   rc == VERR_IOMMU_NOT_PRESENT
     2013        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     2014    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     2015    else
    20012016        return rc;
    20022017#endif
    … …  
    20302045#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
    20312046    int rc = pdmR3IommuMemAccessBulkReadCCPtr(pDevIns, pPciDev, cPages, paGCPhysPages, fFlags, papvPages, paLocks);
    2032     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     2047    if (   rc == VERR_IOMMU_NOT_PRESENT
     2048        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     2049    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     2050    else
    20332051        return rc;
    20342052#endif

  • trunk/src/VBox/VMM/VMMR3/PDMDevHlpTracing.cpp

    r87477 r88638  
    420420#ifdef VBOX_WITH_IOMMU_AMD
    421421    int rc = pdmIommuMemAccessRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, fFlags);
    422     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     422    if (   rc == VERR_IOMMU_NOT_PRESENT
     423        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     424    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     425    else
    423426        return rc;
    424427#endif
    … …  
    454457#ifdef VBOX_WITH_IOMMU_AMD
    455458    int rc = pdmIommuMemAccessWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, fFlags);
    456     if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
     459    if (   rc == VERR_IOMMU_NOT_PRESENT
     460        || rc == VERR_IOMMU_CANNOT_CALL_SELF)
     461    { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
     462    else
    457463        return rc;
    458464#endif
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