Changeset 88787 in vbox for trunk/src/VBox
- Timestamp:
- Apr 29, 2021 3:51:13 PM (4 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp
r87028 r88787 342 342 343 343 344 #if !defined(VMSVGA3D_DX)345 # ifdef VBOX_WITH_VMSVGA3D346 /*347 * Stub for old backends.348 */349 int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)350 {351 RT_NOREF(pThisCC, pszInterfaceName, pvInterfaceFuncs, cbInterfaceFuncs);352 return VERR_NOT_IMPLEMENTED;353 }354 # endif355 #endif356 357 358 344 /* 359 345 * … … 599 585 pGbo->paDescriptors = paDescriptors; 600 586 587 #if 1 /// @todo PGMHandlerPhysicalRegister asserts deep in PGM code with enmKind of a page being out of range. 588 fWriteProtected = false; 589 #endif 601 590 if (fWriteProtected) 602 591 { … … 632 621 } 633 622 623 /** @todo static void vmsvgaR3GboWriteProtect(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo, bool fWriteProtect) */ 634 624 635 625 typedef enum VMSVGAGboTransferDirection … … 717 707 VMSVGAGboTransferDirection_Read); 718 708 } 709 710 711 static void vmsvgaR3GboBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo) 712 { 713 AssertReturnVoid(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED); 714 vmsvgaR3GboWrite(pSvgaR3State, pGbo, 0, pGbo->pvHost, pGbo->cbTotal); 715 RTMemFree(pGbo->pvHost); 716 pGbo->pvHost = NULL; 717 pGbo->fGboFlags &= ~VMSVGAGBO_F_HOST_BACKED; 718 } 719 720 721 static int vmsvgaR3GboBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo, uint32_t cbValid) 722 { 723 int rc; 724 725 /* Just reread the data if pvHost has been allocated already. */ 726 if (!(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED)) 727 pGbo->pvHost = RTMemAllocZ(pGbo->cbTotal); 728 729 if (pGbo->pvHost) 730 { 731 rc = vmsvgaR3GboRead(pSvgaR3State, pGbo, 0, pGbo->pvHost, cbValid); 732 } 733 else 734 rc = VERR_NO_MEMORY; 735 736 if (RT_SUCCESS(rc)) 737 pGbo->fGboFlags |= VMSVGAGBO_F_HOST_BACKED; 738 else 739 { 740 RTMemFree(pGbo->pvHost); 741 pGbo->pvHost = NULL; 742 } 743 return rc; 744 } 745 719 746 720 747 … … 831 858 832 859 833 static PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId mobid) 834 { 860 static PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid) 861 { 862 if (mobid == SVGA_ID_INVALID) 863 return NULL; 864 835 865 PVMSVGAMOB pMob = (PVMSVGAMOB)RTAvlU32Get(&pSvgaR3State->MOBTree, mobid); 836 866 if (pMob) … … 840 870 RTListPrepend(&pSvgaR3State->MOBLRUList, &pMob->nodeLRU); 841 871 } 872 else 873 ASSERT_GUEST_FAILED(); 842 874 843 875 return pMob; 844 876 } 877 878 879 /** Create a host ring-3 pointer to the MOB data. 880 * Current approach is to allocate a host memory buffer and copy the guest MOB data if necessary. 881 * @param pMob The MOB. 882 * @param cbValid How many bytes of the guest backing memory contain valid data. 883 * @return VBox status. 884 */ 885 /** @todo uint32_t cbValid -> uint32_t offStart, uint32_t cbData */ 886 int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid) 887 { 888 AssertReturn(pMob, VERR_INVALID_PARAMETER); 889 return vmsvgaR3GboBackingStoreCreate(pSvgaR3State, &pMob->Gbo, cbValid); 890 } 891 892 893 void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob) 894 { 895 if (pMob) 896 vmsvgaR3GboBackingStoreDelete(pSvgaR3State, &pMob->Gbo); 897 } 898 899 900 void *vmsvgaR3MobBackingStoreGet(PVMSVGAMOB pMob, uint32_t off) 901 { 902 if (pMob && (pMob->Gbo.fGboFlags & VMSVGAGBO_F_HOST_BACKED)) 903 { 904 if (off <= pMob->Gbo.cbTotal) 905 return (uint8_t *)pMob->Gbo.pvHost + off; 906 } 907 return NULL; 908 } 909 910 911 #ifdef VBOX_WITH_VMSVGA3D 912 int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBox) 913 { 914 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 915 916 SVGAOTableSurfaceEntry entrySurface; 917 int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE], 918 pImageId->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface)); 919 if (RT_SUCCESS(rc)) 920 { 921 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid); 922 if (pMob) 923 { 924 VMSVGA3D_MAPPED_SURFACE map; 925 rc = pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImageId, pBox, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map); 926 if (RT_SUCCESS(rc)) 927 { 928 /* Copy MOB -> mapped surface. */ 929 uint32_t offSrc = pBox->x * map.cbPixel 930 + pBox->y * entrySurface.size.width * map.cbPixel 931 + pBox->z * entrySurface.size.height * entrySurface.size.width * map.cbPixel; 932 uint8_t *pu8Dst = (uint8_t *)map.pvData; 933 for (uint32_t z = 0; z < pBox->d; ++z) 934 { 935 for (uint32_t y = 0; y < pBox->h; ++y) 936 { 937 rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, offSrc, pu8Dst, pBox->w * map.cbPixel); 938 if (RT_FAILURE(rc)) 939 break; 940 941 pu8Dst += map.cbRowPitch; 942 offSrc += entrySurface.size.width * map.cbPixel; 943 } 944 945 pu8Dst += map.cbDepthPitch; 946 offSrc += entrySurface.size.height * entrySurface.size.width * map.cbPixel; 947 } 948 949 pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImageId, &map, /* fWritten= */ true); 950 } 951 } 952 else 953 rc = VERR_INVALID_STATE; 954 } 955 956 return rc; 957 } 958 959 960 int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBoxDst, SVGA3dPoint const *pPtSrc) 961 { 962 /* pPtSrc must be verified by the caller. */ 963 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 964 965 SVGAOTableSurfaceEntry entrySurface; 966 int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE], 967 pImageId->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface)); 968 if (RT_SUCCESS(rc)) 969 { 970 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid); 971 if (pMob) 972 { 973 VMSVGA3D_MAPPED_SURFACE map; 974 rc = pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImageId, pBoxDst, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map); 975 if (RT_SUCCESS(rc)) 976 { 977 /* Copy MOB -> mapped surface. */ 978 uint32_t offSrc = pPtSrc->x * map.cbPixel 979 + pPtSrc->y * entrySurface.size.width * map.cbPixel 980 + pPtSrc->z * entrySurface.size.height * entrySurface.size.width * map.cbPixel; 981 uint8_t *pu8Dst = (uint8_t *)map.pvData; 982 for (uint32_t z = 0; z < pBoxDst->d; ++z) 983 { 984 for (uint32_t y = 0; y < pBoxDst->h; ++y) 985 { 986 rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, offSrc, pu8Dst, pBoxDst->w * map.cbPixel); 987 if (RT_FAILURE(rc)) 988 break; 989 990 pu8Dst += map.cbRowPitch; 991 offSrc += entrySurface.size.width * map.cbPixel; 992 } 993 994 pu8Dst += map.cbDepthPitch; 995 offSrc += entrySurface.size.height * entrySurface.size.width * map.cbPixel; 996 } 997 998 pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImageId, &map, /* fWritten= */ true); 999 } 1000 } 1001 else 1002 rc = VERR_INVALID_STATE; 1003 } 1004 1005 return rc; 1006 } 1007 #endif /* VBOX_WITH_VMSVGA3D */ 1008 845 1009 846 1010 /* … … 1185 1349 // ASMBreakpoint(); 1186 1350 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1187 RT_NOREF(pCmd, pSvgaR3State);1188 1351 1189 1352 /* Assign the mobid to the surface. */ … … 1325 1488 1326 1489 1490 /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE 1105 */ 1491 static void vmsvga3dCmdInvalidateGBImage(PVGASTATECC pThisCC, SVGA3dCmdInvalidateGBImage const *pCmd) 1492 { 1493 // ASMBreakpoint(); 1494 vmsvga3dSurfaceInvalidate(pThisCC, pCmd->image.sid, pCmd->image.face, pCmd->image.mipmap); 1495 } 1496 1497 1327 1498 /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE 1106 */ 1328 1499 static void vmsvga3dCmdInvalidateGBSurface(PVGASTATECC pThisCC, SVGA3dCmdInvalidateGBSurface const *pCmd) 1329 1500 { 1330 // ASMBreakpoint(); 1331 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1332 RT_NOREF(pSvgaR3State, pCmd); 1333 /** @todo Implement. */ 1501 // ASMBreakpoint(); 1502 vmsvga3dSurfaceInvalidate(pThisCC, pCmd->sid, SVGA_ID_INVALID, SVGA_ID_INVALID); 1334 1503 } 1335 1504 … … 1382 1551 // entry.image.face = 0; 1383 1552 // entry.image.mipmap = 0; 1384 entry.width = pCmd->width; 1385 entry.height = pCmd->height; 1386 entry.xRoot = pCmd->xRoot; 1387 entry.yRoot = pCmd->yRoot; 1388 entry.flags = pCmd->flags; 1389 entry.dpi = pCmd->dpi; 1553 entry.width = pCmd->width; 1554 entry.height = pCmd->height; 1555 entry.xRoot = pCmd->xRoot; 1556 entry.yRoot = pCmd->yRoot; 1557 entry.flags = pCmd->flags; 1558 entry.dpi = pCmd->dpi; 1559 1390 1560 int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET], 1391 1561 pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entry, sizeof(entry)); … … 1405 1575 pScreen->cWidth = pCmd->width; 1406 1576 pScreen->cHeight = pCmd->height; 1407 pScreen->offVRAM = 0; /* Alwaysfor screen targets, they use either a separate memory buffer or a host window. */1577 pScreen->offVRAM = 0; /* Not applicable for screen targets, they use either a separate memory buffer or a host window. */ 1408 1578 pScreen->cbPitch = pCmd->width * 4; 1409 1579 pScreen->cBpp = 32; … … 1569 1739 1570 1740 1741 /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 1134 */ 1742 static void vmsvga3dCmdDefineGBSurface_v2(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v2 const *pCmd) 1743 { 1744 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1745 1746 /* Update the entry in the pSvgaR3State->pGboOTableSurface. */ 1747 SVGAOTableSurfaceEntry entry; 1748 RT_ZERO(entry); 1749 entry.format = pCmd->format; 1750 entry.surface1Flags = pCmd->surfaceFlags; 1751 entry.numMipLevels = pCmd->numMipLevels; 1752 entry.multisampleCount = pCmd->multisampleCount; 1753 entry.autogenFilter = pCmd->autogenFilter; 1754 entry.size = pCmd->size; 1755 entry.mobid = SVGA_ID_INVALID; 1756 entry.arraySize = pCmd->arraySize; 1757 // entry.mobPitch = 0; 1758 int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE], 1759 pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry)); 1760 if (RT_SUCCESS(rc)) 1761 { 1762 /* Create the host surface. */ 1763 /** @todo fGBO = true flag. */ 1764 vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format, 1765 pCmd->multisampleCount, pCmd->autogenFilter, 1766 pCmd->numMipLevels, &pCmd->size); 1767 } 1768 } 1769 1770 1571 1771 /* SVGA_3D_CMD_DEFINE_GB_MOB64 1135 */ 1572 1772 static void vmsvga3dCmdDefineGBMob64(PVGASTATECC pThisCC, SVGA3dCmdDefineGBMob64 const *pCmd) … … 1593 1793 1594 1794 /* SVGA_3D_CMD_DX_DEFINE_CONTEXT 1143 */ 1595 static void vmsvga3dCmdDXDefineContext(PVGASTATECC pThisCC, SVGA3dCmdDXDefineContext const *pCmd) 1596 { 1597 ASMBreakpoint(); 1598 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1599 if (pSvgaR3State->pFuncsDX) 1600 { 1601 RT_NOREF(pCmd); 1602 pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC->svga.p3dState); 1603 } 1795 static int vmsvga3dCmdDXDefineContext(PVGASTATECC pThisCC, SVGA3dCmdDXDefineContext const *pCmd, uint32_t cbCmd) 1796 { 1797 #ifdef VMSVGA3D_DX 1798 //ASMBreakpoint(); 1799 RT_NOREF(cbCmd); 1800 1801 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1802 1803 /* Update the entry in the pSvgaR3State->pGboOTable[SVGA_OTABLE_DXCONTEXT]. */ 1804 SVGAOTableDXContextEntry entry; 1805 RT_ZERO(entry); 1806 entry.cid = pCmd->cid; 1807 entry.mobid = SVGA_ID_INVALID; 1808 int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT], 1809 pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry)); 1810 if (RT_SUCCESS(rc)) 1811 { 1812 /* Create the host context. */ 1813 rc = vmsvga3dDXDefineContext(pThisCC, pCmd->cid); 1814 } 1815 1816 return rc; 1817 #else 1818 RT_NOREF(pThisCC, pCmd, cbCmd); 1819 return VERR_NOT_SUPPORTED; 1820 #endif 1604 1821 } 1605 1822 1606 1823 1607 1824 /* SVGA_3D_CMD_DX_DESTROY_CONTEXT 1144 */ 1608 static void vmsvga3dCmdDXDestroyContext(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyContext const *pCmd) 1609 { 1610 ASMBreakpoint(); 1611 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1612 if (pSvgaR3State->pFuncsDX) 1613 { 1614 RT_NOREF(pCmd); 1615 pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC->svga.p3dState); 1616 } 1825 static int vmsvga3dCmdDXDestroyContext(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyContext const *pCmd, uint32_t cbCmd) 1826 { 1827 #ifdef VMSVGA3D_DX 1828 //ASMBreakpoint(); 1829 RT_NOREF(cbCmd); 1830 1831 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1832 1833 /* Update the entry in the pSvgaR3State->pGboOTable[SVGA_OTABLE_DXCONTEXT]. */ 1834 SVGAOTableDXContextEntry entry; 1835 RT_ZERO(entry); 1836 vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT], 1837 pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry)); 1838 1839 return vmsvga3dDXDestroyContext(pThisCC, pCmd->cid); 1840 #else 1841 RT_NOREF(pThisCC, pCmd, cbCmd); 1842 return VERR_NOT_SUPPORTED; 1843 #endif 1617 1844 } 1618 1845 1619 1846 1620 1847 /* SVGA_3D_CMD_DX_BIND_CONTEXT 1145 */ 1621 static void vmsvga3dCmdDXBindContext(PVGASTATECC pThisCC, SVGA3dCmdDXBindContext const *pCmd) 1622 { 1623 ASMBreakpoint(); 1624 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1625 if (pSvgaR3State->pFuncsDX) 1626 { 1627 RT_NOREF(pCmd); 1628 pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC->svga.p3dState); 1629 } 1848 static int vmsvga3dCmdDXBindContext(PVGASTATECC pThisCC, SVGA3dCmdDXBindContext const *pCmd, uint32_t cbCmd) 1849 { 1850 #ifdef VMSVGA3D_DX 1851 //ASMBreakpoint(); 1852 RT_NOREF(cbCmd); 1853 1854 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1855 1856 /* Assign a mobid to a cid. */ 1857 int rc = VINF_SUCCESS; 1858 if (pCmd->mobid != SVGA_ID_INVALID) 1859 rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_MOB], 1860 pCmd->mobid, SVGA3D_OTABLE_MOB_ENTRY_SIZE); 1861 if (RT_SUCCESS(rc)) 1862 { 1863 SVGAOTableDXContextEntry entry; 1864 rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT], 1865 pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry)); 1866 if (RT_SUCCESS(rc)) 1867 { 1868 SVGADXContextMobFormat *pSvgaDXContext = NULL; 1869 if (pCmd->mobid != entry.mobid && entry.mobid != SVGA_ID_INVALID) 1870 { 1871 /* Unbind notification to the DX backend. Copy the context data to the guest backing memory. */ 1872 pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat)); 1873 if (pSvgaDXContext) 1874 { 1875 rc = vmsvga3dDXUnbindContext(pThisCC, pCmd->cid, pSvgaDXContext); 1876 if (RT_SUCCESS(rc)) 1877 { 1878 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entry.mobid); 1879 if (pMob) 1880 { 1881 rc = vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat)); 1882 } 1883 } 1884 1885 RTMemFree(pSvgaDXContext); 1886 pSvgaDXContext = NULL; 1887 } 1888 } 1889 1890 if (pCmd->mobid != SVGA_ID_INVALID) 1891 { 1892 /* Bind a new context. Copy existing data from the guyest backing memory. */ 1893 if (pCmd->validContents) 1894 { 1895 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid); 1896 if (pMob) 1897 { 1898 pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat)); 1899 if (pSvgaDXContext) 1900 { 1901 rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat)); 1902 if (RT_FAILURE(rc)) 1903 { 1904 RTMemFree(pSvgaDXContext); 1905 pSvgaDXContext = NULL; 1906 } 1907 } 1908 } 1909 } 1910 1911 rc = vmsvga3dDXBindContext(pThisCC, pCmd->cid, pSvgaDXContext); 1912 1913 RTMemFree(pSvgaDXContext); 1914 } 1915 1916 /* Update the object table. */ 1917 entry.mobid = pCmd->mobid; 1918 rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT], 1919 pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry)); 1920 } 1921 } 1922 1923 return rc; 1924 #else 1925 RT_NOREF(pThisCC, pCmd, cbCmd); 1926 return VERR_NOT_SUPPORTED; 1927 #endif 1630 1928 } 1631 1929 1632 1930 1633 1931 /* SVGA_3D_CMD_DX_READBACK_CONTEXT 1146 */ 1634 static void vmsvga3dCmdDXReadbackContext(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackContext const *pCmd) 1635 { 1636 ASMBreakpoint(); 1637 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1638 if (pSvgaR3State->pFuncsDX) 1639 { 1640 RT_NOREF(pCmd); 1641 pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC->svga.p3dState); 1642 } 1932 static int vmsvga3dCmdDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackContext const *pCmd, uint32_t cbCmd) 1933 { 1934 #ifdef VMSVGA3D_DX 1935 ASMBreakpoint(); 1936 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1937 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 1938 return vmsvga3dDXReadbackContext(pThisCC, idDXContext); 1939 #else 1940 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 1941 return VERR_NOT_SUPPORTED; 1942 #endif 1643 1943 } 1644 1944 1645 1945 1646 1946 /* SVGA_3D_CMD_DX_INVALIDATE_CONTEXT 1147 */ 1647 static void vmsvga3dCmdDXInvalidateContext(PVGASTATECC pThisCC, SVGA3dCmdDXInvalidateContext const *pCmd) 1648 { 1649 ASMBreakpoint(); 1650 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1651 if (pSvgaR3State->pFuncsDX) 1652 { 1653 RT_NOREF(pCmd); 1654 pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC->svga.p3dState); 1655 } 1947 static int vmsvga3dCmdDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXInvalidateContext const *pCmd, uint32_t cbCmd) 1948 { 1949 #ifdef VMSVGA3D_DX 1950 ASMBreakpoint(); 1951 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1952 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 1953 return vmsvga3dDXInvalidateContext(pThisCC, idDXContext); 1954 #else 1955 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 1956 return VERR_NOT_SUPPORTED; 1957 #endif 1656 1958 } 1657 1959 1658 1960 1659 1961 /* SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER 1148 */ 1660 static void vmsvga3dCmdDXSetSingleConstantBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd) 1661 { 1662 ASMBreakpoint(); 1663 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1664 if (pSvgaR3State->pFuncsDX) 1665 { 1666 RT_NOREF(pCmd); 1667 pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC->svga.p3dState); 1668 } 1962 static int vmsvga3dCmdDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd, uint32_t cbCmd) 1963 { 1964 #ifdef VMSVGA3D_DX 1965 //ASMBreakpoint(); 1966 RT_NOREF(cbCmd); 1967 return vmsvga3dDXSetSingleConstantBuffer(pThisCC, idDXContext, pCmd); 1968 #else 1969 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 1970 return VERR_NOT_SUPPORTED; 1971 #endif 1669 1972 } 1670 1973 1671 1974 1672 1975 /* SVGA_3D_CMD_DX_SET_SHADER_RESOURCES 1149 */ 1673 static void vmsvga3dCmdDXSetShaderResources(PVGASTATECC pThisCC, SVGA3dCmdDXSetShaderResources const *pCmd) 1674 { 1675 ASMBreakpoint(); 1676 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1677 if (pSvgaR3State->pFuncsDX) 1678 { 1679 RT_NOREF(pCmd); 1680 pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC->svga.p3dState); 1681 } 1976 static int vmsvga3dCmdDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cbCmd) 1977 { 1978 #ifdef VMSVGA3D_DX 1979 ASMBreakpoint(); 1980 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1981 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 1982 return vmsvga3dDXSetShaderResources(pThisCC, idDXContext); 1983 #else 1984 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 1985 return VERR_NOT_SUPPORTED; 1986 #endif 1682 1987 } 1683 1988 1684 1989 1685 1990 /* SVGA_3D_CMD_DX_SET_SHADER 1150 */ 1686 static void vmsvga3dCmdDXSetShader(PVGASTATECC pThisCC, SVGA3dCmdDXSetShader const *pCmd) 1687 { 1688 ASMBreakpoint(); 1689 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1690 if (pSvgaR3State->pFuncsDX) 1691 { 1692 RT_NOREF(pCmd); 1693 pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC->svga.p3dState); 1694 } 1991 static int vmsvga3dCmdDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd, uint32_t cbCmd) 1992 { 1993 #ifdef VMSVGA3D_DX 1994 //ASMBreakpoint(); 1995 RT_NOREF(cbCmd); 1996 return vmsvga3dDXSetShader(pThisCC, idDXContext, pCmd); 1997 #else 1998 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 1999 return VERR_NOT_SUPPORTED; 2000 #endif 1695 2001 } 1696 2002 1697 2003 1698 2004 /* SVGA_3D_CMD_DX_SET_SAMPLERS 1151 */ 1699 static void vmsvga3dCmdDXSetSamplers(PVGASTATECC pThisCC, SVGA3dCmdDXSetSamplers const *pCmd) 1700 { 1701 ASMBreakpoint(); 1702 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1703 if (pSvgaR3State->pFuncsDX) 1704 { 1705 RT_NOREF(pCmd); 1706 pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC->svga.p3dState); 1707 } 2005 static int vmsvga3dCmdDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cbCmd) 2006 { 2007 #ifdef VMSVGA3D_DX 2008 //ASMBreakpoint(); 2009 SVGA3dSamplerId const *paSamplerId = (SVGA3dSamplerId *)&pCmd[1]; 2010 uint32_t const cSamplerId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dSamplerId); 2011 return vmsvga3dDXSetSamplers(pThisCC, idDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId); 2012 #else 2013 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2014 return VERR_NOT_SUPPORTED; 2015 #endif 1708 2016 } 1709 2017 1710 2018 1711 2019 /* SVGA_3D_CMD_DX_DRAW 1152 */ 1712 static void vmsvga3dCmdDXDraw(PVGASTATECC pThisCC, SVGA3dCmdDXDraw const *pCmd) 1713 { 1714 ASMBreakpoint(); 1715 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1716 if (pSvgaR3State->pFuncsDX) 1717 { 1718 RT_NOREF(pCmd); 1719 pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC->svga.p3dState); 1720 } 2020 static int vmsvga3dCmdDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd, uint32_t cbCmd) 2021 { 2022 #ifdef VMSVGA3D_DX 2023 //ASMBreakpoint(); 2024 RT_NOREF(cbCmd); 2025 return vmsvga3dDXDraw(pThisCC, idDXContext, pCmd); 2026 #else 2027 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2028 return VERR_NOT_SUPPORTED; 2029 #endif 1721 2030 } 1722 2031 1723 2032 1724 2033 /* SVGA_3D_CMD_DX_DRAW_INDEXED 1153 */ 1725 static void vmsvga3dCmdDXDrawIndexed(PVGASTATECC pThisCC, SVGA3dCmdDXDrawIndexed const *pCmd) 1726 { 1727 ASMBreakpoint(); 1728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1729 if (pSvgaR3State->pFuncsDX) 1730 { 1731 RT_NOREF(pCmd); 1732 pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC->svga.p3dState); 1733 } 2034 static int vmsvga3dCmdDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd, uint32_t cbCmd) 2035 { 2036 #ifdef VMSVGA3D_DX 2037 ASMBreakpoint(); 2038 RT_NOREF(cbCmd); 2039 return vmsvga3dDXDrawIndexed(pThisCC, idDXContext, pCmd); 2040 #else 2041 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2042 return VERR_NOT_SUPPORTED; 2043 #endif 1734 2044 } 1735 2045 1736 2046 1737 2047 /* SVGA_3D_CMD_DX_DRAW_INSTANCED 1154 */ 1738 static void vmsvga3dCmdDXDrawInstanced(PVGASTATECC pThisCC, SVGA3dCmdDXDrawInstanced const *pCmd) 1739 { 1740 ASMBreakpoint(); 1741 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1742 if (pSvgaR3State->pFuncsDX) 1743 { 1744 RT_NOREF(pCmd); 1745 pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC->svga.p3dState); 1746 } 2048 static int vmsvga3dCmdDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd, uint32_t cbCmd) 2049 { 2050 #ifdef VMSVGA3D_DX 2051 ASMBreakpoint(); 2052 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2053 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2054 return vmsvga3dDXDrawInstanced(pThisCC, idDXContext); 2055 #else 2056 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2057 return VERR_NOT_SUPPORTED; 2058 #endif 1747 2059 } 1748 2060 1749 2061 1750 2062 /* SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED 1155 */ 1751 static void vmsvga3dCmdDXDrawIndexedInstanced(PVGASTATECC pThisCC, SVGA3dCmdDXDrawIndexedInstanced const *pCmd) 1752 { 1753 ASMBreakpoint(); 1754 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1755 if (pSvgaR3State->pFuncsDX) 1756 { 1757 RT_NOREF(pCmd); 1758 pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC->svga.p3dState); 1759 } 2063 static int vmsvga3dCmdDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd, uint32_t cbCmd) 2064 { 2065 #ifdef VMSVGA3D_DX 2066 ASMBreakpoint(); 2067 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2068 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2069 return vmsvga3dDXDrawIndexedInstanced(pThisCC, idDXContext); 2070 #else 2071 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2072 return VERR_NOT_SUPPORTED; 2073 #endif 1760 2074 } 1761 2075 1762 2076 1763 2077 /* SVGA_3D_CMD_DX_DRAW_AUTO 1156 */ 1764 static void vmsvga3dCmdDXDrawAuto(PVGASTATECC pThisCC, SVGA3dCmdDXDrawAuto const *pCmd) 1765 { 1766 ASMBreakpoint(); 1767 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1768 if (pSvgaR3State->pFuncsDX) 1769 { 1770 RT_NOREF(pCmd); 1771 pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC->svga.p3dState); 1772 } 2078 static int vmsvga3dCmdDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawAuto const *pCmd, uint32_t cbCmd) 2079 { 2080 #ifdef VMSVGA3D_DX 2081 ASMBreakpoint(); 2082 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2083 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2084 return vmsvga3dDXDrawAuto(pThisCC, idDXContext); 2085 #else 2086 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2087 return VERR_NOT_SUPPORTED; 2088 #endif 1773 2089 } 1774 2090 1775 2091 1776 2092 /* SVGA_3D_CMD_DX_SET_INPUT_LAYOUT 1157 */ 1777 static void vmsvga3dCmdDXSetInputLayout(PVGASTATECC pThisCC, SVGA3dCmdDXSetInputLayout const *pCmd) 1778 { 1779 ASMBreakpoint(); 1780 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1781 if (pSvgaR3State->pFuncsDX) 1782 { 1783 RT_NOREF(pCmd); 1784 pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC->svga.p3dState); 1785 } 2093 static int vmsvga3dCmdDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetInputLayout const *pCmd, uint32_t cbCmd) 2094 { 2095 #ifdef VMSVGA3D_DX 2096 //ASMBreakpoint(); 2097 RT_NOREF(cbCmd); 2098 return vmsvga3dDXSetInputLayout(pThisCC, idDXContext, pCmd->elementLayoutId); 2099 #else 2100 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2101 return VERR_NOT_SUPPORTED; 2102 #endif 1786 2103 } 1787 2104 1788 2105 1789 2106 /* SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS 1158 */ 1790 static void vmsvga3dCmdDXSetVertexBuffers(PVGASTATECC pThisCC, SVGA3dCmdDXSetVertexBuffers const *pCmd) 1791 { 1792 ASMBreakpoint(); 1793 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1794 if (pSvgaR3State->pFuncsDX) 1795 { 1796 RT_NOREF(pCmd); 1797 pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC->svga.p3dState); 1798 } 2107 static int vmsvga3dCmdDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetVertexBuffers const *pCmd, uint32_t cbCmd) 2108 { 2109 #ifdef VMSVGA3D_DX 2110 //ASMBreakpoint(); 2111 SVGA3dVertexBuffer const *paVertexBuffer = (SVGA3dVertexBuffer *)&pCmd[1]; 2112 uint32_t const cVertexBuffer = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dVertexBuffer); 2113 return vmsvga3dDXSetVertexBuffers(pThisCC, idDXContext, pCmd->startBuffer, cVertexBuffer, paVertexBuffer); 2114 #else 2115 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2116 return VERR_NOT_SUPPORTED; 2117 #endif 1799 2118 } 1800 2119 1801 2120 1802 2121 /* SVGA_3D_CMD_DX_SET_INDEX_BUFFER 1159 */ 1803 static void vmsvga3dCmdDXSetIndexBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXSetIndexBuffer const *pCmd) 1804 { 1805 ASMBreakpoint(); 1806 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1807 if (pSvgaR3State->pFuncsDX) 1808 { 1809 RT_NOREF(pCmd); 1810 pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC->svga.p3dState); 1811 } 2122 static int vmsvga3dCmdDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd, uint32_t cbCmd) 2123 { 2124 #ifdef VMSVGA3D_DX 2125 //ASMBreakpoint(); 2126 RT_NOREF(cbCmd); 2127 return vmsvga3dDXSetIndexBuffer(pThisCC, idDXContext, pCmd); 2128 #else 2129 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2130 return VERR_NOT_SUPPORTED; 2131 #endif 1812 2132 } 1813 2133 1814 2134 1815 2135 /* SVGA_3D_CMD_DX_SET_TOPOLOGY 1160 */ 1816 static void vmsvga3dCmdDXSetTopology(PVGASTATECC pThisCC, SVGA3dCmdDXSetTopology const *pCmd) 1817 { 1818 ASMBreakpoint(); 1819 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1820 if (pSvgaR3State->pFuncsDX) 1821 { 1822 RT_NOREF(pCmd); 1823 pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC->svga.p3dState); 1824 } 2136 static int vmsvga3dCmdDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetTopology const *pCmd, uint32_t cbCmd) 2137 { 2138 #ifdef VMSVGA3D_DX 2139 //ASMBreakpoint(); 2140 RT_NOREF(cbCmd); 2141 return vmsvga3dDXSetTopology(pThisCC, idDXContext, pCmd->topology); 2142 #else 2143 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2144 return VERR_NOT_SUPPORTED; 2145 #endif 1825 2146 } 1826 2147 1827 2148 1828 2149 /* SVGA_3D_CMD_DX_SET_RENDERTARGETS 1161 */ 1829 static void vmsvga3dCmdDXSetRenderTargets(PVGASTATECC pThisCC, SVGA3dCmdDXSetRenderTargets const *pCmd) 1830 { 1831 ASMBreakpoint(); 1832 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1833 if (pSvgaR3State->pFuncsDX) 1834 { 1835 RT_NOREF(pCmd); 1836 pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC->svga.p3dState); 1837 } 2150 static int vmsvga3dCmdDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetRenderTargets const *pCmd, uint32_t cbCmd) 2151 { 2152 #ifdef VMSVGA3D_DX 2153 //ASMBreakpoint(); 2154 SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pCmd[1]; 2155 uint32_t const cRenderTargetViewId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dRenderTargetViewId); 2156 return vmsvga3dDXSetRenderTargets(pThisCC, idDXContext, pCmd->depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId); 2157 #else 2158 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2159 return VERR_NOT_SUPPORTED; 2160 #endif 1838 2161 } 1839 2162 1840 2163 1841 2164 /* SVGA_3D_CMD_DX_SET_BLEND_STATE 1162 */ 1842 static void vmsvga3dCmdDXSetBlendState(PVGASTATECC pThisCC, SVGA3dCmdDXSetBlendState const *pCmd) 1843 { 1844 ASMBreakpoint(); 1845 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1846 if (pSvgaR3State->pFuncsDX) 1847 { 1848 RT_NOREF(pCmd); 1849 pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC->svga.p3dState); 1850 } 2165 static int vmsvga3dCmdDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd, uint32_t cbCmd) 2166 { 2167 #ifdef VMSVGA3D_DX 2168 //ASMBreakpoint(); 2169 RT_NOREF(cbCmd); 2170 return vmsvga3dDXSetBlendState(pThisCC, idDXContext, pCmd); 2171 #else 2172 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2173 return VERR_NOT_SUPPORTED; 2174 #endif 1851 2175 } 1852 2176 1853 2177 1854 2178 /* SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE 1163 */ 1855 static void vmsvga3dCmdDXSetDepthStencilState(PVGASTATECC pThisCC, SVGA3dCmdDXSetDepthStencilState const *pCmd) 1856 { 1857 ASMBreakpoint(); 1858 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1859 if (pSvgaR3State->pFuncsDX) 1860 { 1861 RT_NOREF(pCmd); 1862 pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC->svga.p3dState); 1863 } 2179 static int vmsvga3dCmdDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd, uint32_t cbCmd) 2180 { 2181 #ifdef VMSVGA3D_DX 2182 //ASMBreakpoint(); 2183 RT_NOREF(cbCmd); 2184 return vmsvga3dDXSetDepthStencilState(pThisCC, idDXContext, pCmd); 2185 #else 2186 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2187 return VERR_NOT_SUPPORTED; 2188 #endif 1864 2189 } 1865 2190 1866 2191 1867 2192 /* SVGA_3D_CMD_DX_SET_RASTERIZER_STATE 1164 */ 1868 static void vmsvga3dCmdDXSetRasterizerState(PVGASTATECC pThisCC, SVGA3dCmdDXSetRasterizerState const *pCmd) 1869 { 1870 ASMBreakpoint(); 1871 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1872 if (pSvgaR3State->pFuncsDX) 1873 { 1874 RT_NOREF(pCmd); 1875 pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC->svga.p3dState); 1876 } 2193 static int vmsvga3dCmdDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetRasterizerState const *pCmd, uint32_t cbCmd) 2194 { 2195 #ifdef VMSVGA3D_DX 2196 //ASMBreakpoint(); 2197 RT_NOREF(cbCmd); 2198 return vmsvga3dDXSetRasterizerState(pThisCC, idDXContext, pCmd->rasterizerId); 2199 #else 2200 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2201 return VERR_NOT_SUPPORTED; 2202 #endif 1877 2203 } 1878 2204 1879 2205 1880 2206 /* SVGA_3D_CMD_DX_DEFINE_QUERY 1165 */ 1881 static void vmsvga3dCmdDXDefineQuery(PVGASTATECC pThisCC, SVGA3dCmdDXDefineQuery const *pCmd) 1882 { 1883 ASMBreakpoint(); 1884 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1885 if (pSvgaR3State->pFuncsDX) 1886 { 1887 RT_NOREF(pCmd); 1888 pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC->svga.p3dState); 1889 } 2207 static int vmsvga3dCmdDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd, uint32_t cbCmd) 2208 { 2209 #ifdef VMSVGA3D_DX 2210 ASMBreakpoint(); 2211 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2212 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2213 return vmsvga3dDXDefineQuery(pThisCC, idDXContext); 2214 #else 2215 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2216 return VERR_NOT_SUPPORTED; 2217 #endif 1890 2218 } 1891 2219 1892 2220 1893 2221 /* SVGA_3D_CMD_DX_DESTROY_QUERY 1166 */ 1894 static void vmsvga3dCmdDXDestroyQuery(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyQuery const *pCmd) 1895 { 1896 ASMBreakpoint(); 1897 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1898 if (pSvgaR3State->pFuncsDX) 1899 { 1900 RT_NOREF(pCmd); 1901 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC->svga.p3dState); 1902 } 2222 static int vmsvga3dCmdDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd, uint32_t cbCmd) 2223 { 2224 #ifdef VMSVGA3D_DX 2225 ASMBreakpoint(); 2226 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2227 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2228 return vmsvga3dDXDestroyQuery(pThisCC, idDXContext); 2229 #else 2230 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2231 return VERR_NOT_SUPPORTED; 2232 #endif 1903 2233 } 1904 2234 1905 2235 1906 2236 /* SVGA_3D_CMD_DX_BIND_QUERY 1167 */ 1907 static void vmsvga3dCmdDXBindQuery(PVGASTATECC pThisCC, SVGA3dCmdDXBindQuery const *pCmd) 1908 { 1909 ASMBreakpoint(); 1910 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1911 if (pSvgaR3State->pFuncsDX) 1912 { 1913 RT_NOREF(pCmd); 1914 pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC->svga.p3dState); 1915 } 2237 static int vmsvga3dCmdDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, uint32_t cbCmd) 2238 { 2239 #ifdef VMSVGA3D_DX 2240 ASMBreakpoint(); 2241 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2242 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2243 return vmsvga3dDXBindQuery(pThisCC, idDXContext); 2244 #else 2245 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2246 return VERR_NOT_SUPPORTED; 2247 #endif 1916 2248 } 1917 2249 1918 2250 1919 2251 /* SVGA_3D_CMD_DX_SET_QUERY_OFFSET 1168 */ 1920 static void vmsvga3dCmdDXSetQueryOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetQueryOffset const *pCmd) 1921 { 1922 ASMBreakpoint(); 1923 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1924 if (pSvgaR3State->pFuncsDX) 1925 { 1926 RT_NOREF(pCmd); 1927 pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC->svga.p3dState); 1928 } 2252 static int vmsvga3dCmdDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd, uint32_t cbCmd) 2253 { 2254 #ifdef VMSVGA3D_DX 2255 ASMBreakpoint(); 2256 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2257 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2258 return vmsvga3dDXSetQueryOffset(pThisCC, idDXContext); 2259 #else 2260 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2261 return VERR_NOT_SUPPORTED; 2262 #endif 1929 2263 } 1930 2264 1931 2265 1932 2266 /* SVGA_3D_CMD_DX_BEGIN_QUERY 1169 */ 1933 static void vmsvga3dCmdDXBeginQuery(PVGASTATECC pThisCC, SVGA3dCmdDXBeginQuery const *pCmd) 1934 { 1935 ASMBreakpoint(); 1936 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1937 if (pSvgaR3State->pFuncsDX) 1938 { 1939 RT_NOREF(pCmd); 1940 pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC->svga.p3dState); 1941 } 2267 static int vmsvga3dCmdDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd, uint32_t cbCmd) 2268 { 2269 #ifdef VMSVGA3D_DX 2270 ASMBreakpoint(); 2271 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2272 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2273 return vmsvga3dDXBeginQuery(pThisCC, idDXContext); 2274 #else 2275 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2276 return VERR_NOT_SUPPORTED; 2277 #endif 1942 2278 } 1943 2279 1944 2280 1945 2281 /* SVGA_3D_CMD_DX_END_QUERY 1170 */ 1946 static void vmsvga3dCmdDXEndQuery(PVGASTATECC pThisCC, SVGA3dCmdDXEndQuery const *pCmd) 1947 { 1948 ASMBreakpoint(); 1949 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1950 if (pSvgaR3State->pFuncsDX) 1951 { 1952 RT_NOREF(pCmd); 1953 pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC->svga.p3dState); 1954 } 2282 static int vmsvga3dCmdDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd, uint32_t cbCmd) 2283 { 2284 #ifdef VMSVGA3D_DX 2285 ASMBreakpoint(); 2286 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2287 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2288 return vmsvga3dDXEndQuery(pThisCC, idDXContext); 2289 #else 2290 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2291 return VERR_NOT_SUPPORTED; 2292 #endif 1955 2293 } 1956 2294 1957 2295 1958 2296 /* SVGA_3D_CMD_DX_READBACK_QUERY 1171 */ 1959 static void vmsvga3dCmdDXReadbackQuery(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackQuery const *pCmd) 1960 { 1961 ASMBreakpoint(); 1962 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1963 if (pSvgaR3State->pFuncsDX) 1964 { 1965 RT_NOREF(pCmd); 1966 pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC->svga.p3dState); 1967 } 2297 static int vmsvga3dCmdDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd, uint32_t cbCmd) 2298 { 2299 #ifdef VMSVGA3D_DX 2300 ASMBreakpoint(); 2301 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2302 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2303 return vmsvga3dDXReadbackQuery(pThisCC, idDXContext); 2304 #else 2305 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2306 return VERR_NOT_SUPPORTED; 2307 #endif 1968 2308 } 1969 2309 1970 2310 1971 2311 /* SVGA_3D_CMD_DX_SET_PREDICATION 1172 */ 1972 static void vmsvga3dCmdDXSetPredication(PVGASTATECC pThisCC, SVGA3dCmdDXSetPredication const *pCmd) 1973 { 1974 ASMBreakpoint(); 1975 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1976 if (pSvgaR3State->pFuncsDX) 1977 { 1978 RT_NOREF(pCmd); 1979 pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC->svga.p3dState); 1980 } 2312 static int vmsvga3dCmdDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPredication const *pCmd, uint32_t cbCmd) 2313 { 2314 #ifdef VMSVGA3D_DX 2315 ASMBreakpoint(); 2316 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2317 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2318 return vmsvga3dDXSetPredication(pThisCC, idDXContext); 2319 #else 2320 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2321 return VERR_NOT_SUPPORTED; 2322 #endif 1981 2323 } 1982 2324 1983 2325 1984 2326 /* SVGA_3D_CMD_DX_SET_SOTARGETS 1173 */ 1985 static void vmsvga3dCmdDXSetSOTargets(PVGASTATECC pThisCC, SVGA3dCmdDXSetSOTargets const *pCmd) 1986 { 1987 ASMBreakpoint(); 1988 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 1989 if (pSvgaR3State->pFuncsDX) 1990 { 1991 RT_NOREF(pCmd); 1992 pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC->svga.p3dState); 1993 } 2327 static int vmsvga3dCmdDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSOTargets const *pCmd, uint32_t cbCmd) 2328 { 2329 #ifdef VMSVGA3D_DX 2330 ASMBreakpoint(); 2331 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2332 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2333 return vmsvga3dDXSetSOTargets(pThisCC, idDXContext); 2334 #else 2335 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2336 return VERR_NOT_SUPPORTED; 2337 #endif 1994 2338 } 1995 2339 1996 2340 1997 2341 /* SVGA_3D_CMD_DX_SET_VIEWPORTS 1174 */ 1998 static void vmsvga3dCmdDXSetViewports(PVGASTATECC pThisCC, SVGA3dCmdDXSetViewports const *pCmd) 1999 { 2000 ASMBreakpoint(); 2001 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2002 if (pSvgaR3State->pFuncsDX) 2003 { 2004 RT_NOREF(pCmd); 2005 pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC->svga.p3dState); 2006 } 2342 static int vmsvga3dCmdDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetViewports const *pCmd, uint32_t cbCmd) 2343 { 2344 #ifdef VMSVGA3D_DX 2345 //ASMBreakpoint(); 2346 SVGA3dViewport const *paViewport = (SVGA3dViewport *)&pCmd[1]; 2347 uint32_t const cViewport = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dViewport); 2348 return vmsvga3dDXSetViewports(pThisCC, idDXContext, cViewport, paViewport); 2349 #else 2350 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2351 return VERR_NOT_SUPPORTED; 2352 #endif 2007 2353 } 2008 2354 2009 2355 2010 2356 /* SVGA_3D_CMD_DX_SET_SCISSORRECTS 1175 */ 2011 static void vmsvga3dCmdDXSetScissorRects(PVGASTATECC pThisCC, SVGA3dCmdDXSetScissorRects const *pCmd) 2012 { 2013 ASMBreakpoint(); 2014 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2015 if (pSvgaR3State->pFuncsDX) 2016 { 2017 RT_NOREF(pCmd); 2018 pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC->svga.p3dState); 2019 } 2357 static int vmsvga3dCmdDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetScissorRects const *pCmd, uint32_t cbCmd) 2358 { 2359 #ifdef VMSVGA3D_DX 2360 //ASMBreakpoint(); 2361 SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1]; 2362 uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect); 2363 return vmsvga3dDXSetScissorRects(pThisCC, idDXContext, cRect, paRect); 2364 #else 2365 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2366 return VERR_NOT_SUPPORTED; 2367 #endif 2020 2368 } 2021 2369 2022 2370 2023 2371 /* SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW 1176 */ 2024 static void vmsvga3dCmdDXClearRenderTargetView(PVGASTATECC pThisCC, SVGA3dCmdDXClearRenderTargetView const *pCmd) 2025 { 2026 ASMBreakpoint(); 2027 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2028 if (pSvgaR3State->pFuncsDX) 2029 { 2030 RT_NOREF(pCmd); 2031 pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC->svga.p3dState); 2032 } 2372 static int vmsvga3dCmdDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd, uint32_t cbCmd) 2373 { 2374 #ifdef VMSVGA3D_DX 2375 ASMBreakpoint(); 2376 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2377 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2378 return vmsvga3dDXClearRenderTargetView(pThisCC, idDXContext); 2379 #else 2380 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2381 return VERR_NOT_SUPPORTED; 2382 #endif 2033 2383 } 2034 2384 2035 2385 2036 2386 /* SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW 1177 */ 2037 static void vmsvga3dCmdDXClearDepthStencilView(PVGASTATECC pThisCC, SVGA3dCmdDXClearDepthStencilView const *pCmd) 2038 { 2039 ASMBreakpoint(); 2040 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2041 if (pSvgaR3State->pFuncsDX) 2042 { 2043 RT_NOREF(pCmd); 2044 pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC->svga.p3dState); 2045 } 2387 static int vmsvga3dCmdDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd, uint32_t cbCmd) 2388 { 2389 #ifdef VMSVGA3D_DX 2390 ASMBreakpoint(); 2391 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2392 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2393 return vmsvga3dDXClearDepthStencilView(pThisCC, idDXContext); 2394 #else 2395 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2396 return VERR_NOT_SUPPORTED; 2397 #endif 2046 2398 } 2047 2399 2048 2400 2049 2401 /* SVGA_3D_CMD_DX_PRED_COPY_REGION 1178 */ 2050 static void vmsvga3dCmdDXPredCopyRegion(PVGASTATECC pThisCC, SVGA3dCmdDXPredCopyRegion const *pCmd) 2051 { 2052 ASMBreakpoint(); 2053 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2054 if (pSvgaR3State->pFuncsDX) 2055 { 2056 RT_NOREF(pCmd); 2057 pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC->svga.p3dState); 2058 } 2402 static int vmsvga3dCmdDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd, uint32_t cbCmd) 2403 { 2404 #ifdef VMSVGA3D_DX 2405 ASMBreakpoint(); 2406 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2407 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2408 return vmsvga3dDXPredCopyRegion(pThisCC, idDXContext); 2409 #else 2410 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2411 return VERR_NOT_SUPPORTED; 2412 #endif 2059 2413 } 2060 2414 2061 2415 2062 2416 /* SVGA_3D_CMD_DX_PRED_COPY 1179 */ 2063 static void vmsvga3dCmdDXPredCopy(PVGASTATECC pThisCC, SVGA3dCmdDXPredCopy const *pCmd) 2064 { 2065 ASMBreakpoint(); 2066 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2067 if (pSvgaR3State->pFuncsDX) 2068 { 2069 RT_NOREF(pCmd); 2070 pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC->svga.p3dState); 2071 } 2417 static int vmsvga3dCmdDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopy const *pCmd, uint32_t cbCmd) 2418 { 2419 #ifdef VMSVGA3D_DX 2420 ASMBreakpoint(); 2421 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2422 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2423 return vmsvga3dDXPredCopy(pThisCC, idDXContext); 2424 #else 2425 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2426 return VERR_NOT_SUPPORTED; 2427 #endif 2072 2428 } 2073 2429 2074 2430 2075 2431 /* SVGA_3D_CMD_DX_PRESENTBLT 1180 */ 2076 static void vmsvga3dCmdDXPresentBlt(PVGASTATECC pThisCC, SVGA3dCmdDXPresentBlt const *pCmd) 2077 { 2078 ASMBreakpoint(); 2079 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2080 if (pSvgaR3State->pFuncsDX) 2081 { 2082 RT_NOREF(pCmd); 2083 pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC->svga.p3dState); 2084 } 2432 static int vmsvga3dCmdDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPresentBlt const *pCmd, uint32_t cbCmd) 2433 { 2434 #ifdef VMSVGA3D_DX 2435 ASMBreakpoint(); 2436 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2437 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2438 return vmsvga3dDXPresentBlt(pThisCC, idDXContext); 2439 #else 2440 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2441 return VERR_NOT_SUPPORTED; 2442 #endif 2085 2443 } 2086 2444 2087 2445 2088 2446 /* SVGA_3D_CMD_DX_GENMIPS 1181 */ 2089 static void vmsvga3dCmdDXGenMips(PVGASTATECC pThisCC, SVGA3dCmdDXGenMips const *pCmd) 2090 { 2091 ASMBreakpoint(); 2092 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2093 if (pSvgaR3State->pFuncsDX) 2094 { 2095 RT_NOREF(pCmd); 2096 pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC->svga.p3dState); 2097 } 2447 static int vmsvga3dCmdDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd, uint32_t cbCmd) 2448 { 2449 #ifdef VMSVGA3D_DX 2450 ASMBreakpoint(); 2451 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2452 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2453 return vmsvga3dDXGenMips(pThisCC, idDXContext); 2454 #else 2455 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2456 return VERR_NOT_SUPPORTED; 2457 #endif 2098 2458 } 2099 2459 2100 2460 2101 2461 /* SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE 1182 */ 2102 static void vmsvga3dCmdDXUpdateSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXUpdateSubResource const *pCmd) 2103 { 2104 ASMBreakpoint(); 2105 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2106 if (pSvgaR3State->pFuncsDX) 2107 { 2108 RT_NOREF(pCmd); 2109 pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource(pThisCC->svga.p3dState); 2110 } 2462 static int vmsvga3dCmdDXUpdateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXUpdateSubResource const *pCmd, uint32_t cbCmd) 2463 { 2464 #ifdef VMSVGA3D_DX 2465 ASMBreakpoint(); 2466 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2467 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2468 return vmsvga3dDXUpdateSubResource(pThisCC, idDXContext); 2469 #else 2470 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2471 return VERR_NOT_SUPPORTED; 2472 #endif 2111 2473 } 2112 2474 2113 2475 2114 2476 /* SVGA_3D_CMD_DX_READBACK_SUBRESOURCE 1183 */ 2115 static void vmsvga3dCmdDXReadbackSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackSubResource const *pCmd) 2116 { 2117 ASMBreakpoint(); 2118 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2119 if (pSvgaR3State->pFuncsDX) 2120 { 2121 RT_NOREF(pCmd); 2122 pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource(pThisCC->svga.p3dState); 2123 } 2477 static int vmsvga3dCmdDXReadbackSubResource(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackSubResource const *pCmd, uint32_t cbCmd) 2478 { 2479 #ifdef VMSVGA3D_DX 2480 ASMBreakpoint(); 2481 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2482 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2483 return vmsvga3dDXReadbackSubResource(pThisCC, idDXContext); 2484 #else 2485 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2486 return VERR_NOT_SUPPORTED; 2487 #endif 2124 2488 } 2125 2489 2126 2490 2127 2491 /* SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE 1184 */ 2128 static void vmsvga3dCmdDXInvalidateSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXInvalidateSubResource const *pCmd) 2129 { 2130 ASMBreakpoint(); 2131 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2132 if (pSvgaR3State->pFuncsDX) 2133 { 2134 RT_NOREF(pCmd); 2135 pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource(pThisCC->svga.p3dState); 2136 } 2492 static int vmsvga3dCmdDXInvalidateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXInvalidateSubResource const *pCmd, uint32_t cbCmd) 2493 { 2494 #ifdef VMSVGA3D_DX 2495 ASMBreakpoint(); 2496 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2497 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2498 return vmsvga3dDXInvalidateSubResource(pThisCC, idDXContext); 2499 #else 2500 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2501 return VERR_NOT_SUPPORTED; 2502 #endif 2137 2503 } 2138 2504 2139 2505 2140 2506 /* SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW 1185 */ 2141 static void vmsvga3dCmdDXDefineShaderResourceView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineShaderResourceView const *pCmd) 2142 { 2143 ASMBreakpoint(); 2144 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2145 if (pSvgaR3State->pFuncsDX) 2146 { 2147 RT_NOREF(pCmd); 2148 pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC->svga.p3dState); 2149 } 2507 static int vmsvga3dCmdDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd, uint32_t cbCmd) 2508 { 2509 #ifdef VMSVGA3D_DX 2510 ASMBreakpoint(); 2511 RT_NOREF(cbCmd); 2512 return vmsvga3dDXDefineShaderResourceView(pThisCC, idDXContext, pCmd); 2513 #else 2514 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2515 return VERR_NOT_SUPPORTED; 2516 #endif 2150 2517 } 2151 2518 2152 2519 2153 2520 /* SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW 1186 */ 2154 static void vmsvga3dCmdDXDestroyShaderResourceView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyShaderResourceView const *pCmd) 2155 { 2156 ASMBreakpoint(); 2157 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2158 if (pSvgaR3State->pFuncsDX) 2159 { 2160 RT_NOREF(pCmd); 2161 pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC->svga.p3dState); 2162 } 2521 static int vmsvga3dCmdDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd, uint32_t cbCmd) 2522 { 2523 #ifdef VMSVGA3D_DX 2524 ASMBreakpoint(); 2525 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2526 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2527 return vmsvga3dDXDestroyShaderResourceView(pThisCC, idDXContext); 2528 #else 2529 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2530 return VERR_NOT_SUPPORTED; 2531 #endif 2163 2532 } 2164 2533 2165 2534 2166 2535 /* SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW 1187 */ 2167 static void vmsvga3dCmdDXDefineRenderTargetView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineRenderTargetView const *pCmd) 2168 { 2169 ASMBreakpoint(); 2170 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2171 if (pSvgaR3State->pFuncsDX) 2172 { 2173 RT_NOREF(pCmd); 2174 pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC->svga.p3dState); 2175 } 2536 static int vmsvga3dCmdDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd, uint32_t cbCmd) 2537 { 2538 #ifdef VMSVGA3D_DX 2539 //ASMBreakpoint(); 2540 RT_NOREF(cbCmd); 2541 return vmsvga3dDXDefineRenderTargetView(pThisCC, idDXContext, pCmd); 2542 #else 2543 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2544 return VERR_NOT_SUPPORTED; 2545 #endif 2176 2546 } 2177 2547 2178 2548 2179 2549 /* SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW 1188 */ 2180 static void vmsvga3dCmdDXDestroyRenderTargetView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyRenderTargetView const *pCmd) 2181 { 2182 ASMBreakpoint(); 2183 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2184 if (pSvgaR3State->pFuncsDX) 2185 { 2186 RT_NOREF(pCmd); 2187 pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC->svga.p3dState); 2188 } 2550 static int vmsvga3dCmdDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd, uint32_t cbCmd) 2551 { 2552 #ifdef VMSVGA3D_DX 2553 ASMBreakpoint(); 2554 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2555 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2556 return vmsvga3dDXDestroyRenderTargetView(pThisCC, idDXContext); 2557 #else 2558 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2559 return VERR_NOT_SUPPORTED; 2560 #endif 2189 2561 } 2190 2562 2191 2563 2192 2564 /* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW 1189 */ 2193 static void vmsvga3dCmdDXDefineDepthStencilView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineDepthStencilView const *pCmd) 2194 { 2195 ASMBreakpoint(); 2196 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2197 if (pSvgaR3State->pFuncsDX) 2198 { 2199 RT_NOREF(pCmd); 2200 pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC->svga.p3dState); 2201 } 2565 static int vmsvga3dCmdDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView const *pCmd, uint32_t cbCmd) 2566 { 2567 #ifdef VMSVGA3D_DX 2568 ASMBreakpoint(); 2569 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2570 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2571 return vmsvga3dDXDefineDepthStencilView(pThisCC, idDXContext); 2572 #else 2573 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2574 return VERR_NOT_SUPPORTED; 2575 #endif 2202 2576 } 2203 2577 2204 2578 2205 2579 /* SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW 1190 */ 2206 static void vmsvga3dCmdDXDestroyDepthStencilView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyDepthStencilView const *pCmd) 2207 { 2208 ASMBreakpoint(); 2209 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2210 if (pSvgaR3State->pFuncsDX) 2211 { 2212 RT_NOREF(pCmd); 2213 pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC->svga.p3dState); 2214 } 2580 static int vmsvga3dCmdDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd, uint32_t cbCmd) 2581 { 2582 #ifdef VMSVGA3D_DX 2583 ASMBreakpoint(); 2584 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2585 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2586 return vmsvga3dDXDestroyDepthStencilView(pThisCC, idDXContext); 2587 #else 2588 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2589 return VERR_NOT_SUPPORTED; 2590 #endif 2215 2591 } 2216 2592 2217 2593 2218 2594 /* SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT 1191 */ 2219 static void vmsvga3dCmdDXDefineElementLayout(PVGASTATECC pThisCC, SVGA3dCmdDXDefineElementLayout const *pCmd) 2220 { 2221 ASMBreakpoint(); 2222 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2223 if (pSvgaR3State->pFuncsDX) 2224 { 2225 RT_NOREF(pCmd); 2226 pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC->svga.p3dState); 2227 } 2595 static int vmsvga3dCmdDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineElementLayout const *pCmd, uint32_t cbCmd) 2596 { 2597 #ifdef VMSVGA3D_DX 2598 //ASMBreakpoint(); 2599 SVGA3dInputElementDesc const *paDesc = (SVGA3dInputElementDesc *)&pCmd[1]; 2600 uint32_t const cDesc = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dInputElementDesc); 2601 return vmsvga3dDXDefineElementLayout(pThisCC, idDXContext, pCmd->elementLayoutId, cDesc, paDesc); 2602 #else 2603 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2604 return VERR_NOT_SUPPORTED; 2605 #endif 2228 2606 } 2229 2607 2230 2608 2231 2609 /* SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT 1192 */ 2232 static void vmsvga3dCmdDXDestroyElementLayout(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyElementLayout const *pCmd) 2233 { 2234 ASMBreakpoint(); 2235 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2236 if (pSvgaR3State->pFuncsDX) 2237 { 2238 RT_NOREF(pCmd); 2239 pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC->svga.p3dState); 2240 } 2610 static int vmsvga3dCmdDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd, uint32_t cbCmd) 2611 { 2612 #ifdef VMSVGA3D_DX 2613 ASMBreakpoint(); 2614 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2615 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2616 return vmsvga3dDXDestroyElementLayout(pThisCC, idDXContext); 2617 #else 2618 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2619 return VERR_NOT_SUPPORTED; 2620 #endif 2241 2621 } 2242 2622 2243 2623 2244 2624 /* SVGA_3D_CMD_DX_DEFINE_BLEND_STATE 1193 */ 2245 static void vmsvga3dCmdDXDefineBlendState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineBlendState const *pCmd) 2246 { 2247 ASMBreakpoint(); 2248 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2249 if (pSvgaR3State->pFuncsDX) 2250 { 2251 RT_NOREF(pCmd); 2252 pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC->svga.p3dState); 2253 } 2625 static int vmsvga3dCmdDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd, uint32_t cbCmd) 2626 { 2627 #ifdef VMSVGA3D_DX 2628 //ASMBreakpoint(); 2629 RT_NOREF(cbCmd); 2630 return vmsvga3dDXDefineBlendState(pThisCC, idDXContext, pCmd); 2631 #else 2632 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2633 return VERR_NOT_SUPPORTED; 2634 #endif 2254 2635 } 2255 2636 2256 2637 2257 2638 /* SVGA_3D_CMD_DX_DESTROY_BLEND_STATE 1194 */ 2258 static void vmsvga3dCmdDXDestroyBlendState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyBlendState const *pCmd) 2259 { 2260 ASMBreakpoint(); 2261 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2262 if (pSvgaR3State->pFuncsDX) 2263 { 2264 RT_NOREF(pCmd); 2265 pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC->svga.p3dState); 2266 } 2639 static int vmsvga3dCmdDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd, uint32_t cbCmd) 2640 { 2641 #ifdef VMSVGA3D_DX 2642 ASMBreakpoint(); 2643 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2644 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2645 return vmsvga3dDXDestroyBlendState(pThisCC, idDXContext); 2646 #else 2647 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2648 return VERR_NOT_SUPPORTED; 2649 #endif 2267 2650 } 2268 2651 2269 2652 2270 2653 /* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE 1195 */ 2271 static void vmsvga3dCmdDXDefineDepthStencilState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineDepthStencilState const *pCmd) 2272 { 2273 ASMBreakpoint(); 2274 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2275 if (pSvgaR3State->pFuncsDX) 2276 { 2277 RT_NOREF(pCmd); 2278 pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC->svga.p3dState); 2279 } 2654 static int vmsvga3dCmdDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd, uint32_t cbCmd) 2655 { 2656 #ifdef VMSVGA3D_DX 2657 //ASMBreakpoint(); 2658 RT_NOREF(cbCmd); 2659 return vmsvga3dDXDefineDepthStencilState(pThisCC, idDXContext, pCmd); 2660 #else 2661 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2662 return VERR_NOT_SUPPORTED; 2663 #endif 2280 2664 } 2281 2665 2282 2666 2283 2667 /* SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE 1196 */ 2284 static void vmsvga3dCmdDXDestroyDepthStencilState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyDepthStencilState const *pCmd) 2285 { 2286 ASMBreakpoint(); 2287 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2288 if (pSvgaR3State->pFuncsDX) 2289 { 2290 RT_NOREF(pCmd); 2291 pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC->svga.p3dState); 2292 } 2668 static int vmsvga3dCmdDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd, uint32_t cbCmd) 2669 { 2670 #ifdef VMSVGA3D_DX 2671 ASMBreakpoint(); 2672 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2673 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2674 return vmsvga3dDXDestroyDepthStencilState(pThisCC, idDXContext); 2675 #else 2676 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2677 return VERR_NOT_SUPPORTED; 2678 #endif 2293 2679 } 2294 2680 2295 2681 2296 2682 /* SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE 1197 */ 2297 static void vmsvga3dCmdDXDefineRasterizerState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineRasterizerState const *pCmd) 2298 { 2299 ASMBreakpoint(); 2300 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2301 if (pSvgaR3State->pFuncsDX) 2302 { 2303 RT_NOREF(pCmd); 2304 pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC->svga.p3dState); 2305 } 2683 static int vmsvga3dCmdDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd, uint32_t cbCmd) 2684 { 2685 #ifdef VMSVGA3D_DX 2686 //ASMBreakpoint(); 2687 RT_NOREF(cbCmd); 2688 return vmsvga3dDXDefineRasterizerState(pThisCC, idDXContext, pCmd); 2689 #else 2690 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2691 return VERR_NOT_SUPPORTED; 2692 #endif 2306 2693 } 2307 2694 2308 2695 2309 2696 /* SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE 1198 */ 2310 static void vmsvga3dCmdDXDestroyRasterizerState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyRasterizerState const *pCmd) 2311 { 2312 ASMBreakpoint(); 2313 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2314 if (pSvgaR3State->pFuncsDX) 2315 { 2316 RT_NOREF(pCmd); 2317 pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC->svga.p3dState); 2318 } 2697 static int vmsvga3dCmdDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd, uint32_t cbCmd) 2698 { 2699 #ifdef VMSVGA3D_DX 2700 ASMBreakpoint(); 2701 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2702 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2703 return vmsvga3dDXDestroyRasterizerState(pThisCC, idDXContext); 2704 #else 2705 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2706 return VERR_NOT_SUPPORTED; 2707 #endif 2319 2708 } 2320 2709 2321 2710 2322 2711 /* SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE 1199 */ 2323 static void vmsvga3dCmdDXDefineSamplerState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineSamplerState const *pCmd) 2324 { 2325 ASMBreakpoint(); 2326 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2327 if (pSvgaR3State->pFuncsDX) 2328 { 2329 RT_NOREF(pCmd); 2330 pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC->svga.p3dState); 2331 } 2712 static int vmsvga3dCmdDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd, uint32_t cbCmd) 2713 { 2714 #ifdef VMSVGA3D_DX 2715 //ASMBreakpoint(); 2716 RT_NOREF(cbCmd); 2717 return vmsvga3dDXDefineSamplerState(pThisCC, idDXContext, pCmd); 2718 #else 2719 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2720 return VERR_NOT_SUPPORTED; 2721 #endif 2332 2722 } 2333 2723 2334 2724 2335 2725 /* SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE 1200 */ 2336 static void vmsvga3dCmdDXDestroySamplerState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroySamplerState const *pCmd) 2337 { 2338 ASMBreakpoint(); 2339 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2340 if (pSvgaR3State->pFuncsDX) 2341 { 2342 RT_NOREF(pCmd); 2343 pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC->svga.p3dState); 2344 } 2726 static int vmsvga3dCmdDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd, uint32_t cbCmd) 2727 { 2728 #ifdef VMSVGA3D_DX 2729 ASMBreakpoint(); 2730 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2731 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2732 return vmsvga3dDXDestroySamplerState(pThisCC, idDXContext); 2733 #else 2734 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2735 return VERR_NOT_SUPPORTED; 2736 #endif 2345 2737 } 2346 2738 2347 2739 2348 2740 /* SVGA_3D_CMD_DX_DEFINE_SHADER 1201 */ 2349 static void vmsvga3dCmdDXDefineShader(PVGASTATECC pThisCC, SVGA3dCmdDXDefineShader const *pCmd) 2350 { 2351 ASMBreakpoint(); 2352 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2353 if (pSvgaR3State->pFuncsDX) 2354 { 2355 RT_NOREF(pCmd); 2356 pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC->svga.p3dState); 2357 } 2741 static int vmsvga3dCmdDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd, uint32_t cbCmd) 2742 { 2743 #ifdef VMSVGA3D_DX 2744 //ASMBreakpoint(); 2745 RT_NOREF(cbCmd); 2746 return vmsvga3dDXDefineShader(pThisCC, idDXContext, pCmd); 2747 #else 2748 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2749 return VERR_NOT_SUPPORTED; 2750 #endif 2358 2751 } 2359 2752 2360 2753 2361 2754 /* SVGA_3D_CMD_DX_DESTROY_SHADER 1202 */ 2362 static void vmsvga3dCmdDXDestroyShader(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyShader const *pCmd) 2363 { 2364 ASMBreakpoint(); 2365 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2366 if (pSvgaR3State->pFuncsDX) 2367 { 2368 RT_NOREF(pCmd); 2369 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC->svga.p3dState); 2370 } 2755 static int vmsvga3dCmdDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd, uint32_t cbCmd) 2756 { 2757 #ifdef VMSVGA3D_DX 2758 ASMBreakpoint(); 2759 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2760 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2761 return vmsvga3dDXDestroyShader(pThisCC, idDXContext); 2762 #else 2763 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2764 return VERR_NOT_SUPPORTED; 2765 #endif 2371 2766 } 2372 2767 2373 2768 2374 2769 /* SVGA_3D_CMD_DX_BIND_SHADER 1203 */ 2375 static void vmsvga3dCmdDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd) 2376 { 2377 ASMBreakpoint(); 2378 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2379 if (pSvgaR3State->pFuncsDX) 2380 { 2381 RT_NOREF(pCmd); 2382 pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC->svga.p3dState); 2383 } 2770 static int vmsvga3dCmdDXBindShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindShader const *pCmd, uint32_t cbCmd) 2771 { 2772 #ifdef VMSVGA3D_DX 2773 //ASMBreakpoint(); 2774 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2775 RT_NOREF(cbCmd); 2776 ASSERT_GUEST_LOGREL_MSG(idDXContext == pCmd->cid, ("idDXContext = %u, pCmd->cid = %u\n", idDXContext, pCmd->cid)); 2777 /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */ 2778 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid); 2779 return vmsvga3dDXBindShader(pThisCC, pCmd->cid, pMob, pCmd->shid, pCmd->offsetInBytes); 2780 #else 2781 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2782 return VERR_NOT_SUPPORTED; 2783 #endif 2384 2784 } 2385 2785 2386 2786 2387 2787 /* SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT 1204 */ 2388 static void vmsvga3dCmdDXDefineStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXDefineStreamOutput const *pCmd) 2389 { 2390 ASMBreakpoint(); 2391 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2392 if (pSvgaR3State->pFuncsDX) 2393 { 2394 RT_NOREF(pCmd); 2395 pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC->svga.p3dState); 2396 } 2788 static int vmsvga3dCmdDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd, uint32_t cbCmd) 2789 { 2790 #ifdef VMSVGA3D_DX 2791 ASMBreakpoint(); 2792 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2793 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2794 return vmsvga3dDXDefineStreamOutput(pThisCC, idDXContext); 2795 #else 2796 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2797 return VERR_NOT_SUPPORTED; 2798 #endif 2397 2799 } 2398 2800 2399 2801 2400 2802 /* SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT 1205 */ 2401 static void vmsvga3dCmdDXDestroyStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyStreamOutput const *pCmd) 2402 { 2403 ASMBreakpoint(); 2404 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2405 if (pSvgaR3State->pFuncsDX) 2406 { 2407 RT_NOREF(pCmd); 2408 pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC->svga.p3dState); 2409 } 2803 static int vmsvga3dCmdDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd, uint32_t cbCmd) 2804 { 2805 #ifdef VMSVGA3D_DX 2806 ASMBreakpoint(); 2807 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2808 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2809 return vmsvga3dDXDestroyStreamOutput(pThisCC, idDXContext); 2810 #else 2811 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2812 return VERR_NOT_SUPPORTED; 2813 #endif 2410 2814 } 2411 2815 2412 2816 2413 2817 /* SVGA_3D_CMD_DX_SET_STREAMOUTPUT 1206 */ 2414 static void vmsvga3dCmdDXSetStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXSetStreamOutput const *pCmd) 2415 { 2416 ASMBreakpoint(); 2417 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2418 if (pSvgaR3State->pFuncsDX) 2419 { 2420 RT_NOREF(pCmd); 2421 pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC->svga.p3dState); 2422 } 2818 static int vmsvga3dCmdDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd, uint32_t cbCmd) 2819 { 2820 #ifdef VMSVGA3D_DX 2821 ASMBreakpoint(); 2822 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2823 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2824 return vmsvga3dDXSetStreamOutput(pThisCC, idDXContext); 2825 #else 2826 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2827 return VERR_NOT_SUPPORTED; 2828 #endif 2423 2829 } 2424 2830 2425 2831 2426 2832 /* SVGA_3D_CMD_DX_SET_COTABLE 1207 */ 2427 static void vmsvga3dCmdDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd) 2428 { 2429 ASMBreakpoint(); 2430 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2431 if (pSvgaR3State->pFuncsDX) 2432 { 2433 RT_NOREF(pCmd); 2434 pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC->svga.p3dState); 2435 } 2833 static int vmsvga3dCmdDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, uint32_t cbCmd) 2834 { 2835 #ifdef VMSVGA3D_DX 2836 //ASMBreakpoint(); 2837 RT_NOREF(cbCmd); 2838 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2839 /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */ 2840 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid); 2841 return vmsvga3dDXSetCOTable(pThisCC, pCmd->cid, pMob, pCmd->type, pCmd->validSizeInBytes); 2842 #else 2843 RT_NOREF(pThisCC, pCmd, cbCmd); 2844 return VERR_NOT_SUPPORTED; 2845 #endif 2436 2846 } 2437 2847 2438 2848 2439 2849 /* SVGA_3D_CMD_DX_READBACK_COTABLE 1208 */ 2440 static void vmsvga3dCmdDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd) 2441 { 2442 ASMBreakpoint(); 2443 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2444 if (pSvgaR3State->pFuncsDX) 2445 { 2446 RT_NOREF(pCmd); 2447 pSvgaR3State->pFuncsDX->pfnDXReadbackCOTable(pThisCC->svga.p3dState); 2448 } 2850 static int vmsvga3dCmdDXReadbackCOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackCOTable const *pCmd, uint32_t cbCmd) 2851 { 2852 #ifdef VMSVGA3D_DX 2853 ASMBreakpoint(); 2854 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2855 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2856 return vmsvga3dDXReadbackCOTable(pThisCC, idDXContext); 2857 #else 2858 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2859 return VERR_NOT_SUPPORTED; 2860 #endif 2449 2861 } 2450 2862 2451 2863 2452 2864 /* SVGA_3D_CMD_DX_BUFFER_COPY 1209 */ 2453 static void vmsvga3dCmdDXBufferCopy(PVGASTATECC pThisCC, SVGA3dCmdDXBufferCopy const *pCmd) 2454 { 2455 ASMBreakpoint(); 2456 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2457 if (pSvgaR3State->pFuncsDX) 2458 { 2459 RT_NOREF(pCmd); 2460 pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC->svga.p3dState); 2461 } 2865 static int vmsvga3dCmdDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBufferCopy const *pCmd, uint32_t cbCmd) 2866 { 2867 #ifdef VMSVGA3D_DX 2868 ASMBreakpoint(); 2869 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2870 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2871 return vmsvga3dDXBufferCopy(pThisCC, idDXContext); 2872 #else 2873 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2874 return VERR_NOT_SUPPORTED; 2875 #endif 2462 2876 } 2463 2877 2464 2878 2465 2879 /* SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER 1210 */ 2466 static void vmsvga3dCmdDXTransferFromBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXTransferFromBuffer const *pCmd) 2467 { 2468 ASMBreakpoint(); 2469 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2470 if (pSvgaR3State->pFuncsDX) 2471 { 2472 RT_NOREF(pCmd); 2473 pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer(pThisCC->svga.p3dState); 2474 } 2880 static int vmsvga3dCmdDXTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXTransferFromBuffer const *pCmd, uint32_t cbCmd) 2881 { 2882 #ifdef VMSVGA3D_DX 2883 ASMBreakpoint(); 2884 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2885 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2886 return vmsvga3dDXTransferFromBuffer(pThisCC, idDXContext); 2887 #else 2888 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2889 return VERR_NOT_SUPPORTED; 2890 #endif 2475 2891 } 2476 2892 2477 2893 2478 2894 /* SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK 1211 */ 2479 static void vmsvga3dCmdDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, SVGA3dCmdDXSurfaceCopyAndReadback const *pCmd) 2480 { 2481 ASMBreakpoint(); 2482 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2483 if (pSvgaR3State->pFuncsDX) 2484 { 2485 RT_NOREF(pCmd); 2486 pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC->svga.p3dState); 2487 } 2895 static int vmsvga3dCmdDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSurfaceCopyAndReadback const *pCmd, uint32_t cbCmd) 2896 { 2897 #ifdef VMSVGA3D_DX 2898 ASMBreakpoint(); 2899 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2900 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2901 return vmsvga3dDXSurfaceCopyAndReadback(pThisCC, idDXContext); 2902 #else 2903 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2904 return VERR_NOT_SUPPORTED; 2905 #endif 2488 2906 } 2489 2907 2490 2908 2491 2909 /* SVGA_3D_CMD_DX_MOVE_QUERY 1212 */ 2492 static void vmsvga3dCmdDXMoveQuery(PVGASTATECC pThisCC, SVGA3dCmdDXMoveQuery const *pCmd) 2493 { 2494 ASMBreakpoint(); 2495 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2496 if (pSvgaR3State->pFuncsDX) 2497 { 2498 RT_NOREF(pCmd); 2499 pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC->svga.p3dState); 2500 } 2910 static int vmsvga3dCmdDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXMoveQuery const *pCmd, uint32_t cbCmd) 2911 { 2912 #ifdef VMSVGA3D_DX 2913 ASMBreakpoint(); 2914 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2915 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2916 return vmsvga3dDXMoveQuery(pThisCC, idDXContext); 2917 #else 2918 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2919 return VERR_NOT_SUPPORTED; 2920 #endif 2501 2921 } 2502 2922 2503 2923 2504 2924 /* SVGA_3D_CMD_DX_BIND_ALL_QUERY 1213 */ 2505 static void vmsvga3dCmdDXBindAllQuery(PVGASTATECC pThisCC, SVGA3dCmdDXBindAllQuery const *pCmd) 2506 { 2507 ASMBreakpoint(); 2508 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2509 if (pSvgaR3State->pFuncsDX) 2510 { 2511 RT_NOREF(pCmd); 2512 pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC->svga.p3dState); 2513 } 2925 static int vmsvga3dCmdDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd, uint32_t cbCmd) 2926 { 2927 #ifdef VMSVGA3D_DX 2928 ASMBreakpoint(); 2929 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2930 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2931 return vmsvga3dDXBindAllQuery(pThisCC, idDXContext); 2932 #else 2933 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2934 return VERR_NOT_SUPPORTED; 2935 #endif 2514 2936 } 2515 2937 2516 2938 2517 2939 /* SVGA_3D_CMD_DX_READBACK_ALL_QUERY 1214 */ 2518 static void vmsvga3dCmdDXReadbackAllQuery(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackAllQuery const *pCmd) 2519 { 2520 ASMBreakpoint(); 2521 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2522 if (pSvgaR3State->pFuncsDX) 2523 { 2524 RT_NOREF(pCmd); 2525 pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC->svga.p3dState); 2526 } 2940 static int vmsvga3dCmdDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd, uint32_t cbCmd) 2941 { 2942 #ifdef VMSVGA3D_DX 2943 ASMBreakpoint(); 2944 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2945 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2946 return vmsvga3dDXReadbackAllQuery(pThisCC, idDXContext); 2947 #else 2948 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2949 return VERR_NOT_SUPPORTED; 2950 #endif 2527 2951 } 2528 2952 2529 2953 2530 2954 /* SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER 1215 */ 2531 static void vmsvga3dCmdDXPredTransferFromBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXPredTransferFromBuffer const *pCmd) 2532 { 2533 ASMBreakpoint(); 2534 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2535 if (pSvgaR3State->pFuncsDX) 2536 { 2537 RT_NOREF(pCmd); 2538 pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer(pThisCC->svga.p3dState); 2539 } 2955 static int vmsvga3dCmdDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredTransferFromBuffer const *pCmd, uint32_t cbCmd) 2956 { 2957 #ifdef VMSVGA3D_DX 2958 ASMBreakpoint(); 2959 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2960 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2961 return vmsvga3dDXPredTransferFromBuffer(pThisCC, idDXContext); 2962 #else 2963 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2964 return VERR_NOT_SUPPORTED; 2965 #endif 2540 2966 } 2541 2967 2542 2968 2543 2969 /* SVGA_3D_CMD_DX_MOB_FENCE_64 1216 */ 2544 static void vmsvga3dCmdDXMobFence64(PVGASTATECC pThisCC, SVGA3dCmdDXMobFence64 const *pCmd) 2545 { 2546 ASMBreakpoint(); 2547 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2548 if (pSvgaR3State->pFuncsDX) 2549 { 2550 RT_NOREF(pCmd); 2551 pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC->svga.p3dState); 2552 } 2970 static int vmsvga3dCmdDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXMobFence64 const *pCmd, uint32_t cbCmd) 2971 { 2972 #ifdef VMSVGA3D_DX 2973 ASMBreakpoint(); 2974 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2975 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2976 return vmsvga3dDXMobFence64(pThisCC, idDXContext); 2977 #else 2978 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2979 return VERR_NOT_SUPPORTED; 2980 #endif 2553 2981 } 2554 2982 2555 2983 2556 2984 /* SVGA_3D_CMD_DX_BIND_ALL_SHADER 1217 */ 2557 static void vmsvga3dCmdDXBindAllShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindAllShader const *pCmd) 2558 { 2559 ASMBreakpoint(); 2560 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2561 if (pSvgaR3State->pFuncsDX) 2562 { 2563 RT_NOREF(pCmd); 2564 pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC->svga.p3dState); 2565 } 2985 static int vmsvga3dCmdDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllShader const *pCmd, uint32_t cbCmd) 2986 { 2987 #ifdef VMSVGA3D_DX 2988 ASMBreakpoint(); 2989 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2990 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 2991 return vmsvga3dDXBindAllShader(pThisCC, idDXContext); 2992 #else 2993 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 2994 return VERR_NOT_SUPPORTED; 2995 #endif 2566 2996 } 2567 2997 2568 2998 2569 2999 /* SVGA_3D_CMD_DX_HINT 1218 */ 2570 static void vmsvga3dCmdDXHint(PVGASTATECC pThisCC, SVGA3dCmdDXHint const *pCmd) 2571 { 2572 ASMBreakpoint(); 2573 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2574 if (pSvgaR3State->pFuncsDX) 2575 { 2576 RT_NOREF(pCmd); 2577 pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC->svga.p3dState); 2578 } 3000 static int vmsvga3dCmdDXHint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXHint const *pCmd, uint32_t cbCmd) 3001 { 3002 #ifdef VMSVGA3D_DX 3003 ASMBreakpoint(); 3004 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3005 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3006 return vmsvga3dDXHint(pThisCC, idDXContext); 3007 #else 3008 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3009 return VERR_NOT_SUPPORTED; 3010 #endif 2579 3011 } 2580 3012 2581 3013 2582 3014 /* SVGA_3D_CMD_DX_BUFFER_UPDATE 1219 */ 2583 static void vmsvga3dCmdDXBufferUpdate(PVGASTATECC pThisCC, SVGA3dCmdDXBufferUpdate const *pCmd) 2584 { 2585 ASMBreakpoint(); 2586 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2587 if (pSvgaR3State->pFuncsDX) 2588 { 2589 RT_NOREF(pCmd); 2590 pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC->svga.p3dState); 2591 } 3015 static int vmsvga3dCmdDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBufferUpdate const *pCmd, uint32_t cbCmd) 3016 { 3017 #ifdef VMSVGA3D_DX 3018 ASMBreakpoint(); 3019 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3020 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3021 return vmsvga3dDXBufferUpdate(pThisCC, idDXContext); 3022 #else 3023 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3024 return VERR_NOT_SUPPORTED; 3025 #endif 2592 3026 } 2593 3027 2594 3028 2595 3029 /* SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET 1220 */ 2596 static void vmsvga3dCmdDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetVSConstantBufferOffset const *pCmd) 2597 { 2598 ASMBreakpoint(); 2599 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2600 if (pSvgaR3State->pFuncsDX) 2601 { 2602 RT_NOREF(pCmd); 2603 pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC->svga.p3dState); 2604 } 3030 static int vmsvga3dCmdDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetVSConstantBufferOffset const *pCmd, uint32_t cbCmd) 3031 { 3032 #ifdef VMSVGA3D_DX 3033 ASMBreakpoint(); 3034 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3035 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3036 return vmsvga3dDXSetVSConstantBufferOffset(pThisCC, idDXContext); 3037 #else 3038 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3039 return VERR_NOT_SUPPORTED; 3040 #endif 2605 3041 } 2606 3042 2607 3043 2608 3044 /* SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET 1221 */ 2609 static void vmsvga3dCmdDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetPSConstantBufferOffset const *pCmd) 2610 { 2611 ASMBreakpoint(); 2612 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2613 if (pSvgaR3State->pFuncsDX) 2614 { 2615 RT_NOREF(pCmd); 2616 pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC->svga.p3dState); 2617 } 3045 static int vmsvga3dCmdDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPSConstantBufferOffset const *pCmd, uint32_t cbCmd) 3046 { 3047 #ifdef VMSVGA3D_DX 3048 ASMBreakpoint(); 3049 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3050 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3051 return vmsvga3dDXSetPSConstantBufferOffset(pThisCC, idDXContext); 3052 #else 3053 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3054 return VERR_NOT_SUPPORTED; 3055 #endif 2618 3056 } 2619 3057 2620 3058 2621 3059 /* SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET 1222 */ 2622 static void vmsvga3dCmdDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetGSConstantBufferOffset const *pCmd) 2623 { 2624 ASMBreakpoint(); 2625 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2626 if (pSvgaR3State->pFuncsDX) 2627 { 2628 RT_NOREF(pCmd); 2629 pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC->svga.p3dState); 2630 } 3060 static int vmsvga3dCmdDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetGSConstantBufferOffset const *pCmd, uint32_t cbCmd) 3061 { 3062 #ifdef VMSVGA3D_DX 3063 ASMBreakpoint(); 3064 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3065 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3066 return vmsvga3dDXSetGSConstantBufferOffset(pThisCC, idDXContext); 3067 #else 3068 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3069 return VERR_NOT_SUPPORTED; 3070 #endif 2631 3071 } 2632 3072 2633 3073 2634 3074 /* SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET 1223 */ 2635 static void vmsvga3dCmdDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetHSConstantBufferOffset const *pCmd) 2636 { 2637 ASMBreakpoint(); 2638 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2639 if (pSvgaR3State->pFuncsDX) 2640 { 2641 RT_NOREF(pCmd); 2642 pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC->svga.p3dState); 2643 } 3075 static int vmsvga3dCmdDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetHSConstantBufferOffset const *pCmd, uint32_t cbCmd) 3076 { 3077 #ifdef VMSVGA3D_DX 3078 ASMBreakpoint(); 3079 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3080 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3081 return vmsvga3dDXSetHSConstantBufferOffset(pThisCC, idDXContext); 3082 #else 3083 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3084 return VERR_NOT_SUPPORTED; 3085 #endif 2644 3086 } 2645 3087 2646 3088 2647 3089 /* SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET 1224 */ 2648 static void vmsvga3dCmdDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetDSConstantBufferOffset const *pCmd) 2649 { 2650 ASMBreakpoint(); 2651 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2652 if (pSvgaR3State->pFuncsDX) 2653 { 2654 RT_NOREF(pCmd); 2655 pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC->svga.p3dState); 2656 } 3090 static int vmsvga3dCmdDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDSConstantBufferOffset const *pCmd, uint32_t cbCmd) 3091 { 3092 #ifdef VMSVGA3D_DX 3093 ASMBreakpoint(); 3094 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3095 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3096 return vmsvga3dDXSetDSConstantBufferOffset(pThisCC, idDXContext); 3097 #else 3098 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3099 return VERR_NOT_SUPPORTED; 3100 #endif 2657 3101 } 2658 3102 2659 3103 2660 3104 /* SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET 1225 */ 2661 static void vmsvga3dCmdDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetCSConstantBufferOffset const *pCmd) 2662 { 2663 ASMBreakpoint(); 2664 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2665 if (pSvgaR3State->pFuncsDX) 2666 { 2667 RT_NOREF(pCmd); 2668 pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC->svga.p3dState); 2669 } 3105 static int vmsvga3dCmdDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSConstantBufferOffset const *pCmd, uint32_t cbCmd) 3106 { 3107 #ifdef VMSVGA3D_DX 3108 ASMBreakpoint(); 3109 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3110 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3111 return vmsvga3dDXSetCSConstantBufferOffset(pThisCC, idDXContext); 3112 #else 3113 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3114 return VERR_NOT_SUPPORTED; 3115 #endif 2670 3116 } 2671 3117 2672 3118 2673 3119 /* SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER 1226 */ 2674 static void vmsvga3dCmdDXCondBindAllShader(PVGASTATECC pThisCC, SVGA3dCmdDXCondBindAllShader const *pCmd) 2675 { 2676 ASMBreakpoint(); 2677 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2678 if (pSvgaR3State->pFuncsDX) 2679 { 2680 RT_NOREF(pCmd); 2681 pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC->svga.p3dState); 2682 } 3120 static int vmsvga3dCmdDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCondBindAllShader const *pCmd, uint32_t cbCmd) 3121 { 3122 #ifdef VMSVGA3D_DX 3123 ASMBreakpoint(); 3124 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3125 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3126 return vmsvga3dDXCondBindAllShader(pThisCC, idDXContext); 3127 #else 3128 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3129 return VERR_NOT_SUPPORTED; 3130 #endif 2683 3131 } 2684 3132 2685 3133 2686 3134 /* SVGA_3D_CMD_SCREEN_COPY 1227 */ 2687 static void vmsvga3dCmdScreenCopy(PVGASTATECC pThisCC, SVGA3dCmdScreenCopy const *pCmd) 2688 { 2689 ASMBreakpoint(); 2690 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2691 if (pSvgaR3State->pFuncsDX) 2692 { 2693 RT_NOREF(pCmd); 2694 pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC->svga.p3dState); 2695 } 3135 static int vmsvga3dCmdScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdScreenCopy const *pCmd, uint32_t cbCmd) 3136 { 3137 #ifdef VMSVGA3D_DX 3138 ASMBreakpoint(); 3139 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3140 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3141 return vmsvga3dScreenCopy(pThisCC, idDXContext); 3142 #else 3143 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3144 return VERR_NOT_SUPPORTED; 3145 #endif 2696 3146 } 2697 3147 2698 3148 2699 3149 /* SVGA_3D_CMD_GROW_OTABLE 1236 */ 2700 static void vmsvga3dCmdGrowOTable(PVGASTATECC pThisCC, SVGA3dCmdGrowOTable const *pCmd) 2701 { 2702 ASMBreakpoint(); 2703 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2704 if (pSvgaR3State->pFuncsDX) 2705 { 2706 RT_NOREF(pCmd); 2707 pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC->svga.p3dState); 2708 } 3150 static int vmsvga3dCmdGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdGrowOTable const *pCmd, uint32_t cbCmd) 3151 { 3152 #ifdef VMSVGA3D_DX 3153 ASMBreakpoint(); 3154 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3155 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3156 return vmsvga3dGrowOTable(pThisCC, idDXContext); 3157 #else 3158 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3159 return VERR_NOT_SUPPORTED; 3160 #endif 2709 3161 } 2710 3162 2711 3163 2712 3164 /* SVGA_3D_CMD_DX_GROW_COTABLE 1237 */ 2713 static void vmsvga3dCmdDXGrowCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXGrowCOTable const *pCmd) 2714 { 2715 ASMBreakpoint(); 2716 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2717 if (pSvgaR3State->pFuncsDX) 2718 { 2719 RT_NOREF(pCmd); 2720 pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC->svga.p3dState); 2721 } 3165 static int vmsvga3dCmdDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGrowCOTable const *pCmd, uint32_t cbCmd) 3166 { 3167 #ifdef VMSVGA3D_DX 3168 ASMBreakpoint(); 3169 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3170 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3171 return vmsvga3dDXGrowCOTable(pThisCC, idDXContext); 3172 #else 3173 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3174 return VERR_NOT_SUPPORTED; 3175 #endif 2722 3176 } 2723 3177 2724 3178 2725 3179 /* SVGA_3D_CMD_INTRA_SURFACE_COPY 1238 */ 2726 static void vmsvga3dCmdIntraSurfaceCopy(PVGASTATECC pThisCC, SVGA3dCmdIntraSurfaceCopy const *pCmd) 2727 { 2728 ASMBreakpoint(); 2729 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2730 if (pSvgaR3State->pFuncsDX) 2731 { 2732 RT_NOREF(pCmd); 2733 pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC->svga.p3dState); 2734 } 3180 static int vmsvga3dCmdIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdIntraSurfaceCopy const *pCmd, uint32_t cbCmd) 3181 { 3182 #ifdef VMSVGA3D_DX 3183 ASMBreakpoint(); 3184 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3185 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3186 return vmsvga3dIntraSurfaceCopy(pThisCC, idDXContext); 3187 #else 3188 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3189 return VERR_NOT_SUPPORTED; 3190 #endif 2735 3191 } 2736 3192 2737 3193 2738 3194 /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 1239 */ 2739 static void vmsvga3dCmdDefineGBSurface_v3(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v3 const *pCmd) 2740 { 2741 ASMBreakpoint(); 2742 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2743 if (pSvgaR3State->pFuncsDX) 2744 { 2745 RT_NOREF(pCmd); 2746 pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC->svga.p3dState); 2747 } 3195 static int vmsvga3dCmdDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDefineGBSurface_v3 const *pCmd, uint32_t cbCmd) 3196 { 3197 #ifdef VMSVGA3D_DX 3198 ASMBreakpoint(); 3199 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3200 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3201 return vmsvga3dDefineGBSurface_v3(pThisCC, idDXContext); 3202 #else 3203 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3204 return VERR_NOT_SUPPORTED; 3205 #endif 2748 3206 } 2749 3207 2750 3208 2751 3209 /* SVGA_3D_CMD_DX_RESOLVE_COPY 1240 */ 2752 static void vmsvga3dCmdDXResolveCopy(PVGASTATECC pThisCC, SVGA3dCmdDXResolveCopy const *pCmd) 2753 { 2754 ASMBreakpoint(); 2755 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2756 if (pSvgaR3State->pFuncsDX) 2757 { 2758 RT_NOREF(pCmd); 2759 pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC->svga.p3dState); 2760 } 3210 static int vmsvga3dCmdDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXResolveCopy const *pCmd, uint32_t cbCmd) 3211 { 3212 #ifdef VMSVGA3D_DX 3213 ASMBreakpoint(); 3214 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3215 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3216 return vmsvga3dDXResolveCopy(pThisCC, idDXContext); 3217 #else 3218 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3219 return VERR_NOT_SUPPORTED; 3220 #endif 2761 3221 } 2762 3222 2763 3223 2764 3224 /* SVGA_3D_CMD_DX_PRED_RESOLVE_COPY 1241 */ 2765 static void vmsvga3dCmdDXPredResolveCopy(PVGASTATECC pThisCC, SVGA3dCmdDXPredResolveCopy const *pCmd) 2766 { 2767 ASMBreakpoint(); 2768 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2769 if (pSvgaR3State->pFuncsDX) 2770 { 2771 RT_NOREF(pCmd); 2772 pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC->svga.p3dState); 2773 } 3225 static int vmsvga3dCmdDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredResolveCopy const *pCmd, uint32_t cbCmd) 3226 { 3227 #ifdef VMSVGA3D_DX 3228 ASMBreakpoint(); 3229 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3230 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3231 return vmsvga3dDXPredResolveCopy(pThisCC, idDXContext); 3232 #else 3233 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3234 return VERR_NOT_SUPPORTED; 3235 #endif 2774 3236 } 2775 3237 2776 3238 2777 3239 /* SVGA_3D_CMD_DX_PRED_CONVERT_REGION 1242 */ 2778 static void vmsvga3dCmdDXPredConvertRegion(PVGASTATECC pThisCC, SVGA3dCmdDXPredConvertRegion const *pCmd) 2779 { 2780 ASMBreakpoint(); 2781 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2782 if (pSvgaR3State->pFuncsDX) 2783 { 2784 RT_NOREF(pCmd); 2785 pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC->svga.p3dState); 2786 } 3240 static int vmsvga3dCmdDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredConvertRegion const *pCmd, uint32_t cbCmd) 3241 { 3242 #ifdef VMSVGA3D_DX 3243 ASMBreakpoint(); 3244 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3245 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3246 return vmsvga3dDXPredConvertRegion(pThisCC, idDXContext); 3247 #else 3248 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3249 return VERR_NOT_SUPPORTED; 3250 #endif 2787 3251 } 2788 3252 2789 3253 2790 3254 /* SVGA_3D_CMD_DX_PRED_CONVERT 1243 */ 2791 static void vmsvga3dCmdDXPredConvert(PVGASTATECC pThisCC, SVGA3dCmdDXPredConvert const *pCmd) 2792 { 2793 ASMBreakpoint(); 2794 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2795 if (pSvgaR3State->pFuncsDX) 2796 { 2797 RT_NOREF(pCmd); 2798 pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC->svga.p3dState); 2799 } 3255 static int vmsvga3dCmdDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredConvert const *pCmd, uint32_t cbCmd) 3256 { 3257 #ifdef VMSVGA3D_DX 3258 ASMBreakpoint(); 3259 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3260 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3261 return vmsvga3dDXPredConvert(pThisCC, idDXContext); 3262 #else 3263 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3264 return VERR_NOT_SUPPORTED; 3265 #endif 2800 3266 } 2801 3267 2802 3268 2803 3269 /* SVGA_3D_CMD_WHOLE_SURFACE_COPY 1244 */ 2804 static void vmsvga3dCmdWholeSurfaceCopy(PVGASTATECC pThisCC, SVGA3dCmdWholeSurfaceCopy const *pCmd) 2805 { 2806 ASMBreakpoint(); 2807 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2808 if (pSvgaR3State->pFuncsDX) 2809 { 2810 RT_NOREF(pCmd); 2811 pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC->svga.p3dState); 2812 } 3270 static int vmsvga3dCmdWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdWholeSurfaceCopy const *pCmd, uint32_t cbCmd) 3271 { 3272 #ifdef VMSVGA3D_DX 3273 ASMBreakpoint(); 3274 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3275 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3276 return vmsvga3dWholeSurfaceCopy(pThisCC, idDXContext); 3277 #else 3278 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3279 return VERR_NOT_SUPPORTED; 3280 #endif 2813 3281 } 2814 3282 2815 3283 2816 3284 /* SVGA_3D_CMD_DX_DEFINE_UA_VIEW 1245 */ 2817 static void vmsvga3dCmdDXDefineUAView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineUAView const *pCmd) 2818 { 2819 ASMBreakpoint(); 2820 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2821 if (pSvgaR3State->pFuncsDX) 2822 { 2823 RT_NOREF(pCmd); 2824 pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC->svga.p3dState); 2825 } 3285 static int vmsvga3dCmdDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineUAView const *pCmd, uint32_t cbCmd) 3286 { 3287 #ifdef VMSVGA3D_DX 3288 ASMBreakpoint(); 3289 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3290 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3291 return vmsvga3dDXDefineUAView(pThisCC, idDXContext); 3292 #else 3293 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3294 return VERR_NOT_SUPPORTED; 3295 #endif 2826 3296 } 2827 3297 2828 3298 2829 3299 /* SVGA_3D_CMD_DX_DESTROY_UA_VIEW 1246 */ 2830 static void vmsvga3dCmdDXDestroyUAView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyUAView const *pCmd) 2831 { 2832 ASMBreakpoint(); 2833 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2834 if (pSvgaR3State->pFuncsDX) 2835 { 2836 RT_NOREF(pCmd); 2837 pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC->svga.p3dState); 2838 } 3300 static int vmsvga3dCmdDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyUAView const *pCmd, uint32_t cbCmd) 3301 { 3302 #ifdef VMSVGA3D_DX 3303 ASMBreakpoint(); 3304 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3305 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3306 return vmsvga3dDXDestroyUAView(pThisCC, idDXContext); 3307 #else 3308 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3309 return VERR_NOT_SUPPORTED; 3310 #endif 2839 3311 } 2840 3312 2841 3313 2842 3314 /* SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT 1247 */ 2843 static void vmsvga3dCmdDXClearUAViewUint(PVGASTATECC pThisCC, SVGA3dCmdDXClearUAViewUint const *pCmd) 2844 { 2845 ASMBreakpoint(); 2846 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2847 if (pSvgaR3State->pFuncsDX) 2848 { 2849 RT_NOREF(pCmd); 2850 pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC->svga.p3dState); 2851 } 3315 static int vmsvga3dCmdDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewUint const *pCmd, uint32_t cbCmd) 3316 { 3317 #ifdef VMSVGA3D_DX 3318 ASMBreakpoint(); 3319 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3320 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3321 return vmsvga3dDXClearUAViewUint(pThisCC, idDXContext); 3322 #else 3323 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3324 return VERR_NOT_SUPPORTED; 3325 #endif 2852 3326 } 2853 3327 2854 3328 2855 3329 /* SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT 1248 */ 2856 static void vmsvga3dCmdDXClearUAViewFloat(PVGASTATECC pThisCC, SVGA3dCmdDXClearUAViewFloat const *pCmd) 2857 { 2858 ASMBreakpoint(); 2859 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2860 if (pSvgaR3State->pFuncsDX) 2861 { 2862 RT_NOREF(pCmd); 2863 pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC->svga.p3dState); 2864 } 3330 static int vmsvga3dCmdDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewFloat const *pCmd, uint32_t cbCmd) 3331 { 3332 #ifdef VMSVGA3D_DX 3333 ASMBreakpoint(); 3334 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3335 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3336 return vmsvga3dDXClearUAViewFloat(pThisCC, idDXContext); 3337 #else 3338 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3339 return VERR_NOT_SUPPORTED; 3340 #endif 2865 3341 } 2866 3342 2867 3343 2868 3344 /* SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT 1249 */ 2869 static void vmsvga3dCmdDXCopyStructureCount(PVGASTATECC pThisCC, SVGA3dCmdDXCopyStructureCount const *pCmd) 2870 { 2871 ASMBreakpoint(); 2872 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2873 if (pSvgaR3State->pFuncsDX) 2874 { 2875 RT_NOREF(pCmd); 2876 pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC->svga.p3dState); 2877 } 3345 static int vmsvga3dCmdDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCopyStructureCount const *pCmd, uint32_t cbCmd) 3346 { 3347 #ifdef VMSVGA3D_DX 3348 ASMBreakpoint(); 3349 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3350 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3351 return vmsvga3dDXCopyStructureCount(pThisCC, idDXContext); 3352 #else 3353 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3354 return VERR_NOT_SUPPORTED; 3355 #endif 2878 3356 } 2879 3357 2880 3358 2881 3359 /* SVGA_3D_CMD_DX_SET_UA_VIEWS 1250 */ 2882 static void vmsvga3dCmdDXSetUAViews(PVGASTATECC pThisCC, SVGA3dCmdDXSetUAViews const *pCmd) 2883 { 2884 ASMBreakpoint(); 2885 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2886 if (pSvgaR3State->pFuncsDX) 2887 { 2888 RT_NOREF(pCmd); 2889 pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC->svga.p3dState); 2890 } 3360 static int vmsvga3dCmdDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetUAViews const *pCmd, uint32_t cbCmd) 3361 { 3362 #ifdef VMSVGA3D_DX 3363 ASMBreakpoint(); 3364 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3365 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3366 return vmsvga3dDXSetUAViews(pThisCC, idDXContext); 3367 #else 3368 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3369 return VERR_NOT_SUPPORTED; 3370 #endif 2891 3371 } 2892 3372 2893 3373 2894 3374 /* SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT 1251 */ 2895 static void vmsvga3dCmdDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd) 2896 { 2897 ASMBreakpoint(); 2898 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2899 if (pSvgaR3State->pFuncsDX) 2900 { 2901 RT_NOREF(pCmd); 2902 pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC->svga.p3dState); 2903 } 3375 static int vmsvga3dCmdDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd, uint32_t cbCmd) 3376 { 3377 #ifdef VMSVGA3D_DX 3378 ASMBreakpoint(); 3379 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3380 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3381 return vmsvga3dDXDrawIndexedInstancedIndirect(pThisCC, idDXContext); 3382 #else 3383 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3384 return VERR_NOT_SUPPORTED; 3385 #endif 2904 3386 } 2905 3387 2906 3388 2907 3389 /* SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT 1252 */ 2908 static void vmsvga3dCmdDXDrawInstancedIndirect(PVGASTATECC pThisCC, SVGA3dCmdDXDrawInstancedIndirect const *pCmd) 2909 { 2910 ASMBreakpoint(); 2911 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2912 if (pSvgaR3State->pFuncsDX) 2913 { 2914 RT_NOREF(pCmd); 2915 pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC->svga.p3dState); 2916 } 3390 static int vmsvga3dCmdDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstancedIndirect const *pCmd, uint32_t cbCmd) 3391 { 3392 #ifdef VMSVGA3D_DX 3393 ASMBreakpoint(); 3394 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3395 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3396 return vmsvga3dDXDrawInstancedIndirect(pThisCC, idDXContext); 3397 #else 3398 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3399 return VERR_NOT_SUPPORTED; 3400 #endif 2917 3401 } 2918 3402 2919 3403 2920 3404 /* SVGA_3D_CMD_DX_DISPATCH 1253 */ 2921 static void vmsvga3dCmdDXDispatch(PVGASTATECC pThisCC, SVGA3dCmdDXDispatch const *pCmd) 2922 { 2923 ASMBreakpoint(); 2924 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2925 if (pSvgaR3State->pFuncsDX) 2926 { 2927 RT_NOREF(pCmd); 2928 pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC->svga.p3dState); 2929 } 3405 static int vmsvga3dCmdDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatch const *pCmd, uint32_t cbCmd) 3406 { 3407 #ifdef VMSVGA3D_DX 3408 ASMBreakpoint(); 3409 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3410 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3411 return vmsvga3dDXDispatch(pThisCC, idDXContext); 3412 #else 3413 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3414 return VERR_NOT_SUPPORTED; 3415 #endif 2930 3416 } 2931 3417 2932 3418 2933 3419 /* SVGA_3D_CMD_DX_DISPATCH_INDIRECT 1254 */ 2934 static void vmsvga3dCmdDXDispatchIndirect(PVGASTATECC pThisCC, SVGA3dCmdDXDispatchIndirect const *pCmd) 2935 { 2936 ASMBreakpoint(); 2937 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2938 if (pSvgaR3State->pFuncsDX) 2939 { 2940 RT_NOREF(pCmd); 2941 pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC->svga.p3dState); 2942 } 3420 static int vmsvga3dCmdDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatchIndirect const *pCmd, uint32_t cbCmd) 3421 { 3422 #ifdef VMSVGA3D_DX 3423 ASMBreakpoint(); 3424 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3425 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3426 return vmsvga3dDXDispatchIndirect(pThisCC, idDXContext); 3427 #else 3428 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3429 return VERR_NOT_SUPPORTED; 3430 #endif 2943 3431 } 2944 3432 2945 3433 2946 3434 /* SVGA_3D_CMD_WRITE_ZERO_SURFACE 1255 */ 2947 static void vmsvga3dCmdWriteZeroSurface(PVGASTATECC pThisCC, SVGA3dCmdWriteZeroSurface const *pCmd) 2948 { 2949 ASMBreakpoint(); 2950 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2951 if (pSvgaR3State->pFuncsDX) 2952 { 2953 RT_NOREF(pCmd); 2954 pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC->svga.p3dState); 2955 } 3435 static int vmsvga3dCmdWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdWriteZeroSurface const *pCmd, uint32_t cbCmd) 3436 { 3437 #ifdef VMSVGA3D_DX 3438 ASMBreakpoint(); 3439 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3440 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3441 return vmsvga3dWriteZeroSurface(pThisCC, idDXContext); 3442 #else 3443 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3444 return VERR_NOT_SUPPORTED; 3445 #endif 2956 3446 } 2957 3447 2958 3448 2959 3449 /* SVGA_3D_CMD_HINT_ZERO_SURFACE 1256 */ 2960 static void vmsvga3dCmdHintZeroSurface(PVGASTATECC pThisCC, SVGA3dCmdHintZeroSurface const *pCmd) 2961 { 2962 ASMBreakpoint(); 2963 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2964 if (pSvgaR3State->pFuncsDX) 2965 { 2966 RT_NOREF(pCmd); 2967 pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC->svga.p3dState); 2968 } 3450 static int vmsvga3dCmdHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdHintZeroSurface const *pCmd, uint32_t cbCmd) 3451 { 3452 #ifdef VMSVGA3D_DX 3453 ASMBreakpoint(); 3454 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3455 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3456 return vmsvga3dHintZeroSurface(pThisCC, idDXContext); 3457 #else 3458 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3459 return VERR_NOT_SUPPORTED; 3460 #endif 2969 3461 } 2970 3462 2971 3463 2972 3464 /* SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER 1257 */ 2973 static void vmsvga3dCmdDXTransferToBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXTransferToBuffer const *pCmd) 2974 { 2975 ASMBreakpoint(); 2976 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2977 if (pSvgaR3State->pFuncsDX) 2978 { 2979 RT_NOREF(pCmd); 2980 pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC->svga.p3dState); 2981 } 3465 static int vmsvga3dCmdDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXTransferToBuffer const *pCmd, uint32_t cbCmd) 3466 { 3467 #ifdef VMSVGA3D_DX 3468 ASMBreakpoint(); 3469 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3470 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3471 return vmsvga3dDXTransferToBuffer(pThisCC, idDXContext); 3472 #else 3473 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3474 return VERR_NOT_SUPPORTED; 3475 #endif 2982 3476 } 2983 3477 2984 3478 2985 3479 /* SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT 1258 */ 2986 static void vmsvga3dCmdDXSetStructureCount(PVGASTATECC pThisCC, SVGA3dCmdDXSetStructureCount const *pCmd) 2987 { 2988 ASMBreakpoint(); 2989 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 2990 if (pSvgaR3State->pFuncsDX) 2991 { 2992 RT_NOREF(pCmd); 2993 pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC->svga.p3dState); 2994 } 3480 static int vmsvga3dCmdDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStructureCount const *pCmd, uint32_t cbCmd) 3481 { 3482 #ifdef VMSVGA3D_DX 3483 ASMBreakpoint(); 3484 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3485 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3486 return vmsvga3dDXSetStructureCount(pThisCC, idDXContext); 3487 #else 3488 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3489 return VERR_NOT_SUPPORTED; 3490 #endif 2995 3491 } 2996 3492 2997 3493 2998 3494 /* SVGA_3D_CMD_LOGICOPS_BITBLT 1259 */ 2999 static void vmsvga3dCmdLogicOpsBitBlt(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsBitBlt const *pCmd) 3000 { 3001 ASMBreakpoint(); 3002 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3003 if (pSvgaR3State->pFuncsDX) 3004 { 3005 RT_NOREF(pCmd); 3006 pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC->svga.p3dState); 3007 } 3495 static int vmsvga3dCmdLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsBitBlt const *pCmd, uint32_t cbCmd) 3496 { 3497 #ifdef VMSVGA3D_DX 3498 ASMBreakpoint(); 3499 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3500 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3501 return vmsvga3dLogicOpsBitBlt(pThisCC, idDXContext); 3502 #else 3503 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3504 return VERR_NOT_SUPPORTED; 3505 #endif 3008 3506 } 3009 3507 3010 3508 3011 3509 /* SVGA_3D_CMD_LOGICOPS_TRANSBLT 1260 */ 3012 static void vmsvga3dCmdLogicOpsTransBlt(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsTransBlt const *pCmd) 3013 { 3014 ASMBreakpoint(); 3015 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3016 if (pSvgaR3State->pFuncsDX) 3017 { 3018 RT_NOREF(pCmd); 3019 pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC->svga.p3dState); 3020 } 3510 static int vmsvga3dCmdLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsTransBlt const *pCmd, uint32_t cbCmd) 3511 { 3512 #ifdef VMSVGA3D_DX 3513 ASMBreakpoint(); 3514 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3515 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3516 return vmsvga3dLogicOpsTransBlt(pThisCC, idDXContext); 3517 #else 3518 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3519 return VERR_NOT_SUPPORTED; 3520 #endif 3021 3521 } 3022 3522 3023 3523 3024 3524 /* SVGA_3D_CMD_LOGICOPS_STRETCHBLT 1261 */ 3025 static void vmsvga3dCmdLogicOpsStretchBlt(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsStretchBlt const *pCmd) 3026 { 3027 ASMBreakpoint(); 3028 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3029 if (pSvgaR3State->pFuncsDX) 3030 { 3031 RT_NOREF(pCmd); 3032 pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC->svga.p3dState); 3033 } 3525 static int vmsvga3dCmdLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsStretchBlt const *pCmd, uint32_t cbCmd) 3526 { 3527 #ifdef VMSVGA3D_DX 3528 ASMBreakpoint(); 3529 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3530 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3531 return vmsvga3dLogicOpsStretchBlt(pThisCC, idDXContext); 3532 #else 3533 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3534 return VERR_NOT_SUPPORTED; 3535 #endif 3034 3536 } 3035 3537 3036 3538 3037 3539 /* SVGA_3D_CMD_LOGICOPS_COLORFILL 1262 */ 3038 static void vmsvga3dCmdLogicOpsColorFill(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsColorFill const *pCmd) 3039 { 3040 ASMBreakpoint(); 3041 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3042 if (pSvgaR3State->pFuncsDX) 3043 { 3044 RT_NOREF(pCmd); 3045 pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC->svga.p3dState); 3046 } 3540 static int vmsvga3dCmdLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsColorFill const *pCmd, uint32_t cbCmd) 3541 { 3542 #ifdef VMSVGA3D_DX 3543 ASMBreakpoint(); 3544 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3545 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3546 return vmsvga3dLogicOpsColorFill(pThisCC, idDXContext); 3547 #else 3548 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3549 return VERR_NOT_SUPPORTED; 3550 #endif 3047 3551 } 3048 3552 3049 3553 3050 3554 /* SVGA_3D_CMD_LOGICOPS_ALPHABLEND 1263 */ 3051 static void vmsvga3dCmdLogicOpsAlphaBlend(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsAlphaBlend const *pCmd) 3052 { 3053 ASMBreakpoint(); 3054 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3055 if (pSvgaR3State->pFuncsDX) 3056 { 3057 RT_NOREF(pCmd); 3058 pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC->svga.p3dState); 3059 } 3555 static int vmsvga3dCmdLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsAlphaBlend const *pCmd, uint32_t cbCmd) 3556 { 3557 #ifdef VMSVGA3D_DX 3558 ASMBreakpoint(); 3559 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3560 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3561 return vmsvga3dLogicOpsAlphaBlend(pThisCC, idDXContext); 3562 #else 3563 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3564 return VERR_NOT_SUPPORTED; 3565 #endif 3060 3566 } 3061 3567 3062 3568 3063 3569 /* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND 1264 */ 3064 static void vmsvga3dCmdLogicOpsClearTypeBlend(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsClearTypeBlend const *pCmd) 3065 { 3066 ASMBreakpoint(); 3067 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3068 if (pSvgaR3State->pFuncsDX) 3069 { 3070 RT_NOREF(pCmd); 3071 pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC->svga.p3dState); 3072 } 3570 static int vmsvga3dCmdLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsClearTypeBlend const *pCmd, uint32_t cbCmd) 3571 { 3572 #ifdef VMSVGA3D_DX 3573 ASMBreakpoint(); 3574 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3575 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3576 return vmsvga3dLogicOpsClearTypeBlend(pThisCC, idDXContext); 3577 #else 3578 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3579 return VERR_NOT_SUPPORTED; 3580 #endif 3073 3581 } 3074 3582 3075 3583 3076 3584 /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 1267 */ 3077 static void vmsvga3dCmdDefineGBSurface_v4(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v4 const *pCmd) 3078 { 3079 ASMBreakpoint(); 3080 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3081 if (pSvgaR3State->pFuncsDX) 3082 { 3083 RT_NOREF(pCmd); 3084 pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC->svga.p3dState); 3085 } 3585 static int vmsvga3dCmdDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDefineGBSurface_v4 const *pCmd, uint32_t cbCmd) 3586 { 3587 #ifdef VMSVGA3D_DX 3588 ASMBreakpoint(); 3589 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3590 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3591 return vmsvga3dDefineGBSurface_v4(pThisCC, idDXContext); 3592 #else 3593 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3594 return VERR_NOT_SUPPORTED; 3595 #endif 3086 3596 } 3087 3597 3088 3598 3089 3599 /* SVGA_3D_CMD_DX_SET_CS_UA_VIEWS 1268 */ 3090 static void vmsvga3dCmdDXSetCSUAViews(PVGASTATECC pThisCC, SVGA3dCmdDXSetCSUAViews const *pCmd) 3091 { 3092 ASMBreakpoint(); 3093 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3094 if (pSvgaR3State->pFuncsDX) 3095 { 3096 RT_NOREF(pCmd); 3097 pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC->svga.p3dState); 3098 } 3600 static int vmsvga3dCmdDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSUAViews const *pCmd, uint32_t cbCmd) 3601 { 3602 #ifdef VMSVGA3D_DX 3603 ASMBreakpoint(); 3604 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3605 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3606 return vmsvga3dDXSetCSUAViews(pThisCC, idDXContext); 3607 #else 3608 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3609 return VERR_NOT_SUPPORTED; 3610 #endif 3099 3611 } 3100 3612 3101 3613 3102 3614 /* SVGA_3D_CMD_DX_SET_MIN_LOD 1269 */ 3103 static void vmsvga3dCmdDXSetMinLOD(PVGASTATECC pThisCC, SVGA3dCmdDXSetMinLOD const *pCmd) 3104 { 3105 ASMBreakpoint(); 3106 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3107 if (pSvgaR3State->pFuncsDX) 3108 { 3109 RT_NOREF(pCmd); 3110 pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC->svga.p3dState); 3111 } 3615 static int vmsvga3dCmdDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetMinLOD const *pCmd, uint32_t cbCmd) 3616 { 3617 #ifdef VMSVGA3D_DX 3618 ASMBreakpoint(); 3619 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3620 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3621 return vmsvga3dDXSetMinLOD(pThisCC, idDXContext); 3622 #else 3623 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3624 return VERR_NOT_SUPPORTED; 3625 #endif 3112 3626 } 3113 3627 3114 3628 3115 3629 /* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 1272 */ 3116 static void vmsvga3dCmdDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd) 3117 { 3118 ASMBreakpoint(); 3119 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3120 if (pSvgaR3State->pFuncsDX) 3121 { 3122 RT_NOREF(pCmd); 3123 pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView_v2(pThisCC->svga.p3dState); 3124 } 3630 static int vmsvga3dCmdDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd, uint32_t cbCmd) 3631 { 3632 #ifdef VMSVGA3D_DX 3633 ASMBreakpoint(); 3634 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3635 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3636 return vmsvga3dDXDefineDepthStencilView_v2(pThisCC, idDXContext); 3637 #else 3638 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3639 return VERR_NOT_SUPPORTED; 3640 #endif 3125 3641 } 3126 3642 3127 3643 3128 3644 /* SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB 1273 */ 3129 static void vmsvga3dCmdDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd) 3130 { 3131 ASMBreakpoint(); 3132 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3133 if (pSvgaR3State->pFuncsDX) 3134 { 3135 RT_NOREF(pCmd); 3136 pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC->svga.p3dState); 3137 } 3645 static int vmsvga3dCmdDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd, uint32_t cbCmd) 3646 { 3647 #ifdef VMSVGA3D_DX 3648 ASMBreakpoint(); 3649 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3650 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3651 return vmsvga3dDXDefineStreamOutputWithMob(pThisCC, idDXContext); 3652 #else 3653 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3654 return VERR_NOT_SUPPORTED; 3655 #endif 3138 3656 } 3139 3657 3140 3658 3141 3659 /* SVGA_3D_CMD_DX_SET_SHADER_IFACE 1274 */ 3142 static void vmsvga3dCmdDXSetShaderIface(PVGASTATECC pThisCC, SVGA3dCmdDXSetShaderIface const *pCmd) 3143 { 3144 ASMBreakpoint(); 3145 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3146 if (pSvgaR3State->pFuncsDX) 3147 { 3148 RT_NOREF(pCmd); 3149 pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC->svga.p3dState); 3150 } 3660 static int vmsvga3dCmdDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderIface const *pCmd, uint32_t cbCmd) 3661 { 3662 #ifdef VMSVGA3D_DX 3663 ASMBreakpoint(); 3664 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3665 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3666 return vmsvga3dDXSetShaderIface(pThisCC, idDXContext); 3667 #else 3668 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3669 return VERR_NOT_SUPPORTED; 3670 #endif 3151 3671 } 3152 3672 3153 3673 3154 3674 /* SVGA_3D_CMD_DX_BIND_STREAMOUTPUT 1275 */ 3155 static void vmsvga3dCmdDXBindStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXBindStreamOutput const *pCmd) 3156 { 3157 ASMBreakpoint(); 3158 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3159 if (pSvgaR3State->pFuncsDX) 3160 { 3161 RT_NOREF(pCmd); 3162 pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC->svga.p3dState); 3163 } 3675 static int vmsvga3dCmdDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindStreamOutput const *pCmd, uint32_t cbCmd) 3676 { 3677 #ifdef VMSVGA3D_DX 3678 ASMBreakpoint(); 3679 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3680 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3681 return vmsvga3dDXBindStreamOutput(pThisCC, idDXContext); 3682 #else 3683 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3684 return VERR_NOT_SUPPORTED; 3685 #endif 3164 3686 } 3165 3687 3166 3688 3167 3689 /* SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS 1276 */ 3168 static void vmsvga3dCmdSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, SVGA3dCmdSurfaceStretchBltNonMSToMS const *pCmd) 3169 { 3170 ASMBreakpoint(); 3171 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3172 if (pSvgaR3State->pFuncsDX) 3173 { 3174 RT_NOREF(pCmd); 3175 pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC->svga.p3dState); 3176 } 3690 static int vmsvga3dCmdSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdSurfaceStretchBltNonMSToMS const *pCmd, uint32_t cbCmd) 3691 { 3692 #ifdef VMSVGA3D_DX 3693 ASMBreakpoint(); 3694 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3695 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3696 return vmsvga3dSurfaceStretchBltNonMSToMS(pThisCC, idDXContext); 3697 #else 3698 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3699 return VERR_NOT_SUPPORTED; 3700 #endif 3177 3701 } 3178 3702 3179 3703 3180 3704 /* SVGA_3D_CMD_DX_BIND_SHADER_IFACE 1277 */ 3181 static void vmsvga3dCmdDXBindShaderIface(PVGASTATECC pThisCC, SVGA3dCmdDXBindShaderIface const *pCmd) 3182 { 3183 ASMBreakpoint(); 3184 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3185 if (pSvgaR3State->pFuncsDX) 3186 { 3187 RT_NOREF(pCmd); 3188 pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC->svga.p3dState); 3189 } 3705 static int vmsvga3dCmdDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindShaderIface const *pCmd, uint32_t cbCmd) 3706 { 3707 #ifdef VMSVGA3D_DX 3708 ASMBreakpoint(); 3709 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; 3710 RT_NOREF(pSvgaR3State, pCmd, cbCmd); 3711 return vmsvga3dDXBindShaderIface(pThisCC, idDXContext); 3712 #else 3713 RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd); 3714 return VERR_NOT_SUPPORTED; 3715 #endif 3190 3716 } 3191 3717 … … 3211 3737 * @param pThis The shared VGA/VMSVGA state. 3212 3738 * @param pThisCC The VGA/VMSVGA state for the current context. 3739 * @param idDXContext VGPU10 DX context of the commands or SVGA3D_INVALID_ID if they are not for a specific context. 3213 3740 * @param enmCmdId SVGA_3D_CMD_* command identifier. 3214 3741 * @param cbCmd Size of the command in bytes. … … 3216 3743 * @returns VBox status code if an error was detected parsing a command. 3217 3744 */ 3218 int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd)3745 int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDXContext, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd) 3219 3746 { 3220 3747 if (enmCmdId > SVGA_3D_CMD_MAX) … … 3785 4312 SVGA3dCmdInvalidateGBImage *pCmd = (SVGA3dCmdInvalidateGBImage *)pvCmd; 3786 4313 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 3787 VMSVGA_3D_CMD_NOTIMPL(); RT_NOREF(pCmd);4314 vmsvga3dCmdInvalidateGBImage(pThisCC, pCmd); 3788 4315 break; 3789 4316 } … … 4012 4539 case SVGA_3D_CMD_DEFINE_GB_SURFACE_V2: 4013 4540 { 4014 /// @todo SVGA3dCmdDefineGBSurface_v2 is not defined in Mesa 17 header. Mesa 20 has it. 4015 //SVGA3dCmdDefineGBSurface_v2 *pCmd = (SVGA3dCmdDefineGBSurface_v2 *)pvCmd; 4016 //VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4017 VMSVGA_3D_CMD_NOTIMPL(); 4541 SVGA3dCmdDefineGBSurface_v2 *pCmd = (SVGA3dCmdDefineGBSurface_v2 *)pvCmd; 4542 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4543 vmsvga3dCmdDefineGBSurface_v2(pThisCC, pCmd); 4018 4544 break; 4019 4545 } … … 4083 4609 SVGA3dCmdDXDefineContext *pCmd = (SVGA3dCmdDXDefineContext *)pvCmd; 4084 4610 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4085 vmsvga3dCmdDXDefineContext(pThisCC, pCmd);4611 rcParse = vmsvga3dCmdDXDefineContext(pThisCC, pCmd, cbCmd); 4086 4612 break; 4087 4613 } … … 4091 4617 SVGA3dCmdDXDestroyContext *pCmd = (SVGA3dCmdDXDestroyContext *)pvCmd; 4092 4618 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4093 vmsvga3dCmdDXDestroyContext(pThisCC, pCmd);4619 rcParse = vmsvga3dCmdDXDestroyContext(pThisCC, pCmd, cbCmd); 4094 4620 break; 4095 4621 } … … 4099 4625 SVGA3dCmdDXBindContext *pCmd = (SVGA3dCmdDXBindContext *)pvCmd; 4100 4626 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4101 vmsvga3dCmdDXBindContext(pThisCC, pCmd);4627 rcParse = vmsvga3dCmdDXBindContext(pThisCC, pCmd, cbCmd); 4102 4628 break; 4103 4629 } … … 4107 4633 SVGA3dCmdDXReadbackContext *pCmd = (SVGA3dCmdDXReadbackContext *)pvCmd; 4108 4634 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4109 vmsvga3dCmdDXReadbackContext(pThisCC, pCmd);4635 rcParse = vmsvga3dCmdDXReadbackContext(pThisCC, idDXContext, pCmd, cbCmd); 4110 4636 break; 4111 4637 } … … 4115 4641 SVGA3dCmdDXInvalidateContext *pCmd = (SVGA3dCmdDXInvalidateContext *)pvCmd; 4116 4642 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4117 vmsvga3dCmdDXInvalidateContext(pThisCC, pCmd);4643 rcParse = vmsvga3dCmdDXInvalidateContext(pThisCC, idDXContext, pCmd, cbCmd); 4118 4644 break; 4119 4645 } … … 4123 4649 SVGA3dCmdDXSetSingleConstantBuffer *pCmd = (SVGA3dCmdDXSetSingleConstantBuffer *)pvCmd; 4124 4650 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4125 vmsvga3dCmdDXSetSingleConstantBuffer(pThisCC, pCmd);4651 rcParse = vmsvga3dCmdDXSetSingleConstantBuffer(pThisCC, idDXContext, pCmd, cbCmd); 4126 4652 break; 4127 4653 } … … 4131 4657 SVGA3dCmdDXSetShaderResources *pCmd = (SVGA3dCmdDXSetShaderResources *)pvCmd; 4132 4658 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4133 vmsvga3dCmdDXSetShaderResources(pThisCC, pCmd);4659 rcParse = vmsvga3dCmdDXSetShaderResources(pThisCC, idDXContext, pCmd, cbCmd); 4134 4660 break; 4135 4661 } … … 4139 4665 SVGA3dCmdDXSetShader *pCmd = (SVGA3dCmdDXSetShader *)pvCmd; 4140 4666 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4141 vmsvga3dCmdDXSetShader(pThisCC, pCmd);4667 rcParse = vmsvga3dCmdDXSetShader(pThisCC, idDXContext, pCmd, cbCmd); 4142 4668 break; 4143 4669 } … … 4147 4673 SVGA3dCmdDXSetSamplers *pCmd = (SVGA3dCmdDXSetSamplers *)pvCmd; 4148 4674 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4149 vmsvga3dCmdDXSetSamplers(pThisCC, pCmd);4675 rcParse = vmsvga3dCmdDXSetSamplers(pThisCC, idDXContext, pCmd, cbCmd); 4150 4676 break; 4151 4677 } … … 4155 4681 SVGA3dCmdDXDraw *pCmd = (SVGA3dCmdDXDraw *)pvCmd; 4156 4682 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4157 vmsvga3dCmdDXDraw(pThisCC, pCmd);4683 rcParse = vmsvga3dCmdDXDraw(pThisCC, idDXContext, pCmd, cbCmd); 4158 4684 break; 4159 4685 } … … 4163 4689 SVGA3dCmdDXDrawIndexed *pCmd = (SVGA3dCmdDXDrawIndexed *)pvCmd; 4164 4690 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4165 vmsvga3dCmdDXDrawIndexed(pThisCC, pCmd);4691 rcParse = vmsvga3dCmdDXDrawIndexed(pThisCC, idDXContext, pCmd, cbCmd); 4166 4692 break; 4167 4693 } … … 4171 4697 SVGA3dCmdDXDrawInstanced *pCmd = (SVGA3dCmdDXDrawInstanced *)pvCmd; 4172 4698 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4173 vmsvga3dCmdDXDrawInstanced(pThisCC, pCmd);4699 rcParse = vmsvga3dCmdDXDrawInstanced(pThisCC, idDXContext, pCmd, cbCmd); 4174 4700 break; 4175 4701 } … … 4179 4705 SVGA3dCmdDXDrawIndexedInstanced *pCmd = (SVGA3dCmdDXDrawIndexedInstanced *)pvCmd; 4180 4706 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4181 vmsvga3dCmdDXDrawIndexedInstanced(pThisCC, pCmd);4707 rcParse = vmsvga3dCmdDXDrawIndexedInstanced(pThisCC, idDXContext, pCmd, cbCmd); 4182 4708 break; 4183 4709 } … … 4187 4713 SVGA3dCmdDXDrawAuto *pCmd = (SVGA3dCmdDXDrawAuto *)pvCmd; 4188 4714 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4189 vmsvga3dCmdDXDrawAuto(pThisCC, pCmd);4715 rcParse = vmsvga3dCmdDXDrawAuto(pThisCC, idDXContext, pCmd, cbCmd); 4190 4716 break; 4191 4717 } … … 4195 4721 SVGA3dCmdDXSetInputLayout *pCmd = (SVGA3dCmdDXSetInputLayout *)pvCmd; 4196 4722 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4197 vmsvga3dCmdDXSetInputLayout(pThisCC, pCmd);4723 rcParse = vmsvga3dCmdDXSetInputLayout(pThisCC, idDXContext, pCmd, cbCmd); 4198 4724 break; 4199 4725 } … … 4203 4729 SVGA3dCmdDXSetVertexBuffers *pCmd = (SVGA3dCmdDXSetVertexBuffers *)pvCmd; 4204 4730 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4205 vmsvga3dCmdDXSetVertexBuffers(pThisCC, pCmd);4731 rcParse = vmsvga3dCmdDXSetVertexBuffers(pThisCC, idDXContext, pCmd, cbCmd); 4206 4732 break; 4207 4733 } … … 4211 4737 SVGA3dCmdDXSetIndexBuffer *pCmd = (SVGA3dCmdDXSetIndexBuffer *)pvCmd; 4212 4738 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4213 vmsvga3dCmdDXSetIndexBuffer(pThisCC, pCmd);4739 rcParse = vmsvga3dCmdDXSetIndexBuffer(pThisCC, idDXContext, pCmd, cbCmd); 4214 4740 break; 4215 4741 } … … 4219 4745 SVGA3dCmdDXSetTopology *pCmd = (SVGA3dCmdDXSetTopology *)pvCmd; 4220 4746 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4221 vmsvga3dCmdDXSetTopology(pThisCC, pCmd);4747 rcParse = vmsvga3dCmdDXSetTopology(pThisCC, idDXContext, pCmd, cbCmd); 4222 4748 break; 4223 4749 } … … 4227 4753 SVGA3dCmdDXSetRenderTargets *pCmd = (SVGA3dCmdDXSetRenderTargets *)pvCmd; 4228 4754 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4229 vmsvga3dCmdDXSetRenderTargets(pThisCC, pCmd);4755 rcParse = vmsvga3dCmdDXSetRenderTargets(pThisCC, idDXContext, pCmd, cbCmd); 4230 4756 break; 4231 4757 } … … 4235 4761 SVGA3dCmdDXSetBlendState *pCmd = (SVGA3dCmdDXSetBlendState *)pvCmd; 4236 4762 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4237 vmsvga3dCmdDXSetBlendState(pThisCC, pCmd);4763 rcParse = vmsvga3dCmdDXSetBlendState(pThisCC, idDXContext, pCmd, cbCmd); 4238 4764 break; 4239 4765 } … … 4243 4769 SVGA3dCmdDXSetDepthStencilState *pCmd = (SVGA3dCmdDXSetDepthStencilState *)pvCmd; 4244 4770 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4245 vmsvga3dCmdDXSetDepthStencilState(pThisCC, pCmd);4771 rcParse = vmsvga3dCmdDXSetDepthStencilState(pThisCC, idDXContext, pCmd, cbCmd); 4246 4772 break; 4247 4773 } … … 4251 4777 SVGA3dCmdDXSetRasterizerState *pCmd = (SVGA3dCmdDXSetRasterizerState *)pvCmd; 4252 4778 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4253 vmsvga3dCmdDXSetRasterizerState(pThisCC, pCmd);4779 rcParse = vmsvga3dCmdDXSetRasterizerState(pThisCC, idDXContext, pCmd, cbCmd); 4254 4780 break; 4255 4781 } … … 4259 4785 SVGA3dCmdDXDefineQuery *pCmd = (SVGA3dCmdDXDefineQuery *)pvCmd; 4260 4786 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4261 vmsvga3dCmdDXDefineQuery(pThisCC, pCmd);4787 rcParse = vmsvga3dCmdDXDefineQuery(pThisCC, idDXContext, pCmd, cbCmd); 4262 4788 break; 4263 4789 } … … 4267 4793 SVGA3dCmdDXDestroyQuery *pCmd = (SVGA3dCmdDXDestroyQuery *)pvCmd; 4268 4794 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4269 vmsvga3dCmdDXDestroyQuery(pThisCC, pCmd);4795 rcParse = vmsvga3dCmdDXDestroyQuery(pThisCC, idDXContext, pCmd, cbCmd); 4270 4796 break; 4271 4797 } … … 4275 4801 SVGA3dCmdDXBindQuery *pCmd = (SVGA3dCmdDXBindQuery *)pvCmd; 4276 4802 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4277 vmsvga3dCmdDXBindQuery(pThisCC, pCmd);4803 rcParse = vmsvga3dCmdDXBindQuery(pThisCC, idDXContext, pCmd, cbCmd); 4278 4804 break; 4279 4805 } … … 4283 4809 SVGA3dCmdDXSetQueryOffset *pCmd = (SVGA3dCmdDXSetQueryOffset *)pvCmd; 4284 4810 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4285 vmsvga3dCmdDXSetQueryOffset(pThisCC, pCmd);4811 rcParse = vmsvga3dCmdDXSetQueryOffset(pThisCC, idDXContext, pCmd, cbCmd); 4286 4812 break; 4287 4813 } … … 4291 4817 SVGA3dCmdDXBeginQuery *pCmd = (SVGA3dCmdDXBeginQuery *)pvCmd; 4292 4818 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4293 vmsvga3dCmdDXBeginQuery(pThisCC, pCmd);4819 rcParse = vmsvga3dCmdDXBeginQuery(pThisCC, idDXContext, pCmd, cbCmd); 4294 4820 break; 4295 4821 } … … 4299 4825 SVGA3dCmdDXEndQuery *pCmd = (SVGA3dCmdDXEndQuery *)pvCmd; 4300 4826 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4301 vmsvga3dCmdDXEndQuery(pThisCC, pCmd);4827 rcParse = vmsvga3dCmdDXEndQuery(pThisCC, idDXContext, pCmd, cbCmd); 4302 4828 break; 4303 4829 } … … 4307 4833 SVGA3dCmdDXReadbackQuery *pCmd = (SVGA3dCmdDXReadbackQuery *)pvCmd; 4308 4834 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4309 vmsvga3dCmdDXReadbackQuery(pThisCC, pCmd);4835 rcParse = vmsvga3dCmdDXReadbackQuery(pThisCC, idDXContext, pCmd, cbCmd); 4310 4836 break; 4311 4837 } … … 4315 4841 SVGA3dCmdDXSetPredication *pCmd = (SVGA3dCmdDXSetPredication *)pvCmd; 4316 4842 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4317 vmsvga3dCmdDXSetPredication(pThisCC, pCmd);4843 rcParse = vmsvga3dCmdDXSetPredication(pThisCC, idDXContext, pCmd, cbCmd); 4318 4844 break; 4319 4845 } … … 4323 4849 SVGA3dCmdDXSetSOTargets *pCmd = (SVGA3dCmdDXSetSOTargets *)pvCmd; 4324 4850 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4325 vmsvga3dCmdDXSetSOTargets(pThisCC, pCmd);4851 rcParse = vmsvga3dCmdDXSetSOTargets(pThisCC, idDXContext, pCmd, cbCmd); 4326 4852 break; 4327 4853 } … … 4331 4857 SVGA3dCmdDXSetViewports *pCmd = (SVGA3dCmdDXSetViewports *)pvCmd; 4332 4858 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4333 vmsvga3dCmdDXSetViewports(pThisCC, pCmd);4859 rcParse = vmsvga3dCmdDXSetViewports(pThisCC, idDXContext, pCmd, cbCmd); 4334 4860 break; 4335 4861 } … … 4339 4865 SVGA3dCmdDXSetScissorRects *pCmd = (SVGA3dCmdDXSetScissorRects *)pvCmd; 4340 4866 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4341 vmsvga3dCmdDXSetScissorRects(pThisCC, pCmd);4867 rcParse = vmsvga3dCmdDXSetScissorRects(pThisCC, idDXContext, pCmd, cbCmd); 4342 4868 break; 4343 4869 } … … 4347 4873 SVGA3dCmdDXClearRenderTargetView *pCmd = (SVGA3dCmdDXClearRenderTargetView *)pvCmd; 4348 4874 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4349 vmsvga3dCmdDXClearRenderTargetView(pThisCC, pCmd);4875 rcParse = vmsvga3dCmdDXClearRenderTargetView(pThisCC, idDXContext, pCmd, cbCmd); 4350 4876 break; 4351 4877 } … … 4355 4881 SVGA3dCmdDXClearDepthStencilView *pCmd = (SVGA3dCmdDXClearDepthStencilView *)pvCmd; 4356 4882 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4357 vmsvga3dCmdDXClearDepthStencilView(pThisCC, pCmd);4883 rcParse = vmsvga3dCmdDXClearDepthStencilView(pThisCC, idDXContext, pCmd, cbCmd); 4358 4884 break; 4359 4885 } … … 4363 4889 SVGA3dCmdDXPredCopyRegion *pCmd = (SVGA3dCmdDXPredCopyRegion *)pvCmd; 4364 4890 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4365 vmsvga3dCmdDXPredCopyRegion(pThisCC, pCmd);4891 rcParse = vmsvga3dCmdDXPredCopyRegion(pThisCC, idDXContext, pCmd, cbCmd); 4366 4892 break; 4367 4893 } … … 4371 4897 SVGA3dCmdDXPredCopy *pCmd = (SVGA3dCmdDXPredCopy *)pvCmd; 4372 4898 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4373 vmsvga3dCmdDXPredCopy(pThisCC, pCmd);4899 rcParse = vmsvga3dCmdDXPredCopy(pThisCC, idDXContext, pCmd, cbCmd); 4374 4900 break; 4375 4901 } … … 4379 4905 SVGA3dCmdDXPresentBlt *pCmd = (SVGA3dCmdDXPresentBlt *)pvCmd; 4380 4906 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4381 vmsvga3dCmdDXPresentBlt(pThisCC, pCmd);4907 rcParse = vmsvga3dCmdDXPresentBlt(pThisCC, idDXContext, pCmd, cbCmd); 4382 4908 break; 4383 4909 } … … 4387 4913 SVGA3dCmdDXGenMips *pCmd = (SVGA3dCmdDXGenMips *)pvCmd; 4388 4914 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4389 vmsvga3dCmdDXGenMips(pThisCC, pCmd);4915 rcParse = vmsvga3dCmdDXGenMips(pThisCC, idDXContext, pCmd, cbCmd); 4390 4916 break; 4391 4917 } … … 4395 4921 SVGA3dCmdDXUpdateSubResource *pCmd = (SVGA3dCmdDXUpdateSubResource *)pvCmd; 4396 4922 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4397 vmsvga3dCmdDXUpdateSubResource(pThisCC, pCmd);4923 rcParse = vmsvga3dCmdDXUpdateSubResource(pThisCC, idDXContext, pCmd, cbCmd); 4398 4924 break; 4399 4925 } … … 4403 4929 SVGA3dCmdDXReadbackSubResource *pCmd = (SVGA3dCmdDXReadbackSubResource *)pvCmd; 4404 4930 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4405 vmsvga3dCmdDXReadbackSubResource(pThisCC, pCmd);4931 rcParse = vmsvga3dCmdDXReadbackSubResource(pThisCC, idDXContext, pCmd, cbCmd); 4406 4932 break; 4407 4933 } … … 4411 4937 SVGA3dCmdDXInvalidateSubResource *pCmd = (SVGA3dCmdDXInvalidateSubResource *)pvCmd; 4412 4938 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4413 vmsvga3dCmdDXInvalidateSubResource(pThisCC, pCmd);4939 rcParse = vmsvga3dCmdDXInvalidateSubResource(pThisCC, idDXContext, pCmd, cbCmd); 4414 4940 break; 4415 4941 } … … 4419 4945 SVGA3dCmdDXDefineShaderResourceView *pCmd = (SVGA3dCmdDXDefineShaderResourceView *)pvCmd; 4420 4946 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4421 vmsvga3dCmdDXDefineShaderResourceView(pThisCC, pCmd);4947 rcParse = vmsvga3dCmdDXDefineShaderResourceView(pThisCC, idDXContext, pCmd, cbCmd); 4422 4948 break; 4423 4949 } … … 4427 4953 SVGA3dCmdDXDestroyShaderResourceView *pCmd = (SVGA3dCmdDXDestroyShaderResourceView *)pvCmd; 4428 4954 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4429 vmsvga3dCmdDXDestroyShaderResourceView(pThisCC, pCmd);4955 rcParse = vmsvga3dCmdDXDestroyShaderResourceView(pThisCC, idDXContext, pCmd, cbCmd); 4430 4956 break; 4431 4957 } … … 4435 4961 SVGA3dCmdDXDefineRenderTargetView *pCmd = (SVGA3dCmdDXDefineRenderTargetView *)pvCmd; 4436 4962 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4437 vmsvga3dCmdDXDefineRenderTargetView(pThisCC, pCmd);4963 rcParse = vmsvga3dCmdDXDefineRenderTargetView(pThisCC, idDXContext, pCmd, cbCmd); 4438 4964 break; 4439 4965 } … … 4443 4969 SVGA3dCmdDXDestroyRenderTargetView *pCmd = (SVGA3dCmdDXDestroyRenderTargetView *)pvCmd; 4444 4970 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4445 vmsvga3dCmdDXDestroyRenderTargetView(pThisCC, pCmd);4971 rcParse = vmsvga3dCmdDXDestroyRenderTargetView(pThisCC, idDXContext, pCmd, cbCmd); 4446 4972 break; 4447 4973 } … … 4451 4977 SVGA3dCmdDXDefineDepthStencilView *pCmd = (SVGA3dCmdDXDefineDepthStencilView *)pvCmd; 4452 4978 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4453 vmsvga3dCmdDXDefineDepthStencilView(pThisCC, pCmd);4979 rcParse = vmsvga3dCmdDXDefineDepthStencilView(pThisCC, idDXContext, pCmd, cbCmd); 4454 4980 break; 4455 4981 } … … 4459 4985 SVGA3dCmdDXDestroyDepthStencilView *pCmd = (SVGA3dCmdDXDestroyDepthStencilView *)pvCmd; 4460 4986 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4461 vmsvga3dCmdDXDestroyDepthStencilView(pThisCC, pCmd);4987 rcParse = vmsvga3dCmdDXDestroyDepthStencilView(pThisCC, idDXContext, pCmd, cbCmd); 4462 4988 break; 4463 4989 } … … 4467 4993 SVGA3dCmdDXDefineElementLayout *pCmd = (SVGA3dCmdDXDefineElementLayout *)pvCmd; 4468 4994 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4469 vmsvga3dCmdDXDefineElementLayout(pThisCC, pCmd);4995 rcParse = vmsvga3dCmdDXDefineElementLayout(pThisCC, idDXContext, pCmd, cbCmd); 4470 4996 break; 4471 4997 } … … 4475 5001 SVGA3dCmdDXDestroyElementLayout *pCmd = (SVGA3dCmdDXDestroyElementLayout *)pvCmd; 4476 5002 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4477 vmsvga3dCmdDXDestroyElementLayout(pThisCC, pCmd);5003 rcParse = vmsvga3dCmdDXDestroyElementLayout(pThisCC, idDXContext, pCmd, cbCmd); 4478 5004 break; 4479 5005 } … … 4483 5009 SVGA3dCmdDXDefineBlendState *pCmd = (SVGA3dCmdDXDefineBlendState *)pvCmd; 4484 5010 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4485 vmsvga3dCmdDXDefineBlendState(pThisCC, pCmd);5011 rcParse = vmsvga3dCmdDXDefineBlendState(pThisCC, idDXContext, pCmd, cbCmd); 4486 5012 break; 4487 5013 } … … 4491 5017 SVGA3dCmdDXDestroyBlendState *pCmd = (SVGA3dCmdDXDestroyBlendState *)pvCmd; 4492 5018 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4493 vmsvga3dCmdDXDestroyBlendState(pThisCC, pCmd);5019 rcParse = vmsvga3dCmdDXDestroyBlendState(pThisCC, idDXContext, pCmd, cbCmd); 4494 5020 break; 4495 5021 } … … 4499 5025 SVGA3dCmdDXDefineDepthStencilState *pCmd = (SVGA3dCmdDXDefineDepthStencilState *)pvCmd; 4500 5026 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4501 vmsvga3dCmdDXDefineDepthStencilState(pThisCC, pCmd);5027 rcParse = vmsvga3dCmdDXDefineDepthStencilState(pThisCC, idDXContext, pCmd, cbCmd); 4502 5028 break; 4503 5029 } … … 4507 5033 SVGA3dCmdDXDestroyDepthStencilState *pCmd = (SVGA3dCmdDXDestroyDepthStencilState *)pvCmd; 4508 5034 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4509 vmsvga3dCmdDXDestroyDepthStencilState(pThisCC, pCmd);5035 rcParse = vmsvga3dCmdDXDestroyDepthStencilState(pThisCC, idDXContext, pCmd, cbCmd); 4510 5036 break; 4511 5037 } … … 4515 5041 SVGA3dCmdDXDefineRasterizerState *pCmd = (SVGA3dCmdDXDefineRasterizerState *)pvCmd; 4516 5042 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4517 vmsvga3dCmdDXDefineRasterizerState(pThisCC, pCmd);5043 rcParse = vmsvga3dCmdDXDefineRasterizerState(pThisCC, idDXContext, pCmd, cbCmd); 4518 5044 break; 4519 5045 } … … 4523 5049 SVGA3dCmdDXDestroyRasterizerState *pCmd = (SVGA3dCmdDXDestroyRasterizerState *)pvCmd; 4524 5050 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4525 vmsvga3dCmdDXDestroyRasterizerState(pThisCC, pCmd);5051 rcParse = vmsvga3dCmdDXDestroyRasterizerState(pThisCC, idDXContext, pCmd, cbCmd); 4526 5052 break; 4527 5053 } … … 4531 5057 SVGA3dCmdDXDefineSamplerState *pCmd = (SVGA3dCmdDXDefineSamplerState *)pvCmd; 4532 5058 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4533 vmsvga3dCmdDXDefineSamplerState(pThisCC, pCmd);5059 rcParse = vmsvga3dCmdDXDefineSamplerState(pThisCC, idDXContext, pCmd, cbCmd); 4534 5060 break; 4535 5061 } … … 4539 5065 SVGA3dCmdDXDestroySamplerState *pCmd = (SVGA3dCmdDXDestroySamplerState *)pvCmd; 4540 5066 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4541 vmsvga3dCmdDXDestroySamplerState(pThisCC, pCmd);5067 rcParse = vmsvga3dCmdDXDestroySamplerState(pThisCC, idDXContext, pCmd, cbCmd); 4542 5068 break; 4543 5069 } … … 4547 5073 SVGA3dCmdDXDefineShader *pCmd = (SVGA3dCmdDXDefineShader *)pvCmd; 4548 5074 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4549 vmsvga3dCmdDXDefineShader(pThisCC, pCmd);5075 rcParse = vmsvga3dCmdDXDefineShader(pThisCC, idDXContext, pCmd, cbCmd); 4550 5076 break; 4551 5077 } … … 4555 5081 SVGA3dCmdDXDestroyShader *pCmd = (SVGA3dCmdDXDestroyShader *)pvCmd; 4556 5082 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4557 vmsvga3dCmdDXDestroyShader(pThisCC, pCmd);5083 rcParse = vmsvga3dCmdDXDestroyShader(pThisCC, idDXContext, pCmd, cbCmd); 4558 5084 break; 4559 5085 } … … 4563 5089 SVGA3dCmdDXBindShader *pCmd = (SVGA3dCmdDXBindShader *)pvCmd; 4564 5090 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4565 vmsvga3dCmdDXBindShader(pThisCC, pCmd);5091 rcParse = vmsvga3dCmdDXBindShader(pThisCC, idDXContext, pCmd, cbCmd); 4566 5092 break; 4567 5093 } … … 4571 5097 SVGA3dCmdDXDefineStreamOutput *pCmd = (SVGA3dCmdDXDefineStreamOutput *)pvCmd; 4572 5098 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4573 vmsvga3dCmdDXDefineStreamOutput(pThisCC, pCmd);5099 rcParse = vmsvga3dCmdDXDefineStreamOutput(pThisCC, idDXContext, pCmd, cbCmd); 4574 5100 break; 4575 5101 } … … 4579 5105 SVGA3dCmdDXDestroyStreamOutput *pCmd = (SVGA3dCmdDXDestroyStreamOutput *)pvCmd; 4580 5106 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4581 vmsvga3dCmdDXDestroyStreamOutput(pThisCC, pCmd);5107 rcParse = vmsvga3dCmdDXDestroyStreamOutput(pThisCC, idDXContext, pCmd, cbCmd); 4582 5108 break; 4583 5109 } … … 4587 5113 SVGA3dCmdDXSetStreamOutput *pCmd = (SVGA3dCmdDXSetStreamOutput *)pvCmd; 4588 5114 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4589 vmsvga3dCmdDXSetStreamOutput(pThisCC, pCmd);5115 rcParse = vmsvga3dCmdDXSetStreamOutput(pThisCC, idDXContext, pCmd, cbCmd); 4590 5116 break; 4591 5117 } … … 4595 5121 SVGA3dCmdDXSetCOTable *pCmd = (SVGA3dCmdDXSetCOTable *)pvCmd; 4596 5122 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4597 vmsvga3dCmdDXSetCOTable(pThisCC, pCmd);5123 rcParse = vmsvga3dCmdDXSetCOTable(pThisCC, pCmd, cbCmd); 4598 5124 break; 4599 5125 } … … 4603 5129 SVGA3dCmdDXReadbackCOTable *pCmd = (SVGA3dCmdDXReadbackCOTable *)pvCmd; 4604 5130 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4605 vmsvga3dCmdDXReadbackCOTable(pThisCC, pCmd);5131 rcParse = vmsvga3dCmdDXReadbackCOTable(pThisCC, idDXContext, pCmd, cbCmd); 4606 5132 break; 4607 5133 } … … 4611 5137 SVGA3dCmdDXBufferCopy *pCmd = (SVGA3dCmdDXBufferCopy *)pvCmd; 4612 5138 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4613 vmsvga3dCmdDXBufferCopy(pThisCC, pCmd);5139 rcParse = vmsvga3dCmdDXBufferCopy(pThisCC, idDXContext, pCmd, cbCmd); 4614 5140 break; 4615 5141 } … … 4619 5145 SVGA3dCmdDXTransferFromBuffer *pCmd = (SVGA3dCmdDXTransferFromBuffer *)pvCmd; 4620 5146 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4621 vmsvga3dCmdDXTransferFromBuffer(pThisCC, pCmd);5147 rcParse = vmsvga3dCmdDXTransferFromBuffer(pThisCC, idDXContext, pCmd, cbCmd); 4622 5148 break; 4623 5149 } … … 4627 5153 SVGA3dCmdDXSurfaceCopyAndReadback *pCmd = (SVGA3dCmdDXSurfaceCopyAndReadback *)pvCmd; 4628 5154 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4629 vmsvga3dCmdDXSurfaceCopyAndReadback(pThisCC, pCmd);5155 rcParse = vmsvga3dCmdDXSurfaceCopyAndReadback(pThisCC, idDXContext, pCmd, cbCmd); 4630 5156 break; 4631 5157 } … … 4635 5161 SVGA3dCmdDXMoveQuery *pCmd = (SVGA3dCmdDXMoveQuery *)pvCmd; 4636 5162 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4637 vmsvga3dCmdDXMoveQuery(pThisCC, pCmd);5163 rcParse = vmsvga3dCmdDXMoveQuery(pThisCC, idDXContext, pCmd, cbCmd); 4638 5164 break; 4639 5165 } … … 4643 5169 SVGA3dCmdDXBindAllQuery *pCmd = (SVGA3dCmdDXBindAllQuery *)pvCmd; 4644 5170 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4645 vmsvga3dCmdDXBindAllQuery(pThisCC, pCmd);5171 rcParse = vmsvga3dCmdDXBindAllQuery(pThisCC, idDXContext, pCmd, cbCmd); 4646 5172 break; 4647 5173 } … … 4651 5177 SVGA3dCmdDXReadbackAllQuery *pCmd = (SVGA3dCmdDXReadbackAllQuery *)pvCmd; 4652 5178 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4653 vmsvga3dCmdDXReadbackAllQuery(pThisCC, pCmd);5179 rcParse = vmsvga3dCmdDXReadbackAllQuery(pThisCC, idDXContext, pCmd, cbCmd); 4654 5180 break; 4655 5181 } … … 4659 5185 SVGA3dCmdDXPredTransferFromBuffer *pCmd = (SVGA3dCmdDXPredTransferFromBuffer *)pvCmd; 4660 5186 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4661 vmsvga3dCmdDXPredTransferFromBuffer(pThisCC, pCmd);5187 rcParse = vmsvga3dCmdDXPredTransferFromBuffer(pThisCC, idDXContext, pCmd, cbCmd); 4662 5188 break; 4663 5189 } … … 4667 5193 SVGA3dCmdDXMobFence64 *pCmd = (SVGA3dCmdDXMobFence64 *)pvCmd; 4668 5194 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4669 vmsvga3dCmdDXMobFence64(pThisCC, pCmd);5195 rcParse = vmsvga3dCmdDXMobFence64(pThisCC, idDXContext, pCmd, cbCmd); 4670 5196 break; 4671 5197 } … … 4675 5201 SVGA3dCmdDXBindAllShader *pCmd = (SVGA3dCmdDXBindAllShader *)pvCmd; 4676 5202 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4677 vmsvga3dCmdDXBindAllShader(pThisCC, pCmd);5203 rcParse = vmsvga3dCmdDXBindAllShader(pThisCC, idDXContext, pCmd, cbCmd); 4678 5204 break; 4679 5205 } … … 4683 5209 SVGA3dCmdDXHint *pCmd = (SVGA3dCmdDXHint *)pvCmd; 4684 5210 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4685 vmsvga3dCmdDXHint(pThisCC, pCmd);5211 rcParse = vmsvga3dCmdDXHint(pThisCC, idDXContext, pCmd, cbCmd); 4686 5212 break; 4687 5213 } … … 4691 5217 SVGA3dCmdDXBufferUpdate *pCmd = (SVGA3dCmdDXBufferUpdate *)pvCmd; 4692 5218 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4693 vmsvga3dCmdDXBufferUpdate(pThisCC, pCmd);5219 rcParse = vmsvga3dCmdDXBufferUpdate(pThisCC, idDXContext, pCmd, cbCmd); 4694 5220 break; 4695 5221 } … … 4699 5225 SVGA3dCmdDXSetVSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetVSConstantBufferOffset *)pvCmd; 4700 5226 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4701 vmsvga3dCmdDXSetVSConstantBufferOffset(pThisCC, pCmd);5227 rcParse = vmsvga3dCmdDXSetVSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd); 4702 5228 break; 4703 5229 } … … 4707 5233 SVGA3dCmdDXSetPSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetPSConstantBufferOffset *)pvCmd; 4708 5234 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4709 vmsvga3dCmdDXSetPSConstantBufferOffset(pThisCC, pCmd);5235 rcParse = vmsvga3dCmdDXSetPSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd); 4710 5236 break; 4711 5237 } … … 4715 5241 SVGA3dCmdDXSetGSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetGSConstantBufferOffset *)pvCmd; 4716 5242 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4717 vmsvga3dCmdDXSetGSConstantBufferOffset(pThisCC, pCmd);5243 rcParse = vmsvga3dCmdDXSetGSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd); 4718 5244 break; 4719 5245 } … … 4723 5249 SVGA3dCmdDXSetHSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetHSConstantBufferOffset *)pvCmd; 4724 5250 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4725 vmsvga3dCmdDXSetHSConstantBufferOffset(pThisCC, pCmd);5251 rcParse = vmsvga3dCmdDXSetHSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd); 4726 5252 break; 4727 5253 } … … 4731 5257 SVGA3dCmdDXSetDSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetDSConstantBufferOffset *)pvCmd; 4732 5258 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4733 vmsvga3dCmdDXSetDSConstantBufferOffset(pThisCC, pCmd);5259 rcParse = vmsvga3dCmdDXSetDSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd); 4734 5260 break; 4735 5261 } … … 4739 5265 SVGA3dCmdDXSetCSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetCSConstantBufferOffset *)pvCmd; 4740 5266 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4741 vmsvga3dCmdDXSetCSConstantBufferOffset(pThisCC, pCmd);5267 rcParse = vmsvga3dCmdDXSetCSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd); 4742 5268 break; 4743 5269 } … … 4747 5273 SVGA3dCmdDXCondBindAllShader *pCmd = (SVGA3dCmdDXCondBindAllShader *)pvCmd; 4748 5274 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4749 vmsvga3dCmdDXCondBindAllShader(pThisCC, pCmd);5275 rcParse = vmsvga3dCmdDXCondBindAllShader(pThisCC, idDXContext, pCmd, cbCmd); 4750 5276 break; 4751 5277 } … … 4755 5281 SVGA3dCmdScreenCopy *pCmd = (SVGA3dCmdScreenCopy *)pvCmd; 4756 5282 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4757 vmsvga3dCmdScreenCopy(pThisCC, pCmd);5283 rcParse = vmsvga3dCmdScreenCopy(pThisCC, idDXContext, pCmd, cbCmd); 4758 5284 break; 4759 5285 } … … 4811 5337 SVGA3dCmdGrowOTable *pCmd = (SVGA3dCmdGrowOTable *)pvCmd; 4812 5338 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4813 vmsvga3dCmdGrowOTable(pThisCC, pCmd);5339 rcParse = vmsvga3dCmdGrowOTable(pThisCC, idDXContext, pCmd, cbCmd); 4814 5340 break; 4815 5341 } … … 4819 5345 SVGA3dCmdDXGrowCOTable *pCmd = (SVGA3dCmdDXGrowCOTable *)pvCmd; 4820 5346 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4821 vmsvga3dCmdDXGrowCOTable(pThisCC, pCmd);5347 rcParse = vmsvga3dCmdDXGrowCOTable(pThisCC, idDXContext, pCmd, cbCmd); 4822 5348 break; 4823 5349 } … … 4827 5353 SVGA3dCmdIntraSurfaceCopy *pCmd = (SVGA3dCmdIntraSurfaceCopy *)pvCmd; 4828 5354 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4829 vmsvga3dCmdIntraSurfaceCopy(pThisCC, pCmd);5355 rcParse = vmsvga3dCmdIntraSurfaceCopy(pThisCC, idDXContext, pCmd, cbCmd); 4830 5356 break; 4831 5357 } … … 4835 5361 SVGA3dCmdDefineGBSurface_v3 *pCmd = (SVGA3dCmdDefineGBSurface_v3 *)pvCmd; 4836 5362 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4837 vmsvga3dCmdDefineGBSurface_v3(pThisCC, pCmd);5363 rcParse = vmsvga3dCmdDefineGBSurface_v3(pThisCC, idDXContext, pCmd, cbCmd); 4838 5364 break; 4839 5365 } … … 4843 5369 SVGA3dCmdDXResolveCopy *pCmd = (SVGA3dCmdDXResolveCopy *)pvCmd; 4844 5370 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4845 vmsvga3dCmdDXResolveCopy(pThisCC, pCmd);5371 rcParse = vmsvga3dCmdDXResolveCopy(pThisCC, idDXContext, pCmd, cbCmd); 4846 5372 break; 4847 5373 } … … 4851 5377 SVGA3dCmdDXPredResolveCopy *pCmd = (SVGA3dCmdDXPredResolveCopy *)pvCmd; 4852 5378 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4853 vmsvga3dCmdDXPredResolveCopy(pThisCC, pCmd);5379 rcParse = vmsvga3dCmdDXPredResolveCopy(pThisCC, idDXContext, pCmd, cbCmd); 4854 5380 break; 4855 5381 } … … 4859 5385 SVGA3dCmdDXPredConvertRegion *pCmd = (SVGA3dCmdDXPredConvertRegion *)pvCmd; 4860 5386 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4861 vmsvga3dCmdDXPredConvertRegion(pThisCC, pCmd);5387 rcParse = vmsvga3dCmdDXPredConvertRegion(pThisCC, idDXContext, pCmd, cbCmd); 4862 5388 break; 4863 5389 } … … 4867 5393 SVGA3dCmdDXPredConvert *pCmd = (SVGA3dCmdDXPredConvert *)pvCmd; 4868 5394 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4869 vmsvga3dCmdDXPredConvert(pThisCC, pCmd);5395 rcParse = vmsvga3dCmdDXPredConvert(pThisCC, idDXContext, pCmd, cbCmd); 4870 5396 break; 4871 5397 } … … 4875 5401 SVGA3dCmdWholeSurfaceCopy *pCmd = (SVGA3dCmdWholeSurfaceCopy *)pvCmd; 4876 5402 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4877 vmsvga3dCmdWholeSurfaceCopy(pThisCC, pCmd);5403 rcParse = vmsvga3dCmdWholeSurfaceCopy(pThisCC, idDXContext, pCmd, cbCmd); 4878 5404 break; 4879 5405 } … … 4883 5409 SVGA3dCmdDXDefineUAView *pCmd = (SVGA3dCmdDXDefineUAView *)pvCmd; 4884 5410 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4885 vmsvga3dCmdDXDefineUAView(pThisCC, pCmd);5411 rcParse = vmsvga3dCmdDXDefineUAView(pThisCC, idDXContext, pCmd, cbCmd); 4886 5412 break; 4887 5413 } … … 4891 5417 SVGA3dCmdDXDestroyUAView *pCmd = (SVGA3dCmdDXDestroyUAView *)pvCmd; 4892 5418 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4893 vmsvga3dCmdDXDestroyUAView(pThisCC, pCmd);5419 rcParse = vmsvga3dCmdDXDestroyUAView(pThisCC, idDXContext, pCmd, cbCmd); 4894 5420 break; 4895 5421 } … … 4899 5425 SVGA3dCmdDXClearUAViewUint *pCmd = (SVGA3dCmdDXClearUAViewUint *)pvCmd; 4900 5426 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4901 vmsvga3dCmdDXClearUAViewUint(pThisCC, pCmd);5427 rcParse = vmsvga3dCmdDXClearUAViewUint(pThisCC, idDXContext, pCmd, cbCmd); 4902 5428 break; 4903 5429 } … … 4907 5433 SVGA3dCmdDXClearUAViewFloat *pCmd = (SVGA3dCmdDXClearUAViewFloat *)pvCmd; 4908 5434 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4909 vmsvga3dCmdDXClearUAViewFloat(pThisCC, pCmd);5435 rcParse = vmsvga3dCmdDXClearUAViewFloat(pThisCC, idDXContext, pCmd, cbCmd); 4910 5436 break; 4911 5437 } … … 4915 5441 SVGA3dCmdDXCopyStructureCount *pCmd = (SVGA3dCmdDXCopyStructureCount *)pvCmd; 4916 5442 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4917 vmsvga3dCmdDXCopyStructureCount(pThisCC, pCmd);5443 rcParse = vmsvga3dCmdDXCopyStructureCount(pThisCC, idDXContext, pCmd, cbCmd); 4918 5444 break; 4919 5445 } … … 4923 5449 SVGA3dCmdDXSetUAViews *pCmd = (SVGA3dCmdDXSetUAViews *)pvCmd; 4924 5450 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4925 vmsvga3dCmdDXSetUAViews(pThisCC, pCmd);5451 rcParse = vmsvga3dCmdDXSetUAViews(pThisCC, idDXContext, pCmd, cbCmd); 4926 5452 break; 4927 5453 } … … 4931 5457 SVGA3dCmdDXDrawIndexedInstancedIndirect *pCmd = (SVGA3dCmdDXDrawIndexedInstancedIndirect *)pvCmd; 4932 5458 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4933 vmsvga3dCmdDXDrawIndexedInstancedIndirect(pThisCC, pCmd);5459 rcParse = vmsvga3dCmdDXDrawIndexedInstancedIndirect(pThisCC, idDXContext, pCmd, cbCmd); 4934 5460 break; 4935 5461 } … … 4939 5465 SVGA3dCmdDXDrawInstancedIndirect *pCmd = (SVGA3dCmdDXDrawInstancedIndirect *)pvCmd; 4940 5466 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4941 vmsvga3dCmdDXDrawInstancedIndirect(pThisCC, pCmd);5467 rcParse = vmsvga3dCmdDXDrawInstancedIndirect(pThisCC, idDXContext, pCmd, cbCmd); 4942 5468 break; 4943 5469 } … … 4947 5473 SVGA3dCmdDXDispatch *pCmd = (SVGA3dCmdDXDispatch *)pvCmd; 4948 5474 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4949 vmsvga3dCmdDXDispatch(pThisCC, pCmd);5475 rcParse = vmsvga3dCmdDXDispatch(pThisCC, idDXContext, pCmd, cbCmd); 4950 5476 break; 4951 5477 } … … 4955 5481 SVGA3dCmdDXDispatchIndirect *pCmd = (SVGA3dCmdDXDispatchIndirect *)pvCmd; 4956 5482 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4957 vmsvga3dCmdDXDispatchIndirect(pThisCC, pCmd);5483 rcParse = vmsvga3dCmdDXDispatchIndirect(pThisCC, idDXContext, pCmd, cbCmd); 4958 5484 break; 4959 5485 } … … 4963 5489 SVGA3dCmdWriteZeroSurface *pCmd = (SVGA3dCmdWriteZeroSurface *)pvCmd; 4964 5490 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4965 vmsvga3dCmdWriteZeroSurface(pThisCC, pCmd);5491 rcParse = vmsvga3dCmdWriteZeroSurface(pThisCC, idDXContext, pCmd, cbCmd); 4966 5492 break; 4967 5493 } … … 4971 5497 SVGA3dCmdHintZeroSurface *pCmd = (SVGA3dCmdHintZeroSurface *)pvCmd; 4972 5498 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4973 vmsvga3dCmdHintZeroSurface(pThisCC, pCmd);5499 rcParse = vmsvga3dCmdHintZeroSurface(pThisCC, idDXContext, pCmd, cbCmd); 4974 5500 break; 4975 5501 } … … 4979 5505 SVGA3dCmdDXTransferToBuffer *pCmd = (SVGA3dCmdDXTransferToBuffer *)pvCmd; 4980 5506 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4981 vmsvga3dCmdDXTransferToBuffer(pThisCC, pCmd);5507 rcParse = vmsvga3dCmdDXTransferToBuffer(pThisCC, idDXContext, pCmd, cbCmd); 4982 5508 break; 4983 5509 } … … 4987 5513 SVGA3dCmdDXSetStructureCount *pCmd = (SVGA3dCmdDXSetStructureCount *)pvCmd; 4988 5514 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4989 vmsvga3dCmdDXSetStructureCount(pThisCC, pCmd);5515 rcParse = vmsvga3dCmdDXSetStructureCount(pThisCC, idDXContext, pCmd, cbCmd); 4990 5516 break; 4991 5517 } … … 4995 5521 SVGA3dCmdLogicOpsBitBlt *pCmd = (SVGA3dCmdLogicOpsBitBlt *)pvCmd; 4996 5522 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 4997 vmsvga3dCmdLogicOpsBitBlt(pThisCC, pCmd);5523 rcParse = vmsvga3dCmdLogicOpsBitBlt(pThisCC, idDXContext, pCmd, cbCmd); 4998 5524 break; 4999 5525 } … … 5003 5529 SVGA3dCmdLogicOpsTransBlt *pCmd = (SVGA3dCmdLogicOpsTransBlt *)pvCmd; 5004 5530 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5005 vmsvga3dCmdLogicOpsTransBlt(pThisCC, pCmd);5531 rcParse = vmsvga3dCmdLogicOpsTransBlt(pThisCC, idDXContext, pCmd, cbCmd); 5006 5532 break; 5007 5533 } … … 5011 5537 SVGA3dCmdLogicOpsStretchBlt *pCmd = (SVGA3dCmdLogicOpsStretchBlt *)pvCmd; 5012 5538 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5013 vmsvga3dCmdLogicOpsStretchBlt(pThisCC, pCmd);5539 rcParse = vmsvga3dCmdLogicOpsStretchBlt(pThisCC, idDXContext, pCmd, cbCmd); 5014 5540 break; 5015 5541 } … … 5019 5545 SVGA3dCmdLogicOpsColorFill *pCmd = (SVGA3dCmdLogicOpsColorFill *)pvCmd; 5020 5546 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5021 vmsvga3dCmdLogicOpsColorFill(pThisCC, pCmd);5547 rcParse = vmsvga3dCmdLogicOpsColorFill(pThisCC, idDXContext, pCmd, cbCmd); 5022 5548 break; 5023 5549 } … … 5027 5553 SVGA3dCmdLogicOpsAlphaBlend *pCmd = (SVGA3dCmdLogicOpsAlphaBlend *)pvCmd; 5028 5554 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5029 vmsvga3dCmdLogicOpsAlphaBlend(pThisCC, pCmd);5555 rcParse = vmsvga3dCmdLogicOpsAlphaBlend(pThisCC, idDXContext, pCmd, cbCmd); 5030 5556 break; 5031 5557 } … … 5035 5561 SVGA3dCmdLogicOpsClearTypeBlend *pCmd = (SVGA3dCmdLogicOpsClearTypeBlend *)pvCmd; 5036 5562 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5037 vmsvga3dCmdLogicOpsClearTypeBlend(pThisCC, pCmd);5563 rcParse = vmsvga3dCmdLogicOpsClearTypeBlend(pThisCC, idDXContext, pCmd, cbCmd); 5038 5564 break; 5039 5565 } … … 5055 5581 SVGA3dCmdDefineGBSurface_v4 *pCmd = (SVGA3dCmdDefineGBSurface_v4 *)pvCmd; 5056 5582 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5057 vmsvga3dCmdDefineGBSurface_v4(pThisCC, pCmd);5583 rcParse = vmsvga3dCmdDefineGBSurface_v4(pThisCC, idDXContext, pCmd, cbCmd); 5058 5584 break; 5059 5585 } … … 5063 5589 SVGA3dCmdDXSetCSUAViews *pCmd = (SVGA3dCmdDXSetCSUAViews *)pvCmd; 5064 5590 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5065 vmsvga3dCmdDXSetCSUAViews(pThisCC, pCmd);5591 rcParse = vmsvga3dCmdDXSetCSUAViews(pThisCC, idDXContext, pCmd, cbCmd); 5066 5592 break; 5067 5593 } … … 5071 5597 SVGA3dCmdDXSetMinLOD *pCmd = (SVGA3dCmdDXSetMinLOD *)pvCmd; 5072 5598 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5073 vmsvga3dCmdDXSetMinLOD(pThisCC, pCmd);5599 rcParse = vmsvga3dCmdDXSetMinLOD(pThisCC, idDXContext, pCmd, cbCmd); 5074 5600 break; 5075 5601 } … … 5091 5617 SVGA3dCmdDXDefineDepthStencilView_v2 *pCmd = (SVGA3dCmdDXDefineDepthStencilView_v2 *)pvCmd; 5092 5618 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5093 vmsvga3dCmdDXDefineDepthStencilView_v2(pThisCC, pCmd);5619 rcParse = vmsvga3dCmdDXDefineDepthStencilView_v2(pThisCC, idDXContext, pCmd, cbCmd); 5094 5620 break; 5095 5621 } … … 5099 5625 SVGA3dCmdDXDefineStreamOutputWithMob *pCmd = (SVGA3dCmdDXDefineStreamOutputWithMob *)pvCmd; 5100 5626 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5101 vmsvga3dCmdDXDefineStreamOutputWithMob(pThisCC, pCmd);5627 rcParse = vmsvga3dCmdDXDefineStreamOutputWithMob(pThisCC, idDXContext, pCmd, cbCmd); 5102 5628 break; 5103 5629 } … … 5107 5633 SVGA3dCmdDXSetShaderIface *pCmd = (SVGA3dCmdDXSetShaderIface *)pvCmd; 5108 5634 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5109 vmsvga3dCmdDXSetShaderIface(pThisCC, pCmd);5635 rcParse = vmsvga3dCmdDXSetShaderIface(pThisCC, idDXContext, pCmd, cbCmd); 5110 5636 break; 5111 5637 } … … 5115 5641 SVGA3dCmdDXBindStreamOutput *pCmd = (SVGA3dCmdDXBindStreamOutput *)pvCmd; 5116 5642 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5117 vmsvga3dCmdDXBindStreamOutput(pThisCC, pCmd);5643 rcParse = vmsvga3dCmdDXBindStreamOutput(pThisCC, idDXContext, pCmd, cbCmd); 5118 5644 break; 5119 5645 } … … 5123 5649 SVGA3dCmdSurfaceStretchBltNonMSToMS *pCmd = (SVGA3dCmdSurfaceStretchBltNonMSToMS *)pvCmd; 5124 5650 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5125 vmsvga3dCmdSurfaceStretchBltNonMSToMS(pThisCC, pCmd);5651 rcParse = vmsvga3dCmdSurfaceStretchBltNonMSToMS(pThisCC, idDXContext, pCmd, cbCmd); 5126 5652 break; 5127 5653 } … … 5131 5657 SVGA3dCmdDXBindShaderIface *pCmd = (SVGA3dCmdDXBindShaderIface *)pvCmd; 5132 5658 VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd)); 5133 vmsvga3dCmdDXBindShaderIface(pThisCC, pCmd);5659 rcParse = vmsvga3dCmdDXBindShaderIface(pThisCC, idDXContext, pCmd, cbCmd); 5134 5660 break; 5135 5661 } … … 5156 5682 } 5157 5683 5158 return rcParse; 5684 return VINF_SUCCESS; 5685 // return rcParse; 5159 5686 } 5160 5687 # undef VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-internal.h
r86886 r88787 29 29 #endif 30 30 31 #include <iprt/avl.h>32 #include <iprt/list.h>33 34 31 35 32 /********************************************************************************************************************************* … … 55 52 PVMSVGAGMRDESCRIPTOR paDesc; 56 53 } GMR, *PGMR; 57 58 /*59 * GBO (Guest Backed Object).60 * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)61 * and Object Tables which the guest shares with the host.62 *63 * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order64 * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to65 * map the guest pages into the host R3 memory and access them directly.66 */67 68 /* GBO descriptor. */69 typedef struct VMSVGAGBODESCRIPTOR70 {71 RTGCPHYS GCPhys;72 uint64_t cPages;73 } VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;74 typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;75 76 /* GBO.77 */78 typedef struct VMSVGAGBO79 {80 uint32_t fGboFlags;81 uint32_t cTotalPages;82 uint32_t cbTotal;83 uint32_t cDescriptors;84 PVMSVGAGBODESCRIPTOR paDescriptors;85 } VMSVGAGBO, *PVMSVGAGBO;86 typedef VMSVGAGBO const *PCVMSVGAGBO;87 88 #define VMSVGAGBO_F_WRITE_PROTECTED 189 90 #define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)91 92 /* MOB is also a GBO.93 */94 typedef struct VMSVGAMOB95 {96 AVLU32NODECORE Core; /* Key is the mobid. */97 RTLISTNODE nodeLRU;98 VMSVGAGBO Gbo;99 } VMSVGAMOB, *PVMSVGAMOB;100 typedef VMSVGAMOB const *PCVMSVGAMOB;101 54 102 55 … … 327 280 void vmsvgaR3CmdDefineGMR2(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAFifoCmdDefineGMR2 const *pCmd); 328 281 void vmsvgaR3CmdRemapGMR2(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAFifoCmdRemapGMR2 const *pCmd); 329 int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd);282 int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDXContext, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd); 330 283 #endif 331 284 -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r88774 r88787 3245 3245 * @thread EMT 3246 3246 */ 3247 static SVGACBStatus vmsvgaR3CmdBufSubmit (PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGACMDBUF *ppCmdBuf)3247 static SVGACBStatus vmsvgaR3CmdBufSubmitCtx(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGACMDBUF *ppCmdBuf) 3248 3248 { 3249 3249 /* Command buffer submission. */ … … 3318 3318 /* Verify the command buffer header. */ 3319 3319 if (RT_LIKELY( pCmdBuf->hdr.status == SVGA_CB_STATUS_NONE 3320 && (pCmdBuf->hdr.flags & ~(SVGA_CB_FLAG_NO_IRQ )) == 0 /* No unexpected flags. */3320 && (pCmdBuf->hdr.flags & ~(SVGA_CB_FLAG_NO_IRQ | SVGA_CB_FLAG_DX_CONTEXT)) == 0 /* No unexpected flags. */ 3321 3321 && pCmdBuf->hdr.length <= SVGA_CB_MAX_SIZE)) 3322 3322 { … … 3334 3334 if (RT_LIKELY(CBCtx < RT_ELEMENTS(pSvgaR3State->apCmdBufCtxs))) 3335 3335 /* This usually processes the CB async and sets pCmbBuf to NULL. */ 3336 CBstatus = vmsvgaR3CmdBufSubmit (pDevIns, pThis, pThisCC, &pCmdBuf);3336 CBstatus = vmsvgaR3CmdBufSubmitCtx(pDevIns, pThis, pThisCC, &pCmdBuf); 3337 3337 else 3338 3338 CBstatus = vmsvgaR3CmdBufSubmitDC(pDevIns, pThisCC, &pCmdBuf, &offNextCmd); … … 3377 3377 if (CBstatus != SVGA_CB_STATUS_NONE) 3378 3378 { 3379 LogFunc(("Write status %#x, offNextCmd %#x (of %#x), fIRQ %#x\n", CBstatus, offNextCmd, pCmdBuf ->hdr.length, fIRQ));3379 LogFunc(("Write status %#x, offNextCmd %#x (of %#x), fIRQ %#x\n", CBstatus, offNextCmd, pCmdBuf ? pCmdBuf->hdr.length : 0, fIRQ)); 3380 3380 vmsvgaR3CmdBufWriteStatus(pDevIns, GCPhysCB, CBstatus, offNextCmd); 3381 3381 if (fIRQ) … … 3403 3403 * @param pThis The shared VGA/VMSVGA state. 3404 3404 * @param pThisCC The VGA/VMSVGA state for the current context. 3405 * @param idDXContext VGPU10 DX context of the commands or SVGA3D_INVALID_ID if they are not for a specific context. 3405 3406 * @param pvCommands Pointer to the command buffer. 3406 3407 * @param cbCommands Size of the command buffer. … … 3410 3411 * @thread FIFO 3411 3412 */ 3412 static SVGACBStatus vmsvgaR3CmdBufProcessCommands(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, void const *pvCommands, uint32_t cbCommands, uint32_t *poffNextCmd, uint32_t *pu32IrqStatus) 3413 { 3413 static SVGACBStatus vmsvgaR3CmdBufProcessCommands(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDXContext, void const *pvCommands, uint32_t cbCommands, uint32_t *poffNextCmd, uint32_t *pu32IrqStatus) 3414 { 3415 # ifndef VBOX_WITH_VMSVGA3D 3416 RT_NOREF(idDXContext); 3417 # endif 3414 3418 SVGACBStatus CBstatus = SVGA_CB_STATUS_COMPLETED; 3415 3419 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State; … … 3723 3727 3724 3728 /* Command data begins after the 32 bit command length. */ 3725 int rc = vmsvgaR3Process3dCmd(pThis, pThisCC, (SVGAFifo3dCmdId)cmdId, *pcbMore, pcbMore + 1);3729 int rc = vmsvgaR3Process3dCmd(pThis, pThisCC, idDXContext, (SVGAFifo3dCmdId)cmdId, *pcbMore, pcbMore + 1); 3726 3730 if (RT_SUCCESS(rc)) 3727 3731 { /* likely */ } … … 3823 3827 uint32_t offNextCmd = 0; 3824 3828 uint32_t u32IrqStatus = 0; 3825 3829 uint32_t const idDXContext = RT_BOOL(pCmdBuf->hdr.flags & SVGA_CB_FLAG_DX_CONTEXT) 3830 ? pCmdBuf->hdr.dxContext 3831 : SVGA3D_INVALID_ID; 3826 3832 /* Process one buffer. */ 3827 CBstatus = vmsvgaR3CmdBufProcessCommands(pDevIns, pThis, pThisCC, pCmdBuf->pvCommands, pCmdBuf->hdr.length, &offNextCmd, &u32IrqStatus);3833 CBstatus = vmsvgaR3CmdBufProcessCommands(pDevIns, pThis, pThisCC, idDXContext, pCmdBuf->pvCommands, pCmdBuf->hdr.length, &offNextCmd, &u32IrqStatus); 3828 3834 3829 3835 if (!RT_BOOL(pCmdBuf->hdr.flags & SVGA_CB_FLAG_NO_IRQ)) … … 4979 4985 } 4980 4986 4981 vmsvgaR3Process3dCmd(pThis, pThisCC, (SVGAFifo3dCmdId)enmCmdId, cbCmd, pu32Cmd);4987 vmsvgaR3Process3dCmd(pThis, pThisCC, SVGA3D_INVALID_ID, (SVGAFifo3dCmdId)enmCmdId, cbCmd, pu32Cmd); 4982 4988 } 4983 4989 else -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h
r86855 r88787 36 36 #endif 37 37 38 #include <iprt/avl.h> 39 #include <iprt/list.h> 40 41 38 42 /* 39 43 * PCI device IDs. … … 59 63 # pragma GCC diagnostic ignored "-Wpedantic" 60 64 #endif 61 /* VMSVGA headers from SVGA Gallium driver. */65 /* VMSVGA headers. */ 62 66 #pragma pack(1) /* VMSVGA structures are '__packed'. */ 63 67 #include <svga3d_caps.h> … … 575 579 void vmsvgaR3Clip3dRect(SVGA3dRect const *pBound, SVGA3dRect RT_UNTRUSTED_GUEST *pRect); 576 580 581 /* 582 * GBO (Guest Backed Object). 583 * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects) 584 * and Object Tables which the guest shares with the host. 585 * 586 * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order 587 * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to 588 * map the guest pages into the host R3 memory and access them directly. 589 */ 590 591 /* GBO descriptor. */ 592 typedef struct VMSVGAGBODESCRIPTOR 593 { 594 RTGCPHYS GCPhys; 595 uint64_t cPages; 596 } VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR; 597 typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR; 598 599 /* GBO. 600 */ 601 typedef struct VMSVGAGBO 602 { 603 uint32_t fGboFlags; 604 uint32_t cTotalPages; 605 uint32_t cbTotal; 606 uint32_t cDescriptors; 607 PVMSVGAGBODESCRIPTOR paDescriptors; 608 void *pvHost; /* Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */ 609 } VMSVGAGBO, *PVMSVGAGBO; 610 typedef VMSVGAGBO const *PCVMSVGAGBO; 611 612 #define VMSVGAGBO_F_WRITE_PROTECTED 0x1 613 #define VMSVGAGBO_F_HOST_BACKED 0x2 614 615 #define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL) 616 617 /* MOB is also a GBO. 618 */ 619 typedef struct VMSVGAMOB 620 { 621 AVLU32NODECORE Core; /* Key is the mobid. */ 622 RTLISTNODE nodeLRU; 623 VMSVGAGBO Gbo; 624 } VMSVGAMOB, *PVMSVGAMOB; 625 typedef VMSVGAMOB const *PCVMSVGAMOB; 626 627 int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid); 628 void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob); 629 void *vmsvgaR3MobBackingStoreGet(PVMSVGAMOB pMob, uint32_t off); 630 631 DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob) 632 { 633 if (pMob) 634 return pMob->Gbo.cbTotal; 635 return 0; 636 } 637 638 DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob) 639 { 640 if (pMob) 641 return pMob->Core.Key; 642 return SVGA_ID_INVALID; 643 } 644 645 #ifdef VBOX_WITH_VMSVGA3D 646 int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBox); 647 int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBoxDst, SVGA3dPoint const *pPtSrc); 648 #endif 649 577 650 #endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */ -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-info.cpp
r86905 r88787 50 50 static const VMSVGAINFOENUM g_aSVGA3dSurfaceFormats[] = 51 51 { 52 { SVGA3D_FORMAT_INVALID , "FORMAT_INVALID" }, 53 { SVGA3D_X8R8G8B8 , "X8R8G8B8" }, 54 { SVGA3D_A8R8G8B8 , "A8R8G8B8" }, 55 { SVGA3D_R5G6B5 , "R5G6B5" }, 56 { SVGA3D_X1R5G5B5 , "X1R5G5B5" }, 57 { SVGA3D_A1R5G5B5 , "A1R5G5B5" }, 58 { SVGA3D_A4R4G4B4 , "A4R4G4B4" }, 59 { SVGA3D_Z_D32 , "Z_D32" }, 60 { SVGA3D_Z_D16 , "Z_D16" }, 61 { SVGA3D_Z_D24S8 , "Z_D24S8" }, 62 { SVGA3D_Z_D15S1 , "Z_D15S1" }, 63 { SVGA3D_LUMINANCE8 , "LUMINANCE8" }, 64 { SVGA3D_LUMINANCE4_ALPHA4 , "LUMINANCE4_ALPHA4" }, 65 { SVGA3D_LUMINANCE16 , "LUMINANCE16" }, 66 { SVGA3D_LUMINANCE8_ALPHA8 , "LUMINANCE8_ALPHA8" }, 67 { SVGA3D_DXT1 , "DXT1" }, 68 { SVGA3D_DXT2 , "DXT2" }, 69 { SVGA3D_DXT3 , "DXT3" }, 70 { SVGA3D_DXT4 , "DXT4" }, 71 { SVGA3D_DXT5 , "DXT5" }, 72 { SVGA3D_BUMPU8V8 , "BUMPU8V8" }, 73 { SVGA3D_BUMPL6V5U5 , "BUMPL6V5U5" }, 74 { SVGA3D_BUMPX8L8V8U8 , "BUMPX8L8V8U8" }, 75 { SVGA3D_FORMAT_DEAD1 , "FORMAT_DEAD1" }, 76 { SVGA3D_ARGB_S10E5 , "ARGB_S10E5" }, 77 { SVGA3D_ARGB_S23E8 , "ARGB_S23E8" }, 78 { SVGA3D_A2R10G10B10 , "A2R10G10B10" }, 79 { SVGA3D_V8U8 , "V8U8" }, 80 { SVGA3D_Q8W8V8U8 , "Q8W8V8U8" }, 81 { SVGA3D_CxV8U8 , "CxV8U8" }, 82 { SVGA3D_X8L8V8U8 , "X8L8V8U8" }, 83 { SVGA3D_A2W10V10U10 , "A2W10V10U10" }, 84 { SVGA3D_ALPHA8 , "ALPHA8" }, 85 { SVGA3D_R_S10E5 , "R_S10E5" }, 86 { SVGA3D_R_S23E8 , "R_S23E8" }, 87 { SVGA3D_RG_S10E5 , "RG_S10E5" }, 88 { SVGA3D_RG_S23E8 , "RG_S23E8" }, 89 { SVGA3D_BUFFER , "BUFFER" }, 90 { SVGA3D_Z_D24X8 , "Z_D24X8" }, 91 { SVGA3D_V16U16 , "V16U16" }, 92 { SVGA3D_G16R16 , "G16R16" }, 93 { SVGA3D_A16B16G16R16 , "A16B16G16R16" }, 94 { SVGA3D_UYVY , "UYVY" }, 95 { SVGA3D_YUY2 , "YUY2" }, 96 { SVGA3D_NV12 , "NV12" }, 97 { SVGA3D_FORMAT_DEAD2 , "DEAD2" }, /* Old SVGA3D_AYUV */ 98 { SVGA3D_ATI1 , "ATI1" }, 99 { SVGA3D_ATI2 , "ATI2" }, 100 { SVGA3D_Z_DF16 , "Z_DF16" }, 101 { SVGA3D_Z_DF24 , "Z_DF24" }, 102 { SVGA3D_Z_D24S8_INT , "Z_D24S8_INT" }, 103 { SVGA3D_R8G8B8A8_SNORM , "R8G8B8A8_SNORM" }, 104 { SVGA3D_R16G16_UNORM , "R16G16_UNORM" }, 52 { SVGA3D_FORMAT_INVALID , "FORMAT_INVALID" }, 53 { SVGA3D_X8R8G8B8 , "X8R8G8B8" }, 54 { SVGA3D_A8R8G8B8 , "A8R8G8B8" }, 55 { SVGA3D_R5G6B5 , "R5G6B5" }, 56 { SVGA3D_X1R5G5B5 , "X1R5G5B5" }, 57 { SVGA3D_A1R5G5B5 , "A1R5G5B5" }, 58 { SVGA3D_A4R4G4B4 , "A4R4G4B4" }, 59 { SVGA3D_Z_D32 , "Z_D32" }, 60 { SVGA3D_Z_D16 , "Z_D16" }, 61 { SVGA3D_Z_D24S8 , "Z_D24S8" }, 62 { SVGA3D_Z_D15S1 , "Z_D15S1" }, 63 { SVGA3D_LUMINANCE8 , "LUMINANCE8" }, 64 { SVGA3D_LUMINANCE4_ALPHA4 , "LUMINANCE4_ALPHA4" }, 65 { SVGA3D_LUMINANCE16 , "LUMINANCE16" }, 66 { SVGA3D_LUMINANCE8_ALPHA8 , "LUMINANCE8_ALPHA8" }, 67 { SVGA3D_DXT1 , "DXT1" }, 68 { SVGA3D_DXT2 , "DXT2" }, 69 { SVGA3D_DXT3 , "DXT3" }, 70 { SVGA3D_DXT4 , "DXT4" }, 71 { SVGA3D_DXT5 , "DXT5" }, 72 { SVGA3D_BUMPU8V8 , "BUMPU8V8" }, 73 { SVGA3D_BUMPL6V5U5 , "BUMPL6V5U5" }, 74 { SVGA3D_BUMPX8L8V8U8 , "BUMPX8L8V8U8" }, 75 { SVGA3D_FORMAT_DEAD1 , "FORMAT_DEAD1" }, 76 { SVGA3D_ARGB_S10E5 , "ARGB_S10E5" }, 77 { SVGA3D_ARGB_S23E8 , "ARGB_S23E8" }, 78 { SVGA3D_A2R10G10B10 , "A2R10G10B10" }, 79 { SVGA3D_V8U8 , "V8U8" }, 80 { SVGA3D_Q8W8V8U8 , "Q8W8V8U8" }, 81 { SVGA3D_CxV8U8 , "CxV8U8" }, 82 { SVGA3D_X8L8V8U8 , "X8L8V8U8" }, 83 { SVGA3D_A2W10V10U10 , "A2W10V10U10" }, 84 { SVGA3D_ALPHA8 , "ALPHA8" }, 85 { SVGA3D_R_S10E5 , "R_S10E5" }, 86 { SVGA3D_R_S23E8 , "R_S23E8" }, 87 { SVGA3D_RG_S10E5 , "RG_S10E5" }, 88 { SVGA3D_RG_S23E8 , "RG_S23E8" }, 89 { SVGA3D_BUFFER , "BUFFER" }, 90 { SVGA3D_Z_D24X8 , "Z_D24X8" }, 91 { SVGA3D_V16U16 , "V16U16" }, 92 { SVGA3D_G16R16 , "G16R16" }, 93 { SVGA3D_A16B16G16R16 , "A16B16G16R16" }, 94 { SVGA3D_UYVY , "UYVY" }, 95 { SVGA3D_YUY2 , "YUY2" }, 96 { SVGA3D_NV12 , "NV12" }, 97 { SVGA3D_FORMAT_DEAD2 , "FORMAT_DEAD2" }, 98 { SVGA3D_R32G32B32A32_TYPELESS , "R32G32B32A32_TYPELESS" }, 99 { SVGA3D_R32G32B32A32_UINT , "R32G32B32A32_UINT" }, 100 { SVGA3D_R32G32B32A32_SINT , "R32G32B32A32_SINT" }, 101 { SVGA3D_R32G32B32_TYPELESS , "R32G32B32_TYPELESS" }, 102 { SVGA3D_R32G32B32_FLOAT , "R32G32B32_FLOAT" }, 103 { SVGA3D_R32G32B32_UINT , "R32G32B32_UINT" }, 104 { SVGA3D_R32G32B32_SINT , "R32G32B32_SINT" }, 105 { SVGA3D_R16G16B16A16_TYPELESS , "R16G16B16A16_TYPELESS" }, 106 { SVGA3D_R16G16B16A16_UINT , "R16G16B16A16_UINT" }, 107 { SVGA3D_R16G16B16A16_SNORM , "R16G16B16A16_SNORM" }, 108 { SVGA3D_R16G16B16A16_SINT , "R16G16B16A16_SINT" }, 109 { SVGA3D_R32G32_TYPELESS , "R32G32_TYPELESS" }, 110 { SVGA3D_R32G32_UINT , "R32G32_UINT" }, 111 { SVGA3D_R32G32_SINT , "R32G32_SINT" }, 112 { SVGA3D_R32G8X24_TYPELESS , "R32G8X24_TYPELESS" }, 113 { SVGA3D_D32_FLOAT_S8X24_UINT , "D32_FLOAT_S8X24_UINT" }, 114 { SVGA3D_R32_FLOAT_X8X24 , "R32_FLOAT_X8X24" }, 115 { SVGA3D_X32_G8X24_UINT , "X32_G8X24_UINT" }, 116 { SVGA3D_R10G10B10A2_TYPELESS , "R10G10B10A2_TYPELESS" }, 117 { SVGA3D_R10G10B10A2_UINT , "R10G10B10A2_UINT" }, 118 { SVGA3D_R11G11B10_FLOAT , "R11G11B10_FLOAT" }, 119 { SVGA3D_R8G8B8A8_TYPELESS , "R8G8B8A8_TYPELESS" }, 120 { SVGA3D_R8G8B8A8_UNORM , "R8G8B8A8_UNORM" }, 121 { SVGA3D_R8G8B8A8_UNORM_SRGB , "R8G8B8A8_UNORM_SRGB" }, 122 { SVGA3D_R8G8B8A8_UINT , "R8G8B8A8_UINT" }, 123 { SVGA3D_R8G8B8A8_SINT , "R8G8B8A8_SINT" }, 124 { SVGA3D_R16G16_TYPELESS , "R16G16_TYPELESS" }, 125 { SVGA3D_R16G16_UINT , "R16G16_UINT" }, 126 { SVGA3D_R16G16_SINT , "R16G16_SINT" }, 127 { SVGA3D_R32_TYPELESS , "R32_TYPELESS" }, 128 { SVGA3D_D32_FLOAT , "D32_FLOAT" }, 129 { SVGA3D_R32_UINT , "R32_UINT" }, 130 { SVGA3D_R32_SINT , "R32_SINT" }, 131 { SVGA3D_R24G8_TYPELESS , "R24G8_TYPELESS" }, 132 { SVGA3D_D24_UNORM_S8_UINT , "D24_UNORM_S8_UINT" }, 133 { SVGA3D_R24_UNORM_X8 , "R24_UNORM_X8" }, 134 { SVGA3D_X24_G8_UINT , "X24_G8_UINT" }, 135 { SVGA3D_R8G8_TYPELESS , "R8G8_TYPELESS" }, 136 { SVGA3D_R8G8_UNORM , "R8G8_UNORM" }, 137 { SVGA3D_R8G8_UINT , "R8G8_UINT" }, 138 { SVGA3D_R8G8_SINT , "R8G8_SINT" }, 139 { SVGA3D_R16_TYPELESS , "R16_TYPELESS" }, 140 { SVGA3D_R16_UNORM , "R16_UNORM" }, 141 { SVGA3D_R16_UINT , "R16_UINT" }, 142 { SVGA3D_R16_SNORM , "R16_SNORM" }, 143 { SVGA3D_R16_SINT , "R16_SINT" }, 144 { SVGA3D_R8_TYPELESS , "R8_TYPELESS" }, 145 { SVGA3D_R8_UNORM , "R8_UNORM" }, 146 { SVGA3D_R8_UINT , "R8_UINT" }, 147 { SVGA3D_R8_SNORM , "R8_SNORM" }, 148 { SVGA3D_R8_SINT , "R8_SINT" }, 149 { SVGA3D_P8 , "P8" }, 150 { SVGA3D_R9G9B9E5_SHAREDEXP , "R9G9B9E5_SHAREDEXP" }, 151 { SVGA3D_R8G8_B8G8_UNORM , "R8G8_B8G8_UNORM" }, 152 { SVGA3D_G8R8_G8B8_UNORM , "G8R8_G8B8_UNORM" }, 153 { SVGA3D_BC1_TYPELESS , "BC1_TYPELESS" }, 154 { SVGA3D_BC1_UNORM_SRGB , "BC1_UNORM_SRGB" }, 155 { SVGA3D_BC2_TYPELESS , "BC2_TYPELESS" }, 156 { SVGA3D_BC2_UNORM_SRGB , "BC2_UNORM_SRGB" }, 157 { SVGA3D_BC3_TYPELESS , "BC3_TYPELESS" }, 158 { SVGA3D_BC3_UNORM_SRGB , "BC3_UNORM_SRGB" }, 159 { SVGA3D_BC4_TYPELESS , "BC4_TYPELESS" }, 160 { SVGA3D_ATI1 , "ATI1" }, 161 { SVGA3D_BC4_SNORM , "BC4_SNORM" }, 162 { SVGA3D_BC5_TYPELESS , "BC5_TYPELESS" }, 163 { SVGA3D_ATI2 , "ATI2" }, 164 { SVGA3D_BC5_SNORM , "BC5_SNORM" }, 165 { SVGA3D_R10G10B10_XR_BIAS_A2_UNORM , "R10G10B10_XR_BIAS_A2_UNORM" }, 166 { SVGA3D_B8G8R8A8_TYPELESS , "B8G8R8A8_TYPELESS" }, 167 { SVGA3D_B8G8R8A8_UNORM_SRGB , "B8G8R8A8_UNORM_SRGB" }, 168 { SVGA3D_B8G8R8X8_TYPELESS , "B8G8R8X8_TYPELESS" }, 169 { SVGA3D_B8G8R8X8_UNORM_SRGB , "B8G8R8X8_UNORM_SRGB" }, 170 { SVGA3D_Z_DF16 , "Z_DF16" }, 171 { SVGA3D_Z_DF24 , "Z_DF24" }, 172 { SVGA3D_Z_D24S8_INT , "Z_D24S8_INT" }, 173 { SVGA3D_YV12 , "YV12" }, 174 { SVGA3D_R32G32B32A32_FLOAT , "R32G32B32A32_FLOAT" }, 175 { SVGA3D_R16G16B16A16_FLOAT , "R16G16B16A16_FLOAT" }, 176 { SVGA3D_R16G16B16A16_UNORM , "R16G16B16A16_UNORM" }, 177 { SVGA3D_R32G32_FLOAT , "R32G32_FLOAT" }, 178 { SVGA3D_R10G10B10A2_UNORM , "R10G10B10A2_UNORM" }, 179 { SVGA3D_R8G8B8A8_SNORM , "R8G8B8A8_SNORM" }, 180 { SVGA3D_R16G16_FLOAT , "R16G16_FLOAT" }, 181 { SVGA3D_R16G16_UNORM , "R16G16_UNORM" }, 182 { SVGA3D_R16G16_SNORM , "R16G16_SNORM" }, 183 { SVGA3D_R32_FLOAT , "R32_FLOAT" }, 184 { SVGA3D_R8G8_SNORM , "R8G8_SNORM" }, 185 { SVGA3D_R16_FLOAT , "R16_FLOAT" }, 186 { SVGA3D_D16_UNORM , "D16_UNORM" }, 187 { SVGA3D_A8_UNORM , "A8_UNORM" }, 188 { SVGA3D_BC1_UNORM , "BC1_UNORM" }, 189 { SVGA3D_BC2_UNORM , "BC2_UNORM" }, 190 { SVGA3D_BC3_UNORM , "BC3_UNORM" }, 191 { SVGA3D_B5G6R5_UNORM , "B5G6R5_UNORM" }, 192 { SVGA3D_B5G5R5A1_UNORM , "B5G5R5A1_UNORM" }, 193 { SVGA3D_B8G8R8A8_UNORM , "B8G8R8A8_UNORM" }, 194 { SVGA3D_B8G8R8X8_UNORM , "B8G8R8X8_UNORM" }, 195 { SVGA3D_BC4_UNORM , "BC4_UNORM" }, 196 { SVGA3D_BC5_UNORM , "BC5_UNORM" }, 197 { SVGA3D_B4G4R4A4_UNORM , "B4G4R4A4_UNORM" }, 198 { SVGA3D_BC6H_TYPELESS , "BC6H_TYPELESS" }, 199 { SVGA3D_BC6H_UF16 , "BC6H_UF16" }, 200 { SVGA3D_BC6H_SF16 , "BC6H_SF16" }, 201 { SVGA3D_BC7_TYPELESS , "BC7_TYPELESS" }, 202 { SVGA3D_BC7_UNORM , "BC7_UNORM" }, 203 { SVGA3D_BC7_UNORM_SRGB , "BC7_UNORM_SRGB" }, 204 { SVGA3D_AYUV , "AYUV" }, 105 205 }; 106 206 VMSVGAINFOENUMMAP_MAKE(RT_NOTHING, g_SVGA3dSurfaceFormat2String, g_aSVGA3dSurfaceFormats, "SVGA3D_"); … … 497 597 AssertMsgFailed(("%#x\n", fSwitchFlags)); 498 598 } 499 #elif defined(VMSVGA3D_D X)599 #elif defined(VMSVGA3D_D3D11) 500 600 /** @todo */ 501 601 RT_NOREF(pState); … … 1524 1624 # ifdef VMSVGA3D_DIRECT3D 1525 1625 pHlp->pfnPrintf(pHlp, "pDevice: %p\n", pContext->pDevice); 1526 # elif defined(VMSVGA3D_D X)1626 # elif defined(VMSVGA3D_D3D11) 1527 1627 /** @todo */ 1528 1628 # else … … 2032 2132 pHlp->pfnPrintf(pHlp, "fStencilAsTexture: %RTbool\n", pSurface->fStencilAsTexture); 2033 2133 2034 #elif defined(VMSVGA3D_D X)2134 #elif defined(VMSVGA3D_D3D11) 2035 2135 /** @todo */ 2036 2136 #elif defined(VMSVGA3D_OPENGL) -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-internal.h
r86905 r88787 29 29 #endif 30 30 #ifdef VMSVGA3D_OPENGL 31 # if defined(VMSVGA3D_DIRECT3D) || defined(VMSVGA3D_D X)31 # if defined(VMSVGA3D_DIRECT3D) || defined(VMSVGA3D_D3D11) 32 32 # error "Both VMSVGA3D_DIRECT3D and VMSVGA3D_OPENGL cannot be defined at the same time." 33 33 # endif 34 #elif !defined(VMSVGA3D_DIRECT3D) && !defined(VMSVGA3D_D X)34 #elif !defined(VMSVGA3D_DIRECT3D) && !defined(VMSVGA3D_D3D11) 35 35 # error "Either VMSVGA3D_OPENGL or VMSVGA3D_DIRECT3D must be defined." 36 36 #endif … … 51 51 # include <d3d9.h> 52 52 # include <iprt/avl.h> 53 # elif defined(VMSVGA3D_D X)53 # elif defined(VMSVGA3D_D3D11) 54 54 # include <d3d11.h> 55 55 # else … … 92 92 # include "vmsvga_glext/glext.h" 93 93 # include "shaderlib/shaderlib.h" 94 #endif 95 96 #ifdef VMSVGA3D_DX 97 #include "DevVGA-SVGA3d-dx-shader.h" 94 98 #endif 95 99 … … 676 680 #ifdef VMSVGA3D_DIRECT3D 677 681 # define VMSVGA3DSURFACE_HAS_HW_SURFACE(a_pSurface) ((a_pSurface)->u.pSurface != NULL) 678 #elif defined(VMSVGA3D_D X)682 #elif defined(VMSVGA3D_D3D11) 679 683 # define VMSVGA3DSURFACE_HAS_HW_SURFACE(a_pSurface) ((a_pSurface)->pBackendSurface != NULL) 680 684 #else … … 692 696 ( (a_pSurface)->enmD3DResType == VMSVGA3D_D3DRESTYPE_VERTEX_BUFFER \ 693 697 || (a_pSurface)->enmD3DResType == VMSVGA3D_D3DRESTYPE_INDEX_BUFFER) 694 #elif defined(VMSVGA3D_D X)698 #elif defined(VMSVGA3D_D3D11) 695 699 /** @todo */ 696 700 # define VMSVGA3DSURFACE_NEEDS_DATA(a_pSurface) (false) … … 703 707 typedef struct VMSVGA3DSHADER 704 708 { 705 uint32_t id; 709 uint32_t id; /** @todo Rename to shid. */ 706 710 uint32_t cid; 707 711 SVGA3dShaderType type; … … 713 717 IDirect3DVertexShader9 *pVertexShader; 714 718 IDirect3DPixelShader9 *pPixelShader; 715 #elif defined(VMSVGA3D_D X)716 /* * todo*/719 #elif defined(VMSVGA3D_D3D11) 720 /* Nothing */ 717 721 #else 718 722 void *pVertexShader; 719 723 void *pPixelShader; 720 724 #endif 721 void *pv ;725 void *pvBackendShader; 722 726 } u; 727 #ifdef VMSVGA3D_DX 728 DXShaderInfo shaderInfo; 729 #endif 723 730 } VMSVGA3DSHADER; 724 731 typedef VMSVGA3DSHADER *PVMSVGA3DSHADER; … … 735 742 SSMFIELD_ENTRY( VMSVGA3DSHADER, cbData), 736 743 SSMFIELD_ENTRY_IGN_HCPTR( VMSVGA3DSHADER, pShaderProgram), 737 SSMFIELD_ENTRY_IGN_HCPTR( VMSVGA3DSHADER, u.pv ),744 SSMFIELD_ENTRY_IGN_HCPTR( VMSVGA3DSHADER, u.pvBackendShader), 738 745 SSMFIELD_ENTRY_TERM() 739 746 }; … … 766 773 #ifdef VMSVGA3D_DIRECT3D 767 774 IDirect3DQuery9 *pQuery; 768 #elif defined(VMSVGA3D_D X)775 #elif defined(VMSVGA3D_D3D11) 769 776 /** @todo */ 770 777 #else /* VMSVGA3D_OPENGL */ … … 783 790 #ifdef VMSVGA3D_DIRECT3D 784 791 SSMFIELD_ENTRY_IGN_HCPTR( VMSVGA3DQUERY, pQuery), 785 #elif defined(VMSVGA3D_D X)792 #elif defined(VMSVGA3D_D3D11) 786 793 /** @todo */ 787 794 #else /* VMSVGA3D_OPENGL */ … … 796 803 #ifdef VMSVGA3D_DIRECT3D 797 804 #define VMSVGA3DQUERY_EXISTS(p) ((p)->pQuery && (p)->enmQueryState != VMSVGA3DQUERYSTATE_NULL) 798 #elif defined(VMSVGA3D_D X)805 #elif defined(VMSVGA3D_D3D11) 799 806 /** @todo */ 800 807 #define VMSVGA3DQUERY_EXISTS(p) (false) … … 816 823 IDirect3DDevice9Ex *pDevice; 817 824 # endif 818 # elif defined(VMSVGA3D_D X)819 /** @todo */825 # elif defined(VMSVGA3D_D3D11) 826 /** @todo Legacy contexts with DX backend. */ 820 827 # else 821 828 /* Device context of the context window. */ … … 916 923 # ifdef VMSVGA3D_DIRECT3D 917 924 SSMFIELD_ENTRY_IGN_HCPTR( VMSVGA3DCONTEXT, pDevice), 918 # elif defined(VMSVGA3D_D X)925 # elif defined(VMSVGA3D_D3D11) 919 926 /** @todo */ 920 927 # else … … 970 977 971 978 979 #ifdef VMSVGA3D_DX 980 /* The 3D backend DX context. The actual structure is 3D API specific. */ 981 typedef struct VMSVGA3DBACKENDDXCONTEXT *PVMSVGA3DBACKENDDXCONTEXT; 982 983 /** 984 * VMSVGA3D DX context (VGPU10+). DX contexts ids are a separate namespace from legacy context ids. 985 */ 986 typedef struct VMSVGA3DDXCONTEXT 987 { 988 /** The DX context id. */ 989 uint32_t cid; 990 /** . */ 991 uint32_t u32Reserved; 992 /** Backend specific data. */ 993 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext; 994 /** Copy of the guest memory for this context. The guest will be updated on unbind. */ 995 SVGADXContextMobFormat svgaDXContext; 996 /* Context-Object Tables bound to this context. */ 997 PVMSVGAMOB aCOTMobs[SVGA_COTABLE_MAX]; 998 struct 999 { 1000 SVGACOTableDXRTViewEntry *paRTView; 1001 SVGACOTableDXDSViewEntry *paDSView; 1002 SVGACOTableDXSRViewEntry *paSRView; 1003 SVGACOTableDXElementLayoutEntry *paElementLayout; 1004 SVGACOTableDXBlendStateEntry *paBlendState; 1005 SVGACOTableDXDepthStencilEntry *paDepthStencil; 1006 SVGACOTableDXRasterizerStateEntry *paRasterizerState; 1007 SVGACOTableDXSamplerEntry *paSampler; 1008 SVGACOTableDXStreamOutputEntry *paStreamOutput; 1009 SVGACOTableDXQueryEntry *paQuery; 1010 SVGACOTableDXShaderEntry *paShader; 1011 SVGACOTableDXUAViewEntry *paUAView; 1012 uint32_t cRTView; 1013 uint32_t cDSView; 1014 uint32_t cSRView; 1015 uint32_t cElementLayout; 1016 uint32_t cBlendState; 1017 uint32_t cDepthStencil; 1018 uint32_t cRasterizerState; 1019 uint32_t cSampler; 1020 uint32_t cStreamOutput; 1021 uint32_t cQuery; 1022 uint32_t cShader; 1023 uint32_t cUAView; 1024 } cot; 1025 /* Shader information. The array has cot.cShader elements. Some data is dublicated in cot.paShader. */ 1026 PVMSVGA3DSHADER paShader; 1027 } VMSVGA3DDXCONTEXT; 1028 /** Pointer to a VMSVGA3D DX context. */ 1029 typedef VMSVGA3DDXCONTEXT *PVMSVGA3DDXCONTEXT; 1030 #endif /* VMSVGA3D_DX */ 1031 1032 972 1033 #ifdef VMSVGA3D_OPENGL 973 1034 typedef struct VMSVGA3DFORMATCONVERTER *PVMSVGA3DFORMATCONVERTER; … … 988 1049 /** The size of papSurfaces. */ 989 1050 uint32_t cSurfaces; 1051 #ifdef VMSVGA3D_DX 1052 /** The size of papDXContexts. */ 1053 uint32_t cDXContexts; 1054 /** Reserved. */ 1055 uint32_t u32Reserved; 1056 #endif 990 1057 /** Contexts indexed by ID. Grown as needed. */ 991 1058 PVMSVGA3DCONTEXT *papContexts; 992 1059 /** Surfaces indexed by ID. Grown as needed. */ 993 1060 PVMSVGA3DSURFACE *papSurfaces; 1061 #ifdef VMSVGA3D_DX 1062 /** DX contexts indexed by ID. Grown as needed. */ 1063 PVMSVGA3DDXCONTEXT *papDXContexts; 1064 #endif 994 1065 995 1066 #ifdef RT_OS_WINDOWS … … 1006 1077 bool fSupportedFormatYUY2 : 1; 1007 1078 bool fSupportedFormatA8B8G8R8 : 1; 1008 # elif defined(VMSVGA3D_D X)1079 # elif defined(VMSVGA3D_D3D11) 1009 1080 PVMSVGA3DBACKEND pBackend; 1010 1081 # endif … … 1293 1364 } 1294 1365 1366 #ifdef VMSVGA3D_DX 1367 DECLINLINE(int) vmsvga3dDXContextFromCid(PVMSVGA3DSTATE pState, uint32_t cid, PVMSVGA3DDXCONTEXT *ppDXContext) 1368 { 1369 *ppDXContext = NULL; 1370 if (cid == SVGA_ID_INVALID) 1371 return VERR_INVALID_STATE; 1372 AssertReturn(cid < pState->cDXContexts, VERR_INVALID_PARAMETER); 1373 PVMSVGA3DDXCONTEXT const pDXContext = pState->papDXContexts[cid]; 1374 if (RT_LIKELY(pDXContext && pDXContext->cid == cid)) 1375 { 1376 *ppDXContext = pDXContext; 1377 return VINF_SUCCESS; 1378 } 1379 LogRelMax(64, ("VMSVGA: unknown DX cid=%u (%s cid=%u)\n", cid, pDXContext ? "expected" : "null", pDXContext ? pDXContext->cid : -1)); 1380 return VERR_INVALID_PARAMETER; 1381 } 1382 #endif 1383 1295 1384 DECLINLINE(int) vmsvga3dSurfaceFromSid(PVMSVGA3DSTATE pState, uint32_t sid, PVMSVGA3DSURFACE *ppSurface) 1296 1385 { … … 1336 1425 return Face; 1337 1426 } 1338 #elif defined(VMSVGA3D_D X)1427 #elif defined(VMSVGA3D_D3D11) 1339 1428 DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace) 1340 1429 { … … 1379 1468 const char *pszPath, const char *pszNamePrefix, const char *pszNameSuffix); 1380 1469 1381 #if defined(VMSVGA3D_DIRECT3D) || defined(VMSVGA3D_D X)1470 #if defined(VMSVGA3D_DIRECT3D) || defined(VMSVGA3D_D3D11) 1382 1471 #define D3D_RELEASE(ptr) do { \ 1383 1472 if (ptr) \ -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-ogl.cpp
r86905 r88787 7717 7717 return VINF_SUCCESS; 7718 7718 } 7719 7720 int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs) 7721 { 7722 RT_NOREF(pThisCC, pszInterfaceName, pvInterfaceFuncs, cbInterfaceFuncs); 7723 return VERR_NOT_IMPLEMENTED; 7724 } -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-savedstate.cpp
r86839 r88787 956 956 957 957 RTMemFree(pData); 958 #elif defined(VMSVGA3D_D X)958 #elif defined(VMSVGA3D_D3D11) 959 959 /** @todo */ 960 960 #elif defined(VMSVGA3D_OPENGL) -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-shared.cpp
r86905 r88787 295 295 { 296 296 case SVGA3D_X8R8G8B8: 297 *pcxBlock = 1; 298 *pcyBlock = 1; 299 return 4; 300 297 301 case SVGA3D_A8R8G8B8: 298 302 *pcxBlock = 1; … … 301 305 302 306 case SVGA3D_R5G6B5: 307 *pcxBlock = 1; 308 *pcyBlock = 1; 309 return 2; 310 303 311 case SVGA3D_X1R5G5B5: 312 *pcxBlock = 1; 313 *pcyBlock = 1; 314 return 2; 315 304 316 case SVGA3D_A1R5G5B5: 317 *pcxBlock = 1; 318 *pcyBlock = 1; 319 return 2; 320 305 321 case SVGA3D_A4R4G4B4: 306 322 *pcxBlock = 1; … … 309 325 310 326 case SVGA3D_Z_D32: 327 *pcxBlock = 1; 328 *pcyBlock = 1; 329 return 4; 330 331 case SVGA3D_Z_D16: 332 *pcxBlock = 1; 333 *pcyBlock = 1; 334 return 2; 335 311 336 case SVGA3D_Z_D24S8: 337 *pcxBlock = 1; 338 *pcyBlock = 1; 339 return 4; 340 341 case SVGA3D_Z_D15S1: 342 *pcxBlock = 1; 343 *pcyBlock = 1; 344 return 2; 345 346 case SVGA3D_LUMINANCE8: 347 *pcxBlock = 1; 348 *pcyBlock = 1; 349 return 1; 350 351 case SVGA3D_LUMINANCE4_ALPHA4: 352 *pcxBlock = 1; 353 *pcyBlock = 1; 354 return 1; 355 356 case SVGA3D_LUMINANCE16: 357 *pcxBlock = 1; 358 *pcyBlock = 1; 359 return 2; 360 361 case SVGA3D_LUMINANCE8_ALPHA8: 362 *pcxBlock = 1; 363 *pcyBlock = 1; 364 return 2; 365 366 case SVGA3D_DXT1: 367 *pcxBlock = 4; 368 *pcyBlock = 4; 369 return 8; 370 371 case SVGA3D_DXT2: 372 *pcxBlock = 4; 373 *pcyBlock = 4; 374 return 16; 375 376 case SVGA3D_DXT3: 377 *pcxBlock = 4; 378 *pcyBlock = 4; 379 return 16; 380 381 case SVGA3D_DXT4: 382 *pcxBlock = 4; 383 *pcyBlock = 4; 384 return 16; 385 386 case SVGA3D_DXT5: 387 *pcxBlock = 4; 388 *pcyBlock = 4; 389 return 16; 390 391 case SVGA3D_BUMPU8V8: 392 *pcxBlock = 1; 393 *pcyBlock = 1; 394 return 2; 395 396 case SVGA3D_BUMPL6V5U5: 397 *pcxBlock = 1; 398 *pcyBlock = 1; 399 return 2; 400 401 case SVGA3D_BUMPX8L8V8U8: 402 *pcxBlock = 1; 403 *pcyBlock = 1; 404 return 4; 405 406 case SVGA3D_FORMAT_DEAD1: 407 *pcxBlock = 1; 408 *pcyBlock = 1; 409 return 3; 410 411 case SVGA3D_ARGB_S10E5: 412 *pcxBlock = 1; 413 *pcyBlock = 1; 414 return 8; 415 416 case SVGA3D_ARGB_S23E8: 417 *pcxBlock = 1; 418 *pcyBlock = 1; 419 return 16; 420 421 case SVGA3D_A2R10G10B10: 422 *pcxBlock = 1; 423 *pcyBlock = 1; 424 return 4; 425 426 case SVGA3D_V8U8: 427 *pcxBlock = 1; 428 *pcyBlock = 1; 429 return 2; 430 431 case SVGA3D_Q8W8V8U8: 432 *pcxBlock = 1; 433 *pcyBlock = 1; 434 return 4; 435 436 case SVGA3D_CxV8U8: 437 *pcxBlock = 1; 438 *pcyBlock = 1; 439 return 2; 440 441 case SVGA3D_X8L8V8U8: 442 *pcxBlock = 1; 443 *pcyBlock = 1; 444 return 4; 445 446 case SVGA3D_A2W10V10U10: 447 *pcxBlock = 1; 448 *pcyBlock = 1; 449 return 4; 450 451 case SVGA3D_ALPHA8: 452 *pcxBlock = 1; 453 *pcyBlock = 1; 454 return 1; 455 456 case SVGA3D_R_S10E5: 457 *pcxBlock = 1; 458 *pcyBlock = 1; 459 return 2; 460 461 case SVGA3D_R_S23E8: 462 *pcxBlock = 1; 463 *pcyBlock = 1; 464 return 4; 465 466 case SVGA3D_RG_S10E5: 467 *pcxBlock = 1; 468 *pcyBlock = 1; 469 return 4; 470 471 case SVGA3D_RG_S23E8: 472 *pcxBlock = 1; 473 *pcyBlock = 1; 474 return 8; 475 476 case SVGA3D_BUFFER: 477 *pcxBlock = 1; 478 *pcyBlock = 1; 479 return 1; 480 312 481 case SVGA3D_Z_D24X8: 313 case SVGA3D_Z_DF24: 314 case SVGA3D_Z_D24S8_INT: 315 *pcxBlock = 1; 316 *pcyBlock = 1; 317 return 4; 318 319 case SVGA3D_Z_D16: 320 case SVGA3D_Z_DF16: 321 case SVGA3D_Z_D15S1: 322 *pcxBlock = 1; 323 *pcyBlock = 1; 324 return 2; 325 326 case SVGA3D_LUMINANCE8: 327 case SVGA3D_LUMINANCE4_ALPHA4: 328 *pcxBlock = 1; 329 *pcyBlock = 1; 330 return 1; 331 332 case SVGA3D_LUMINANCE16: 333 case SVGA3D_LUMINANCE8_ALPHA8: 334 *pcxBlock = 1; 335 *pcyBlock = 1; 336 return 2; 337 338 case SVGA3D_DXT1: 339 *pcxBlock = 4; 340 *pcyBlock = 4; 341 return 8; 342 343 case SVGA3D_DXT2: 344 case SVGA3D_DXT3: 345 case SVGA3D_DXT4: 346 case SVGA3D_DXT5: 347 *pcxBlock = 4; 348 *pcyBlock = 4; 349 return 16; 350 351 case SVGA3D_BUMPU8V8: 352 case SVGA3D_BUMPL6V5U5: 353 *pcxBlock = 1; 354 *pcyBlock = 1; 355 return 2; 356 357 case SVGA3D_BUMPX8L8V8U8: 358 case SVGA3D_Q8W8V8U8: 359 *pcxBlock = 1; 360 *pcyBlock = 1; 361 return 4; 362 363 case SVGA3D_V8U8: 364 case SVGA3D_CxV8U8: 365 *pcxBlock = 1; 366 *pcyBlock = 1; 367 return 2; 368 369 case SVGA3D_X8L8V8U8: 370 case SVGA3D_A2W10V10U10: 371 *pcxBlock = 1; 372 *pcyBlock = 1; 373 return 4; 374 375 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */ 376 *pcxBlock = 1; 377 *pcyBlock = 1; 378 return 8; 379 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */ 380 *pcxBlock = 1; 381 *pcyBlock = 1; 382 return 16; 383 384 case SVGA3D_A2R10G10B10: 385 *pcxBlock = 1; 386 *pcyBlock = 1; 387 return 4; 388 389 case SVGA3D_ALPHA8: 390 *pcxBlock = 1; 391 *pcyBlock = 1; 392 return 1; 393 394 case SVGA3D_R_S10E5: 395 *pcxBlock = 1; 396 *pcyBlock = 1; 397 return 2; 398 399 case SVGA3D_R_S23E8: 400 case SVGA3D_RG_S10E5: 401 *pcxBlock = 1; 402 *pcyBlock = 1; 403 return 4; 404 405 case SVGA3D_RG_S23E8: 406 *pcxBlock = 1; 407 *pcyBlock = 1; 408 return 8; 409 410 /* 411 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is 412 * the most efficient format to use when creating new surfaces 413 * expressly for index or vertex data. 414 */ 415 case SVGA3D_BUFFER: 416 *pcxBlock = 1; 417 *pcyBlock = 1; 418 return 1; 482 *pcxBlock = 1; 483 *pcyBlock = 1; 484 return 4; 485 486 case SVGA3D_V16U16: 487 *pcxBlock = 1; 488 *pcyBlock = 1; 489 return 4; 490 491 case SVGA3D_G16R16: 492 *pcxBlock = 1; 493 *pcyBlock = 1; 494 return 4; 495 496 case SVGA3D_A16B16G16R16: 497 *pcxBlock = 1; 498 *pcyBlock = 1; 499 return 8; 419 500 420 501 case SVGA3D_UYVY: … … 428 509 return 4; 429 510 430 case SVGA3D_V16U16: 431 *pcxBlock = 1; 432 *pcyBlock = 1; 433 return 4; 434 435 case SVGA3D_G16R16: 436 *pcxBlock = 1; 437 *pcyBlock = 1; 438 return 4; 439 case SVGA3D_A16B16G16R16: 440 *pcxBlock = 1; 441 *pcyBlock = 1; 442 return 8; 511 case SVGA3D_NV12: 512 *pcxBlock = 2; 513 *pcyBlock = 2; 514 return 6; 515 516 case SVGA3D_FORMAT_DEAD2: 517 *pcxBlock = 1; 518 *pcyBlock = 1; 519 return 4; 520 521 case SVGA3D_R32G32B32A32_TYPELESS: 522 *pcxBlock = 1; 523 *pcyBlock = 1; 524 return 16; 525 526 case SVGA3D_R32G32B32A32_UINT: 527 *pcxBlock = 1; 528 *pcyBlock = 1; 529 return 16; 530 531 case SVGA3D_R32G32B32A32_SINT: 532 *pcxBlock = 1; 533 *pcyBlock = 1; 534 return 16; 535 536 case SVGA3D_R32G32B32_TYPELESS: 537 *pcxBlock = 1; 538 *pcyBlock = 1; 539 return 12; 540 541 case SVGA3D_R32G32B32_FLOAT: 542 *pcxBlock = 1; 543 *pcyBlock = 1; 544 return 12; 545 546 case SVGA3D_R32G32B32_UINT: 547 *pcxBlock = 1; 548 *pcyBlock = 1; 549 return 12; 550 551 case SVGA3D_R32G32B32_SINT: 552 *pcxBlock = 1; 553 *pcyBlock = 1; 554 return 12; 555 556 case SVGA3D_R16G16B16A16_TYPELESS: 557 *pcxBlock = 1; 558 *pcyBlock = 1; 559 return 8; 560 561 case SVGA3D_R16G16B16A16_UINT: 562 *pcxBlock = 1; 563 *pcyBlock = 1; 564 return 8; 565 566 case SVGA3D_R16G16B16A16_SNORM: 567 *pcxBlock = 1; 568 *pcyBlock = 1; 569 return 8; 570 571 case SVGA3D_R16G16B16A16_SINT: 572 *pcxBlock = 1; 573 *pcyBlock = 1; 574 return 8; 575 576 case SVGA3D_R32G32_TYPELESS: 577 *pcxBlock = 1; 578 *pcyBlock = 1; 579 return 8; 580 581 case SVGA3D_R32G32_UINT: 582 *pcxBlock = 1; 583 *pcyBlock = 1; 584 return 8; 585 586 case SVGA3D_R32G32_SINT: 587 *pcxBlock = 1; 588 *pcyBlock = 1; 589 return 8; 590 591 case SVGA3D_R32G8X24_TYPELESS: 592 *pcxBlock = 1; 593 *pcyBlock = 1; 594 return 8; 595 596 case SVGA3D_D32_FLOAT_S8X24_UINT: 597 *pcxBlock = 1; 598 *pcyBlock = 1; 599 return 8; 600 601 case SVGA3D_R32_FLOAT_X8X24: 602 *pcxBlock = 1; 603 *pcyBlock = 1; 604 return 8; 605 606 case SVGA3D_X32_G8X24_UINT: 607 *pcxBlock = 1; 608 *pcyBlock = 1; 609 return 8; 610 611 case SVGA3D_R10G10B10A2_TYPELESS: 612 *pcxBlock = 1; 613 *pcyBlock = 1; 614 return 4; 615 616 case SVGA3D_R10G10B10A2_UINT: 617 *pcxBlock = 1; 618 *pcyBlock = 1; 619 return 4; 620 621 case SVGA3D_R11G11B10_FLOAT: 622 *pcxBlock = 1; 623 *pcyBlock = 1; 624 return 4; 625 626 case SVGA3D_R8G8B8A8_TYPELESS: 627 *pcxBlock = 1; 628 *pcyBlock = 1; 629 return 4; 630 443 631 case SVGA3D_R8G8B8A8_UNORM: 632 *pcxBlock = 1; 633 *pcyBlock = 1; 634 return 4; 635 636 case SVGA3D_R8G8B8A8_UNORM_SRGB: 637 *pcxBlock = 1; 638 *pcyBlock = 1; 639 return 4; 640 641 case SVGA3D_R8G8B8A8_UINT: 642 *pcxBlock = 1; 643 *pcyBlock = 1; 644 return 4; 645 646 case SVGA3D_R8G8B8A8_SINT: 647 *pcxBlock = 1; 648 *pcyBlock = 1; 649 return 4; 650 651 case SVGA3D_R16G16_TYPELESS: 652 *pcxBlock = 1; 653 *pcyBlock = 1; 654 return 4; 655 656 case SVGA3D_R16G16_UINT: 657 *pcxBlock = 1; 658 *pcyBlock = 1; 659 return 4; 660 661 case SVGA3D_R16G16_SINT: 662 *pcxBlock = 1; 663 *pcyBlock = 1; 664 return 4; 665 666 case SVGA3D_R32_TYPELESS: 667 *pcxBlock = 1; 668 *pcyBlock = 1; 669 return 4; 670 671 case SVGA3D_D32_FLOAT: 672 *pcxBlock = 1; 673 *pcyBlock = 1; 674 return 4; 675 676 case SVGA3D_R32_UINT: 677 *pcxBlock = 1; 678 *pcyBlock = 1; 679 return 4; 680 681 case SVGA3D_R32_SINT: 682 *pcxBlock = 1; 683 *pcyBlock = 1; 684 return 4; 685 686 case SVGA3D_R24G8_TYPELESS: 687 *pcxBlock = 1; 688 *pcyBlock = 1; 689 return 4; 690 691 case SVGA3D_D24_UNORM_S8_UINT: 692 *pcxBlock = 1; 693 *pcyBlock = 1; 694 return 4; 695 696 case SVGA3D_R24_UNORM_X8: 697 *pcxBlock = 1; 698 *pcyBlock = 1; 699 return 4; 700 701 case SVGA3D_X24_G8_UINT: 702 *pcxBlock = 1; 703 *pcyBlock = 1; 704 return 4; 705 706 case SVGA3D_R8G8_TYPELESS: 707 *pcxBlock = 1; 708 *pcyBlock = 1; 709 return 2; 710 711 case SVGA3D_R8G8_UNORM: 712 *pcxBlock = 1; 713 *pcyBlock = 1; 714 return 2; 715 716 case SVGA3D_R8G8_UINT: 717 *pcxBlock = 1; 718 *pcyBlock = 1; 719 return 2; 720 721 case SVGA3D_R8G8_SINT: 722 *pcxBlock = 1; 723 *pcyBlock = 1; 724 return 2; 725 726 case SVGA3D_R16_TYPELESS: 727 *pcxBlock = 1; 728 *pcyBlock = 1; 729 return 2; 730 731 case SVGA3D_R16_UNORM: 732 *pcxBlock = 1; 733 *pcyBlock = 1; 734 return 2; 735 736 case SVGA3D_R16_UINT: 737 *pcxBlock = 1; 738 *pcyBlock = 1; 739 return 2; 740 741 case SVGA3D_R16_SNORM: 742 *pcxBlock = 1; 743 *pcyBlock = 1; 744 return 2; 745 746 case SVGA3D_R16_SINT: 747 *pcxBlock = 1; 748 *pcyBlock = 1; 749 return 2; 750 751 case SVGA3D_R8_TYPELESS: 752 *pcxBlock = 1; 753 *pcyBlock = 1; 754 return 1; 755 756 case SVGA3D_R8_UNORM: 757 *pcxBlock = 1; 758 *pcyBlock = 1; 759 return 1; 760 761 case SVGA3D_R8_UINT: 762 *pcxBlock = 1; 763 *pcyBlock = 1; 764 return 1; 765 766 case SVGA3D_R8_SNORM: 767 *pcxBlock = 1; 768 *pcyBlock = 1; 769 return 1; 770 771 case SVGA3D_R8_SINT: 772 *pcxBlock = 1; 773 *pcyBlock = 1; 774 return 1; 775 776 case SVGA3D_P8: 777 *pcxBlock = 1; 778 *pcyBlock = 1; 779 return 1; 780 781 case SVGA3D_R9G9B9E5_SHAREDEXP: 782 *pcxBlock = 1; 783 *pcyBlock = 1; 784 return 4; 785 786 case SVGA3D_R8G8_B8G8_UNORM: 787 *pcxBlock = 2; 788 *pcyBlock = 1; 789 return 4; 790 791 case SVGA3D_G8R8_G8B8_UNORM: 792 *pcxBlock = 2; 793 *pcyBlock = 1; 794 return 4; 795 796 case SVGA3D_BC1_TYPELESS: 797 *pcxBlock = 4; 798 *pcyBlock = 4; 799 return 8; 800 801 case SVGA3D_BC1_UNORM_SRGB: 802 *pcxBlock = 4; 803 *pcyBlock = 4; 804 return 8; 805 806 case SVGA3D_BC2_TYPELESS: 807 *pcxBlock = 4; 808 *pcyBlock = 4; 809 return 16; 810 811 case SVGA3D_BC2_UNORM_SRGB: 812 *pcxBlock = 4; 813 *pcyBlock = 4; 814 return 16; 815 816 case SVGA3D_BC3_TYPELESS: 817 *pcxBlock = 4; 818 *pcyBlock = 4; 819 return 16; 820 821 case SVGA3D_BC3_UNORM_SRGB: 822 *pcxBlock = 4; 823 *pcyBlock = 4; 824 return 16; 825 826 case SVGA3D_BC4_TYPELESS: 827 *pcxBlock = 4; 828 *pcyBlock = 4; 829 return 8; 830 831 case SVGA3D_ATI1: 832 *pcxBlock = 4; 833 *pcyBlock = 4; 834 return 8; 835 836 case SVGA3D_BC4_SNORM: 837 *pcxBlock = 4; 838 *pcyBlock = 4; 839 return 8; 840 841 case SVGA3D_BC5_TYPELESS: 842 *pcxBlock = 4; 843 *pcyBlock = 4; 844 return 16; 845 846 case SVGA3D_ATI2: 847 *pcxBlock = 4; 848 *pcyBlock = 4; 849 return 16; 850 851 case SVGA3D_BC5_SNORM: 852 *pcxBlock = 4; 853 *pcyBlock = 4; 854 return 16; 855 856 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: 857 *pcxBlock = 1; 858 *pcyBlock = 1; 859 return 4; 860 861 case SVGA3D_B8G8R8A8_TYPELESS: 862 *pcxBlock = 1; 863 *pcyBlock = 1; 864 return 4; 865 866 case SVGA3D_B8G8R8A8_UNORM_SRGB: 867 *pcxBlock = 1; 868 *pcyBlock = 1; 869 return 4; 870 871 case SVGA3D_B8G8R8X8_TYPELESS: 872 *pcxBlock = 1; 873 *pcyBlock = 1; 874 return 4; 875 876 case SVGA3D_B8G8R8X8_UNORM_SRGB: 877 *pcxBlock = 1; 878 *pcyBlock = 1; 879 return 4; 880 881 case SVGA3D_Z_DF16: 882 *pcxBlock = 1; 883 *pcyBlock = 1; 884 return 2; 885 886 case SVGA3D_Z_DF24: 887 *pcxBlock = 1; 888 *pcyBlock = 1; 889 return 4; 890 891 case SVGA3D_Z_D24S8_INT: 892 *pcxBlock = 1; 893 *pcyBlock = 1; 894 return 4; 895 896 case SVGA3D_YV12: 897 *pcxBlock = 2; 898 *pcyBlock = 2; 899 return 6; 900 901 case SVGA3D_R32G32B32A32_FLOAT: 902 *pcxBlock = 1; 903 *pcyBlock = 1; 904 return 16; 905 906 case SVGA3D_R16G16B16A16_FLOAT: 907 *pcxBlock = 1; 908 *pcyBlock = 1; 909 return 8; 910 911 case SVGA3D_R16G16B16A16_UNORM: 912 *pcxBlock = 1; 913 *pcyBlock = 1; 914 return 8; 915 916 case SVGA3D_R32G32_FLOAT: 917 *pcxBlock = 1; 918 *pcyBlock = 1; 919 return 8; 920 921 case SVGA3D_R10G10B10A2_UNORM: 922 *pcxBlock = 1; 923 *pcyBlock = 1; 924 return 4; 925 444 926 case SVGA3D_R8G8B8A8_SNORM: 445 927 *pcxBlock = 1; 446 928 *pcyBlock = 1; 447 929 return 4; 930 931 case SVGA3D_R16G16_FLOAT: 932 *pcxBlock = 1; 933 *pcyBlock = 1; 934 return 4; 935 448 936 case SVGA3D_R16G16_UNORM: 937 *pcxBlock = 1; 938 *pcyBlock = 1; 939 return 4; 940 941 case SVGA3D_R16G16_SNORM: 942 *pcxBlock = 1; 943 *pcyBlock = 1; 944 return 4; 945 946 case SVGA3D_R32_FLOAT: 947 *pcxBlock = 1; 948 *pcyBlock = 1; 949 return 4; 950 951 case SVGA3D_R8G8_SNORM: 952 *pcxBlock = 1; 953 *pcyBlock = 1; 954 return 2; 955 956 case SVGA3D_R16_FLOAT: 957 *pcxBlock = 1; 958 *pcyBlock = 1; 959 return 2; 960 961 case SVGA3D_D16_UNORM: 962 *pcxBlock = 1; 963 *pcyBlock = 1; 964 return 2; 965 966 case SVGA3D_A8_UNORM: 967 *pcxBlock = 1; 968 *pcyBlock = 1; 969 return 1; 970 971 case SVGA3D_BC1_UNORM: 972 *pcxBlock = 4; 973 *pcyBlock = 4; 974 return 8; 975 976 case SVGA3D_BC2_UNORM: 977 *pcxBlock = 4; 978 *pcyBlock = 4; 979 return 16; 980 981 case SVGA3D_BC3_UNORM: 982 *pcxBlock = 4; 983 *pcyBlock = 4; 984 return 16; 985 986 case SVGA3D_B5G6R5_UNORM: 987 *pcxBlock = 1; 988 *pcyBlock = 1; 989 return 2; 990 991 case SVGA3D_B5G5R5A1_UNORM: 992 *pcxBlock = 1; 993 *pcyBlock = 1; 994 return 2; 995 996 case SVGA3D_B8G8R8A8_UNORM: 997 *pcxBlock = 1; 998 *pcyBlock = 1; 999 return 4; 1000 1001 case SVGA3D_B8G8R8X8_UNORM: 1002 *pcxBlock = 1; 1003 *pcyBlock = 1; 1004 return 4; 1005 1006 case SVGA3D_BC4_UNORM: 1007 *pcxBlock = 4; 1008 *pcyBlock = 4; 1009 return 8; 1010 1011 case SVGA3D_BC5_UNORM: 1012 *pcxBlock = 4; 1013 *pcyBlock = 4; 1014 return 16; 1015 1016 case SVGA3D_B4G4R4A4_UNORM: 1017 *pcxBlock = 1; 1018 *pcyBlock = 1; 1019 return 2; 1020 1021 case SVGA3D_BC6H_TYPELESS: 1022 *pcxBlock = 4; 1023 *pcyBlock = 4; 1024 return 16; 1025 1026 case SVGA3D_BC6H_UF16: 1027 *pcxBlock = 4; 1028 *pcyBlock = 4; 1029 return 16; 1030 1031 case SVGA3D_BC6H_SF16: 1032 *pcxBlock = 4; 1033 *pcyBlock = 4; 1034 return 16; 1035 1036 case SVGA3D_BC7_TYPELESS: 1037 *pcxBlock = 4; 1038 *pcyBlock = 4; 1039 return 16; 1040 1041 case SVGA3D_BC7_UNORM: 1042 *pcxBlock = 4; 1043 *pcyBlock = 4; 1044 return 16; 1045 1046 case SVGA3D_BC7_UNORM_SRGB: 1047 *pcxBlock = 4; 1048 *pcyBlock = 4; 1049 return 16; 1050 1051 case SVGA3D_AYUV: 449 1052 *pcxBlock = 1; 450 1053 *pcyBlock = 1; -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp
r86905 r88787 39 39 #include "DevVGA-SVGA3d.h" 40 40 #include "DevVGA-SVGA3d-internal.h" 41 #include "DevVGA-SVGA3d-dx-shader.h" 41 42 42 43 #include <d3d11.h> 43 44 45 #define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \ 46 for (uint32_t i = 0; i < (a_Count); ++i) \ 47 D3D_RELEASE((a_papArray)[i]); \ 48 } while (0) 49 50 typedef struct DXDEVICE 51 { 52 ID3D11Device *pDevice; /* Device. */ 53 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */ 54 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */ 55 D3D_FEATURE_LEVEL FeatureLevel; 56 } DXDEVICE; 44 57 45 58 /* What kind of resource has been created for the VMSVGA3D surface. */ … … 52 65 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4, 53 66 VMSVGA3D_RESTYPE_VOLUME_TEXTURE = 5, 54 VMSVGA3D_RESTYPE_VERTEX_BUFFER = 6, 55 VMSVGA3D_RESTYPE_INDEX_BUFFER = 7, 67 VMSVGA3D_RESTYPE_BUFFER = 6, 56 68 } VMSVGA3DBACKRESTYPE; 57 69 58 struct VMSVGA3DBACKENDSURFACE70 typedef struct VMSVGA3DBACKENDSURFACE 59 71 { 60 72 VMSVGA3DBACKRESTYPE enmResType; 73 DXGI_FORMAT enmDxgiFormat; 61 74 union 62 75 { … … 69 82 struct 70 83 { 84 ID3D11Texture2D *pTexture; /* The texture for the screen content. */ 85 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */ 86 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */ 71 87 } Texture; 88 struct 89 { 90 ID3D11Buffer *pBuffer; 91 } Buffer; 72 92 } u; 73 93 } VMSVGA3DBACKENDSURFACE; … … 82 102 } VMSVGAHWSCREEN; 83 103 84 struct VMSVGA3DBACKEND 104 105 typedef struct DXELEMENTLAYOUT 106 { 107 ID3D11InputLayout *pElementLayout; 108 uint32_t cElementDesc; 109 D3D11_INPUT_ELEMENT_DESC aElementDesc[32]; 110 } DXELEMENTLAYOUT; 111 112 typedef struct DXSHADER 113 { 114 SVGA3dShaderType enmShaderType; 115 union 116 { 117 ID3D11DeviceChild *pShader; /* All. */ 118 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */ 119 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */ 120 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */ 121 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */ 122 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */ 123 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */ 124 }; 125 void *pvDXBC; 126 uint32_t cbDXBC; 127 } DXSHADER; 128 129 typedef struct VMSVGA3DBACKENDDXCONTEXT 130 { 131 DXDEVICE device; /* Device for the this context operation. */ 132 133 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */ 134 uint32_t cBlendState; /* Number of entries in the papBlendState array. */ 135 uint32_t cDepthStencilState; /* papDepthStencilState */ 136 uint32_t cSamplerState; /* papSamplerState */ 137 uint32_t cRasterizerState; /* papRasterizerState */ 138 uint32_t cElementLayout; /* papElementLayout */ 139 uint32_t cRenderTargetView; /* papRenderTargetView */ 140 uint32_t cDepthStencilView; /* papDepthStencilView */ 141 uint32_t cShaderResourceView; /* papShaderResourceView */ 142 uint32_t cQuery; /* papQuery */ 143 uint32_t cShader; /* papShader */ 144 ID3D11BlendState **papBlendState; 145 ID3D11DepthStencilState **papDepthStencilState; 146 ID3D11SamplerState **papSamplerState; 147 ID3D11RasterizerState **papRasterizerState; 148 DXELEMENTLAYOUT *paElementLayout; 149 ID3D11RenderTargetView **papRenderTargetView; 150 ID3D11DepthStencilView **papDepthStencilView; 151 ID3D11ShaderResourceView **papShaderResourceView; 152 ID3D11Query **papQuery; 153 DXSHADER *paShader; 154 } VMSVGA3DBACKENDDXCONTEXT; 155 156 typedef struct VMSVGA3DBACKEND 85 157 { 86 158 RTLDRMOD hD3D11; … … 98 170 switch (format) 99 171 { 100 /** @todo More formats required?*/172 /** @todo More formats. */ 101 173 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM; 102 174 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM; 175 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM; 103 176 default: 104 177 AssertFailed(); … … 486 559 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM; 487 560 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM; 561 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS; 562 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16; 563 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16; 564 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS; 565 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM; 566 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB; 488 567 default: 489 568 AssertFailed(); … … 557 636 } 558 637 else 559 rc = VERR_NOT_SUPPORTED;638 AssertFailedStmt(rc = VERR_NOT_SUPPORTED); 560 639 } 561 640 else 562 641 rc = VERR_NOT_SUPPORTED; 563 642 return rc; 643 } 644 645 646 static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice) 647 { 648 int rc = VINF_SUCCESS; 649 650 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */ 651 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] = 652 { 653 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1, 654 D3D_FEATURE_LEVEL_11_0 655 }; 656 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT; 657 #ifdef DEBUG 658 Flags |= D3D11_CREATE_DEVICE_DEBUG; 659 #endif 660 661 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter, 662 D3D_DRIVER_TYPE_HARDWARE, 663 NULL, 664 Flags, 665 s_aFeatureLevels, 666 RT_ELEMENTS(s_aFeatureLevels), 667 D3D11_SDK_VERSION, 668 &pDevice->pDevice, 669 &pDevice->FeatureLevel, 670 &pDevice->pImmediateContext); 671 if (SUCCEEDED(hr)) 672 { 673 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel)); 674 675 IDXGIDevice *pDxgiDevice = 0; 676 hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice); 677 if (SUCCEEDED(hr)) 678 { 679 IDXGIAdapter *pDxgiAdapter = 0; 680 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter); 681 if (SUCCEEDED(hr)) 682 { 683 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory); 684 D3D_RELEASE(pDxgiAdapter); 685 } 686 687 D3D_RELEASE(pDxgiDevice); 688 } 689 } 690 691 if (FAILED(hr)) 692 rc = VERR_NOT_SUPPORTED; 693 694 return rc; 695 } 696 697 698 static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice) 699 { 700 RT_NOREF(pBackend); 701 D3D_RELEASE(pDevice->pDevice); 702 D3D_RELEASE(pDevice->pImmediateContext); 703 D3D_RELEASE(pDevice->pDxgiFactory); 704 RT_ZERO(*pDevice); 705 } 706 707 708 /** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */ 709 static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp) 710 { 711 D3D11_BLEND_DESC BlendDesc; 712 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable); 713 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable); 714 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i) 715 { 716 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable); 717 BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend; 718 BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend; 719 BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp; 720 BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha; 721 BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha; 722 BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha; 723 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask; 724 /** @todo logicOpEnable and logicOp */ 725 } 726 727 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp); 728 Assert(SUCCEEDED(hr)); 729 return hr; 730 } 731 732 733 static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp) 734 { 735 D3D11_DEPTH_STENCIL_DESC desc; 736 desc.DepthEnable = pEntry->depthEnable; 737 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask; 738 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc; 739 desc.StencilEnable = pEntry->stencilEnable; 740 desc.StencilReadMask = pEntry->stencilReadMask; 741 desc.StencilWriteMask = pEntry->stencilWriteMask; 742 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp; 743 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp; 744 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp; 745 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc; 746 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp; 747 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp; 748 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp; 749 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc; 750 /** @todo frontEnable, backEnable */ 751 752 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp); 753 Assert(SUCCEEDED(hr)); 754 return hr; 755 } 756 757 758 static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp) 759 { 760 D3D11_SAMPLER_DESC desc; 761 desc.Filter = (D3D11_FILTER)pEntry->filter; 762 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU; 763 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV; 764 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW; 765 desc.MipLODBias = pEntry->mipLODBias; 766 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */ 767 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc; 768 desc.BorderColor[0] = pEntry->borderColor.value[0]; 769 desc.BorderColor[1] = pEntry->borderColor.value[1]; 770 desc.BorderColor[2] = pEntry->borderColor.value[2]; 771 desc.BorderColor[3] = pEntry->borderColor.value[3]; 772 desc.MinLOD = pEntry->minLOD; 773 desc.MaxLOD = pEntry->maxLOD; 774 775 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp); 776 Assert(SUCCEEDED(hr)); 777 return hr; 778 } 779 780 781 static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp) 782 { 783 D3D11_RASTERIZER_DESC desc; 784 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode; 785 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode; 786 desc.FrontCounterClockwise = pEntry->frontCounterClockwise; 787 /** provokingVertexLast */ 788 desc.DepthBias = pEntry->depthBias; 789 desc.DepthBiasClamp = pEntry->depthBiasClamp; 790 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias; 791 desc.DepthClipEnable = pEntry->depthClipEnable; 792 desc.ScissorEnable = pEntry->scissorEnable; 793 desc.MultisampleEnable = pEntry->multisampleEnable; 794 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable; 795 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */ 796 797 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp); 798 Assert(SUCCEEDED(hr)); 799 return hr; 800 } 801 802 803 static HRESULT dxRenderTargetViewCreate(DXDEVICE *pDevice, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11RenderTargetView **pp) 804 { 805 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture; 806 807 D3D11_RENDER_TARGET_VIEW_DESC desc; 808 RT_ZERO(desc); 809 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format); 810 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL); 811 switch (pEntry->resourceDimension) 812 { 813 case SVGA3D_RESOURCE_BUFFER: 814 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER; 815 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement; 816 desc.Buffer.NumElements = pEntry->desc.buffer.numElements; 817 break; 818 case SVGA3D_RESOURCE_TEXTURE1D: 819 if (pEntry->desc.tex.arraySize <= 1) 820 { 821 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D; 822 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice; 823 } 824 else 825 { 826 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY; 827 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice; 828 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice; 829 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize; 830 } 831 break; 832 case SVGA3D_RESOURCE_TEXTURE2D: 833 if (pEntry->desc.tex.arraySize <= 1) 834 { 835 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D; 836 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice; 837 } 838 else 839 { 840 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY; 841 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice; 842 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice; 843 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize; 844 } 845 break; 846 case SVGA3D_RESOURCE_TEXTURE3D: 847 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D; 848 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice; 849 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW; 850 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize; 851 break; 852 case SVGA3D_RESOURCE_TEXTURECUBE: 853 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */ 854 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY; 855 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice; 856 desc.Texture2DArray.FirstArraySlice = 0; 857 desc.Texture2DArray.ArraySize = 6; 858 break; 859 case SVGA3D_RESOURCE_BUFFEREX: 860 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */ 861 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER; 862 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement; 863 desc.Buffer.NumElements = pEntry->desc.buffer.numElements; 864 break; 865 default: 866 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG); 867 } 868 869 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp); 870 Assert(SUCCEEDED(hr)); 871 return hr; 872 } 873 874 875 static HRESULT dxShaderResourceViewCreate(DXDEVICE *pDevice, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11ShaderResourceView **pp) 876 { 877 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture; 878 879 D3D11_SHADER_RESOURCE_VIEW_DESC desc; 880 RT_ZERO(desc); 881 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format); 882 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL); 883 884 switch (pEntry->resourceDimension) 885 { 886 case SVGA3D_RESOURCE_BUFFER: 887 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER; 888 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement; 889 desc.Buffer.NumElements = pEntry->desc.buffer.numElements; 890 break; 891 case SVGA3D_RESOURCE_TEXTURE1D: 892 if (pEntry->desc.tex.arraySize <= 1) 893 { 894 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D; 895 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip; 896 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels; 897 } 898 else 899 { 900 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY; 901 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip; 902 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels; 903 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice; 904 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize; 905 } 906 break; 907 case SVGA3D_RESOURCE_TEXTURE2D: 908 if (pEntry->desc.tex.arraySize <= 1) 909 { 910 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D; 911 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip; 912 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels; 913 } 914 else 915 { 916 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY; 917 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip; 918 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels; 919 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice; 920 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize; 921 } 922 break; 923 case SVGA3D_RESOURCE_TEXTURE3D: 924 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D; 925 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip; 926 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels; 927 break; 928 case SVGA3D_RESOURCE_TEXTURECUBE: 929 AssertFailed(); /** @todo test. */ 930 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE; 931 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip; 932 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels; 933 break; 934 case SVGA3D_RESOURCE_BUFFEREX: 935 AssertFailed(); /** @todo test. */ 936 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX; 937 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement; 938 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements; 939 desc.BufferEx.Flags = pEntry->desc.bufferex.flags; 940 break; 941 default: 942 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG); 943 } 944 945 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp); 946 Assert(SUCCEEDED(hr)); 947 return hr; 948 } 949 950 951 static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader) 952 { 953 HRESULT hr = S_OK; 954 955 switch (pShader->type) 956 { 957 case SVGA3D_SHADERTYPE_VS: 958 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader); 959 Assert(SUCCEEDED(hr)); 960 break; 961 case SVGA3D_SHADERTYPE_PS: 962 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader); 963 Assert(SUCCEEDED(hr)); 964 break; 965 case SVGA3D_SHADERTYPE_GS: 966 case SVGA3D_SHADERTYPE_HS: 967 case SVGA3D_SHADERTYPE_DS: 968 case SVGA3D_SHADERTYPE_CS: 969 default: 970 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG); 971 } 972 973 return hr; 974 } 975 976 977 static void dxShaderSet(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader) 978 { 979 switch (pShader->type) 980 { 981 case SVGA3D_SHADERTYPE_VS: 982 pDevice->pImmediateContext->VSSetShader(pDXShader->pVertexShader, NULL, 0); 983 break; 984 case SVGA3D_SHADERTYPE_PS: 985 pDevice->pImmediateContext->PSSetShader(pDXShader->pPixelShader, NULL, 0); 986 break; 987 case SVGA3D_SHADERTYPE_GS: 988 case SVGA3D_SHADERTYPE_HS: 989 case SVGA3D_SHADERTYPE_DS: 990 case SVGA3D_SHADERTYPE_CS: 991 default: 992 ASSERT_GUEST_FAILED_RETURN_VOID(); 993 } 994 } 995 996 997 static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer) 998 { 999 switch (type) 1000 { 1001 case SVGA3D_SHADERTYPE_VS: 1002 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer); 1003 break; 1004 case SVGA3D_SHADERTYPE_PS: 1005 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer); 1006 break; 1007 case SVGA3D_SHADERTYPE_GS: 1008 case SVGA3D_SHADERTYPE_HS: 1009 case SVGA3D_SHADERTYPE_DS: 1010 case SVGA3D_SHADERTYPE_CS: 1011 default: 1012 ASSERT_GUEST_FAILED_RETURN_VOID(); 1013 } 1014 } 1015 1016 1017 static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler) 1018 { 1019 switch (type) 1020 { 1021 case SVGA3D_SHADERTYPE_VS: 1022 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler); 1023 break; 1024 case SVGA3D_SHADERTYPE_PS: 1025 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler); 1026 break; 1027 case SVGA3D_SHADERTYPE_GS: 1028 case SVGA3D_SHADERTYPE_HS: 1029 case SVGA3D_SHADERTYPE_DS: 1030 case SVGA3D_SHADERTYPE_CS: 1031 default: 1032 ASSERT_GUEST_FAILED_RETURN_VOID(); 1033 } 1034 } 1035 1036 1037 static int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface) 1038 { 1039 PVMSVGA3DBACKEND pBackend = pState->pBackend; 1040 AssertReturn(pBackend, VERR_INVALID_STATE); 1041 AssertReturn(pBackend->pDevice, VERR_INVALID_STATE); 1042 1043 /* Surface must have SCREEN_TARGET flag. */ 1044 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER); 1045 1046 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)) 1047 { 1048 AssertFailed(); /* Should the function not be used like that? */ 1049 vmsvga3dBackSurfaceDestroy(pState, pSurface); 1050 } 1051 1052 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE)); 1053 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY); 1054 1055 D3D11_TEXTURE2D_DESC td; 1056 RT_ZERO(td); 1057 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width; 1058 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height; 1059 Assert(pSurface->cLevels == 1); 1060 td.MipLevels = 1; 1061 td.ArraySize = 1; 1062 td.Format = vmsvgaDXScreenTargetFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM; 1063 td.SampleDesc.Count = 1; 1064 td.SampleDesc.Quality = 0; 1065 td.Usage = D3D11_USAGE_DEFAULT; 1066 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE; 1067 td.CPUAccessFlags = 0; 1068 td.MiscFlags = 0; 1069 1070 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture); 1071 Assert(SUCCEEDED(hr)); 1072 if (SUCCEEDED(hr)) 1073 { 1074 /* Map-able texture. */ 1075 td.Usage = D3D11_USAGE_DYNAMIC; 1076 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */ 1077 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE; 1078 td.MiscFlags = 0; 1079 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture); 1080 Assert(SUCCEEDED(hr)); 1081 } 1082 1083 if (SUCCEEDED(hr)) 1084 { 1085 /* Staging texture. */ 1086 td.Usage = D3D11_USAGE_STAGING; 1087 td.BindFlags = 0; /* No flags allowed. */ 1088 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ; 1089 td.MiscFlags = 0; 1090 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture); 1091 Assert(SUCCEEDED(hr)); 1092 } 1093 1094 if (SUCCEEDED(hr)) 1095 { 1096 /* 1097 * Success. 1098 */ 1099 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET; 1100 pBackendSurface->enmDxgiFormat = td.Format; 1101 pSurface->pBackendSurface = pBackendSurface; 1102 pSurface->idAssociatedContext = SVGA_ID_INVALID; 1103 pSurface->fDirty = true; 1104 return VINF_SUCCESS; 1105 } 1106 1107 /* Failure. */ 1108 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture); 1109 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture); 1110 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture); 1111 RTMemFree(pBackendSurface); 1112 return VERR_NO_MEMORY; 1113 } 1114 1115 1116 static int vmsvga3dBackSurfaceCreateRenderTarget(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface) 1117 { 1118 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 1119 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 1120 1121 if (pSurface->pBackendSurface != NULL) 1122 { 1123 AssertFailed(); /** @todo Should the function not be used like that? */ 1124 vmsvga3dBackSurfaceDestroy(p3dState, pSurface); 1125 } 1126 1127 /** @todo Various texture types. */ 1128 1129 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE)); 1130 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY); 1131 1132 D3D11_TEXTURE2D_DESC td; 1133 RT_ZERO(td); 1134 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width; 1135 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height; 1136 Assert(pSurface->cLevels == 1); 1137 td.MipLevels = 1; 1138 td.ArraySize = 1; 1139 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM; 1140 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL); 1141 td.SampleDesc.Count = 1; 1142 td.SampleDesc.Quality = 0; 1143 td.Usage = D3D11_USAGE_DEFAULT; 1144 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE; 1145 td.CPUAccessFlags = 0; 1146 td.MiscFlags = 0; 1147 1148 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture); 1149 Assert(SUCCEEDED(hr)); 1150 if (SUCCEEDED(hr)) 1151 { 1152 /* Map-able texture. */ 1153 td.Usage = D3D11_USAGE_DYNAMIC; 1154 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */ 1155 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE; 1156 td.MiscFlags = 0; 1157 hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pDynamicTexture); 1158 Assert(SUCCEEDED(hr)); 1159 } 1160 1161 if (SUCCEEDED(hr)) 1162 { 1163 /* Staging texture. */ 1164 td.Usage = D3D11_USAGE_STAGING; 1165 td.BindFlags = 0; /* No flags allowed. */ 1166 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ; 1167 td.MiscFlags = 0; 1168 hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pStagingTexture); 1169 Assert(SUCCEEDED(hr)); 1170 } 1171 1172 if (SUCCEEDED(hr)) 1173 { 1174 /* 1175 * Success. 1176 */ 1177 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE; 1178 pBackendSurface->enmDxgiFormat = td.Format; 1179 pSurface->pBackendSurface = pBackendSurface; 1180 pSurface->idAssociatedContext = pDXContext->cid; 1181 pSurface->fDirty = true; 1182 return VINF_SUCCESS; 1183 } 1184 1185 /* Failure. */ 1186 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture); 1187 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture); 1188 D3D_RELEASE(pBackendSurface->u.Texture.pTexture); 1189 RTMemFree(pBackendSurface); 1190 return VERR_NO_MEMORY; 1191 } 1192 1193 1194 static int vmsvga3dBackSurfaceCreateTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface) 1195 { 1196 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 1197 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 1198 1199 if (pSurface->pBackendSurface != NULL) 1200 { 1201 AssertFailed(); /** @todo Should the function not be used like that? */ 1202 vmsvga3dBackSurfaceDestroy(p3dState, pSurface); 1203 } 1204 1205 /** @todo Various texture types. */ 1206 1207 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE)); 1208 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY); 1209 1210 RTMemFree(pBackendSurface); 1211 return VERR_NOT_IMPLEMENTED; 1212 } 1213 1214 1215 static int vmsvga3dBackSurfaceCreateBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface) 1216 { 1217 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 1218 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 1219 1220 /* Buffers should be created as such. */ 1221 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER 1222 | SVGA3D_SURFACE_HINT_VERTEXBUFFER 1223 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER 1224 | SVGA3D_SURFACE_BIND_INDEX_BUFFER 1225 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER 1226 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT 1227 )), VERR_INVALID_PARAMETER); 1228 1229 if (pSurface->pBackendSurface != NULL) 1230 { 1231 AssertFailed(); /** @todo Should the function not be used like that? */ 1232 vmsvga3dBackSurfaceDestroy(p3dState, pSurface); 1233 } 1234 1235 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE)); 1236 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY); 1237 1238 D3D11_BUFFER_DESC bd; 1239 RT_ZERO(bd); 1240 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface; 1241 bd.Usage = D3D11_USAGE_DYNAMIC; 1242 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER 1243 | D3D11_BIND_INDEX_BUFFER 1244 //| D3D11_BIND_CONSTANT_BUFFER 1245 //| D3D11_BIND_STREAM_OUTPUT 1246 ; 1247 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE; 1248 bd.MiscFlags = 0; 1249 bd.StructureByteStride = 0; 1250 1251 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer); 1252 if (SUCCEEDED(hr)) 1253 { 1254 /* 1255 * Success. 1256 */ 1257 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER; 1258 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN; 1259 pSurface->pBackendSurface = pBackendSurface; 1260 pSurface->idAssociatedContext = pDXContext->cid; 1261 pSurface->fDirty = true; 1262 return VINF_SUCCESS; 1263 } 1264 1265 /* Failure. */ 1266 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer); 1267 RTMemFree(pBackendSurface); 1268 return VERR_NO_MEMORY; 1269 } 1270 1271 1272 static int vmsvga3dBackSurfaceCreateConstantBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface) 1273 { 1274 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 1275 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 1276 1277 /* Buffers should be created as such. */ 1278 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER); 1279 1280 if (pSurface->pBackendSurface != NULL) 1281 { 1282 AssertFailed(); /** @todo Should the function not be used like that? */ 1283 vmsvga3dBackSurfaceDestroy(p3dState, pSurface); 1284 } 1285 1286 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE)); 1287 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY); 1288 1289 D3D11_BUFFER_DESC bd; 1290 RT_ZERO(bd); 1291 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface; 1292 bd.Usage = D3D11_USAGE_DYNAMIC; 1293 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER; 1294 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE; 1295 bd.MiscFlags = 0; 1296 bd.StructureByteStride = 0; 1297 1298 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer); 1299 if (SUCCEEDED(hr)) 1300 { 1301 /* 1302 * Success. 1303 */ 1304 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER; 1305 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN; 1306 pSurface->pBackendSurface = pBackendSurface; 1307 pSurface->idAssociatedContext = pDXContext->cid; 1308 pSurface->fDirty = true; 1309 return VINF_SUCCESS; 1310 } 1311 1312 /* Failure. */ 1313 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer); 1314 RTMemFree(pBackendSurface); 1315 return VERR_NO_MEMORY; 564 1316 } 565 1317 … … 916 1668 if (!pBackendSurface) 917 1669 return VERR_INVALID_PARAMETER; 1670 1671 PVMSVGA3DDXCONTEXT pDXContext; 1672 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext); 1673 1674 DXDEVICE *pDevice = NULL; 1675 if (pDXContext) 1676 { 1677 pDevice = &pDXContext->pBackendDXContext->device; 1678 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 1679 } 918 1680 919 1681 SVGA3dBox clipBox; … … 981 1743 rc = VERR_NOT_SUPPORTED; 982 1744 } 1745 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE) 1746 { 1747 AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR); 1748 ASMBreakpoint(); 1749 ID3D11Texture2D *pMappedTexture; 1750 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ) 1751 { 1752 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture; 1753 1754 /* Copy the texture content to the staging texture. */ 1755 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture); 1756 } 1757 else 1758 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture; 1759 1760 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */ 1761 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource, 1762 d3d11MapType, /* MapFlags = */ 0, &mappedResource); 1763 if (SUCCEEDED(hr)) 1764 { 1765 pMap->enmMapType = enmMapType; 1766 pMap->box = clipBox; 1767 pMap->cbPixel = pSurface->cbBlock; 1768 pMap->cbRowPitch = mappedResource.RowPitch; 1769 pMap->cbDepthPitch = mappedResource.DepthPitch; 1770 pMap->pvData = (uint8_t *)mappedResource.pData 1771 + pMap->box.x * pMap->cbPixel 1772 + pMap->box.y * pMap->cbRowPitch 1773 + pMap->box.z * pMap->cbDepthPitch; 1774 } 1775 else 1776 rc = VERR_NOT_SUPPORTED; 1777 } 1778 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER) 1779 { 1780 UINT const Subresource = 0; /* Buffers have only one subresource. */ 1781 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource, 1782 d3d11MapType, /* MapFlags = */ 0, &mappedResource); 1783 if (SUCCEEDED(hr)) 1784 { 1785 pMap->enmMapType = enmMapType; 1786 pMap->box = clipBox; 1787 pMap->cbPixel = pSurface->cbBlock; 1788 pMap->cbRowPitch = mappedResource.RowPitch; 1789 pMap->cbDepthPitch = mappedResource.DepthPitch; 1790 pMap->pvData = (uint8_t *)mappedResource.pData 1791 + pMap->box.x * pMap->cbPixel 1792 + pMap->box.y * pMap->cbRowPitch 1793 + pMap->box.z * pMap->cbDepthPitch; 1794 } 1795 else 1796 rc = VERR_NOT_SUPPORTED; 1797 } 983 1798 else 984 1799 { … … 1009 1824 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface; 1010 1825 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER); 1826 1827 PVMSVGA3DDXCONTEXT pDXContext; 1828 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext); 1829 1830 DXDEVICE *pDevice = NULL; 1831 if (pDXContext) 1832 { 1833 pDevice = &pDXContext->pBackendDXContext->device; 1834 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 1835 } 1011 1836 1012 1837 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET) … … 1044 1869 } 1045 1870 } 1871 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE) 1872 { 1873 AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR); 1874 ASMBreakpoint(); 1875 ID3D11Texture2D *pMappedTexture; 1876 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ) 1877 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture; 1878 else 1879 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture; 1880 1881 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */ 1882 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource); 1883 1884 if ( fWritten 1885 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE 1886 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE 1887 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)) 1888 { 1889 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture; 1890 UINT DstSubresource = Subresource; 1891 UINT DstX = pMap->box.x; 1892 UINT DstY = pMap->box.y; 1893 UINT DstZ = pMap->box.z; 1894 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture; 1895 UINT SrcSubresource = Subresource; 1896 D3D11_BOX SrcBox; 1897 SrcBox.left = pMap->box.x; 1898 SrcBox.top = pMap->box.y; 1899 SrcBox.front = pMap->box.z; 1900 SrcBox.right = pMap->box.x + pMap->box.w; 1901 SrcBox.bottom = pMap->box.y + pMap->box.h; 1902 SrcBox.back = pMap->box.z + pMap->box.d; 1903 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ, 1904 pSrcResource, SrcSubresource, &SrcBox); 1905 } 1906 } 1907 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER) 1908 { 1909 UINT const Subresource = 0; /* Buffers have only one subresource. */ 1910 pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource); 1911 } 1046 1912 else 1047 1913 { … … 1051 1917 1052 1918 return rc; 1053 }1054 1055 1056 int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)1057 {1058 PVMSVGA3DBACKEND pBackend = pState->pBackend;1059 AssertReturn(pBackend, VERR_INVALID_STATE);1060 AssertReturn(pBackend->pDevice, VERR_INVALID_STATE);1061 1062 /* Surface must have SCREEN_TARGET flag. */1063 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);1064 1065 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))1066 {1067 AssertFailed(); /* Should the function not be used like that? */1068 vmsvga3dBackSurfaceDestroy(pState, pSurface);1069 }1070 1071 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));1072 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);1073 1074 D3D11_TEXTURE2D_DESC td;1075 RT_ZERO(td);1076 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;1077 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;1078 Assert(pSurface->cLevels == 1);1079 td.MipLevels = 1;1080 td.ArraySize = 1;1081 td.Format = vmsvgaDXScreenTargetFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;1082 td.SampleDesc.Count = 1;1083 td.SampleDesc.Quality = 0;1084 td.Usage = D3D11_USAGE_DEFAULT;1085 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;1086 td.CPUAccessFlags = 0;1087 td.MiscFlags = 0;1088 1089 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);1090 1091 if (SUCCEEDED(hr))1092 {1093 /* Map-able texture. */1094 td.Usage = D3D11_USAGE_DYNAMIC;1095 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */1096 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;1097 td.MiscFlags = 0;1098 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);1099 }1100 1101 if (SUCCEEDED(hr))1102 {1103 /* Staging texture. */1104 td.Usage = D3D11_USAGE_STAGING;1105 td.BindFlags = 0; /* No flags allowed. */1106 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;1107 td.MiscFlags = 0;1108 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);1109 }1110 1111 if (SUCCEEDED(hr))1112 {1113 /*1114 * Success.1115 */1116 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;1117 pSurface->pBackendSurface = pBackendSurface;1118 return VINF_SUCCESS;1119 }1120 1121 /* Failure. */1122 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);1123 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);1124 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);1125 RTMemFree(pBackendSurface);1126 return VERR_NO_MEMORY;1127 1919 } 1128 1920 … … 2110 2902 /* The caller should not use the function for system memory surfaces. */ 2111 2903 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface; 2112 AssertReturnVoid(pBackendSurface); 2904 if (!pBackendSurface) 2905 return; 2113 2906 pSurface->pBackendSurface = NULL; 2114 2907 … … 2118 2911 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture); 2119 2912 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture); 2913 } 2914 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE) 2915 { 2916 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture); 2917 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture); 2918 D3D_RELEASE(pBackendSurface->u.Texture.pTexture); 2919 } 2920 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER) 2921 { 2922 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer); 2120 2923 } 2121 2924 else … … 2336 3139 2337 3140 2338 static DECLCALLBACK(void) vmsvga3dDXDefineContext(PVMSVGA3DSTATE p3dState) 2339 { 2340 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2341 3141 /* 3142 * DX callbacks. 3143 */ 3144 3145 static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3146 { 3147 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3148 3149 /* Allocate a backend specific context structure. */ 3150 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT)); 3151 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY); 3152 pDXContext->pBackendDXContext = pBackendDXContext; 3153 3154 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device); 3155 return rc; 3156 } 3157 3158 3159 static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3160 { 3161 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3162 3163 if (pDXContext->pBackendDXContext) 3164 { 3165 dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device); 3166 3167 RTMemFree(pDXContext->pBackendDXContext); 3168 pDXContext->pBackendDXContext = NULL; 3169 } 3170 return VINF_SUCCESS; 3171 } 3172 3173 3174 static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3175 { 3176 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3177 RT_NOREF(pBackend, pDXContext); 3178 return VINF_SUCCESS; 3179 } 3180 3181 3182 static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3183 { 3184 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3185 3186 RT_NOREF(pBackend, pDXContext); 3187 AssertFailed(); /** @todo Implement */ 3188 return VERR_NOT_IMPLEMENTED; 3189 } 3190 3191 3192 static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3193 { 3194 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3195 3196 RT_NOREF(pBackend, pDXContext); 3197 AssertFailed(); /** @todo Implement */ 3198 return VERR_NOT_IMPLEMENTED; 3199 } 3200 3201 3202 static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes) 3203 { 3204 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2342 3205 RT_NOREF(pBackend); 2343 AssertFailed(); /** @todo Implement */ 2344 } 2345 2346 2347 static DECLCALLBACK(void) vmsvga3dDXDestroyContext(PVMSVGA3DSTATE p3dState) 2348 { 2349 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2350 3206 3207 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3208 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3209 3210 PVMSVGA3DSURFACE pSurface; 3211 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface); 3212 AssertRCReturn(rc, rc); 3213 3214 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface; 3215 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface 3216 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER); 3217 3218 if (pSurface->pBackendSurface == NULL) 3219 { 3220 /* Create the resource. */ 3221 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC->svga.p3dState, pDXContext, pSurface); 3222 AssertRCReturn(rc, rc); 3223 } 3224 3225 if (pSurface->fDirty) 3226 { 3227 /* Get mobid for the surface and read from the MOB. */ 3228 SVGA3dSurfaceImageId imageId; 3229 imageId.sid = sid; 3230 imageId.face = 0; 3231 imageId.mipmap = 0; 3232 3233 SVGA3dPoint ptSrc; 3234 ptSrc.x = offsetInBytes / pSurface->cbBlock; 3235 ptSrc.y = 0; 3236 ptSrc.z = 0; 3237 3238 SVGA3dBox boxDst; 3239 boxDst.x = 0; 3240 boxDst.y = 0; 3241 boxDst.z = 0; 3242 boxDst.w = sizeInBytes / pSurface->cbBlock; 3243 boxDst.h = 1; 3244 boxDst.d = 1; 3245 3246 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, &imageId, &boxDst, &ptSrc); 3247 AssertRCReturn(rc, rc); 3248 } 3249 3250 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer); 3251 3252 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN; 3253 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[slot]; 3254 pCBB->sid = sid; 3255 pCBB->offsetInBytes = offsetInBytes; 3256 pCBB->sizeInBytes = sizeInBytes; 3257 return VINF_SUCCESS; 3258 } 3259 3260 3261 static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3262 { 3263 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3264 3265 RT_NOREF(pBackend, pDXContext); 3266 AssertFailed(); /** @todo Implement */ 3267 return VERR_NOT_IMPLEMENTED; 3268 } 3269 3270 3271 static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader) 3272 { 3273 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2351 3274 RT_NOREF(pBackend); 2352 AssertFailed(); /** @todo Implement */ 2353 } 2354 2355 2356 static DECLCALLBACK(void) vmsvga3dDXBindContext(PVMSVGA3DSTATE p3dState) 2357 { 2358 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2359 3275 3276 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3277 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3278 3279 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id]; 3280 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN; 3281 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id; 3282 3283 dxShaderSet(pDevice, pShader, pDXShader); 3284 return VINF_SUCCESS; 3285 } 3286 3287 3288 static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId) 3289 { 3290 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2360 3291 RT_NOREF(pBackend); 2361 AssertFailed(); /** @todo Implement */ 2362 } 2363 2364 2365 static DECLCALLBACK(void) vmsvga3dDXReadbackContext(PVMSVGA3DSTATE p3dState) 2366 { 2367 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2368 3292 3293 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3294 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3295 3296 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN; 3297 ID3D11SamplerState *aSamplerState[SVGA3D_DX_MAX_SAMPLERS]; 3298 for (uint32_t i = 0; i < cSamplerId; ++i) 3299 { 3300 SVGA3dSamplerId samplerId = paSamplerId[i]; 3301 if (samplerId != SVGA3D_INVALID_ID) 3302 { 3303 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER); 3304 aSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId]; 3305 } 3306 else 3307 aSamplerState[i] = NULL; 3308 3309 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId; 3310 } 3311 3312 dxSamplerSet(pDevice, type, startSampler, cSamplerId, aSamplerState); 3313 return VINF_SUCCESS; 3314 } 3315 3316 3317 static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation) 3318 { 3319 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2369 3320 RT_NOREF(pBackend); 2370 AssertFailed(); /** @todo Implement */ 2371 } 2372 2373 2374 static DECLCALLBACK(void) vmsvga3dDXInvalidateContext(PVMSVGA3DSTATE p3dState) 2375 { 2376 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2377 3321 3322 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3323 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3324 3325 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation); 3326 return VINF_SUCCESS; 3327 } 3328 3329 3330 static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation) 3331 { 3332 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2378 3333 RT_NOREF(pBackend); 2379 AssertFailed(); /** @todo Implement */ 2380 } 2381 2382 2383 static DECLCALLBACK(void) vmsvga3dDXSetSingleConstantBuffer(PVMSVGA3DSTATE p3dState) 2384 { 2385 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2386 3334 3335 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3336 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3337 3338 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation); 3339 return VINF_SUCCESS; 3340 } 3341 3342 3343 static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3344 { 3345 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3346 3347 RT_NOREF(pBackend, pDXContext); 3348 AssertFailed(); /** @todo Implement */ 3349 return VERR_NOT_IMPLEMENTED; 3350 } 3351 3352 3353 static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3354 { 3355 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3356 3357 RT_NOREF(pBackend, pDXContext); 3358 AssertFailed(); /** @todo Implement */ 3359 return VERR_NOT_IMPLEMENTED; 3360 } 3361 3362 3363 static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3364 { 3365 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3366 3367 RT_NOREF(pBackend, pDXContext); 3368 AssertFailed(); /** @todo Implement */ 3369 return VERR_NOT_IMPLEMENTED; 3370 } 3371 3372 3373 static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId) 3374 { 3375 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2387 3376 RT_NOREF(pBackend); 2388 AssertFailed(); /** @todo Implement */ 2389 } 2390 2391 2392 static DECLCALLBACK(void) vmsvga3dDXSetShaderResources(PVMSVGA3DSTATE p3dState) 2393 { 2394 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2395 3377 3378 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3379 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3380 3381 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId; 3382 3383 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId]; 3384 if (!pDXElementLayout->pElementLayout) 3385 { 3386 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN; 3387 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId; 3388 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader, 3389 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)), 3390 VERR_INVALID_STATE); 3391 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid]; 3392 AssertReturnStmt(pDXShader->pvDXBC, 3393 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)), 3394 VERR_INVALID_STATE); 3395 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc, 3396 pDXElementLayout->cElementDesc, 3397 pDXShader->pvDXBC, 3398 pDXShader->cbDXBC, 3399 &pDXElementLayout->pElementLayout); 3400 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY); 3401 } 3402 3403 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout); 3404 return VINF_SUCCESS; 3405 } 3406 3407 3408 static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer) 3409 { 3410 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2396 3411 RT_NOREF(pBackend); 2397 AssertFailed(); /** @todo Implement */ 2398 } 2399 2400 2401 static DECLCALLBACK(void) vmsvga3dDXSetShader(PVMSVGA3DSTATE p3dState) 2402 { 2403 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2404 3412 3413 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3414 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3415 3416 /* For each paVertexBuffer[i]: 3417 * If the vertex buffer object does not exist then create it. 3418 * If the surface has been updated by the guest then update the buffer object. 3419 * Use IASetVertexBuffers to set the buffers. 3420 */ 3421 3422 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS]; 3423 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS]; 3424 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS]; 3425 3426 for (uint32_t i = 0; i < cVertexBuffer; ++i) 3427 { 3428 uint32_t const idxVertexBuffer = startBuffer + i; 3429 3430 /* Get corresponding resource. Create the buffer if does not yet exist. */ 3431 if (paVertexBuffer[i].sid != SVGA_ID_INVALID) 3432 { 3433 PVMSVGA3DSURFACE pSurface; 3434 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface); 3435 AssertRCReturn(rc, rc); 3436 3437 if (pSurface->pBackendSurface == NULL) 3438 { 3439 /* Create the resource. */ 3440 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface); 3441 AssertRCReturn(rc, rc); 3442 } 3443 3444 if (pSurface->fDirty) 3445 { 3446 /* Get mobid for the surface and read from the MOB. */ 3447 SVGA3dSurfaceImageId imageId; 3448 imageId.sid = paVertexBuffer[i].sid; 3449 imageId.face = 0; 3450 imageId.mipmap = 0; 3451 3452 SVGA3dBox box; 3453 box.x = 0; 3454 box.y = 0; 3455 box.z = 0; 3456 box.w = pSurface->paMipmapLevels[0].mipmapSize.width; 3457 box.h = 1; 3458 box.d = 1; 3459 3460 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box); 3461 AssertRCReturn(rc, rc); 3462 } 3463 3464 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer; 3465 paStride[idxVertexBuffer] = paVertexBuffer[i].stride; 3466 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset; 3467 } 3468 else 3469 { 3470 paResources[idxVertexBuffer] = NULL; 3471 paStride[idxVertexBuffer] = 0; 3472 paOffset[idxVertexBuffer] = 0; 3473 } 3474 3475 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid; 3476 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride; 3477 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset; 3478 } 3479 3480 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset); 3481 3482 return VINF_SUCCESS; 3483 } 3484 3485 3486 static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset) 3487 { 3488 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2405 3489 RT_NOREF(pBackend); 2406 AssertFailed(); /** @todo Implement */ 2407 } 2408 2409 2410 static DECLCALLBACK(void) vmsvga3dDXSetSamplers(PVMSVGA3DSTATE p3dState) 2411 { 2412 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2413 3490 3491 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3492 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3493 3494 /* Get corresponding resource. Create the buffer if does not yet exist. */ 3495 ID3D11Buffer *pResource; 3496 DXGI_FORMAT enmDxgiFormat; 3497 3498 if (sid != SVGA_ID_INVALID) 3499 { 3500 PVMSVGA3DSURFACE pSurface; 3501 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface); 3502 AssertRCReturn(rc, rc); 3503 3504 if (pSurface->pBackendSurface == NULL) 3505 { 3506 /* Create the resource. */ 3507 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface); 3508 AssertRCReturn(rc, rc); 3509 } 3510 3511 if (pSurface->fDirty) 3512 { 3513 /* Get mobid for the surface and read from the MOB. */ 3514 SVGA3dSurfaceImageId imageId; 3515 imageId.sid = sid; 3516 imageId.face = 0; 3517 imageId.mipmap = 0; 3518 3519 SVGA3dBox box; 3520 box.x = 0; 3521 box.y = 0; 3522 box.z = 0; 3523 box.w = pSurface->paMipmapLevels[0].mipmapSize.width; 3524 box.h = 1; 3525 box.d = 1; 3526 3527 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box); 3528 AssertRCReturn(rc, rc); 3529 } 3530 3531 pResource = pSurface->pBackendSurface->u.Buffer.pBuffer; 3532 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format); 3533 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER); 3534 } 3535 else 3536 { 3537 pResource = NULL; 3538 enmDxgiFormat = DXGI_FORMAT_UNKNOWN; 3539 } 3540 3541 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset); 3542 3543 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = sid; 3544 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = offset; 3545 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = format; 3546 3547 return VINF_SUCCESS; 3548 } 3549 3550 static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType) 3551 { 3552 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] = 3553 { 3554 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED, 3555 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST, 3556 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST, 3557 D3D11_PRIMITIVE_TOPOLOGY_LINELIST, 3558 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP, 3559 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, 3560 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11 */ 3561 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ, 3562 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ, 3563 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ, 3564 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ, 3565 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST, 3566 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST, 3567 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST, 3568 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST, 3569 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST, 3570 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST, 3571 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST, 3572 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST, 3573 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST, 3574 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST, 3575 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST, 3576 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST, 3577 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST, 3578 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST, 3579 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST, 3580 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST, 3581 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST, 3582 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST, 3583 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST, 3584 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST, 3585 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST, 3586 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST, 3587 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST, 3588 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST, 3589 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST, 3590 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST, 3591 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST, 3592 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST, 3593 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST, 3594 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST, 3595 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST, 3596 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST, 3597 }; 3598 return aD3D11PrimitiveTopology[primitiveType]; 3599 } 3600 3601 static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology) 3602 { 3603 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2414 3604 RT_NOREF(pBackend); 2415 AssertFailed(); /** @todo Implement */ 2416 } 2417 2418 2419 static DECLCALLBACK(void) vmsvga3dDXDraw(PVMSVGA3DSTATE p3dState) 2420 { 2421 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2422 3605 3606 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3607 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3608 3609 D3D11_PRIMITIVE_TOPOLOGY enmTopology = dxTopology(topology); 3610 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology); 3611 pDXContext->svgaDXContext.inputAssembly.topology = topology; 3612 return VINF_SUCCESS; 3613 } 3614 3615 3616 static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId) 3617 { 3618 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2423 3619 RT_NOREF(pBackend); 2424 AssertFailed(); /** @todo Implement */ 2425 } 2426 2427 2428 static DECLCALLBACK(void) vmsvga3dDXDrawIndexed(PVMSVGA3DSTATE p3dState) 2429 { 2430 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2431 3620 3621 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3622 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3623 3624 ID3D11RenderTargetView *aRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS]; 3625 for (uint32_t i = 0; i < cRenderTargetViewId; ++i) 3626 { 3627 SVGA3dRenderTargetViewId renderTargetViewId = paRenderTargetViewId[i]; 3628 if (renderTargetViewId != SVGA3D_INVALID_ID) 3629 { 3630 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER); 3631 aRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]; 3632 } 3633 else 3634 aRenderTargetViews[i] = NULL; 3635 } 3636 3637 ID3D11DepthStencilView *pDepthStencilView; 3638 if (depthStencilViewId != SVGA_ID_INVALID) 3639 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]; 3640 else 3641 pDepthStencilView = NULL; 3642 3643 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, aRenderTargetViews, pDepthStencilView); 3644 return VINF_SUCCESS; 3645 } 3646 3647 3648 static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask) 3649 { 3650 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2432 3651 RT_NOREF(pBackend); 2433 AssertFailed(); /** @todo Implement */ 2434 } 2435 2436 2437 static DECLCALLBACK(void) vmsvga3dDXDrawInstanced(PVMSVGA3DSTATE p3dState) 2438 { 2439 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2440 3652 3653 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3654 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3655 3656 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId]; 3657 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask); 3658 3659 pDXContext->svgaDXContext.renderState.blendStateId = blendId; 3660 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor)); 3661 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask; 3662 3663 return VINF_SUCCESS; 3664 } 3665 3666 3667 static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef) 3668 { 3669 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2441 3670 RT_NOREF(pBackend); 2442 AssertFailed(); /** @todo Implement */ 2443 } 2444 2445 2446 static DECLCALLBACK(void) vmsvga3dDXDrawIndexedInstanced(PVMSVGA3DSTATE p3dState) 2447 { 2448 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3671 3672 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3673 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3674 3675 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]; 3676 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef); 3677 3678 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId; 3679 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef; 3680 3681 return VINF_SUCCESS; 3682 } 3683 3684 3685 static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId) 3686 { 3687 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3688 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3689 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2449 3690 2450 3691 RT_NOREF(pBackend); 2451 AssertFailed(); /** @todo Implement */ 2452 } 2453 2454 2455 static DECLCALLBACK(void) vmsvga3dDXDrawAuto(PVMSVGA3DSTATE p3dState) 2456 { 2457 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3692 3693 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]); 3694 return VINF_SUCCESS; 3695 } 3696 3697 3698 static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3699 { 3700 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3701 3702 RT_NOREF(pBackend, pDXContext); 3703 AssertFailed(); /** @todo Implement */ 3704 return VERR_NOT_IMPLEMENTED; 3705 } 3706 3707 3708 static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3709 { 3710 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3711 3712 RT_NOREF(pBackend, pDXContext); 3713 AssertFailed(); /** @todo Implement */ 3714 return VERR_NOT_IMPLEMENTED; 3715 } 3716 3717 3718 static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3719 { 3720 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3721 3722 RT_NOREF(pBackend, pDXContext); 3723 AssertFailed(); /** @todo Implement */ 3724 return VERR_NOT_IMPLEMENTED; 3725 } 3726 3727 3728 static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3729 { 3730 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3731 3732 RT_NOREF(pBackend, pDXContext); 3733 AssertFailed(); /** @todo Implement */ 3734 return VERR_NOT_IMPLEMENTED; 3735 } 3736 3737 3738 static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3739 { 3740 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3741 3742 RT_NOREF(pBackend, pDXContext); 3743 AssertFailed(); /** @todo Implement */ 3744 return VERR_NOT_IMPLEMENTED; 3745 } 3746 3747 3748 static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3749 { 3750 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3751 3752 RT_NOREF(pBackend, pDXContext); 3753 AssertFailed(); /** @todo Implement */ 3754 return VERR_NOT_IMPLEMENTED; 3755 } 3756 3757 3758 static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3759 { 3760 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3761 3762 RT_NOREF(pBackend, pDXContext); 3763 AssertFailed(); /** @todo Implement */ 3764 return VERR_NOT_IMPLEMENTED; 3765 } 3766 3767 3768 static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3769 { 3770 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3771 3772 RT_NOREF(pBackend, pDXContext); 3773 AssertFailed(); /** @todo Implement */ 3774 return VERR_NOT_IMPLEMENTED; 3775 } 3776 3777 3778 static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3779 { 3780 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3781 3782 RT_NOREF(pBackend, pDXContext); 3783 AssertFailed(); /** @todo Implement */ 3784 return VERR_NOT_IMPLEMENTED; 3785 } 3786 3787 3788 static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport) 3789 { 3790 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3791 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3792 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2458 3793 2459 3794 RT_NOREF(pBackend); 2460 AssertFailed(); /** @todo Implement */ 2461 } 2462 2463 2464 static DECLCALLBACK(void) vmsvga3dDXSetInputLayout(PVMSVGA3DSTATE p3dState) 2465 { 2466 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3795 3796 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */ 3797 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport; 3798 3799 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports); 3800 return VINF_SUCCESS; 3801 } 3802 3803 3804 static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect) 3805 { 3806 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3807 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3808 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2467 3809 2468 3810 RT_NOREF(pBackend); 2469 AssertFailed(); /** @todo Implement */ 2470 } 2471 2472 2473 static DECLCALLBACK(void) vmsvga3dDXSetVertexBuffers(PVMSVGA3DSTATE p3dState) 2474 { 2475 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2476 3811 3812 /* D3D11_RECT is identical to SVGASignedRect. */ 3813 D3D11_RECT *pRects = (D3D11_RECT *)paRect; 3814 3815 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects); 3816 return VINF_SUCCESS; 3817 } 3818 3819 3820 static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3821 { 3822 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3823 3824 RT_NOREF(pBackend, pDXContext); 3825 AssertFailed(); /** @todo Implement */ 3826 return VERR_NOT_IMPLEMENTED; 3827 } 3828 3829 3830 static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3831 { 3832 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3833 3834 RT_NOREF(pBackend, pDXContext); 3835 AssertFailed(); /** @todo Implement */ 3836 return VERR_NOT_IMPLEMENTED; 3837 } 3838 3839 3840 static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3841 { 3842 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3843 3844 RT_NOREF(pBackend, pDXContext); 3845 AssertFailed(); /** @todo Implement */ 3846 return VERR_NOT_IMPLEMENTED; 3847 } 3848 3849 3850 static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3851 { 3852 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3853 3854 RT_NOREF(pBackend, pDXContext); 3855 AssertFailed(); /** @todo Implement */ 3856 return VERR_NOT_IMPLEMENTED; 3857 } 3858 3859 3860 static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3861 { 3862 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3863 3864 RT_NOREF(pBackend, pDXContext); 3865 AssertFailed(); /** @todo Implement */ 3866 return VERR_NOT_IMPLEMENTED; 3867 } 3868 3869 3870 static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3871 { 3872 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3873 3874 RT_NOREF(pBackend, pDXContext); 3875 AssertFailed(); /** @todo Implement */ 3876 return VERR_NOT_IMPLEMENTED; 3877 } 3878 3879 3880 static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3881 { 3882 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3883 3884 RT_NOREF(pBackend, pDXContext); 3885 AssertFailed(); /** @todo Implement */ 3886 return VERR_NOT_IMPLEMENTED; 3887 } 3888 3889 3890 static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3891 { 3892 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3893 3894 RT_NOREF(pBackend, pDXContext); 3895 AssertFailed(); /** @todo Implement */ 3896 return VERR_NOT_IMPLEMENTED; 3897 } 3898 3899 3900 static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3901 { 3902 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3903 3904 RT_NOREF(pBackend, pDXContext); 3905 AssertFailed(); /** @todo Implement */ 3906 return VERR_NOT_IMPLEMENTED; 3907 } 3908 3909 3910 static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry) 3911 { 3912 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2477 3913 RT_NOREF(pBackend); 2478 AssertFailed(); /** @todo Implement */ 2479 } 2480 2481 2482 static DECLCALLBACK(void) vmsvga3dDXSetIndexBuffer(PVMSVGA3DSTATE p3dState) 2483 { 2484 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2485 3914 3915 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3916 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3917 3918 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */ 3919 PVMSVGA3DSURFACE pSurface; 3920 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface); 3921 AssertRCReturn(rc, rc); 3922 3923 if (pSurface->pBackendSurface == NULL) 3924 { 3925 /* Create the actual texture. */ 3926 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSurface); 3927 AssertRCReturn(rc, rc); 3928 } 3929 3930 HRESULT hr = dxShaderResourceViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]); 3931 if (SUCCEEDED(hr)) 3932 return VINF_SUCCESS; 3933 return VERR_INVALID_STATE; 3934 } 3935 3936 3937 static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3938 { 3939 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3940 3941 RT_NOREF(pBackend, pDXContext); 3942 AssertFailed(); /** @todo Implement */ 3943 return VERR_NOT_IMPLEMENTED; 3944 } 3945 3946 3947 static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry) 3948 { 3949 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2486 3950 RT_NOREF(pBackend); 2487 AssertFailed(); /** @todo Implement */ 2488 } 2489 2490 2491 static DECLCALLBACK(void) vmsvga3dDXSetTopology(PVMSVGA3DSTATE p3dState) 2492 { 2493 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3951 3952 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 3953 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 3954 3955 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */ 3956 PVMSVGA3DSURFACE pSurface; 3957 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface); 3958 AssertRCReturn(rc, rc); 3959 3960 if (pSurface->pBackendSurface == NULL) 3961 { 3962 /* Create the actual texture. */ 3963 rc = vmsvga3dBackSurfaceCreateRenderTarget(pThisCC->svga.p3dState, pDXContext, pSurface); 3964 AssertRCReturn(rc, rc); 3965 } 3966 3967 HRESULT hr = dxRenderTargetViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]); 3968 if (SUCCEEDED(hr)) 3969 return VINF_SUCCESS; 3970 return VERR_INVALID_STATE; 3971 } 3972 3973 3974 static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3975 { 3976 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3977 3978 RT_NOREF(pBackend, pDXContext); 3979 AssertFailed(); /** @todo Implement */ 3980 return VERR_NOT_IMPLEMENTED; 3981 } 3982 3983 3984 static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3985 { 3986 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3987 3988 RT_NOREF(pBackend, pDXContext); 3989 AssertFailed(); /** @todo Implement */ 3990 return VERR_NOT_IMPLEMENTED; 3991 } 3992 3993 3994 static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 3995 { 3996 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3997 3998 RT_NOREF(pBackend, pDXContext); 3999 AssertFailed(); /** @todo Implement */ 4000 return VERR_NOT_IMPLEMENTED; 4001 } 4002 4003 4004 static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry) 4005 { 4006 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4007 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 4008 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 4009 4010 RT_NOREF(pBackend, elementLayoutId, pEntry); 4011 4012 /* Not much can be done here because ID3D11Device::CreateInputLayout requires 4013 * a pShaderBytecodeWithInputSignature which is not known at this moment. 4014 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT. 4015 */ 4016 4017 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid]; 4018 D3D_RELEASE(pDXElementLayout->pElementLayout); 4019 4020 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used 4021 * if they are consistent between the element layout and shader input signature. 4022 * "In general, data passed between pipeline stages is completely generic and is not uniquely 4023 * interpreted by the system; arbitrary semantics are allowed ..." 4024 * 4025 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number." 4026 * 4027 * System-Value semantics ("SV_*") between shaders require proper names of course. 4028 * But they are irrelevant for input attributes. 4029 */ 4030 pDXElementLayout->cElementDesc = pEntry->numDescs; 4031 for (uint32_t i = 0; i < pEntry->numDescs; ++i) 4032 { 4033 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i]; 4034 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i]; 4035 pDst->SemanticName = "ATTRIB"; 4036 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow. 4037 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format); 4038 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED); 4039 pDst->InputSlot = pSrc->inputSlot; 4040 pDst->AlignedByteOffset = pSrc->alignedByteOffset; 4041 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass; 4042 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate; 4043 } 4044 4045 return VINF_SUCCESS; 4046 } 4047 4048 4049 static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4050 { 4051 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4052 4053 RT_NOREF(pBackend, pDXContext); 4054 AssertFailed(); /** @todo Implement */ 4055 return VERR_NOT_IMPLEMENTED; 4056 } 4057 4058 4059 static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, 4060 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry) 4061 { 4062 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4063 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 4064 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2494 4065 2495 4066 RT_NOREF(pBackend); 2496 AssertFailed(); /** @todo Implement */ 2497 } 2498 2499 2500 static DECLCALLBACK(void) vmsvga3dDXSetRenderTargets(PVMSVGA3DSTATE p3dState) 2501 { 2502 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 4067 4068 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]); 4069 if (SUCCEEDED(hr)) 4070 return VINF_SUCCESS; 4071 return VERR_INVALID_STATE; 4072 } 4073 4074 4075 static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4076 { 4077 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4078 4079 RT_NOREF(pBackend, pDXContext); 4080 AssertFailed(); /** @todo Implement */ 4081 return VERR_NOT_IMPLEMENTED; 4082 } 4083 4084 4085 static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry) 4086 { 4087 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4088 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 4089 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2503 4090 2504 4091 RT_NOREF(pBackend); 2505 AssertFailed(); /** @todo Implement */ 2506 } 2507 2508 2509 static DECLCALLBACK(void) vmsvga3dDXSetBlendState(PVMSVGA3DSTATE p3dState) 2510 { 2511 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 4092 4093 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]); 4094 if (SUCCEEDED(hr)) 4095 return VINF_SUCCESS; 4096 return VERR_INVALID_STATE; 4097 } 4098 4099 4100 static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4101 { 4102 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4103 4104 RT_NOREF(pBackend, pDXContext); 4105 AssertFailed(); /** @todo Implement */ 4106 return VERR_NOT_IMPLEMENTED; 4107 } 4108 4109 4110 static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry) 4111 { 4112 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4113 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 4114 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2512 4115 2513 4116 RT_NOREF(pBackend); 2514 AssertFailed(); /** @todo Implement */ 2515 } 2516 2517 2518 static DECLCALLBACK(void) vmsvga3dDXSetDepthStencilState(PVMSVGA3DSTATE p3dState) 2519 { 2520 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 4117 4118 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]); 4119 if (SUCCEEDED(hr)) 4120 return VINF_SUCCESS; 4121 return VERR_INVALID_STATE; 4122 } 4123 4124 4125 static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4126 { 4127 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4128 4129 RT_NOREF(pBackend, pDXContext); 4130 AssertFailed(); /** @todo Implement */ 4131 return VERR_NOT_IMPLEMENTED; 4132 } 4133 4134 4135 static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry) 4136 { 4137 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4138 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 4139 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2521 4140 2522 4141 RT_NOREF(pBackend); 2523 AssertFailed(); /** @todo Implement */ 2524 } 2525 2526 2527 static DECLCALLBACK(void) vmsvga3dDXSetRasterizerState(PVMSVGA3DSTATE p3dState) 2528 { 2529 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 4142 4143 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]); 4144 if (SUCCEEDED(hr)) 4145 return VINF_SUCCESS; 4146 return VERR_INVALID_STATE; 4147 } 4148 4149 4150 static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4151 { 4152 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4153 4154 RT_NOREF(pBackend, pDXContext); 4155 AssertFailed(); /** @todo Implement */ 4156 return VERR_NOT_IMPLEMENTED; 4157 } 4158 4159 4160 static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader) 4161 { 4162 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 2530 4163 2531 4164 RT_NOREF(pBackend); 2532 AssertFailed(); /** @todo Implement */ 2533 } 2534 2535 2536 static DECLCALLBACK(void) vmsvga3dDXDefineQuery(PVMSVGA3DSTATE p3dState) 2537 { 2538 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 4165 4166 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id]; 4167 D3D_RELEASE(pDXShader->pShader); 4168 pDXShader->enmShaderType = pShader->type; 4169 pShader->u.pvBackendShader = pDXShader; 4170 return VINF_SUCCESS; 4171 } 4172 4173 4174 static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4175 { 4176 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4177 4178 RT_NOREF(pBackend, pDXContext); 4179 AssertFailed(); /** @todo Implement */ 4180 return VERR_NOT_IMPLEMENTED; 4181 } 4182 4183 4184 static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode) 4185 { 4186 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4187 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device; 4188 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE); 2539 4189 2540 4190 RT_NOREF(pBackend); 2541 AssertFailed(); /** @todo Implement */ 2542 } 2543 2544 2545 static DECLCALLBACK(void) vmsvga3dDXDestroyQuery(PVMSVGA3DSTATE p3dState) 2546 { 2547 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2548 2549 RT_NOREF(pBackend); 2550 AssertFailed(); /** @todo Implement */ 2551 } 2552 2553 2554 static DECLCALLBACK(void) vmsvga3dDXBindQuery(PVMSVGA3DSTATE p3dState) 2555 { 2556 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2557 2558 RT_NOREF(pBackend); 2559 AssertFailed(); /** @todo Implement */ 2560 } 2561 2562 2563 static DECLCALLBACK(void) vmsvga3dDXSetQueryOffset(PVMSVGA3DSTATE p3dState) 2564 { 2565 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2566 2567 RT_NOREF(pBackend); 2568 AssertFailed(); /** @todo Implement */ 2569 } 2570 2571 2572 static DECLCALLBACK(void) vmsvga3dDXBeginQuery(PVMSVGA3DSTATE p3dState) 2573 { 2574 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2575 2576 RT_NOREF(pBackend); 2577 AssertFailed(); /** @todo Implement */ 2578 } 2579 2580 2581 static DECLCALLBACK(void) vmsvga3dDXEndQuery(PVMSVGA3DSTATE p3dState) 2582 { 2583 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2584 2585 RT_NOREF(pBackend); 2586 AssertFailed(); /** @todo Implement */ 2587 } 2588 2589 2590 static DECLCALLBACK(void) vmsvga3dDXReadbackQuery(PVMSVGA3DSTATE p3dState) 2591 { 2592 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2593 2594 RT_NOREF(pBackend); 2595 AssertFailed(); /** @todo Implement */ 2596 } 2597 2598 2599 static DECLCALLBACK(void) vmsvga3dDXSetPredication(PVMSVGA3DSTATE p3dState) 2600 { 2601 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2602 2603 RT_NOREF(pBackend); 2604 AssertFailed(); /** @todo Implement */ 2605 } 2606 2607 2608 static DECLCALLBACK(void) vmsvga3dDXSetSOTargets(PVMSVGA3DSTATE p3dState) 2609 { 2610 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2611 2612 RT_NOREF(pBackend); 2613 AssertFailed(); /** @todo Implement */ 2614 } 2615 2616 2617 static DECLCALLBACK(void) vmsvga3dDXSetViewports(PVMSVGA3DSTATE p3dState) 2618 { 2619 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2620 2621 RT_NOREF(pBackend); 2622 AssertFailed(); /** @todo Implement */ 2623 } 2624 2625 2626 static DECLCALLBACK(void) vmsvga3dDXSetScissorRects(PVMSVGA3DSTATE p3dState) 2627 { 2628 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2629 2630 RT_NOREF(pBackend); 2631 AssertFailed(); /** @todo Implement */ 2632 } 2633 2634 2635 static DECLCALLBACK(void) vmsvga3dDXClearRenderTargetView(PVMSVGA3DSTATE p3dState) 2636 { 2637 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2638 2639 RT_NOREF(pBackend); 2640 AssertFailed(); /** @todo Implement */ 2641 } 2642 2643 2644 static DECLCALLBACK(void) vmsvga3dDXClearDepthStencilView(PVMSVGA3DSTATE p3dState) 2645 { 2646 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2647 2648 RT_NOREF(pBackend); 2649 AssertFailed(); /** @todo Implement */ 2650 } 2651 2652 2653 static DECLCALLBACK(void) vmsvga3dDXPredCopyRegion(PVMSVGA3DSTATE p3dState) 2654 { 2655 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2656 2657 RT_NOREF(pBackend); 2658 AssertFailed(); /** @todo Implement */ 2659 } 2660 2661 2662 static DECLCALLBACK(void) vmsvga3dDXPredCopy(PVMSVGA3DSTATE p3dState) 2663 { 2664 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2665 2666 RT_NOREF(pBackend); 2667 AssertFailed(); /** @todo Implement */ 2668 } 2669 2670 2671 static DECLCALLBACK(void) vmsvga3dDXPresentBlt(PVMSVGA3DSTATE p3dState) 2672 { 2673 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2674 2675 RT_NOREF(pBackend); 2676 AssertFailed(); /** @todo Implement */ 2677 } 2678 2679 2680 static DECLCALLBACK(void) vmsvga3dDXGenMips(PVMSVGA3DSTATE p3dState) 2681 { 2682 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2683 2684 RT_NOREF(pBackend); 2685 AssertFailed(); /** @todo Implement */ 2686 } 2687 2688 2689 static DECLCALLBACK(void) vmsvga3dDXUpdateSubResource(PVMSVGA3DSTATE p3dState) 2690 { 2691 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2692 2693 RT_NOREF(pBackend); 2694 AssertFailed(); /** @todo Implement */ 2695 } 2696 2697 2698 static DECLCALLBACK(void) vmsvga3dDXReadbackSubResource(PVMSVGA3DSTATE p3dState) 2699 { 2700 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2701 2702 RT_NOREF(pBackend); 2703 AssertFailed(); /** @todo Implement */ 2704 } 2705 2706 2707 static DECLCALLBACK(void) vmsvga3dDXInvalidateSubResource(PVMSVGA3DSTATE p3dState) 2708 { 2709 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2710 2711 RT_NOREF(pBackend); 2712 AssertFailed(); /** @todo Implement */ 2713 } 2714 2715 2716 static DECLCALLBACK(void) vmsvga3dDXDefineShaderResourceView(PVMSVGA3DSTATE p3dState) 2717 { 2718 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2719 2720 RT_NOREF(pBackend); 2721 AssertFailed(); /** @todo Implement */ 2722 } 2723 2724 2725 static DECLCALLBACK(void) vmsvga3dDXDestroyShaderResourceView(PVMSVGA3DSTATE p3dState) 2726 { 2727 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2728 2729 RT_NOREF(pBackend); 2730 AssertFailed(); /** @todo Implement */ 2731 } 2732 2733 2734 static DECLCALLBACK(void) vmsvga3dDXDefineRenderTargetView(PVMSVGA3DSTATE p3dState) 2735 { 2736 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2737 2738 RT_NOREF(pBackend); 2739 AssertFailed(); /** @todo Implement */ 2740 } 2741 2742 2743 static DECLCALLBACK(void) vmsvga3dDXDestroyRenderTargetView(PVMSVGA3DSTATE p3dState) 2744 { 2745 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2746 2747 RT_NOREF(pBackend); 2748 AssertFailed(); /** @todo Implement */ 2749 } 2750 2751 2752 static DECLCALLBACK(void) vmsvga3dDXDefineDepthStencilView(PVMSVGA3DSTATE p3dState) 2753 { 2754 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2755 2756 RT_NOREF(pBackend); 2757 AssertFailed(); /** @todo Implement */ 2758 } 2759 2760 2761 static DECLCALLBACK(void) vmsvga3dDXDestroyDepthStencilView(PVMSVGA3DSTATE p3dState) 2762 { 2763 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2764 2765 RT_NOREF(pBackend); 2766 AssertFailed(); /** @todo Implement */ 2767 } 2768 2769 2770 static DECLCALLBACK(void) vmsvga3dDXDefineElementLayout(PVMSVGA3DSTATE p3dState) 2771 { 2772 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2773 2774 RT_NOREF(pBackend); 2775 AssertFailed(); /** @todo Implement */ 2776 } 2777 2778 2779 static DECLCALLBACK(void) vmsvga3dDXDestroyElementLayout(PVMSVGA3DSTATE p3dState) 2780 { 2781 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2782 2783 RT_NOREF(pBackend); 2784 AssertFailed(); /** @todo Implement */ 2785 } 2786 2787 2788 static DECLCALLBACK(void) vmsvga3dDXDefineBlendState(PVMSVGA3DSTATE p3dState) 2789 { 2790 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2791 2792 RT_NOREF(pBackend); 2793 AssertFailed(); /** @todo Implement */ 2794 } 2795 2796 2797 static DECLCALLBACK(void) vmsvga3dDXDestroyBlendState(PVMSVGA3DSTATE p3dState) 2798 { 2799 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2800 2801 RT_NOREF(pBackend); 2802 AssertFailed(); /** @todo Implement */ 2803 } 2804 2805 2806 static DECLCALLBACK(void) vmsvga3dDXDefineDepthStencilState(PVMSVGA3DSTATE p3dState) 2807 { 2808 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2809 2810 RT_NOREF(pBackend); 2811 AssertFailed(); /** @todo Implement */ 2812 } 2813 2814 2815 static DECLCALLBACK(void) vmsvga3dDXDestroyDepthStencilState(PVMSVGA3DSTATE p3dState) 2816 { 2817 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2818 2819 RT_NOREF(pBackend); 2820 AssertFailed(); /** @todo Implement */ 2821 } 2822 2823 2824 static DECLCALLBACK(void) vmsvga3dDXDefineRasterizerState(PVMSVGA3DSTATE p3dState) 2825 { 2826 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2827 2828 RT_NOREF(pBackend); 2829 AssertFailed(); /** @todo Implement */ 2830 } 2831 2832 2833 static DECLCALLBACK(void) vmsvga3dDXDestroyRasterizerState(PVMSVGA3DSTATE p3dState) 2834 { 2835 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2836 2837 RT_NOREF(pBackend); 2838 AssertFailed(); /** @todo Implement */ 2839 } 2840 2841 2842 static DECLCALLBACK(void) vmsvga3dDXDefineSamplerState(PVMSVGA3DSTATE p3dState) 2843 { 2844 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2845 2846 RT_NOREF(pBackend); 2847 AssertFailed(); /** @todo Implement */ 2848 } 2849 2850 2851 static DECLCALLBACK(void) vmsvga3dDXDestroySamplerState(PVMSVGA3DSTATE p3dState) 2852 { 2853 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2854 2855 RT_NOREF(pBackend); 2856 AssertFailed(); /** @todo Implement */ 2857 } 2858 2859 2860 static DECLCALLBACK(void) vmsvga3dDXDefineShader(PVMSVGA3DSTATE p3dState) 2861 { 2862 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2863 2864 RT_NOREF(pBackend); 2865 AssertFailed(); /** @todo Implement */ 2866 } 2867 2868 2869 static DECLCALLBACK(void) vmsvga3dDXDestroyShader(PVMSVGA3DSTATE p3dState) 2870 { 2871 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2872 2873 RT_NOREF(pBackend); 2874 AssertFailed(); /** @todo Implement */ 2875 } 2876 2877 2878 static DECLCALLBACK(void) vmsvga3dDXBindShader(PVMSVGA3DSTATE p3dState) 2879 { 2880 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2881 2882 RT_NOREF(pBackend); 2883 AssertFailed(); /** @todo Implement */ 2884 } 2885 2886 2887 static DECLCALLBACK(void) vmsvga3dDXDefineStreamOutput(PVMSVGA3DSTATE p3dState) 2888 { 2889 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2890 2891 RT_NOREF(pBackend); 2892 AssertFailed(); /** @todo Implement */ 2893 } 2894 2895 2896 static DECLCALLBACK(void) vmsvga3dDXDestroyStreamOutput(PVMSVGA3DSTATE p3dState) 2897 { 2898 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2899 2900 RT_NOREF(pBackend); 2901 AssertFailed(); /** @todo Implement */ 2902 } 2903 2904 2905 static DECLCALLBACK(void) vmsvga3dDXSetStreamOutput(PVMSVGA3DSTATE p3dState) 2906 { 2907 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2908 2909 RT_NOREF(pBackend); 2910 AssertFailed(); /** @todo Implement */ 2911 } 2912 2913 2914 static DECLCALLBACK(void) vmsvga3dDXSetCOTable(PVMSVGA3DSTATE p3dState) 2915 { 2916 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2917 2918 RT_NOREF(pBackend); 2919 AssertFailed(); /** @todo Implement */ 2920 } 2921 2922 2923 static DECLCALLBACK(void) vmsvga3dDXReadbackCOTable(PVMSVGA3DSTATE p3dState) 2924 { 2925 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2926 2927 RT_NOREF(pBackend); 2928 AssertFailed(); /** @todo Implement */ 2929 } 2930 2931 2932 static DECLCALLBACK(void) vmsvga3dDXBufferCopy(PVMSVGA3DSTATE p3dState) 2933 { 2934 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2935 2936 RT_NOREF(pBackend); 2937 AssertFailed(); /** @todo Implement */ 2938 } 2939 2940 2941 static DECLCALLBACK(void) vmsvga3dDXTransferFromBuffer(PVMSVGA3DSTATE p3dState) 2942 { 2943 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2944 2945 RT_NOREF(pBackend); 2946 AssertFailed(); /** @todo Implement */ 2947 } 2948 2949 2950 static DECLCALLBACK(void) vmsvga3dDXSurfaceCopyAndReadback(PVMSVGA3DSTATE p3dState) 2951 { 2952 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2953 2954 RT_NOREF(pBackend); 2955 AssertFailed(); /** @todo Implement */ 2956 } 2957 2958 2959 static DECLCALLBACK(void) vmsvga3dDXMoveQuery(PVMSVGA3DSTATE p3dState) 2960 { 2961 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2962 2963 RT_NOREF(pBackend); 2964 AssertFailed(); /** @todo Implement */ 2965 } 2966 2967 2968 static DECLCALLBACK(void) vmsvga3dDXBindAllQuery(PVMSVGA3DSTATE p3dState) 2969 { 2970 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2971 2972 RT_NOREF(pBackend); 2973 AssertFailed(); /** @todo Implement */ 2974 } 2975 2976 2977 static DECLCALLBACK(void) vmsvga3dDXReadbackAllQuery(PVMSVGA3DSTATE p3dState) 2978 { 2979 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2980 2981 RT_NOREF(pBackend); 2982 AssertFailed(); /** @todo Implement */ 2983 } 2984 2985 2986 static DECLCALLBACK(void) vmsvga3dDXPredTransferFromBuffer(PVMSVGA3DSTATE p3dState) 2987 { 2988 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2989 2990 RT_NOREF(pBackend); 2991 AssertFailed(); /** @todo Implement */ 2992 } 2993 2994 2995 static DECLCALLBACK(void) vmsvga3dDXMobFence64(PVMSVGA3DSTATE p3dState) 2996 { 2997 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 2998 2999 RT_NOREF(pBackend); 3000 AssertFailed(); /** @todo Implement */ 3001 } 3002 3003 3004 static DECLCALLBACK(void) vmsvga3dDXBindAllShader(PVMSVGA3DSTATE p3dState) 3005 { 3006 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3007 3008 RT_NOREF(pBackend); 3009 AssertFailed(); /** @todo Implement */ 3010 } 3011 3012 3013 static DECLCALLBACK(void) vmsvga3dDXHint(PVMSVGA3DSTATE p3dState) 3014 { 3015 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3016 3017 RT_NOREF(pBackend); 3018 AssertFailed(); /** @todo Implement */ 3019 } 3020 3021 3022 static DECLCALLBACK(void) vmsvga3dDXBufferUpdate(PVMSVGA3DSTATE p3dState) 3023 { 3024 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3025 3026 RT_NOREF(pBackend); 3027 AssertFailed(); /** @todo Implement */ 3028 } 3029 3030 3031 static DECLCALLBACK(void) vmsvga3dDXSetVSConstantBufferOffset(PVMSVGA3DSTATE p3dState) 3032 { 3033 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3034 3035 RT_NOREF(pBackend); 3036 AssertFailed(); /** @todo Implement */ 3037 } 3038 3039 3040 static DECLCALLBACK(void) vmsvga3dDXSetPSConstantBufferOffset(PVMSVGA3DSTATE p3dState) 3041 { 3042 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3043 3044 RT_NOREF(pBackend); 3045 AssertFailed(); /** @todo Implement */ 3046 } 3047 3048 3049 static DECLCALLBACK(void) vmsvga3dDXSetGSConstantBufferOffset(PVMSVGA3DSTATE p3dState) 3050 { 3051 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3052 3053 RT_NOREF(pBackend); 3054 AssertFailed(); /** @todo Implement */ 3055 } 3056 3057 3058 static DECLCALLBACK(void) vmsvga3dDXSetHSConstantBufferOffset(PVMSVGA3DSTATE p3dState) 3059 { 3060 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3061 3062 RT_NOREF(pBackend); 3063 AssertFailed(); /** @todo Implement */ 3064 } 3065 3066 3067 static DECLCALLBACK(void) vmsvga3dDXSetDSConstantBufferOffset(PVMSVGA3DSTATE p3dState) 3068 { 3069 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3070 3071 RT_NOREF(pBackend); 3072 AssertFailed(); /** @todo Implement */ 3073 } 3074 3075 3076 static DECLCALLBACK(void) vmsvga3dDXSetCSConstantBufferOffset(PVMSVGA3DSTATE p3dState) 3077 { 3078 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3079 3080 RT_NOREF(pBackend); 3081 AssertFailed(); /** @todo Implement */ 3082 } 3083 3084 3085 static DECLCALLBACK(void) vmsvga3dDXCondBindAllShader(PVMSVGA3DSTATE p3dState) 3086 { 3087 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3088 3089 RT_NOREF(pBackend); 3090 AssertFailed(); /** @todo Implement */ 3091 } 3092 3093 3094 static DECLCALLBACK(void) vmsvga3dScreenCopy(PVMSVGA3DSTATE p3dState) 3095 { 3096 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3097 3098 RT_NOREF(pBackend); 3099 AssertFailed(); /** @todo Implement */ 3100 } 3101 3102 3103 static DECLCALLBACK(void) vmsvga3dGrowOTable(PVMSVGA3DSTATE p3dState) 3104 { 3105 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3106 3107 RT_NOREF(pBackend); 3108 AssertFailed(); /** @todo Implement */ 3109 } 3110 3111 3112 static DECLCALLBACK(void) vmsvga3dDXGrowCOTable(PVMSVGA3DSTATE p3dState) 3113 { 3114 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3115 3116 RT_NOREF(pBackend); 3117 AssertFailed(); /** @todo Implement */ 3118 } 3119 3120 3121 static DECLCALLBACK(void) vmsvga3dIntraSurfaceCopy(PVMSVGA3DSTATE p3dState) 3122 { 3123 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3124 3125 RT_NOREF(pBackend); 3126 AssertFailed(); /** @todo Implement */ 3127 } 3128 3129 3130 static DECLCALLBACK(void) vmsvga3dDefineGBSurface_v3(PVMSVGA3DSTATE p3dState) 3131 { 3132 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3133 3134 RT_NOREF(pBackend); 3135 AssertFailed(); /** @todo Implement */ 3136 } 3137 3138 3139 static DECLCALLBACK(void) vmsvga3dDXResolveCopy(PVMSVGA3DSTATE p3dState) 3140 { 3141 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3142 3143 RT_NOREF(pBackend); 3144 AssertFailed(); /** @todo Implement */ 3145 } 3146 3147 3148 static DECLCALLBACK(void) vmsvga3dDXPredResolveCopy(PVMSVGA3DSTATE p3dState) 3149 { 3150 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3151 3152 RT_NOREF(pBackend); 3153 AssertFailed(); /** @todo Implement */ 3154 } 3155 3156 3157 static DECLCALLBACK(void) vmsvga3dDXPredConvertRegion(PVMSVGA3DSTATE p3dState) 3158 { 3159 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3160 3161 RT_NOREF(pBackend); 3162 AssertFailed(); /** @todo Implement */ 3163 } 3164 3165 3166 static DECLCALLBACK(void) vmsvga3dDXPredConvert(PVMSVGA3DSTATE p3dState) 3167 { 3168 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3169 3170 RT_NOREF(pBackend); 3171 AssertFailed(); /** @todo Implement */ 3172 } 3173 3174 3175 static DECLCALLBACK(void) vmsvga3dWholeSurfaceCopy(PVMSVGA3DSTATE p3dState) 3176 { 3177 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3178 3179 RT_NOREF(pBackend); 3180 AssertFailed(); /** @todo Implement */ 3181 } 3182 3183 3184 static DECLCALLBACK(void) vmsvga3dDXDefineUAView(PVMSVGA3DSTATE p3dState) 3185 { 3186 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3187 3188 RT_NOREF(pBackend); 3189 AssertFailed(); /** @todo Implement */ 3190 } 3191 3192 3193 static DECLCALLBACK(void) vmsvga3dDXDestroyUAView(PVMSVGA3DSTATE p3dState) 3194 { 3195 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3196 3197 RT_NOREF(pBackend); 3198 AssertFailed(); /** @todo Implement */ 3199 } 3200 3201 3202 static DECLCALLBACK(void) vmsvga3dDXClearUAViewUint(PVMSVGA3DSTATE p3dState) 3203 { 3204 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3205 3206 RT_NOREF(pBackend); 3207 AssertFailed(); /** @todo Implement */ 3208 } 3209 3210 3211 static DECLCALLBACK(void) vmsvga3dDXClearUAViewFloat(PVMSVGA3DSTATE p3dState) 3212 { 3213 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3214 3215 RT_NOREF(pBackend); 3216 AssertFailed(); /** @todo Implement */ 3217 } 3218 3219 3220 static DECLCALLBACK(void) vmsvga3dDXCopyStructureCount(PVMSVGA3DSTATE p3dState) 3221 { 3222 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3223 3224 RT_NOREF(pBackend); 3225 AssertFailed(); /** @todo Implement */ 3226 } 3227 3228 3229 static DECLCALLBACK(void) vmsvga3dDXSetUAViews(PVMSVGA3DSTATE p3dState) 3230 { 3231 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3232 3233 RT_NOREF(pBackend); 3234 AssertFailed(); /** @todo Implement */ 3235 } 3236 3237 3238 static DECLCALLBACK(void) vmsvga3dDXDrawIndexedInstancedIndirect(PVMSVGA3DSTATE p3dState) 3239 { 3240 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3241 3242 RT_NOREF(pBackend); 3243 AssertFailed(); /** @todo Implement */ 3244 } 3245 3246 3247 static DECLCALLBACK(void) vmsvga3dDXDrawInstancedIndirect(PVMSVGA3DSTATE p3dState) 3248 { 3249 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3250 3251 RT_NOREF(pBackend); 3252 AssertFailed(); /** @todo Implement */ 3253 } 3254 3255 3256 static DECLCALLBACK(void) vmsvga3dDXDispatch(PVMSVGA3DSTATE p3dState) 3257 { 3258 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3259 3260 RT_NOREF(pBackend); 3261 AssertFailed(); /** @todo Implement */ 3262 } 3263 3264 3265 static DECLCALLBACK(void) vmsvga3dDXDispatchIndirect(PVMSVGA3DSTATE p3dState) 3266 { 3267 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3268 3269 RT_NOREF(pBackend); 3270 AssertFailed(); /** @todo Implement */ 3271 } 3272 3273 3274 static DECLCALLBACK(void) vmsvga3dWriteZeroSurface(PVMSVGA3DSTATE p3dState) 3275 { 3276 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3277 3278 RT_NOREF(pBackend); 3279 AssertFailed(); /** @todo Implement */ 3280 } 3281 3282 3283 static DECLCALLBACK(void) vmsvga3dHintZeroSurface(PVMSVGA3DSTATE p3dState) 3284 { 3285 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3286 3287 RT_NOREF(pBackend); 3288 AssertFailed(); /** @todo Implement */ 3289 } 3290 3291 3292 static DECLCALLBACK(void) vmsvga3dDXTransferToBuffer(PVMSVGA3DSTATE p3dState) 3293 { 3294 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3295 3296 RT_NOREF(pBackend); 3297 AssertFailed(); /** @todo Implement */ 3298 } 3299 3300 3301 static DECLCALLBACK(void) vmsvga3dDXSetStructureCount(PVMSVGA3DSTATE p3dState) 3302 { 3303 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3304 3305 RT_NOREF(pBackend); 3306 AssertFailed(); /** @todo Implement */ 3307 } 3308 3309 3310 static DECLCALLBACK(void) vmsvga3dLogicOpsBitBlt(PVMSVGA3DSTATE p3dState) 3311 { 3312 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3313 3314 RT_NOREF(pBackend); 3315 AssertFailed(); /** @todo Implement */ 3316 } 3317 3318 3319 static DECLCALLBACK(void) vmsvga3dLogicOpsTransBlt(PVMSVGA3DSTATE p3dState) 3320 { 3321 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3322 3323 RT_NOREF(pBackend); 3324 AssertFailed(); /** @todo Implement */ 3325 } 3326 3327 3328 static DECLCALLBACK(void) vmsvga3dLogicOpsStretchBlt(PVMSVGA3DSTATE p3dState) 3329 { 3330 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3331 3332 RT_NOREF(pBackend); 3333 AssertFailed(); /** @todo Implement */ 3334 } 3335 3336 3337 static DECLCALLBACK(void) vmsvga3dLogicOpsColorFill(PVMSVGA3DSTATE p3dState) 3338 { 3339 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3340 3341 RT_NOREF(pBackend); 3342 AssertFailed(); /** @todo Implement */ 3343 } 3344 3345 3346 static DECLCALLBACK(void) vmsvga3dLogicOpsAlphaBlend(PVMSVGA3DSTATE p3dState) 3347 { 3348 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3349 3350 RT_NOREF(pBackend); 3351 AssertFailed(); /** @todo Implement */ 3352 } 3353 3354 3355 static DECLCALLBACK(void) vmsvga3dLogicOpsClearTypeBlend(PVMSVGA3DSTATE p3dState) 3356 { 3357 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3358 3359 RT_NOREF(pBackend); 3360 AssertFailed(); /** @todo Implement */ 3361 } 3362 3363 3364 static DECLCALLBACK(void) vmsvga3dDefineGBSurface_v4(PVMSVGA3DSTATE p3dState) 3365 { 3366 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3367 3368 RT_NOREF(pBackend); 3369 AssertFailed(); /** @todo Implement */ 3370 } 3371 3372 3373 static DECLCALLBACK(void) vmsvga3dDXSetCSUAViews(PVMSVGA3DSTATE p3dState) 3374 { 3375 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3376 3377 RT_NOREF(pBackend); 3378 AssertFailed(); /** @todo Implement */ 3379 } 3380 3381 3382 static DECLCALLBACK(void) vmsvga3dDXSetMinLOD(PVMSVGA3DSTATE p3dState) 3383 { 3384 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3385 3386 RT_NOREF(pBackend); 3387 AssertFailed(); /** @todo Implement */ 3388 } 3389 3390 3391 static DECLCALLBACK(void) vmsvga3dDXDefineDepthStencilView_v2(PVMSVGA3DSTATE p3dState) 3392 { 3393 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3394 3395 RT_NOREF(pBackend); 3396 AssertFailed(); /** @todo Implement */ 3397 } 3398 3399 3400 static DECLCALLBACK(void) vmsvga3dDXDefineStreamOutputWithMob(PVMSVGA3DSTATE p3dState) 3401 { 3402 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3403 3404 RT_NOREF(pBackend); 3405 AssertFailed(); /** @todo Implement */ 3406 } 3407 3408 3409 static DECLCALLBACK(void) vmsvga3dDXSetShaderIface(PVMSVGA3DSTATE p3dState) 3410 { 3411 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3412 3413 RT_NOREF(pBackend); 3414 AssertFailed(); /** @todo Implement */ 3415 } 3416 3417 3418 static DECLCALLBACK(void) vmsvga3dDXBindStreamOutput(PVMSVGA3DSTATE p3dState) 3419 { 3420 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3421 3422 RT_NOREF(pBackend); 3423 AssertFailed(); /** @todo Implement */ 3424 } 3425 3426 3427 static DECLCALLBACK(void) vmsvga3dSurfaceStretchBltNonMSToMS(PVMSVGA3DSTATE p3dState) 3428 { 3429 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3430 3431 RT_NOREF(pBackend); 3432 AssertFailed(); /** @todo Implement */ 3433 } 3434 3435 3436 static DECLCALLBACK(void) vmsvga3dDXBindShaderIface(PVMSVGA3DSTATE p3dState) 3437 { 3438 PVMSVGA3DBACKEND pBackend = p3dState->pBackend; 3439 3440 RT_NOREF(pBackend); 3441 AssertFailed(); /** @todo Implement */ 4191 4192 int rc = VINF_SUCCESS; 4193 4194 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id]; 4195 if (pDXShader->pvDXBC) 4196 { 4197 RTMemFree(pDXShader->pvDXBC); 4198 pDXShader->pvDXBC = NULL; 4199 pDXShader->cbDXBC = 0; 4200 } 4201 4202 if (pvShaderBytecode) 4203 { 4204 #ifdef LOG_ENABLED 4205 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType)); 4206 uint8_t *pu8 = (uint8_t *)pvShaderBytecode; 4207 for (uint32_t i = 0; i < pShader->cbData; ++i) 4208 { 4209 if ((i % 16) == 0) 4210 { 4211 if (i > 0) 4212 Log((",\n")); 4213 4214 Log((" %#04x", pu8[i])); 4215 } 4216 else 4217 { 4218 Log((", %#04x", pu8[i])); 4219 } 4220 } 4221 Log(("\n")); 4222 #endif 4223 4224 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC); 4225 if (RT_SUCCESS(rc)) 4226 { 4227 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader); 4228 if (FAILED(hr)) 4229 rc = VERR_INVALID_STATE; 4230 } 4231 else 4232 rc = VERR_NO_MEMORY; 4233 } 4234 4235 return rc; 4236 } 4237 4238 4239 static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4240 { 4241 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4242 4243 RT_NOREF(pBackend, pDXContext); 4244 AssertFailed(); /** @todo Implement */ 4245 return VERR_NOT_IMPLEMENTED; 4246 } 4247 4248 4249 static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4250 { 4251 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4252 4253 RT_NOREF(pBackend, pDXContext); 4254 AssertFailed(); /** @todo Implement */ 4255 return VERR_NOT_IMPLEMENTED; 4256 } 4257 4258 4259 static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4260 { 4261 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4262 4263 RT_NOREF(pBackend, pDXContext); 4264 AssertFailed(); /** @todo Implement */ 4265 return VERR_NOT_IMPLEMENTED; 4266 } 4267 4268 static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries) 4269 { 4270 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4271 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext; 4272 4273 RT_NOREF(pBackend, pDXContext, type); 4274 4275 int rc = VINF_SUCCESS; 4276 4277 /* Allocate paBlendState for example. */ 4278 switch (type) 4279 { 4280 case SVGA_COTABLE_RTVIEW: 4281 if (pBackendDXContext->papRenderTargetView) 4282 { 4283 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView); 4284 RTMemFree(pBackendDXContext->papRenderTargetView); 4285 pBackendDXContext->papRenderTargetView = NULL; 4286 pBackendDXContext->cRenderTargetView = 0; 4287 } 4288 4289 if (cEntries) 4290 { 4291 pBackendDXContext->papRenderTargetView = (ID3D11RenderTargetView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papRenderTargetView[0])); 4292 AssertBreakStmt(pBackendDXContext->papRenderTargetView, rc = VERR_NO_MEMORY); 4293 pBackendDXContext->cRenderTargetView = cEntries; 4294 } 4295 break; 4296 case SVGA_COTABLE_DSVIEW: 4297 if (pBackendDXContext->papDepthStencilView) 4298 { 4299 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView); 4300 RTMemFree(pBackendDXContext->papDepthStencilView); 4301 pBackendDXContext->papDepthStencilView = NULL; 4302 pBackendDXContext->cDepthStencilView = 0; 4303 } 4304 4305 if (cEntries) 4306 { 4307 pBackendDXContext->papDepthStencilView = (ID3D11DepthStencilView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papDepthStencilView[0])); 4308 AssertBreakStmt(pBackendDXContext->papDepthStencilView, rc = VERR_NO_MEMORY); 4309 pBackendDXContext->cDepthStencilView = cEntries; 4310 } 4311 break; 4312 case SVGA_COTABLE_SRVIEW: 4313 if (pBackendDXContext->papShaderResourceView) 4314 { 4315 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView); 4316 RTMemFree(pBackendDXContext->papShaderResourceView); 4317 pBackendDXContext->papShaderResourceView = NULL; 4318 pBackendDXContext->cShaderResourceView = 0; 4319 } 4320 4321 if (cEntries) 4322 { 4323 pBackendDXContext->papShaderResourceView = (ID3D11ShaderResourceView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papShaderResourceView[0])); 4324 AssertBreakStmt(pBackendDXContext->papShaderResourceView, rc = VERR_NO_MEMORY); 4325 pBackendDXContext->cShaderResourceView = cEntries; 4326 } 4327 break; 4328 case SVGA_COTABLE_ELEMENTLAYOUT: 4329 if (pBackendDXContext->paElementLayout) 4330 { 4331 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i) 4332 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout); 4333 RTMemFree(pBackendDXContext->paElementLayout); 4334 pBackendDXContext->paElementLayout = NULL; 4335 pBackendDXContext->cElementLayout = 0; 4336 } 4337 4338 if (cEntries) 4339 { 4340 pBackendDXContext->paElementLayout = (DXELEMENTLAYOUT *)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->paElementLayout[0])); 4341 AssertBreakStmt(pBackendDXContext->paElementLayout, rc = VERR_NO_MEMORY); 4342 pBackendDXContext->cElementLayout = cEntries; 4343 } 4344 break; 4345 case SVGA_COTABLE_BLENDSTATE: 4346 if (pBackendDXContext->papBlendState) 4347 { 4348 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState); 4349 RTMemFree(pBackendDXContext->papBlendState); 4350 pBackendDXContext->papBlendState = NULL; 4351 pBackendDXContext->cBlendState = 0; 4352 } 4353 4354 if (cEntries) 4355 { 4356 pBackendDXContext->papBlendState = (ID3D11BlendState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papBlendState[0])); 4357 AssertBreakStmt(pBackendDXContext->papBlendState, rc = VERR_NO_MEMORY); 4358 pBackendDXContext->cBlendState = cEntries; 4359 } 4360 break; 4361 case SVGA_COTABLE_DEPTHSTENCIL: 4362 if (pBackendDXContext->papDepthStencilState) 4363 { 4364 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState); 4365 RTMemFree(pBackendDXContext->papDepthStencilState); 4366 pBackendDXContext->papDepthStencilState = NULL; 4367 pBackendDXContext->cDepthStencilState = 0; 4368 } 4369 4370 if (cEntries) 4371 { 4372 pBackendDXContext->papDepthStencilState = (ID3D11DepthStencilState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papDepthStencilState[0])); 4373 AssertBreakStmt(pBackendDXContext->papDepthStencilState, rc = VERR_NO_MEMORY); 4374 pBackendDXContext->cDepthStencilState = cEntries; 4375 } 4376 break; 4377 case SVGA_COTABLE_RASTERIZERSTATE: 4378 if (pBackendDXContext->papRasterizerState) 4379 { 4380 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState); 4381 RTMemFree(pBackendDXContext->papRasterizerState); 4382 pBackendDXContext->papRasterizerState = NULL; 4383 pBackendDXContext->cRasterizerState = 0; 4384 } 4385 4386 if (cEntries) 4387 { 4388 pBackendDXContext->papRasterizerState = (ID3D11RasterizerState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papRasterizerState[0])); 4389 AssertBreakStmt(pBackendDXContext->papRasterizerState, rc = VERR_NO_MEMORY); 4390 pBackendDXContext->cRasterizerState = cEntries; 4391 } 4392 break; 4393 case SVGA_COTABLE_SAMPLER: 4394 if (pBackendDXContext->papSamplerState) 4395 { 4396 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState); 4397 RTMemFree(pBackendDXContext->papSamplerState); 4398 pBackendDXContext->papSamplerState = NULL; 4399 pBackendDXContext->cSamplerState = 0; 4400 } 4401 4402 if (cEntries) 4403 { 4404 pBackendDXContext->papSamplerState = (ID3D11SamplerState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papSamplerState[0])); 4405 AssertBreakStmt(pBackendDXContext->papSamplerState, rc = VERR_NO_MEMORY); 4406 pBackendDXContext->cSamplerState = cEntries; 4407 } 4408 break; 4409 case SVGA_COTABLE_STREAMOUTPUT: 4410 //AssertFailed(); /** @todo Implement */ 4411 break; 4412 case SVGA_COTABLE_DXQUERY: 4413 if (pBackendDXContext->papQuery) 4414 { 4415 DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery); 4416 RTMemFree(pBackendDXContext->papQuery); 4417 pBackendDXContext->papQuery = NULL; 4418 pBackendDXContext->cQuery = 0; 4419 } 4420 4421 if (cEntries) 4422 { 4423 pBackendDXContext->papQuery = (ID3D11Query **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papQuery[0])); 4424 AssertBreakStmt(pBackendDXContext->papQuery, rc = VERR_NO_MEMORY); 4425 pBackendDXContext->cQuery = cEntries; 4426 } 4427 break; 4428 case SVGA_COTABLE_DXSHADER: 4429 if (pBackendDXContext->paShader) 4430 { 4431 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i) 4432 D3D_RELEASE(pBackendDXContext->paShader[i].pShader); 4433 RTMemFree(pBackendDXContext->paShader); 4434 pBackendDXContext->paShader = NULL; 4435 pBackendDXContext->cShader = 0; 4436 } 4437 4438 if (cEntries) 4439 { 4440 pBackendDXContext->paShader = (DXSHADER *)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->paShader[0])); 4441 AssertBreakStmt(pBackendDXContext->paShader, rc = VERR_NO_MEMORY); 4442 pBackendDXContext->cShader = cEntries; 4443 } 4444 break; 4445 case SVGA_COTABLE_UAVIEW: 4446 AssertFailed(); /** @todo Implement */ 4447 break; 4448 case SVGA_COTABLE_MAX: break; /* Compiler warning */ 4449 } 4450 return rc; 4451 } 4452 4453 4454 static DECLCALLBACK(int) vmsvga3dBackDXReadbackCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4455 { 4456 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4457 4458 RT_NOREF(pBackend, pDXContext); 4459 AssertFailed(); /** @todo Implement */ 4460 return VERR_NOT_IMPLEMENTED; 4461 } 4462 4463 4464 static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4465 { 4466 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4467 4468 RT_NOREF(pBackend, pDXContext); 4469 AssertFailed(); /** @todo Implement */ 4470 return VERR_NOT_IMPLEMENTED; 4471 } 4472 4473 4474 static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4475 { 4476 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4477 4478 RT_NOREF(pBackend, pDXContext); 4479 AssertFailed(); /** @todo Implement */ 4480 return VERR_NOT_IMPLEMENTED; 4481 } 4482 4483 4484 static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4485 { 4486 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4487 4488 RT_NOREF(pBackend, pDXContext); 4489 AssertFailed(); /** @todo Implement */ 4490 return VERR_NOT_IMPLEMENTED; 4491 } 4492 4493 4494 static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4495 { 4496 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4497 4498 RT_NOREF(pBackend, pDXContext); 4499 AssertFailed(); /** @todo Implement */ 4500 return VERR_NOT_IMPLEMENTED; 4501 } 4502 4503 4504 static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4505 { 4506 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4507 4508 RT_NOREF(pBackend, pDXContext); 4509 AssertFailed(); /** @todo Implement */ 4510 return VERR_NOT_IMPLEMENTED; 4511 } 4512 4513 4514 static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4515 { 4516 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4517 4518 RT_NOREF(pBackend, pDXContext); 4519 AssertFailed(); /** @todo Implement */ 4520 return VERR_NOT_IMPLEMENTED; 4521 } 4522 4523 4524 static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4525 { 4526 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4527 4528 RT_NOREF(pBackend, pDXContext); 4529 AssertFailed(); /** @todo Implement */ 4530 return VERR_NOT_IMPLEMENTED; 4531 } 4532 4533 4534 static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4535 { 4536 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4537 4538 RT_NOREF(pBackend, pDXContext); 4539 AssertFailed(); /** @todo Implement */ 4540 return VERR_NOT_IMPLEMENTED; 4541 } 4542 4543 4544 static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4545 { 4546 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4547 4548 RT_NOREF(pBackend, pDXContext); 4549 AssertFailed(); /** @todo Implement */ 4550 return VERR_NOT_IMPLEMENTED; 4551 } 4552 4553 4554 static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4555 { 4556 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4557 4558 RT_NOREF(pBackend, pDXContext); 4559 AssertFailed(); /** @todo Implement */ 4560 return VERR_NOT_IMPLEMENTED; 4561 } 4562 4563 4564 static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4565 { 4566 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4567 4568 RT_NOREF(pBackend, pDXContext); 4569 AssertFailed(); /** @todo Implement */ 4570 return VERR_NOT_IMPLEMENTED; 4571 } 4572 4573 4574 static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4575 { 4576 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4577 4578 RT_NOREF(pBackend, pDXContext); 4579 AssertFailed(); /** @todo Implement */ 4580 return VERR_NOT_IMPLEMENTED; 4581 } 4582 4583 4584 static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4585 { 4586 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4587 4588 RT_NOREF(pBackend, pDXContext); 4589 AssertFailed(); /** @todo Implement */ 4590 return VERR_NOT_IMPLEMENTED; 4591 } 4592 4593 4594 static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4595 { 4596 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4597 4598 RT_NOREF(pBackend, pDXContext); 4599 AssertFailed(); /** @todo Implement */ 4600 return VERR_NOT_IMPLEMENTED; 4601 } 4602 4603 4604 static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4605 { 4606 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4607 4608 RT_NOREF(pBackend, pDXContext); 4609 AssertFailed(); /** @todo Implement */ 4610 return VERR_NOT_IMPLEMENTED; 4611 } 4612 4613 4614 static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4615 { 4616 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4617 4618 RT_NOREF(pBackend, pDXContext); 4619 AssertFailed(); /** @todo Implement */ 4620 return VERR_NOT_IMPLEMENTED; 4621 } 4622 4623 4624 static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4625 { 4626 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4627 4628 RT_NOREF(pBackend, pDXContext); 4629 AssertFailed(); /** @todo Implement */ 4630 return VERR_NOT_IMPLEMENTED; 4631 } 4632 4633 4634 static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4635 { 4636 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4637 4638 RT_NOREF(pBackend, pDXContext); 4639 AssertFailed(); /** @todo Implement */ 4640 return VERR_NOT_IMPLEMENTED; 4641 } 4642 4643 4644 static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4645 { 4646 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4647 4648 RT_NOREF(pBackend, pDXContext); 4649 AssertFailed(); /** @todo Implement */ 4650 return VERR_NOT_IMPLEMENTED; 4651 } 4652 4653 4654 static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4655 { 4656 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4657 4658 RT_NOREF(pBackend, pDXContext); 4659 AssertFailed(); /** @todo Implement */ 4660 return VERR_NOT_IMPLEMENTED; 4661 } 4662 4663 4664 static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4665 { 4666 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4667 4668 RT_NOREF(pBackend, pDXContext); 4669 AssertFailed(); /** @todo Implement */ 4670 return VERR_NOT_IMPLEMENTED; 4671 } 4672 4673 4674 static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4675 { 4676 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4677 4678 RT_NOREF(pBackend, pDXContext); 4679 AssertFailed(); /** @todo Implement */ 4680 return VERR_NOT_IMPLEMENTED; 4681 } 4682 4683 4684 static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4685 { 4686 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4687 4688 RT_NOREF(pBackend, pDXContext); 4689 AssertFailed(); /** @todo Implement */ 4690 return VERR_NOT_IMPLEMENTED; 4691 } 4692 4693 4694 static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4695 { 4696 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4697 4698 RT_NOREF(pBackend, pDXContext); 4699 AssertFailed(); /** @todo Implement */ 4700 return VERR_NOT_IMPLEMENTED; 4701 } 4702 4703 4704 static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4705 { 4706 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4707 4708 RT_NOREF(pBackend, pDXContext); 4709 AssertFailed(); /** @todo Implement */ 4710 return VERR_NOT_IMPLEMENTED; 4711 } 4712 4713 4714 static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4715 { 4716 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4717 4718 RT_NOREF(pBackend, pDXContext); 4719 AssertFailed(); /** @todo Implement */ 4720 return VERR_NOT_IMPLEMENTED; 4721 } 4722 4723 4724 static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4725 { 4726 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4727 4728 RT_NOREF(pBackend, pDXContext); 4729 AssertFailed(); /** @todo Implement */ 4730 return VERR_NOT_IMPLEMENTED; 4731 } 4732 4733 4734 static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4735 { 4736 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4737 4738 RT_NOREF(pBackend, pDXContext); 4739 AssertFailed(); /** @todo Implement */ 4740 return VERR_NOT_IMPLEMENTED; 4741 } 4742 4743 4744 static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4745 { 4746 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4747 4748 RT_NOREF(pBackend, pDXContext); 4749 AssertFailed(); /** @todo Implement */ 4750 return VERR_NOT_IMPLEMENTED; 4751 } 4752 4753 4754 static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4755 { 4756 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4757 4758 RT_NOREF(pBackend, pDXContext); 4759 AssertFailed(); /** @todo Implement */ 4760 return VERR_NOT_IMPLEMENTED; 4761 } 4762 4763 4764 static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4765 { 4766 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4767 4768 RT_NOREF(pBackend, pDXContext); 4769 AssertFailed(); /** @todo Implement */ 4770 return VERR_NOT_IMPLEMENTED; 4771 } 4772 4773 4774 static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4775 { 4776 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4777 4778 RT_NOREF(pBackend, pDXContext); 4779 AssertFailed(); /** @todo Implement */ 4780 return VERR_NOT_IMPLEMENTED; 4781 } 4782 4783 4784 static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4785 { 4786 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4787 4788 RT_NOREF(pBackend, pDXContext); 4789 AssertFailed(); /** @todo Implement */ 4790 return VERR_NOT_IMPLEMENTED; 4791 } 4792 4793 4794 static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4795 { 4796 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4797 4798 RT_NOREF(pBackend, pDXContext); 4799 AssertFailed(); /** @todo Implement */ 4800 return VERR_NOT_IMPLEMENTED; 4801 } 4802 4803 4804 static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4805 { 4806 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4807 4808 RT_NOREF(pBackend, pDXContext); 4809 AssertFailed(); /** @todo Implement */ 4810 return VERR_NOT_IMPLEMENTED; 4811 } 4812 4813 4814 static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4815 { 4816 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4817 4818 RT_NOREF(pBackend, pDXContext); 4819 AssertFailed(); /** @todo Implement */ 4820 return VERR_NOT_IMPLEMENTED; 4821 } 4822 4823 4824 static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4825 { 4826 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4827 4828 RT_NOREF(pBackend, pDXContext); 4829 AssertFailed(); /** @todo Implement */ 4830 return VERR_NOT_IMPLEMENTED; 4831 } 4832 4833 4834 static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4835 { 4836 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4837 4838 RT_NOREF(pBackend, pDXContext); 4839 AssertFailed(); /** @todo Implement */ 4840 return VERR_NOT_IMPLEMENTED; 4841 } 4842 4843 4844 static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4845 { 4846 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4847 4848 RT_NOREF(pBackend, pDXContext); 4849 AssertFailed(); /** @todo Implement */ 4850 return VERR_NOT_IMPLEMENTED; 4851 } 4852 4853 4854 static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4855 { 4856 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4857 4858 RT_NOREF(pBackend, pDXContext); 4859 AssertFailed(); /** @todo Implement */ 4860 return VERR_NOT_IMPLEMENTED; 4861 } 4862 4863 4864 static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4865 { 4866 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4867 4868 RT_NOREF(pBackend, pDXContext); 4869 AssertFailed(); /** @todo Implement */ 4870 return VERR_NOT_IMPLEMENTED; 4871 } 4872 4873 4874 static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4875 { 4876 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4877 4878 RT_NOREF(pBackend, pDXContext); 4879 AssertFailed(); /** @todo Implement */ 4880 return VERR_NOT_IMPLEMENTED; 4881 } 4882 4883 4884 static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4885 { 4886 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4887 4888 RT_NOREF(pBackend, pDXContext); 4889 AssertFailed(); /** @todo Implement */ 4890 return VERR_NOT_IMPLEMENTED; 4891 } 4892 4893 4894 static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4895 { 4896 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4897 4898 RT_NOREF(pBackend, pDXContext); 4899 AssertFailed(); /** @todo Implement */ 4900 return VERR_NOT_IMPLEMENTED; 4901 } 4902 4903 4904 static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4905 { 4906 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4907 4908 RT_NOREF(pBackend, pDXContext); 4909 AssertFailed(); /** @todo Implement */ 4910 return VERR_NOT_IMPLEMENTED; 4911 } 4912 4913 4914 static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4915 { 4916 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4917 4918 RT_NOREF(pBackend, pDXContext); 4919 AssertFailed(); /** @todo Implement */ 4920 return VERR_NOT_IMPLEMENTED; 4921 } 4922 4923 4924 static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4925 { 4926 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4927 4928 RT_NOREF(pBackend, pDXContext); 4929 AssertFailed(); /** @todo Implement */ 4930 return VERR_NOT_IMPLEMENTED; 4931 } 4932 4933 4934 static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4935 { 4936 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4937 4938 RT_NOREF(pBackend, pDXContext); 4939 AssertFailed(); /** @todo Implement */ 4940 return VERR_NOT_IMPLEMENTED; 4941 } 4942 4943 4944 static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4945 { 4946 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4947 4948 RT_NOREF(pBackend, pDXContext); 4949 AssertFailed(); /** @todo Implement */ 4950 return VERR_NOT_IMPLEMENTED; 4951 } 4952 4953 4954 static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4955 { 4956 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4957 4958 RT_NOREF(pBackend, pDXContext); 4959 AssertFailed(); /** @todo Implement */ 4960 return VERR_NOT_IMPLEMENTED; 4961 } 4962 4963 4964 static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4965 { 4966 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4967 4968 RT_NOREF(pBackend, pDXContext); 4969 AssertFailed(); /** @todo Implement */ 4970 return VERR_NOT_IMPLEMENTED; 4971 } 4972 4973 4974 static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4975 { 4976 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4977 4978 RT_NOREF(pBackend, pDXContext); 4979 AssertFailed(); /** @todo Implement */ 4980 return VERR_NOT_IMPLEMENTED; 4981 } 4982 4983 4984 static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4985 { 4986 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4987 4988 RT_NOREF(pBackend, pDXContext); 4989 AssertFailed(); /** @todo Implement */ 4990 return VERR_NOT_IMPLEMENTED; 4991 } 4992 4993 4994 static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 4995 { 4996 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 4997 4998 RT_NOREF(pBackend, pDXContext); 4999 AssertFailed(); /** @todo Implement */ 5000 return VERR_NOT_IMPLEMENTED; 5001 } 5002 5003 5004 static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 5005 { 5006 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 5007 5008 RT_NOREF(pBackend, pDXContext); 5009 AssertFailed(); /** @todo Implement */ 5010 return VERR_NOT_IMPLEMENTED; 5011 } 5012 5013 5014 static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 5015 { 5016 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 5017 5018 RT_NOREF(pBackend, pDXContext); 5019 AssertFailed(); /** @todo Implement */ 5020 return VERR_NOT_IMPLEMENTED; 5021 } 5022 5023 5024 static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext) 5025 { 5026 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 5027 5028 RT_NOREF(pBackend, pDXContext); 5029 AssertFailed(); /** @todo Implement */ 5030 return VERR_NOT_IMPLEMENTED; 3442 5031 } 3443 5032 … … 3448 5037 AssertReturn(p3dState, VERR_NOT_SUPPORTED); 3449 5038 3450 PVMSVGA3DBACKEND pBackend = p 3dState->pBackend;5039 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend; 3451 5040 AssertReturn(pBackend, VERR_NOT_SUPPORTED); 3452 5041 … … 3462 5051 { 3463 5052 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs; 3464 p->pfnDXDefineContext = vmsvga3d DXDefineContext;3465 p->pfnDXDestroyContext = vmsvga3d DXDestroyContext;3466 p->pfnDXBindContext = vmsvga3d DXBindContext;3467 p->pfnDXReadbackContext = vmsvga3d DXReadbackContext;3468 p->pfnDXInvalidateContext = vmsvga3d DXInvalidateContext;3469 p->pfnDXSetSingleConstantBuffer = vmsvga3d DXSetSingleConstantBuffer;3470 p->pfnDXSetShaderResources = vmsvga3d DXSetShaderResources;3471 p->pfnDXSetShader = vmsvga3d DXSetShader;3472 p->pfnDXSetSamplers = vmsvga3d DXSetSamplers;3473 p->pfnDXDraw = vmsvga3d DXDraw;3474 p->pfnDXDrawIndexed = vmsvga3d DXDrawIndexed;3475 p->pfnDXDrawInstanced = vmsvga3d DXDrawInstanced;3476 p->pfnDXDrawIndexedInstanced = vmsvga3d DXDrawIndexedInstanced;3477 p->pfnDXDrawAuto = vmsvga3d DXDrawAuto;3478 p->pfnDXSetInputLayout = vmsvga3d DXSetInputLayout;3479 p->pfnDXSetVertexBuffers = vmsvga3d DXSetVertexBuffers;3480 p->pfnDXSetIndexBuffer = vmsvga3d DXSetIndexBuffer;3481 p->pfnDXSetTopology = vmsvga3d DXSetTopology;3482 p->pfnDXSetRenderTargets = vmsvga3d DXSetRenderTargets;3483 p->pfnDXSetBlendState = vmsvga3d DXSetBlendState;3484 p->pfnDXSetDepthStencilState = vmsvga3d DXSetDepthStencilState;3485 p->pfnDXSetRasterizerState = vmsvga3d DXSetRasterizerState;3486 p->pfnDXDefineQuery = vmsvga3d DXDefineQuery;3487 p->pfnDXDestroyQuery = vmsvga3d DXDestroyQuery;3488 p->pfnDXBindQuery = vmsvga3d DXBindQuery;3489 p->pfnDXSetQueryOffset = vmsvga3d DXSetQueryOffset;3490 p->pfnDXBeginQuery = vmsvga3d DXBeginQuery;3491 p->pfnDXEndQuery = vmsvga3d DXEndQuery;3492 p->pfnDXReadbackQuery = vmsvga3d DXReadbackQuery;3493 p->pfnDXSetPredication = vmsvga3d DXSetPredication;3494 p->pfnDXSetSOTargets = vmsvga3d DXSetSOTargets;3495 p->pfnDXSetViewports = vmsvga3d DXSetViewports;3496 p->pfnDXSetScissorRects = vmsvga3d DXSetScissorRects;3497 p->pfnDXClearRenderTargetView = vmsvga3d DXClearRenderTargetView;3498 p->pfnDXClearDepthStencilView = vmsvga3d DXClearDepthStencilView;3499 p->pfnDXPredCopyRegion = vmsvga3d DXPredCopyRegion;3500 p->pfnDXPredCopy = vmsvga3d DXPredCopy;3501 p->pfnDXPresentBlt = vmsvga3d DXPresentBlt;3502 p->pfnDXGenMips = vmsvga3d DXGenMips;3503 p->pfnDXUpdateSubResource = vmsvga3d DXUpdateSubResource;3504 p->pfnDXReadbackSubResource = vmsvga3d DXReadbackSubResource;3505 p->pfnDXInvalidateSubResource = vmsvga3d DXInvalidateSubResource;3506 p->pfnDXDefineShaderResourceView = vmsvga3d DXDefineShaderResourceView;3507 p->pfnDXDestroyShaderResourceView = vmsvga3d DXDestroyShaderResourceView;3508 p->pfnDXDefineRenderTargetView = vmsvga3d DXDefineRenderTargetView;3509 p->pfnDXDestroyRenderTargetView = vmsvga3d DXDestroyRenderTargetView;3510 p->pfnDXDefineDepthStencilView = vmsvga3d DXDefineDepthStencilView;3511 p->pfnDXDestroyDepthStencilView = vmsvga3d DXDestroyDepthStencilView;3512 p->pfnDXDefineElementLayout = vmsvga3d DXDefineElementLayout;3513 p->pfnDXDestroyElementLayout = vmsvga3d DXDestroyElementLayout;3514 p->pfnDXDefineBlendState = vmsvga3d DXDefineBlendState;3515 p->pfnDXDestroyBlendState = vmsvga3d DXDestroyBlendState;3516 p->pfnDXDefineDepthStencilState = vmsvga3d DXDefineDepthStencilState;3517 p->pfnDXDestroyDepthStencilState = vmsvga3d DXDestroyDepthStencilState;3518 p->pfnDXDefineRasterizerState = vmsvga3d DXDefineRasterizerState;3519 p->pfnDXDestroyRasterizerState = vmsvga3d DXDestroyRasterizerState;3520 p->pfnDXDefineSamplerState = vmsvga3d DXDefineSamplerState;3521 p->pfnDXDestroySamplerState = vmsvga3d DXDestroySamplerState;3522 p->pfnDXDefineShader = vmsvga3d DXDefineShader;3523 p->pfnDXDestroyShader = vmsvga3d DXDestroyShader;3524 p->pfnDXBindShader = vmsvga3d DXBindShader;3525 p->pfnDXDefineStreamOutput = vmsvga3d DXDefineStreamOutput;3526 p->pfnDXDestroyStreamOutput = vmsvga3d DXDestroyStreamOutput;3527 p->pfnDXSetStreamOutput = vmsvga3d DXSetStreamOutput;3528 p->pfnDXSetCOTable = vmsvga3d DXSetCOTable;3529 p->pfnDXReadbackCOTable = vmsvga3d DXReadbackCOTable;3530 p->pfnDXBufferCopy = vmsvga3d DXBufferCopy;3531 p->pfnDXTransferFromBuffer = vmsvga3d DXTransferFromBuffer;3532 p->pfnDXSurfaceCopyAndReadback = vmsvga3d DXSurfaceCopyAndReadback;3533 p->pfnDXMoveQuery = vmsvga3d DXMoveQuery;3534 p->pfnDXBindAllQuery = vmsvga3d DXBindAllQuery;3535 p->pfnDXReadbackAllQuery = vmsvga3d DXReadbackAllQuery;3536 p->pfnDXPredTransferFromBuffer = vmsvga3d DXPredTransferFromBuffer;3537 p->pfnDXMobFence64 = vmsvga3d DXMobFence64;3538 p->pfnDXBindAllShader = vmsvga3d DXBindAllShader;3539 p->pfnDXHint = vmsvga3d DXHint;3540 p->pfnDXBufferUpdate = vmsvga3d DXBufferUpdate;3541 p->pfnDXSetVSConstantBufferOffset = vmsvga3d DXSetVSConstantBufferOffset;3542 p->pfnDXSetPSConstantBufferOffset = vmsvga3d DXSetPSConstantBufferOffset;3543 p->pfnDXSetGSConstantBufferOffset = vmsvga3d DXSetGSConstantBufferOffset;3544 p->pfnDXSetHSConstantBufferOffset = vmsvga3d DXSetHSConstantBufferOffset;3545 p->pfnDXSetDSConstantBufferOffset = vmsvga3d DXSetDSConstantBufferOffset;3546 p->pfnDXSetCSConstantBufferOffset = vmsvga3d DXSetCSConstantBufferOffset;3547 p->pfnDXCondBindAllShader = vmsvga3d DXCondBindAllShader;3548 p->pfnScreenCopy = vmsvga3d ScreenCopy;3549 p->pfnGrowOTable = vmsvga3d GrowOTable;3550 p->pfnDXGrowCOTable = vmsvga3d DXGrowCOTable;3551 p->pfnIntraSurfaceCopy = vmsvga3d IntraSurfaceCopy;3552 p->pfnDefineGBSurface_v3 = vmsvga3d DefineGBSurface_v3;3553 p->pfnDXResolveCopy = vmsvga3d DXResolveCopy;3554 p->pfnDXPredResolveCopy = vmsvga3d DXPredResolveCopy;3555 p->pfnDXPredConvertRegion = vmsvga3d DXPredConvertRegion;3556 p->pfnDXPredConvert = vmsvga3d DXPredConvert;3557 p->pfnWholeSurfaceCopy = vmsvga3d WholeSurfaceCopy;3558 p->pfnDXDefineUAView = vmsvga3d DXDefineUAView;3559 p->pfnDXDestroyUAView = vmsvga3d DXDestroyUAView;3560 p->pfnDXClearUAViewUint = vmsvga3d DXClearUAViewUint;3561 p->pfnDXClearUAViewFloat = vmsvga3d DXClearUAViewFloat;3562 p->pfnDXCopyStructureCount = vmsvga3d DXCopyStructureCount;3563 p->pfnDXSetUAViews = vmsvga3d DXSetUAViews;3564 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3d DXDrawIndexedInstancedIndirect;3565 p->pfnDXDrawInstancedIndirect = vmsvga3d DXDrawInstancedIndirect;3566 p->pfnDXDispatch = vmsvga3d DXDispatch;3567 p->pfnDXDispatchIndirect = vmsvga3d DXDispatchIndirect;3568 p->pfnWriteZeroSurface = vmsvga3d WriteZeroSurface;3569 p->pfnHintZeroSurface = vmsvga3d HintZeroSurface;3570 p->pfnDXTransferToBuffer = vmsvga3d DXTransferToBuffer;3571 p->pfnDXSetStructureCount = vmsvga3d DXSetStructureCount;3572 p->pfnLogicOpsBitBlt = vmsvga3d LogicOpsBitBlt;3573 p->pfnLogicOpsTransBlt = vmsvga3d LogicOpsTransBlt;3574 p->pfnLogicOpsStretchBlt = vmsvga3d LogicOpsStretchBlt;3575 p->pfnLogicOpsColorFill = vmsvga3d LogicOpsColorFill;3576 p->pfnLogicOpsAlphaBlend = vmsvga3d LogicOpsAlphaBlend;3577 p->pfnLogicOpsClearTypeBlend = vmsvga3d LogicOpsClearTypeBlend;3578 p->pfnDefineGBSurface_v4 = vmsvga3d DefineGBSurface_v4;3579 p->pfnDXSetCSUAViews = vmsvga3d DXSetCSUAViews;3580 p->pfnDXSetMinLOD = vmsvga3d DXSetMinLOD;3581 p->pfnDXDefineDepthStencilView_v2 = vmsvga3d DXDefineDepthStencilView_v2;3582 p->pfnDXDefineStreamOutputWithMob = vmsvga3d DXDefineStreamOutputWithMob;3583 p->pfnDXSetShaderIface = vmsvga3d DXSetShaderIface;3584 p->pfnDXBindStreamOutput = vmsvga3d DXBindStreamOutput;3585 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3d SurfaceStretchBltNonMSToMS;3586 p->pfnDXBindShaderIface = vmsvga3d DXBindShaderIface;5053 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext; 5054 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext; 5055 p->pfnDXBindContext = vmsvga3dBackDXBindContext; 5056 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext; 5057 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext; 5058 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer; 5059 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources; 5060 p->pfnDXSetShader = vmsvga3dBackDXSetShader; 5061 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers; 5062 p->pfnDXDraw = vmsvga3dBackDXDraw; 5063 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed; 5064 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced; 5065 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced; 5066 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto; 5067 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout; 5068 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers; 5069 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer; 5070 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology; 5071 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets; 5072 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState; 5073 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState; 5074 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState; 5075 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery; 5076 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery; 5077 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery; 5078 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset; 5079 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery; 5080 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery; 5081 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery; 5082 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication; 5083 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets; 5084 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports; 5085 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects; 5086 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView; 5087 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView; 5088 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion; 5089 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy; 5090 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt; 5091 p->pfnDXGenMips = vmsvga3dBackDXGenMips; 5092 p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource; 5093 p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource; 5094 p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource; 5095 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView; 5096 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView; 5097 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView; 5098 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView; 5099 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView; 5100 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView; 5101 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout; 5102 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout; 5103 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState; 5104 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState; 5105 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState; 5106 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState; 5107 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState; 5108 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState; 5109 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState; 5110 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState; 5111 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader; 5112 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader; 5113 p->pfnDXBindShader = vmsvga3dBackDXBindShader; 5114 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput; 5115 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput; 5116 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput; 5117 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable; 5118 p->pfnDXReadbackCOTable = vmsvga3dBackDXReadbackCOTable; 5119 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy; 5120 p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer; 5121 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback; 5122 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery; 5123 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery; 5124 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery; 5125 p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer; 5126 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64; 5127 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader; 5128 p->pfnDXHint = vmsvga3dBackDXHint; 5129 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate; 5130 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset; 5131 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset; 5132 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset; 5133 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset; 5134 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset; 5135 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset; 5136 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader; 5137 p->pfnScreenCopy = vmsvga3dBackScreenCopy; 5138 p->pfnGrowOTable = vmsvga3dBackGrowOTable; 5139 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable; 5140 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy; 5141 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3; 5142 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy; 5143 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy; 5144 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion; 5145 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert; 5146 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy; 5147 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView; 5148 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView; 5149 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint; 5150 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat; 5151 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount; 5152 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews; 5153 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect; 5154 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect; 5155 p->pfnDXDispatch = vmsvga3dBackDXDispatch; 5156 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect; 5157 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface; 5158 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface; 5159 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer; 5160 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount; 5161 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt; 5162 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt; 5163 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt; 5164 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill; 5165 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend; 5166 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend; 5167 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4; 5168 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews; 5169 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD; 5170 p->pfnDXDefineDepthStencilView_v2 = vmsvga3dBackDXDefineDepthStencilView_v2; 5171 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob; 5172 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface; 5173 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput; 5174 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS; 5175 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface; 3587 5176 } 3588 5177 } -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win.cpp
r86905 r88787 6172 6172 } 6173 6173 6174 int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs) 6175 { 6176 RT_NOREF(pThisCC, pszInterfaceName, pvInterfaceFuncs, cbInterfaceFuncs); 6177 return VERR_NOT_IMPLEMENTED; 6178 } -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp
r87110 r88787 96 96 pSurface->idWeakContextAssociation = SVGA3D_INVALID_ID; 97 97 pSurface->oglId.buffer = OPENGL_INVALID_ID; 98 #elif defined(VMSVGA3D_DX) 98 #elif defined(VMSVGA3D_D3D11) 99 pSurface->idAssociatedContext = SVGA3D_INVALID_ID; 99 100 // pSurface->pBackendSurface = NULL; 100 101 #else /* VMSVGA3D_DIRECT3D */ … … 104 105 #endif 105 106 106 /** @todo This 'switch' and the su fraceFlags tweaks should not be necessary.107 /** @todo This 'switch' and the surfaceFlags tweaks should not be necessary. 107 108 * The actual surface type will be figured out when the surface is actually used later. 108 109 * The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value. … … 295 296 /* pSurface->bounce.pTexture = NULL; */ 296 297 /* pSurface->emulated.pTexture = NULL; */ 297 #elif defined(VMSVGA3D_D X)298 #elif defined(VMSVGA3D_D3D11) 298 299 /* Nothing, because all backend specific data reside in pSurface->pBackendSurface. */ 299 300 #else … … 514 515 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */ 515 516 vmsvga3dSurfaceFlush(pSurface); 516 #elif defined(VMSVGA3D_D X)517 #elif defined(VMSVGA3D_D3D11) 517 518 /** @todo */ 518 519 #else /* VMSVGA3D_OPENGL */ … … 999 1000 return vmsvga3dBackDestroyScreen(pThisCC, pScreen); 1000 1001 } 1002 1003 int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap) 1004 { 1005 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState; 1006 AssertReturn(pState, VERR_INVALID_STATE); 1007 1008 PVMSVGA3DSURFACE pSurface; 1009 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface); 1010 AssertRCReturn(rc, rc); 1011 1012 if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID) 1013 { 1014 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i) 1015 { 1016 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i]; 1017 pMipmapLevel->fDirty = true; 1018 } 1019 } 1020 else 1021 { 1022 PVMSVGA3DMIPMAPLEVEL pMipmapLevel; 1023 rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel); 1024 AssertRCReturn(rc, rc); 1025 1026 pMipmapLevel->fDirty = true; 1027 } 1028 pSurface->fDirty = true; 1029 1030 return rc; 1031 } -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h
r86905 r88787 129 129 int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult); 130 130 int vmsvga3dQueryWait(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult); 131 132 int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap); 131 133 132 134 /* DevVGA-SVGA3d-shared.h: */ … … 270 272 typedef struct 271 273 { 272 DECLCALLBACKMEMBER(int, pfnScreenTargetBind, (PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid));273 DECLCALLBACKMEMBER(int, pfnScreenTargetUpdate, (PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect));274 DECLCALLBACKMEMBER(int, pfnScreenTargetBind, (PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)); 275 DECLCALLBACKMEMBER(int, pfnScreenTargetUpdate, (PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)); 274 276 } VMSVGA3DBACKENDFUNCSGBO; 275 277 … … 281 283 } VMSVGA3DBACKENDFUNCSMAP; 282 284 285 typedef struct VMSVGA3DSHADER *PVMSVGA3DSHADER; 286 typedef struct VMSVGA3DDXCONTEXT *PVMSVGA3DDXCONTEXT; 283 287 #define VMSVGA3D_BACKEND_INTERFACE_NAME_DX "DX" 284 288 typedef struct 285 289 { 286 DECLCALLBACKMEMBER( void, pfnDXDefineContext, (PVMSVGA3DSTATE p3dState));287 DECLCALLBACKMEMBER( void, pfnDXDestroyContext, (PVMSVGA3DSTATE p3dState));288 DECLCALLBACKMEMBER( void, pfnDXBindContext, (PVMSVGA3DSTATE p3dState));289 DECLCALLBACKMEMBER( void, pfnDXReadbackContext, (PVMSVGA3DSTATE p3dState));290 DECLCALLBACKMEMBER( void, pfnDXInvalidateContext, (PVMSVGA3DSTATE p3dState));291 DECLCALLBACKMEMBER( void, pfnDXSetSingleConstantBuffer, (PVMSVGA3DSTATE p3dState));292 DECLCALLBACKMEMBER( void, pfnDXSetShaderResources, (PVMSVGA3DSTATE p3dState));293 DECLCALLBACKMEMBER( void, pfnDXSetShader, (PVMSVGA3DSTATE p3dState));294 DECLCALLBACKMEMBER( void, pfnDXSetSamplers, (PVMSVGA3DSTATE p3dState));295 DECLCALLBACKMEMBER( void, pfnDXDraw, (PVMSVGA3DSTATE p3dState));296 DECLCALLBACKMEMBER( void, pfnDXDrawIndexed, (PVMSVGA3DSTATE p3dState));297 DECLCALLBACKMEMBER( void, pfnDXDrawInstanced, (PVMSVGA3DSTATE p3dState));298 DECLCALLBACKMEMBER( void, pfnDXDrawIndexedInstanced, (PVMSVGA3DSTATE p3dState));299 DECLCALLBACKMEMBER( void, pfnDXDrawAuto, (PVMSVGA3DSTATE p3dState));300 DECLCALLBACKMEMBER( void, pfnDXSetInputLayout, (PVMSVGA3DSTATE p3dState));301 DECLCALLBACKMEMBER( void, pfnDXSetVertexBuffers, (PVMSVGA3DSTATE p3dState));302 DECLCALLBACKMEMBER( void, pfnDXSetIndexBuffer, (PVMSVGA3DSTATE p3dState));303 DECLCALLBACKMEMBER( void, pfnDXSetTopology, (PVMSVGA3DSTATE p3dState));304 DECLCALLBACKMEMBER( void, pfnDXSetRenderTargets, (PVMSVGA3DSTATE p3dState));305 DECLCALLBACKMEMBER( void, pfnDXSetBlendState, (PVMSVGA3DSTATE p3dState));306 DECLCALLBACKMEMBER( void, pfnDXSetDepthStencilState, (PVMSVGA3DSTATE p3dState));307 DECLCALLBACKMEMBER( void, pfnDXSetRasterizerState, (PVMSVGA3DSTATE p3dState));308 DECLCALLBACKMEMBER( void, pfnDXDefineQuery, (PVMSVGA3DSTATE p3dState));309 DECLCALLBACKMEMBER( void, pfnDXDestroyQuery, (PVMSVGA3DSTATE p3dState));310 DECLCALLBACKMEMBER( void, pfnDXBindQuery, (PVMSVGA3DSTATE p3dState));311 DECLCALLBACKMEMBER( void, pfnDXSetQueryOffset, (PVMSVGA3DSTATE p3dState));312 DECLCALLBACKMEMBER( void, pfnDXBeginQuery, (PVMSVGA3DSTATE p3dState));313 DECLCALLBACKMEMBER( void, pfnDXEndQuery, (PVMSVGA3DSTATE p3dState));314 DECLCALLBACKMEMBER( void, pfnDXReadbackQuery, (PVMSVGA3DSTATE p3dState));315 DECLCALLBACKMEMBER( void, pfnDXSetPredication, (PVMSVGA3DSTATE p3dState));316 DECLCALLBACKMEMBER( void, pfnDXSetSOTargets, (PVMSVGA3DSTATE p3dState));317 DECLCALLBACKMEMBER( void, pfnDXSetViewports, (PVMSVGA3DSTATE p3dState));318 DECLCALLBACKMEMBER( void, pfnDXSetScissorRects, (PVMSVGA3DSTATE p3dState));319 DECLCALLBACKMEMBER( void, pfnDXClearRenderTargetView, (PVMSVGA3DSTATE p3dState));320 DECLCALLBACKMEMBER( void, pfnDXClearDepthStencilView, (PVMSVGA3DSTATE p3dState));321 DECLCALLBACKMEMBER( void, pfnDXPredCopyRegion, (PVMSVGA3DSTATE p3dState));322 DECLCALLBACKMEMBER( void, pfnDXPredCopy, (PVMSVGA3DSTATE p3dState));323 DECLCALLBACKMEMBER( void, pfnDXPresentBlt, (PVMSVGA3DSTATE p3dState));324 DECLCALLBACKMEMBER( void, pfnDXGenMips, (PVMSVGA3DSTATE p3dState));325 DECLCALLBACKMEMBER( void, pfnDXUpdateSubResource, (PVMSVGA3DSTATE p3dState));326 DECLCALLBACKMEMBER( void, pfnDXReadbackSubResource, (PVMSVGA3DSTATE p3dState));327 DECLCALLBACKMEMBER( void, pfnDXInvalidateSubResource, (PVMSVGA3DSTATE p3dState));328 DECLCALLBACKMEMBER( void, pfnDXDefineShaderResourceView, (PVMSVGA3DSTATE p3dState));329 DECLCALLBACKMEMBER( void, pfnDXDestroyShaderResourceView, (PVMSVGA3DSTATE p3dState));330 DECLCALLBACKMEMBER( void, pfnDXDefineRenderTargetView, (PVMSVGA3DSTATE p3dState));331 DECLCALLBACKMEMBER( void, pfnDXDestroyRenderTargetView, (PVMSVGA3DSTATE p3dState));332 DECLCALLBACKMEMBER( void, pfnDXDefineDepthStencilView, (PVMSVGA3DSTATE p3dState));333 DECLCALLBACKMEMBER( void, pfnDXDestroyDepthStencilView, (PVMSVGA3DSTATE p3dState));334 DECLCALLBACKMEMBER( void, pfnDXDefineElementLayout, (PVMSVGA3DSTATE p3dState));335 DECLCALLBACKMEMBER( void, pfnDXDestroyElementLayout, (PVMSVGA3DSTATE p3dState));336 DECLCALLBACKMEMBER( void, pfnDXDefineBlendState, (PVMSVGA3DSTATE p3dState));337 DECLCALLBACKMEMBER( void, pfnDXDestroyBlendState, (PVMSVGA3DSTATE p3dState));338 DECLCALLBACKMEMBER( void, pfnDXDefineDepthStencilState, (PVMSVGA3DSTATE p3dState));339 DECLCALLBACKMEMBER( void, pfnDXDestroyDepthStencilState, (PVMSVGA3DSTATE p3dState));340 DECLCALLBACKMEMBER( void, pfnDXDefineRasterizerState, (PVMSVGA3DSTATE p3dState));341 DECLCALLBACKMEMBER( void, pfnDXDestroyRasterizerState, (PVMSVGA3DSTATE p3dState));342 DECLCALLBACKMEMBER( void, pfnDXDefineSamplerState, (PVMSVGA3DSTATE p3dState));343 DECLCALLBACKMEMBER( void, pfnDXDestroySamplerState, (PVMSVGA3DSTATE p3dState));344 DECLCALLBACKMEMBER( void, pfnDXDefineShader, (PVMSVGA3DSTATE p3dState));345 DECLCALLBACKMEMBER( void, pfnDXDestroyShader, (PVMSVGA3DSTATE p3dState));346 DECLCALLBACKMEMBER( void, pfnDXBindShader, (PVMSVGA3DSTATE p3dState));347 DECLCALLBACKMEMBER( void, pfnDXDefineStreamOutput, (PVMSVGA3DSTATE p3dState));348 DECLCALLBACKMEMBER( void, pfnDXDestroyStreamOutput, (PVMSVGA3DSTATE p3dState));349 DECLCALLBACKMEMBER( void, pfnDXSetStreamOutput, (PVMSVGA3DSTATE p3dState));350 DECLCALLBACKMEMBER( void, pfnDXSetCOTable, (PVMSVGA3DSTATE p3dState));351 DECLCALLBACKMEMBER( void, pfnDXReadbackCOTable, (PVMSVGA3DSTATE p3dState));352 DECLCALLBACKMEMBER( void, pfnDXBufferCopy, (PVMSVGA3DSTATE p3dState));353 DECLCALLBACKMEMBER( void, pfnDXTransferFromBuffer, (PVMSVGA3DSTATE p3dState));354 DECLCALLBACKMEMBER( void, pfnDXSurfaceCopyAndReadback, (PVMSVGA3DSTATE p3dState));355 DECLCALLBACKMEMBER( void, pfnDXMoveQuery, (PVMSVGA3DSTATE p3dState));356 DECLCALLBACKMEMBER( void, pfnDXBindAllQuery, (PVMSVGA3DSTATE p3dState));357 DECLCALLBACKMEMBER( void, pfnDXReadbackAllQuery, (PVMSVGA3DSTATE p3dState));358 DECLCALLBACKMEMBER( void, pfnDXPredTransferFromBuffer, (PVMSVGA3DSTATE p3dState));359 DECLCALLBACKMEMBER( void, pfnDXMobFence64, (PVMSVGA3DSTATE p3dState));360 DECLCALLBACKMEMBER( void, pfnDXBindAllShader, (PVMSVGA3DSTATE p3dState));361 DECLCALLBACKMEMBER( void, pfnDXHint, (PVMSVGA3DSTATE p3dState));362 DECLCALLBACKMEMBER( void, pfnDXBufferUpdate, (PVMSVGA3DSTATE p3dState));363 DECLCALLBACKMEMBER( void, pfnDXSetVSConstantBufferOffset, (PVMSVGA3DSTATE p3dState));364 DECLCALLBACKMEMBER( void, pfnDXSetPSConstantBufferOffset, (PVMSVGA3DSTATE p3dState));365 DECLCALLBACKMEMBER( void, pfnDXSetGSConstantBufferOffset, (PVMSVGA3DSTATE p3dState));366 DECLCALLBACKMEMBER( void, pfnDXSetHSConstantBufferOffset, (PVMSVGA3DSTATE p3dState));367 DECLCALLBACKMEMBER( void, pfnDXSetDSConstantBufferOffset, (PVMSVGA3DSTATE p3dState));368 DECLCALLBACKMEMBER( void, pfnDXSetCSConstantBufferOffset, (PVMSVGA3DSTATE p3dState));369 DECLCALLBACKMEMBER( void, pfnDXCondBindAllShader, (PVMSVGA3DSTATE p3dState));370 DECLCALLBACKMEMBER( void, pfnScreenCopy, (PVMSVGA3DSTATE p3dState));371 DECLCALLBACKMEMBER( void, pfnGrowOTable, (PVMSVGA3DSTATE p3dState));372 DECLCALLBACKMEMBER( void, pfnDXGrowCOTable, (PVMSVGA3DSTATE p3dState));373 DECLCALLBACKMEMBER( void, pfnIntraSurfaceCopy, (PVMSVGA3DSTATE p3dState));374 DECLCALLBACKMEMBER( void, pfnDefineGBSurface_v3, (PVMSVGA3DSTATE p3dState));375 DECLCALLBACKMEMBER( void, pfnDXResolveCopy, (PVMSVGA3DSTATE p3dState));376 DECLCALLBACKMEMBER( void, pfnDXPredResolveCopy, (PVMSVGA3DSTATE p3dState));377 DECLCALLBACKMEMBER( void, pfnDXPredConvertRegion, (PVMSVGA3DSTATE p3dState));378 DECLCALLBACKMEMBER( void, pfnDXPredConvert, (PVMSVGA3DSTATE p3dState));379 DECLCALLBACKMEMBER( void, pfnWholeSurfaceCopy, (PVMSVGA3DSTATE p3dState));380 DECLCALLBACKMEMBER( void, pfnDXDefineUAView, (PVMSVGA3DSTATE p3dState));381 DECLCALLBACKMEMBER( void, pfnDXDestroyUAView, (PVMSVGA3DSTATE p3dState));382 DECLCALLBACKMEMBER( void, pfnDXClearUAViewUint, (PVMSVGA3DSTATE p3dState));383 DECLCALLBACKMEMBER( void, pfnDXClearUAViewFloat, (PVMSVGA3DSTATE p3dState));384 DECLCALLBACKMEMBER( void, pfnDXCopyStructureCount, (PVMSVGA3DSTATE p3dState));385 DECLCALLBACKMEMBER( void, pfnDXSetUAViews, (PVMSVGA3DSTATE p3dState));386 DECLCALLBACKMEMBER( void, pfnDXDrawIndexedInstancedIndirect, (PVMSVGA3DSTATE p3dState));387 DECLCALLBACKMEMBER( void, pfnDXDrawInstancedIndirect, (PVMSVGA3DSTATE p3dState));388 DECLCALLBACKMEMBER( void, pfnDXDispatch, (PVMSVGA3DSTATE p3dState));389 DECLCALLBACKMEMBER( void, pfnDXDispatchIndirect, (PVMSVGA3DSTATE p3dState));390 DECLCALLBACKMEMBER( void, pfnWriteZeroSurface, (PVMSVGA3DSTATE p3dState));391 DECLCALLBACKMEMBER( void, pfnHintZeroSurface, (PVMSVGA3DSTATE p3dState));392 DECLCALLBACKMEMBER( void, pfnDXTransferToBuffer, (PVMSVGA3DSTATE p3dState));393 DECLCALLBACKMEMBER( void, pfnDXSetStructureCount, (PVMSVGA3DSTATE p3dState));394 DECLCALLBACKMEMBER( void, pfnLogicOpsBitBlt, (PVMSVGA3DSTATE p3dState));395 DECLCALLBACKMEMBER( void, pfnLogicOpsTransBlt, (PVMSVGA3DSTATE p3dState));396 DECLCALLBACKMEMBER( void, pfnLogicOpsStretchBlt, (PVMSVGA3DSTATE p3dState));397 DECLCALLBACKMEMBER( void, pfnLogicOpsColorFill, (PVMSVGA3DSTATE p3dState));398 DECLCALLBACKMEMBER( void, pfnLogicOpsAlphaBlend, (PVMSVGA3DSTATE p3dState));399 DECLCALLBACKMEMBER( void, pfnLogicOpsClearTypeBlend, (PVMSVGA3DSTATE p3dState));400 DECLCALLBACKMEMBER( void, pfnDefineGBSurface_v4, (PVMSVGA3DSTATE p3dState));401 DECLCALLBACKMEMBER( void, pfnDXSetCSUAViews, (PVMSVGA3DSTATE p3dState));402 DECLCALLBACKMEMBER( void, pfnDXSetMinLOD, (PVMSVGA3DSTATE p3dState));403 DECLCALLBACKMEMBER( void, pfnDXDefineDepthStencilView_v2, (PVMSVGA3DSTATE p3dState));404 DECLCALLBACKMEMBER( void, pfnDXDefineStreamOutputWithMob, (PVMSVGA3DSTATE p3dState));405 DECLCALLBACKMEMBER( void, pfnDXSetShaderIface, (PVMSVGA3DSTATE p3dState));406 DECLCALLBACKMEMBER( void, pfnDXBindStreamOutput, (PVMSVGA3DSTATE p3dState));407 DECLCALLBACKMEMBER( void, pfnSurfaceStretchBltNonMSToMS, (PVMSVGA3DSTATE p3dState));408 DECLCALLBACKMEMBER( void, pfnDXBindShaderIface, (PVMSVGA3DSTATE p3dState));290 DECLCALLBACKMEMBER(int, pfnDXDefineContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 291 DECLCALLBACKMEMBER(int, pfnDXDestroyContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 292 DECLCALLBACKMEMBER(int, pfnDXBindContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 293 DECLCALLBACKMEMBER(int, pfnDXReadbackContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 294 DECLCALLBACKMEMBER(int, pfnDXInvalidateContext, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 295 DECLCALLBACKMEMBER(int, pfnDXSetSingleConstantBuffer, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)); 296 DECLCALLBACKMEMBER(int, pfnDXSetShaderResources, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 297 DECLCALLBACKMEMBER(int, pfnDXSetShader, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)); 298 DECLCALLBACKMEMBER(int, pfnDXSetSamplers, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)); 299 DECLCALLBACKMEMBER(int, pfnDXDraw, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)); 300 DECLCALLBACKMEMBER(int, pfnDXDrawIndexed, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)); 301 DECLCALLBACKMEMBER(int, pfnDXDrawInstanced, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 302 DECLCALLBACKMEMBER(int, pfnDXDrawIndexedInstanced, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 303 DECLCALLBACKMEMBER(int, pfnDXDrawAuto, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 304 DECLCALLBACKMEMBER(int, pfnDXSetInputLayout, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)); 305 DECLCALLBACKMEMBER(int, pfnDXSetVertexBuffers, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)); 306 DECLCALLBACKMEMBER(int, pfnDXSetIndexBuffer, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)); 307 DECLCALLBACKMEMBER(int, pfnDXSetTopology, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)); 308 DECLCALLBACKMEMBER(int, pfnDXSetRenderTargets, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)); 309 DECLCALLBACKMEMBER(int, pfnDXSetBlendState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)); 310 DECLCALLBACKMEMBER(int, pfnDXSetDepthStencilState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)); 311 DECLCALLBACKMEMBER(int, pfnDXSetRasterizerState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)); 312 DECLCALLBACKMEMBER(int, pfnDXDefineQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 313 DECLCALLBACKMEMBER(int, pfnDXDestroyQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 314 DECLCALLBACKMEMBER(int, pfnDXBindQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 315 DECLCALLBACKMEMBER(int, pfnDXSetQueryOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 316 DECLCALLBACKMEMBER(int, pfnDXBeginQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 317 DECLCALLBACKMEMBER(int, pfnDXEndQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 318 DECLCALLBACKMEMBER(int, pfnDXReadbackQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 319 DECLCALLBACKMEMBER(int, pfnDXSetPredication, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 320 DECLCALLBACKMEMBER(int, pfnDXSetSOTargets, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 321 DECLCALLBACKMEMBER(int, pfnDXSetViewports, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)); 322 DECLCALLBACKMEMBER(int, pfnDXSetScissorRects, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)); 323 DECLCALLBACKMEMBER(int, pfnDXClearRenderTargetView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 324 DECLCALLBACKMEMBER(int, pfnDXClearDepthStencilView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 325 DECLCALLBACKMEMBER(int, pfnDXPredCopyRegion, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 326 DECLCALLBACKMEMBER(int, pfnDXPredCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 327 DECLCALLBACKMEMBER(int, pfnDXPresentBlt, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 328 DECLCALLBACKMEMBER(int, pfnDXGenMips, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 329 DECLCALLBACKMEMBER(int, pfnDXUpdateSubResource, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 330 DECLCALLBACKMEMBER(int, pfnDXReadbackSubResource, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 331 DECLCALLBACKMEMBER(int, pfnDXInvalidateSubResource, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 332 DECLCALLBACKMEMBER(int, pfnDXDefineShaderResourceView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)); 333 DECLCALLBACKMEMBER(int, pfnDXDestroyShaderResourceView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 334 DECLCALLBACKMEMBER(int, pfnDXDefineRenderTargetView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)); 335 DECLCALLBACKMEMBER(int, pfnDXDestroyRenderTargetView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 336 DECLCALLBACKMEMBER(int, pfnDXDefineDepthStencilView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 337 DECLCALLBACKMEMBER(int, pfnDXDestroyDepthStencilView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 338 DECLCALLBACKMEMBER(int, pfnDXDefineElementLayout, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)); 339 DECLCALLBACKMEMBER(int, pfnDXDestroyElementLayout, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 340 DECLCALLBACKMEMBER(int, pfnDXDefineBlendState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)); 341 DECLCALLBACKMEMBER(int, pfnDXDestroyBlendState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 342 DECLCALLBACKMEMBER(int, pfnDXDefineDepthStencilState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)); 343 DECLCALLBACKMEMBER(int, pfnDXDestroyDepthStencilState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 344 DECLCALLBACKMEMBER(int, pfnDXDefineRasterizerState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)); 345 DECLCALLBACKMEMBER(int, pfnDXDestroyRasterizerState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 346 DECLCALLBACKMEMBER(int, pfnDXDefineSamplerState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)); 347 DECLCALLBACKMEMBER(int, pfnDXDestroySamplerState, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 348 DECLCALLBACKMEMBER(int, pfnDXDefineShader, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)); 349 DECLCALLBACKMEMBER(int, pfnDXDestroyShader, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 350 DECLCALLBACKMEMBER(int, pfnDXBindShader, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)); 351 DECLCALLBACKMEMBER(int, pfnDXDefineStreamOutput, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 352 DECLCALLBACKMEMBER(int, pfnDXDestroyStreamOutput, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 353 DECLCALLBACKMEMBER(int, pfnDXSetStreamOutput, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 354 DECLCALLBACKMEMBER(int, pfnDXSetCOTable, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries)); 355 DECLCALLBACKMEMBER(int, pfnDXReadbackCOTable, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 356 DECLCALLBACKMEMBER(int, pfnDXBufferCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 357 DECLCALLBACKMEMBER(int, pfnDXTransferFromBuffer, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 358 DECLCALLBACKMEMBER(int, pfnDXSurfaceCopyAndReadback, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 359 DECLCALLBACKMEMBER(int, pfnDXMoveQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 360 DECLCALLBACKMEMBER(int, pfnDXBindAllQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 361 DECLCALLBACKMEMBER(int, pfnDXReadbackAllQuery, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 362 DECLCALLBACKMEMBER(int, pfnDXPredTransferFromBuffer, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 363 DECLCALLBACKMEMBER(int, pfnDXMobFence64, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 364 DECLCALLBACKMEMBER(int, pfnDXBindAllShader, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 365 DECLCALLBACKMEMBER(int, pfnDXHint, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 366 DECLCALLBACKMEMBER(int, pfnDXBufferUpdate, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 367 DECLCALLBACKMEMBER(int, pfnDXSetVSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 368 DECLCALLBACKMEMBER(int, pfnDXSetPSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 369 DECLCALLBACKMEMBER(int, pfnDXSetGSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 370 DECLCALLBACKMEMBER(int, pfnDXSetHSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 371 DECLCALLBACKMEMBER(int, pfnDXSetDSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 372 DECLCALLBACKMEMBER(int, pfnDXSetCSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 373 DECLCALLBACKMEMBER(int, pfnDXCondBindAllShader, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 374 DECLCALLBACKMEMBER(int, pfnScreenCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 375 DECLCALLBACKMEMBER(int, pfnGrowOTable, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 376 DECLCALLBACKMEMBER(int, pfnDXGrowCOTable, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 377 DECLCALLBACKMEMBER(int, pfnIntraSurfaceCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 378 DECLCALLBACKMEMBER(int, pfnDefineGBSurface_v3, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 379 DECLCALLBACKMEMBER(int, pfnDXResolveCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 380 DECLCALLBACKMEMBER(int, pfnDXPredResolveCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 381 DECLCALLBACKMEMBER(int, pfnDXPredConvertRegion, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 382 DECLCALLBACKMEMBER(int, pfnDXPredConvert, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 383 DECLCALLBACKMEMBER(int, pfnWholeSurfaceCopy, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 384 DECLCALLBACKMEMBER(int, pfnDXDefineUAView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 385 DECLCALLBACKMEMBER(int, pfnDXDestroyUAView, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 386 DECLCALLBACKMEMBER(int, pfnDXClearUAViewUint, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 387 DECLCALLBACKMEMBER(int, pfnDXClearUAViewFloat, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 388 DECLCALLBACKMEMBER(int, pfnDXCopyStructureCount, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 389 DECLCALLBACKMEMBER(int, pfnDXSetUAViews, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 390 DECLCALLBACKMEMBER(int, pfnDXDrawIndexedInstancedIndirect, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 391 DECLCALLBACKMEMBER(int, pfnDXDrawInstancedIndirect, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 392 DECLCALLBACKMEMBER(int, pfnDXDispatch, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 393 DECLCALLBACKMEMBER(int, pfnDXDispatchIndirect, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 394 DECLCALLBACKMEMBER(int, pfnWriteZeroSurface, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 395 DECLCALLBACKMEMBER(int, pfnHintZeroSurface, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 396 DECLCALLBACKMEMBER(int, pfnDXTransferToBuffer, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 397 DECLCALLBACKMEMBER(int, pfnDXSetStructureCount, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 398 DECLCALLBACKMEMBER(int, pfnLogicOpsBitBlt, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 399 DECLCALLBACKMEMBER(int, pfnLogicOpsTransBlt, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 400 DECLCALLBACKMEMBER(int, pfnLogicOpsStretchBlt, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 401 DECLCALLBACKMEMBER(int, pfnLogicOpsColorFill, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 402 DECLCALLBACKMEMBER(int, pfnLogicOpsAlphaBlend, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 403 DECLCALLBACKMEMBER(int, pfnLogicOpsClearTypeBlend, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 404 DECLCALLBACKMEMBER(int, pfnDefineGBSurface_v4, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 405 DECLCALLBACKMEMBER(int, pfnDXSetCSUAViews, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 406 DECLCALLBACKMEMBER(int, pfnDXSetMinLOD, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 407 DECLCALLBACKMEMBER(int, pfnDXDefineDepthStencilView_v2, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 408 DECLCALLBACKMEMBER(int, pfnDXDefineStreamOutputWithMob, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 409 DECLCALLBACKMEMBER(int, pfnDXSetShaderIface, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 410 DECLCALLBACKMEMBER(int, pfnDXBindStreamOutput, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 411 DECLCALLBACKMEMBER(int, pfnSurfaceStretchBltNonMSToMS, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 412 DECLCALLBACKMEMBER(int, pfnDXBindShaderIface, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)); 409 413 } VMSVGA3DBACKENDFUNCSDX; 410 414 411 415 int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs); 412 416 417 #ifdef VMSVGA3D_DX 418 /* Helpers. */ 419 int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext); 420 421 /* Command handlers. */ 422 int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid); 423 int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid); 424 int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext); 425 int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext); 426 int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext); 427 int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd); 428 int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext); 429 int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd); 430 int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId); 431 int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd); 432 int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd); 433 int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext); 434 int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext); 435 int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext); 436 int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId); 437 int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer); 438 int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd); 439 int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology); 440 int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId); 441 int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd); 442 int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd); 443 int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId); 444 int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 445 int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 446 int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 447 int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 448 int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 449 int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 450 int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 451 int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext); 452 int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext); 453 int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport); 454 int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect); 455 int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext); 456 int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext); 457 int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext); 458 int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 459 int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext); 460 int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext); 461 int vmsvga3dDXUpdateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext); 462 int vmsvga3dDXReadbackSubResource(PVGASTATECC pThisCC, uint32_t idDXContext); 463 int vmsvga3dDXInvalidateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext); 464 int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd); 465 int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext); 466 int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd); 467 int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext); 468 int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext); 469 int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext); 470 int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc); 471 int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext); 472 int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd); 473 int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext); 474 int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd); 475 int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext); 476 int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd); 477 int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext); 478 int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd); 479 int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext); 480 int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd); 481 int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext); 482 int vmsvga3dDXBindShader(PVGASTATECC pThisCC, uint32_t cid, PVMSVGAMOB pMob, uint32_t shid, uint32_t offsetInBytes); 483 int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext); 484 int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext); 485 int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext); 486 int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, uint32_t cid, PVMSVGAMOB pMob, SVGACOTableType type, uint32_t validSizeInBytes); 487 int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, uint32_t idDXContext); 488 int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 489 int vmsvga3dDXTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext); 490 int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext); 491 int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 492 int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 493 int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext); 494 int vmsvga3dDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext); 495 int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext); 496 int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext); 497 int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext); 498 int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext); 499 int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 500 int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 501 int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 502 int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 503 int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 504 int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext); 505 int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext); 506 int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 507 int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext); 508 int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext); 509 int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 510 int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext); 511 int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 512 int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 513 int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext); 514 int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext); 515 int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext); 516 int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext); 517 int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext); 518 int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext); 519 int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext); 520 int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext); 521 int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext); 522 int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext); 523 int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext); 524 int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext); 525 int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext); 526 int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext); 527 int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext); 528 int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext); 529 int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext); 530 int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext); 531 int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext); 532 int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext); 533 int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext); 534 int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext); 535 int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext); 536 int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext); 537 int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext); 538 int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext); 539 int vmsvga3dDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, uint32_t idDXContext); 540 int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext); 541 int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext); 542 int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext); 543 int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext); 544 int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext); 545 #endif /* VMSVGA3D_DX */ 546 547 413 548 #endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA3d_h */ 414 549 -
trunk/src/VBox/Devices/Makefile.kmk
r88626 r88787 325 325 Graphics/DevVGA-SVGA3d-shared.cpp \ 326 326 Graphics/DevVGA-SVGA3d-savedstate.cpp 327 ifdef VBOX_WITH_VMSVGA3D_DX 328 VBoxDD_DEFS += VMSVGA3D_DX 329 VBoxDD_SOURCES += \ 330 Graphics/DevVGA-SVGA3d-dx.cpp \ 331 Graphics/DevVGA-SVGA3d-dx-shader.cpp 332 endif 327 333 if "$(KBUILD_TARGET)" == "win" && !defined(VBOX_WITH_VMSVGA3D_USE_OPENGL) 328 334 ifdef VBOX_WITH_VMSVGA3D_DX 329 VBoxDD_DEFS += VMSVGA3D_D X335 VBoxDD_DEFS += VMSVGA3D_D3D11 330 336 VBoxDD_SOURCES += \ 331 337 Graphics/DevVGA-SVGA3d-win-dx.cpp
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