VirtualBox

Ignore:
Timestamp:
Apr 29, 2021 3:51:13 PM (4 years ago)
Author:
vboxsync
Message:

Devices/Graphics: a few DX commands. bugref:9830

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp

    r87028 r88787  
    342342
    343343
    344 #if !defined(VMSVGA3D_DX)
    345 # ifdef VBOX_WITH_VMSVGA3D
    346 /*
    347  * Stub for old backends.
    348  */
    349 int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
    350 {
    351     RT_NOREF(pThisCC, pszInterfaceName, pvInterfaceFuncs, cbInterfaceFuncs);
    352     return VERR_NOT_IMPLEMENTED;
    353 }
    354 # endif
    355 #endif
    356 
    357 
    358344/*
    359345 *
    … …  
    599585        pGbo->paDescriptors = paDescriptors;
    600586
     587#if 1 /// @todo PGMHandlerPhysicalRegister asserts deep in PGM code with enmKind of a page being out of range.
     588fWriteProtected = false;
     589#endif
    601590    if (fWriteProtected)
    602591    {
    … …  
    632621}
    633622
     623/** @todo static void vmsvgaR3GboWriteProtect(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo, bool fWriteProtect) */
    634624
    635625typedef enum VMSVGAGboTransferDirection
    … …  
    717707                               VMSVGAGboTransferDirection_Read);
    718708}
     709
     710
     711static void vmsvgaR3GboBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo)
     712{
     713    AssertReturnVoid(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED);
     714    vmsvgaR3GboWrite(pSvgaR3State, pGbo, 0, pGbo->pvHost, pGbo->cbTotal);
     715    RTMemFree(pGbo->pvHost);
     716    pGbo->pvHost = NULL;
     717    pGbo->fGboFlags &= ~VMSVGAGBO_F_HOST_BACKED;
     718}
     719
     720
     721static int vmsvgaR3GboBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAGBO pGbo, uint32_t cbValid)
     722{
     723    int rc;
     724
     725    /* Just reread the data if pvHost has been allocated already. */
     726    if (!(pGbo->fGboFlags & VMSVGAGBO_F_HOST_BACKED))
     727        pGbo->pvHost = RTMemAllocZ(pGbo->cbTotal);
     728
     729    if (pGbo->pvHost)
     730    {
     731        rc = vmsvgaR3GboRead(pSvgaR3State, pGbo, 0, pGbo->pvHost, cbValid);
     732    }
     733    else
     734        rc = VERR_NO_MEMORY;
     735
     736    if (RT_SUCCESS(rc))
     737        pGbo->fGboFlags |= VMSVGAGBO_F_HOST_BACKED;
     738    else
     739    {
     740        RTMemFree(pGbo->pvHost);
     741        pGbo->pvHost = NULL;
     742    }
     743    return rc;
     744}
     745
    719746
    720747
    … …  
    831858
    832859
    833 static PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId mobid)
    834 {
     860static PVMSVGAMOB vmsvgaR3MobGet(PVMSVGAR3STATE pSvgaR3State, SVGAMobId RT_UNTRUSTED_GUEST mobid)
     861{
     862    if (mobid == SVGA_ID_INVALID)
     863        return NULL;
     864
    835865    PVMSVGAMOB pMob = (PVMSVGAMOB)RTAvlU32Get(&pSvgaR3State->MOBTree, mobid);
    836866    if (pMob)
    … …  
    840870        RTListPrepend(&pSvgaR3State->MOBLRUList, &pMob->nodeLRU);
    841871    }
     872    else
     873        ASSERT_GUEST_FAILED();
    842874
    843875    return pMob;
    844876}
     877
     878
     879/** Create a host ring-3 pointer to the MOB data.
     880 * Current approach is to allocate a host memory buffer and copy the guest MOB data if necessary.
     881 * @param pMob     The MOB.
     882 * @param cbValid  How many bytes of the guest backing memory contain valid data.
     883 * @return VBox status.
     884 */
     885/** @todo uint32_t cbValid -> uint32_t offStart, uint32_t cbData */
     886int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid)
     887{
     888    AssertReturn(pMob, VERR_INVALID_PARAMETER);
     889    return vmsvgaR3GboBackingStoreCreate(pSvgaR3State, &pMob->Gbo, cbValid);
     890}
     891
     892
     893void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob)
     894{
     895    if (pMob)
     896        vmsvgaR3GboBackingStoreDelete(pSvgaR3State, &pMob->Gbo);
     897}
     898
     899
     900void *vmsvgaR3MobBackingStoreGet(PVMSVGAMOB pMob, uint32_t off)
     901{
     902    if (pMob && (pMob->Gbo.fGboFlags & VMSVGAGBO_F_HOST_BACKED))
     903    {
     904        if (off <= pMob->Gbo.cbTotal)
     905            return (uint8_t *)pMob->Gbo.pvHost + off;
     906    }
     907    return NULL;
     908}
     909
     910
     911#ifdef VBOX_WITH_VMSVGA3D
     912int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBox)
     913{
     914    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     915
     916    SVGAOTableSurfaceEntry entrySurface;
     917    int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
     918                                pImageId->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
     919    if (RT_SUCCESS(rc))
     920    {
     921        PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
     922        if (pMob)
     923        {
     924            VMSVGA3D_MAPPED_SURFACE map;
     925            rc = pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImageId, pBox, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
     926            if (RT_SUCCESS(rc))
     927            {
     928                /* Copy MOB -> mapped surface. */
     929                uint32_t offSrc = pBox->x * map.cbPixel
     930                                + pBox->y * entrySurface.size.width * map.cbPixel
     931                                + pBox->z * entrySurface.size.height * entrySurface.size.width * map.cbPixel;
     932                uint8_t *pu8Dst = (uint8_t *)map.pvData;
     933                for (uint32_t z = 0; z < pBox->d; ++z)
     934                {
     935                    for (uint32_t y = 0; y < pBox->h; ++y)
     936                    {
     937                        rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, offSrc, pu8Dst, pBox->w * map.cbPixel);
     938                        if (RT_FAILURE(rc))
     939                            break;
     940
     941                        pu8Dst += map.cbRowPitch;
     942                        offSrc += entrySurface.size.width * map.cbPixel;
     943                    }
     944
     945                    pu8Dst += map.cbDepthPitch;
     946                    offSrc += entrySurface.size.height * entrySurface.size.width * map.cbPixel;
     947                }
     948
     949                pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImageId, &map, /* fWritten= */ true);
     950            }
     951        }
     952        else
     953            rc = VERR_INVALID_STATE;
     954    }
     955
     956    return rc;
     957}
     958
     959
     960int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBoxDst, SVGA3dPoint const *pPtSrc)
     961{
     962    /* pPtSrc must be verified by the caller. */
     963    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     964
     965    SVGAOTableSurfaceEntry entrySurface;
     966    int rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
     967                                pImageId->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entrySurface, sizeof(entrySurface));
     968    if (RT_SUCCESS(rc))
     969    {
     970        PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entrySurface.mobid);
     971        if (pMob)
     972        {
     973            VMSVGA3D_MAPPED_SURFACE map;
     974            rc = pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImageId, pBoxDst, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
     975            if (RT_SUCCESS(rc))
     976            {
     977                /* Copy MOB -> mapped surface. */
     978                uint32_t offSrc = pPtSrc->x * map.cbPixel
     979                                + pPtSrc->y * entrySurface.size.width * map.cbPixel
     980                                + pPtSrc->z * entrySurface.size.height * entrySurface.size.width * map.cbPixel;
     981                uint8_t *pu8Dst = (uint8_t *)map.pvData;
     982                for (uint32_t z = 0; z < pBoxDst->d; ++z)
     983                {
     984                    for (uint32_t y = 0; y < pBoxDst->h; ++y)
     985                    {
     986                        rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, offSrc, pu8Dst, pBoxDst->w * map.cbPixel);
     987                        if (RT_FAILURE(rc))
     988                            break;
     989
     990                        pu8Dst += map.cbRowPitch;
     991                        offSrc += entrySurface.size.width * map.cbPixel;
     992                    }
     993
     994                    pu8Dst += map.cbDepthPitch;
     995                    offSrc += entrySurface.size.height * entrySurface.size.width * map.cbPixel;
     996                }
     997
     998                pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImageId, &map, /* fWritten= */ true);
     999            }
     1000        }
     1001        else
     1002            rc = VERR_INVALID_STATE;
     1003    }
     1004
     1005    return rc;
     1006}
     1007#endif /* VBOX_WITH_VMSVGA3D */
     1008
    8451009
    8461010/*
    … …  
    11851349//     ASMBreakpoint();
    11861350    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1187     RT_NOREF(pCmd, pSvgaR3State);
    11881351
    11891352    /* Assign the mobid to the surface. */
    … …  
    13251488
    13261489
     1490/* SVGA_3D_CMD_INVALIDATE_GB_IMAGE 1105 */
     1491static void vmsvga3dCmdInvalidateGBImage(PVGASTATECC pThisCC, SVGA3dCmdInvalidateGBImage const *pCmd)
     1492{
     1493// ASMBreakpoint();
     1494    vmsvga3dSurfaceInvalidate(pThisCC, pCmd->image.sid, pCmd->image.face, pCmd->image.mipmap);
     1495}
     1496
     1497
    13271498/* SVGA_3D_CMD_INVALIDATE_GB_SURFACE 1106 */
    13281499static void vmsvga3dCmdInvalidateGBSurface(PVGASTATECC pThisCC, SVGA3dCmdInvalidateGBSurface const *pCmd)
    13291500{
    1330 //     ASMBreakpoint();
    1331     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1332     RT_NOREF(pSvgaR3State, pCmd);
    1333     /** @todo Implement. */
     1501// ASMBreakpoint();
     1502    vmsvga3dSurfaceInvalidate(pThisCC, pCmd->sid, SVGA_ID_INVALID, SVGA_ID_INVALID);
    13341503}
    13351504
    … …  
    13821551    // entry.image.face = 0;
    13831552    // entry.image.mipmap = 0;
    1384     entry.width = pCmd->width;
    1385     entry.height = pCmd->height;
    1386     entry.xRoot = pCmd->xRoot;
    1387     entry.yRoot = pCmd->yRoot;
    1388     entry.flags = pCmd->flags;
    1389     entry.dpi = pCmd->dpi;
     1553    entry.width     = pCmd->width;
     1554    entry.height    = pCmd->height;
     1555    entry.xRoot     = pCmd->xRoot;
     1556    entry.yRoot     = pCmd->yRoot;
     1557    entry.flags     = pCmd->flags;
     1558    entry.dpi       = pCmd->dpi;
     1559
    13901560    int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SCREENTARGET],
    13911561                                 pCmd->stid, SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE, &entry, sizeof(entry));
    … …  
    14051575        pScreen->cWidth  = pCmd->width;
    14061576        pScreen->cHeight = pCmd->height;
    1407         pScreen->offVRAM = 0; /* Always for screen targets, they use either a separate memory buffer or a host window. */
     1577        pScreen->offVRAM = 0; /* Not applicable for screen targets, they use either a separate memory buffer or a host window. */
    14081578        pScreen->cbPitch = pCmd->width * 4;
    14091579        pScreen->cBpp    = 32;
    … …  
    15691739
    15701740
     1741/* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 1134 */
     1742static void vmsvga3dCmdDefineGBSurface_v2(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v2 const *pCmd)
     1743{
     1744    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1745
     1746    /* Update the entry in the pSvgaR3State->pGboOTableSurface. */
     1747    SVGAOTableSurfaceEntry entry;
     1748    RT_ZERO(entry);
     1749    entry.format = pCmd->format;
     1750    entry.surface1Flags = pCmd->surfaceFlags;
     1751    entry.numMipLevels = pCmd->numMipLevels;
     1752    entry.multisampleCount = pCmd->multisampleCount;
     1753    entry.autogenFilter = pCmd->autogenFilter;
     1754    entry.size = pCmd->size;
     1755    entry.mobid = SVGA_ID_INVALID;
     1756    entry.arraySize = pCmd->arraySize;
     1757    // entry.mobPitch = 0;
     1758    int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_SURFACE],
     1759                                 pCmd->sid, SVGA3D_OTABLE_SURFACE_ENTRY_SIZE, &entry, sizeof(entry));
     1760    if (RT_SUCCESS(rc))
     1761    {
     1762        /* Create the host surface. */
     1763        /** @todo fGBO = true flag. */
     1764        vmsvga3dSurfaceDefine(pThisCC, pCmd->sid, pCmd->surfaceFlags, pCmd->format,
     1765                              pCmd->multisampleCount, pCmd->autogenFilter,
     1766                              pCmd->numMipLevels, &pCmd->size);
     1767    }
     1768}
     1769
     1770
    15711771/* SVGA_3D_CMD_DEFINE_GB_MOB64 1135 */
    15721772static void vmsvga3dCmdDefineGBMob64(PVGASTATECC pThisCC, SVGA3dCmdDefineGBMob64 const *pCmd)
    … …  
    15931793
    15941794/* SVGA_3D_CMD_DX_DEFINE_CONTEXT 1143 */
    1595 static void vmsvga3dCmdDXDefineContext(PVGASTATECC pThisCC, SVGA3dCmdDXDefineContext const *pCmd)
    1596 {
    1597 ASMBreakpoint();
    1598     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1599     if (pSvgaR3State->pFuncsDX)
    1600     {
    1601         RT_NOREF(pCmd);
    1602         pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC->svga.p3dState);
    1603     }
     1795static int vmsvga3dCmdDXDefineContext(PVGASTATECC pThisCC, SVGA3dCmdDXDefineContext const *pCmd, uint32_t cbCmd)
     1796{
     1797#ifdef VMSVGA3D_DX
     1798//ASMBreakpoint();
     1799    RT_NOREF(cbCmd);
     1800
     1801    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1802
     1803    /* Update the entry in the pSvgaR3State->pGboOTable[SVGA_OTABLE_DXCONTEXT]. */
     1804    SVGAOTableDXContextEntry entry;
     1805    RT_ZERO(entry);
     1806    entry.cid = pCmd->cid;
     1807    entry.mobid = SVGA_ID_INVALID;
     1808    int rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
     1809                                 pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
     1810    if (RT_SUCCESS(rc))
     1811    {
     1812        /* Create the host context. */
     1813        rc = vmsvga3dDXDefineContext(pThisCC, pCmd->cid);
     1814    }
     1815
     1816    return rc;
     1817#else
     1818    RT_NOREF(pThisCC, pCmd, cbCmd);
     1819    return VERR_NOT_SUPPORTED;
     1820#endif
    16041821}
    16051822
    16061823
    16071824/* SVGA_3D_CMD_DX_DESTROY_CONTEXT 1144 */
    1608 static void vmsvga3dCmdDXDestroyContext(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyContext const *pCmd)
    1609 {
    1610 ASMBreakpoint();
    1611     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1612     if (pSvgaR3State->pFuncsDX)
    1613     {
    1614         RT_NOREF(pCmd);
    1615         pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC->svga.p3dState);
    1616     }
     1825static int vmsvga3dCmdDXDestroyContext(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyContext const *pCmd, uint32_t cbCmd)
     1826{
     1827#ifdef VMSVGA3D_DX
     1828//ASMBreakpoint();
     1829    RT_NOREF(cbCmd);
     1830
     1831    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1832
     1833    /* Update the entry in the pSvgaR3State->pGboOTable[SVGA_OTABLE_DXCONTEXT]. */
     1834    SVGAOTableDXContextEntry entry;
     1835    RT_ZERO(entry);
     1836    vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
     1837                        pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
     1838
     1839    return vmsvga3dDXDestroyContext(pThisCC, pCmd->cid);
     1840#else
     1841    RT_NOREF(pThisCC, pCmd, cbCmd);
     1842    return VERR_NOT_SUPPORTED;
     1843#endif
    16171844}
    16181845
    16191846
    16201847/* SVGA_3D_CMD_DX_BIND_CONTEXT 1145 */
    1621 static void vmsvga3dCmdDXBindContext(PVGASTATECC pThisCC, SVGA3dCmdDXBindContext const *pCmd)
    1622 {
    1623 ASMBreakpoint();
    1624     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1625     if (pSvgaR3State->pFuncsDX)
    1626     {
    1627         RT_NOREF(pCmd);
    1628         pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC->svga.p3dState);
    1629     }
     1848static int vmsvga3dCmdDXBindContext(PVGASTATECC pThisCC, SVGA3dCmdDXBindContext const *pCmd, uint32_t cbCmd)
     1849{
     1850#ifdef VMSVGA3D_DX
     1851//ASMBreakpoint();
     1852    RT_NOREF(cbCmd);
     1853
     1854    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1855
     1856    /* Assign a mobid to a cid. */
     1857    int rc = VINF_SUCCESS;
     1858    if (pCmd->mobid != SVGA_ID_INVALID)
     1859        rc = vmsvgaR3OTableVerifyIndex(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_MOB],
     1860                                       pCmd->mobid, SVGA3D_OTABLE_MOB_ENTRY_SIZE);
     1861    if (RT_SUCCESS(rc))
     1862    {
     1863        SVGAOTableDXContextEntry entry;
     1864        rc = vmsvgaR3OTableRead(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
     1865                                pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
     1866        if (RT_SUCCESS(rc))
     1867        {
     1868            SVGADXContextMobFormat *pSvgaDXContext = NULL;
     1869            if (pCmd->mobid != entry.mobid && entry.mobid != SVGA_ID_INVALID)
     1870            {
     1871                /* Unbind notification to the DX backend. Copy the context data to the guest backing memory. */
     1872                pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat));
     1873                if (pSvgaDXContext)
     1874                {
     1875                    rc = vmsvga3dDXUnbindContext(pThisCC, pCmd->cid, pSvgaDXContext);
     1876                    if (RT_SUCCESS(rc))
     1877                    {
     1878                        PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, entry.mobid);
     1879                        if (pMob)
     1880                        {
     1881                            rc = vmsvgaR3GboWrite(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat));
     1882                        }
     1883                    }
     1884
     1885                    RTMemFree(pSvgaDXContext);
     1886                    pSvgaDXContext = NULL;
     1887                }
     1888            }
     1889
     1890            if (pCmd->mobid != SVGA_ID_INVALID)
     1891            {
     1892                /* Bind a new context. Copy existing data from the guyest backing memory. */
     1893                if (pCmd->validContents)
     1894                {
     1895                    PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
     1896                    if (pMob)
     1897                    {
     1898                        pSvgaDXContext = (SVGADXContextMobFormat *)RTMemAlloc(sizeof(SVGADXContextMobFormat));
     1899                        if (pSvgaDXContext)
     1900                        {
     1901                            rc = vmsvgaR3GboRead(pSvgaR3State, &pMob->Gbo, 0, pSvgaDXContext, sizeof(SVGADXContextMobFormat));
     1902                            if (RT_FAILURE(rc))
     1903                            {
     1904                                RTMemFree(pSvgaDXContext);
     1905                                pSvgaDXContext = NULL;
     1906                            }
     1907                        }
     1908                    }
     1909                }
     1910
     1911                rc = vmsvga3dDXBindContext(pThisCC, pCmd->cid, pSvgaDXContext);
     1912
     1913                RTMemFree(pSvgaDXContext);
     1914            }
     1915
     1916            /* Update the object table. */
     1917            entry.mobid = pCmd->mobid;
     1918            rc = vmsvgaR3OTableWrite(pSvgaR3State, &pSvgaR3State->aGboOTables[SVGA_OTABLE_DXCONTEXT],
     1919                                     pCmd->cid, sizeof(SVGAOTableDXContextEntry), &entry, sizeof(entry));
     1920        }
     1921    }
     1922
     1923    return rc;
     1924#else
     1925    RT_NOREF(pThisCC, pCmd, cbCmd);
     1926    return VERR_NOT_SUPPORTED;
     1927#endif
    16301928}
    16311929
    16321930
    16331931/* SVGA_3D_CMD_DX_READBACK_CONTEXT 1146 */
    1634 static void vmsvga3dCmdDXReadbackContext(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackContext const *pCmd)
    1635 {
    1636 ASMBreakpoint();
    1637     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1638     if (pSvgaR3State->pFuncsDX)
    1639     {
    1640         RT_NOREF(pCmd);
    1641         pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC->svga.p3dState);
    1642     }
     1932static int vmsvga3dCmdDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackContext const *pCmd, uint32_t cbCmd)
     1933{
     1934#ifdef VMSVGA3D_DX
     1935ASMBreakpoint();
     1936    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1937    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     1938    return vmsvga3dDXReadbackContext(pThisCC, idDXContext);
     1939#else
     1940    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     1941    return VERR_NOT_SUPPORTED;
     1942#endif
    16431943}
    16441944
    16451945
    16461946/* SVGA_3D_CMD_DX_INVALIDATE_CONTEXT 1147 */
    1647 static void vmsvga3dCmdDXInvalidateContext(PVGASTATECC pThisCC, SVGA3dCmdDXInvalidateContext const *pCmd)
    1648 {
    1649 ASMBreakpoint();
    1650     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1651     if (pSvgaR3State->pFuncsDX)
    1652     {
    1653         RT_NOREF(pCmd);
    1654         pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC->svga.p3dState);
    1655     }
     1947static int vmsvga3dCmdDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXInvalidateContext const *pCmd, uint32_t cbCmd)
     1948{
     1949#ifdef VMSVGA3D_DX
     1950ASMBreakpoint();
     1951    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1952    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     1953    return vmsvga3dDXInvalidateContext(pThisCC, idDXContext);
     1954#else
     1955    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     1956    return VERR_NOT_SUPPORTED;
     1957#endif
    16561958}
    16571959
    16581960
    16591961/* SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER 1148 */
    1660 static void vmsvga3dCmdDXSetSingleConstantBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
    1661 {
    1662 ASMBreakpoint();
    1663     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1664     if (pSvgaR3State->pFuncsDX)
    1665     {
    1666         RT_NOREF(pCmd);
    1667         pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC->svga.p3dState);
    1668     }
     1962static int vmsvga3dCmdDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd, uint32_t cbCmd)
     1963{
     1964#ifdef VMSVGA3D_DX
     1965//ASMBreakpoint();
     1966    RT_NOREF(cbCmd);
     1967    return vmsvga3dDXSetSingleConstantBuffer(pThisCC, idDXContext, pCmd);
     1968#else
     1969    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     1970    return VERR_NOT_SUPPORTED;
     1971#endif
    16691972}
    16701973
    16711974
    16721975/* SVGA_3D_CMD_DX_SET_SHADER_RESOURCES 1149 */
    1673 static void vmsvga3dCmdDXSetShaderResources(PVGASTATECC pThisCC, SVGA3dCmdDXSetShaderResources const *pCmd)
    1674 {
    1675 ASMBreakpoint();
    1676     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1677     if (pSvgaR3State->pFuncsDX)
    1678     {
    1679         RT_NOREF(pCmd);
    1680         pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC->svga.p3dState);
    1681     }
     1976static int vmsvga3dCmdDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cbCmd)
     1977{
     1978#ifdef VMSVGA3D_DX
     1979ASMBreakpoint();
     1980    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     1981    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     1982    return vmsvga3dDXSetShaderResources(pThisCC, idDXContext);
     1983#else
     1984    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     1985    return VERR_NOT_SUPPORTED;
     1986#endif
    16821987}
    16831988
    16841989
    16851990/* SVGA_3D_CMD_DX_SET_SHADER 1150 */
    1686 static void vmsvga3dCmdDXSetShader(PVGASTATECC pThisCC, SVGA3dCmdDXSetShader const *pCmd)
    1687 {
    1688 ASMBreakpoint();
    1689     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1690     if (pSvgaR3State->pFuncsDX)
    1691     {
    1692         RT_NOREF(pCmd);
    1693         pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC->svga.p3dState);
    1694     }
     1991static int vmsvga3dCmdDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd, uint32_t cbCmd)
     1992{
     1993#ifdef VMSVGA3D_DX
     1994//ASMBreakpoint();
     1995    RT_NOREF(cbCmd);
     1996    return vmsvga3dDXSetShader(pThisCC, idDXContext, pCmd);
     1997#else
     1998    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     1999    return VERR_NOT_SUPPORTED;
     2000#endif
    16952001}
    16962002
    16972003
    16982004/* SVGA_3D_CMD_DX_SET_SAMPLERS 1151 */
    1699 static void vmsvga3dCmdDXSetSamplers(PVGASTATECC pThisCC, SVGA3dCmdDXSetSamplers const *pCmd)
    1700 {
    1701 ASMBreakpoint();
    1702     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1703     if (pSvgaR3State->pFuncsDX)
    1704     {
    1705         RT_NOREF(pCmd);
    1706         pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC->svga.p3dState);
    1707     }
     2005static int vmsvga3dCmdDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cbCmd)
     2006{
     2007#ifdef VMSVGA3D_DX
     2008//ASMBreakpoint();
     2009    SVGA3dSamplerId const *paSamplerId = (SVGA3dSamplerId *)&pCmd[1];
     2010    uint32_t const cSamplerId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dSamplerId);
     2011    return vmsvga3dDXSetSamplers(pThisCC, idDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
     2012#else
     2013    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2014    return VERR_NOT_SUPPORTED;
     2015#endif
    17082016}
    17092017
    17102018
    17112019/* SVGA_3D_CMD_DX_DRAW 1152 */
    1712 static void vmsvga3dCmdDXDraw(PVGASTATECC pThisCC, SVGA3dCmdDXDraw const *pCmd)
    1713 {
    1714 ASMBreakpoint();
    1715     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1716     if (pSvgaR3State->pFuncsDX)
    1717     {
    1718         RT_NOREF(pCmd);
    1719         pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC->svga.p3dState);
    1720     }
     2020static int vmsvga3dCmdDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd, uint32_t cbCmd)
     2021{
     2022#ifdef VMSVGA3D_DX
     2023//ASMBreakpoint();
     2024    RT_NOREF(cbCmd);
     2025    return vmsvga3dDXDraw(pThisCC, idDXContext, pCmd);
     2026#else
     2027    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2028    return VERR_NOT_SUPPORTED;
     2029#endif
    17212030}
    17222031
    17232032
    17242033/* SVGA_3D_CMD_DX_DRAW_INDEXED 1153 */
    1725 static void vmsvga3dCmdDXDrawIndexed(PVGASTATECC pThisCC, SVGA3dCmdDXDrawIndexed const *pCmd)
    1726 {
    1727 ASMBreakpoint();
    1728     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1729     if (pSvgaR3State->pFuncsDX)
    1730     {
    1731         RT_NOREF(pCmd);
    1732         pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC->svga.p3dState);
    1733     }
     2034static int vmsvga3dCmdDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd, uint32_t cbCmd)
     2035{
     2036#ifdef VMSVGA3D_DX
     2037ASMBreakpoint();
     2038    RT_NOREF(cbCmd);
     2039    return vmsvga3dDXDrawIndexed(pThisCC, idDXContext, pCmd);
     2040#else
     2041    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2042    return VERR_NOT_SUPPORTED;
     2043#endif
    17342044}
    17352045
    17362046
    17372047/* SVGA_3D_CMD_DX_DRAW_INSTANCED 1154 */
    1738 static void vmsvga3dCmdDXDrawInstanced(PVGASTATECC pThisCC, SVGA3dCmdDXDrawInstanced const *pCmd)
    1739 {
    1740 ASMBreakpoint();
    1741     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1742     if (pSvgaR3State->pFuncsDX)
    1743     {
    1744         RT_NOREF(pCmd);
    1745         pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC->svga.p3dState);
    1746     }
     2048static int vmsvga3dCmdDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd, uint32_t cbCmd)
     2049{
     2050#ifdef VMSVGA3D_DX
     2051ASMBreakpoint();
     2052    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2053    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2054    return vmsvga3dDXDrawInstanced(pThisCC, idDXContext);
     2055#else
     2056    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2057    return VERR_NOT_SUPPORTED;
     2058#endif
    17472059}
    17482060
    17492061
    17502062/* SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED 1155 */
    1751 static void vmsvga3dCmdDXDrawIndexedInstanced(PVGASTATECC pThisCC, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
    1752 {
    1753 ASMBreakpoint();
    1754     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1755     if (pSvgaR3State->pFuncsDX)
    1756     {
    1757         RT_NOREF(pCmd);
    1758         pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC->svga.p3dState);
    1759     }
     2063static int vmsvga3dCmdDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd, uint32_t cbCmd)
     2064{
     2065#ifdef VMSVGA3D_DX
     2066ASMBreakpoint();
     2067    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2068    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2069    return vmsvga3dDXDrawIndexedInstanced(pThisCC, idDXContext);
     2070#else
     2071    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2072    return VERR_NOT_SUPPORTED;
     2073#endif
    17602074}
    17612075
    17622076
    17632077/* SVGA_3D_CMD_DX_DRAW_AUTO 1156 */
    1764 static void vmsvga3dCmdDXDrawAuto(PVGASTATECC pThisCC, SVGA3dCmdDXDrawAuto const *pCmd)
    1765 {
    1766 ASMBreakpoint();
    1767     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1768     if (pSvgaR3State->pFuncsDX)
    1769     {
    1770         RT_NOREF(pCmd);
    1771         pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC->svga.p3dState);
    1772     }
     2078static int vmsvga3dCmdDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawAuto const *pCmd, uint32_t cbCmd)
     2079{
     2080#ifdef VMSVGA3D_DX
     2081ASMBreakpoint();
     2082    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2083    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2084    return vmsvga3dDXDrawAuto(pThisCC, idDXContext);
     2085#else
     2086    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2087    return VERR_NOT_SUPPORTED;
     2088#endif
    17732089}
    17742090
    17752091
    17762092/* SVGA_3D_CMD_DX_SET_INPUT_LAYOUT 1157 */
    1777 static void vmsvga3dCmdDXSetInputLayout(PVGASTATECC pThisCC, SVGA3dCmdDXSetInputLayout const *pCmd)
    1778 {
    1779 ASMBreakpoint();
    1780     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1781     if (pSvgaR3State->pFuncsDX)
    1782     {
    1783         RT_NOREF(pCmd);
    1784         pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC->svga.p3dState);
    1785     }
     2093static int vmsvga3dCmdDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetInputLayout const *pCmd, uint32_t cbCmd)
     2094{
     2095#ifdef VMSVGA3D_DX
     2096//ASMBreakpoint();
     2097    RT_NOREF(cbCmd);
     2098    return vmsvga3dDXSetInputLayout(pThisCC, idDXContext, pCmd->elementLayoutId);
     2099#else
     2100    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2101    return VERR_NOT_SUPPORTED;
     2102#endif
    17862103}
    17872104
    17882105
    17892106/* SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS 1158 */
    1790 static void vmsvga3dCmdDXSetVertexBuffers(PVGASTATECC pThisCC, SVGA3dCmdDXSetVertexBuffers const *pCmd)
    1791 {
    1792 ASMBreakpoint();
    1793     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1794     if (pSvgaR3State->pFuncsDX)
    1795     {
    1796         RT_NOREF(pCmd);
    1797         pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC->svga.p3dState);
    1798     }
     2107static int vmsvga3dCmdDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetVertexBuffers const *pCmd, uint32_t cbCmd)
     2108{
     2109#ifdef VMSVGA3D_DX
     2110//ASMBreakpoint();
     2111    SVGA3dVertexBuffer const *paVertexBuffer = (SVGA3dVertexBuffer *)&pCmd[1];
     2112    uint32_t const cVertexBuffer = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dVertexBuffer);
     2113    return vmsvga3dDXSetVertexBuffers(pThisCC, idDXContext, pCmd->startBuffer, cVertexBuffer, paVertexBuffer);
     2114#else
     2115    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2116    return VERR_NOT_SUPPORTED;
     2117#endif
    17992118}
    18002119
    18012120
    18022121/* SVGA_3D_CMD_DX_SET_INDEX_BUFFER 1159 */
    1803 static void vmsvga3dCmdDXSetIndexBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXSetIndexBuffer const *pCmd)
    1804 {
    1805 ASMBreakpoint();
    1806     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1807     if (pSvgaR3State->pFuncsDX)
    1808     {
    1809         RT_NOREF(pCmd);
    1810         pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC->svga.p3dState);
    1811     }
     2122static int vmsvga3dCmdDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd, uint32_t cbCmd)
     2123{
     2124#ifdef VMSVGA3D_DX
     2125//ASMBreakpoint();
     2126    RT_NOREF(cbCmd);
     2127    return vmsvga3dDXSetIndexBuffer(pThisCC, idDXContext, pCmd);
     2128#else
     2129    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2130    return VERR_NOT_SUPPORTED;
     2131#endif
    18122132}
    18132133
    18142134
    18152135/* SVGA_3D_CMD_DX_SET_TOPOLOGY 1160 */
    1816 static void vmsvga3dCmdDXSetTopology(PVGASTATECC pThisCC, SVGA3dCmdDXSetTopology const *pCmd)
    1817 {
    1818 ASMBreakpoint();
    1819     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1820     if (pSvgaR3State->pFuncsDX)
    1821     {
    1822         RT_NOREF(pCmd);
    1823         pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC->svga.p3dState);
    1824     }
     2136static int vmsvga3dCmdDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetTopology const *pCmd, uint32_t cbCmd)
     2137{
     2138#ifdef VMSVGA3D_DX
     2139//ASMBreakpoint();
     2140    RT_NOREF(cbCmd);
     2141    return vmsvga3dDXSetTopology(pThisCC, idDXContext, pCmd->topology);
     2142#else
     2143    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2144    return VERR_NOT_SUPPORTED;
     2145#endif
    18252146}
    18262147
    18272148
    18282149/* SVGA_3D_CMD_DX_SET_RENDERTARGETS 1161 */
    1829 static void vmsvga3dCmdDXSetRenderTargets(PVGASTATECC pThisCC, SVGA3dCmdDXSetRenderTargets const *pCmd)
    1830 {
    1831 ASMBreakpoint();
    1832     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1833     if (pSvgaR3State->pFuncsDX)
    1834     {
    1835         RT_NOREF(pCmd);
    1836         pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC->svga.p3dState);
    1837     }
     2150static int vmsvga3dCmdDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetRenderTargets const *pCmd, uint32_t cbCmd)
     2151{
     2152#ifdef VMSVGA3D_DX
     2153//ASMBreakpoint();
     2154    SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pCmd[1];
     2155    uint32_t const cRenderTargetViewId = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dRenderTargetViewId);
     2156    return vmsvga3dDXSetRenderTargets(pThisCC, idDXContext, pCmd->depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
     2157#else
     2158    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2159    return VERR_NOT_SUPPORTED;
     2160#endif
    18382161}
    18392162
    18402163
    18412164/* SVGA_3D_CMD_DX_SET_BLEND_STATE 1162 */
    1842 static void vmsvga3dCmdDXSetBlendState(PVGASTATECC pThisCC, SVGA3dCmdDXSetBlendState const *pCmd)
    1843 {
    1844 ASMBreakpoint();
    1845     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1846     if (pSvgaR3State->pFuncsDX)
    1847     {
    1848         RT_NOREF(pCmd);
    1849         pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC->svga.p3dState);
    1850     }
     2165static int vmsvga3dCmdDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd, uint32_t cbCmd)
     2166{
     2167#ifdef VMSVGA3D_DX
     2168//ASMBreakpoint();
     2169    RT_NOREF(cbCmd);
     2170    return vmsvga3dDXSetBlendState(pThisCC, idDXContext, pCmd);
     2171#else
     2172    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2173    return VERR_NOT_SUPPORTED;
     2174#endif
    18512175}
    18522176
    18532177
    18542178/* SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE 1163 */
    1855 static void vmsvga3dCmdDXSetDepthStencilState(PVGASTATECC pThisCC, SVGA3dCmdDXSetDepthStencilState const *pCmd)
    1856 {
    1857 ASMBreakpoint();
    1858     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1859     if (pSvgaR3State->pFuncsDX)
    1860     {
    1861         RT_NOREF(pCmd);
    1862         pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC->svga.p3dState);
    1863     }
     2179static int vmsvga3dCmdDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd, uint32_t cbCmd)
     2180{
     2181#ifdef VMSVGA3D_DX
     2182//ASMBreakpoint();
     2183    RT_NOREF(cbCmd);
     2184    return vmsvga3dDXSetDepthStencilState(pThisCC, idDXContext, pCmd);
     2185#else
     2186    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2187    return VERR_NOT_SUPPORTED;
     2188#endif
    18642189}
    18652190
    18662191
    18672192/* SVGA_3D_CMD_DX_SET_RASTERIZER_STATE 1164 */
    1868 static void vmsvga3dCmdDXSetRasterizerState(PVGASTATECC pThisCC, SVGA3dCmdDXSetRasterizerState const *pCmd)
    1869 {
    1870 ASMBreakpoint();
    1871     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1872     if (pSvgaR3State->pFuncsDX)
    1873     {
    1874         RT_NOREF(pCmd);
    1875         pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC->svga.p3dState);
    1876     }
     2193static int vmsvga3dCmdDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetRasterizerState const *pCmd, uint32_t cbCmd)
     2194{
     2195#ifdef VMSVGA3D_DX
     2196//ASMBreakpoint();
     2197    RT_NOREF(cbCmd);
     2198    return vmsvga3dDXSetRasterizerState(pThisCC, idDXContext, pCmd->rasterizerId);
     2199#else
     2200    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2201    return VERR_NOT_SUPPORTED;
     2202#endif
    18772203}
    18782204
    18792205
    18802206/* SVGA_3D_CMD_DX_DEFINE_QUERY 1165 */
    1881 static void vmsvga3dCmdDXDefineQuery(PVGASTATECC pThisCC, SVGA3dCmdDXDefineQuery const *pCmd)
    1882 {
    1883 ASMBreakpoint();
    1884     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1885     if (pSvgaR3State->pFuncsDX)
    1886     {
    1887         RT_NOREF(pCmd);
    1888         pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC->svga.p3dState);
    1889     }
     2207static int vmsvga3dCmdDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd, uint32_t cbCmd)
     2208{
     2209#ifdef VMSVGA3D_DX
     2210ASMBreakpoint();
     2211    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2212    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2213    return vmsvga3dDXDefineQuery(pThisCC, idDXContext);
     2214#else
     2215    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2216    return VERR_NOT_SUPPORTED;
     2217#endif
    18902218}
    18912219
    18922220
    18932221/* SVGA_3D_CMD_DX_DESTROY_QUERY 1166 */
    1894 static void vmsvga3dCmdDXDestroyQuery(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyQuery const *pCmd)
    1895 {
    1896 ASMBreakpoint();
    1897     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1898     if (pSvgaR3State->pFuncsDX)
    1899     {
    1900         RT_NOREF(pCmd);
    1901         pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC->svga.p3dState);
    1902     }
     2222static int vmsvga3dCmdDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd, uint32_t cbCmd)
     2223{
     2224#ifdef VMSVGA3D_DX
     2225ASMBreakpoint();
     2226    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2227    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2228    return vmsvga3dDXDestroyQuery(pThisCC, idDXContext);
     2229#else
     2230    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2231    return VERR_NOT_SUPPORTED;
     2232#endif
    19032233}
    19042234
    19052235
    19062236/* SVGA_3D_CMD_DX_BIND_QUERY 1167 */
    1907 static void vmsvga3dCmdDXBindQuery(PVGASTATECC pThisCC, SVGA3dCmdDXBindQuery const *pCmd)
    1908 {
    1909 ASMBreakpoint();
    1910     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1911     if (pSvgaR3State->pFuncsDX)
    1912     {
    1913         RT_NOREF(pCmd);
    1914         pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC->svga.p3dState);
    1915     }
     2237static int vmsvga3dCmdDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, uint32_t cbCmd)
     2238{
     2239#ifdef VMSVGA3D_DX
     2240ASMBreakpoint();
     2241    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2242    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2243    return vmsvga3dDXBindQuery(pThisCC, idDXContext);
     2244#else
     2245    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2246    return VERR_NOT_SUPPORTED;
     2247#endif
    19162248}
    19172249
    19182250
    19192251/* SVGA_3D_CMD_DX_SET_QUERY_OFFSET 1168 */
    1920 static void vmsvga3dCmdDXSetQueryOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetQueryOffset const *pCmd)
    1921 {
    1922 ASMBreakpoint();
    1923     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1924     if (pSvgaR3State->pFuncsDX)
    1925     {
    1926         RT_NOREF(pCmd);
    1927         pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC->svga.p3dState);
    1928     }
     2252static int vmsvga3dCmdDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd, uint32_t cbCmd)
     2253{
     2254#ifdef VMSVGA3D_DX
     2255ASMBreakpoint();
     2256    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2257    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2258    return vmsvga3dDXSetQueryOffset(pThisCC, idDXContext);
     2259#else
     2260    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2261    return VERR_NOT_SUPPORTED;
     2262#endif
    19292263}
    19302264
    19312265
    19322266/* SVGA_3D_CMD_DX_BEGIN_QUERY 1169 */
    1933 static void vmsvga3dCmdDXBeginQuery(PVGASTATECC pThisCC, SVGA3dCmdDXBeginQuery const *pCmd)
    1934 {
    1935 ASMBreakpoint();
    1936     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1937     if (pSvgaR3State->pFuncsDX)
    1938     {
    1939         RT_NOREF(pCmd);
    1940         pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC->svga.p3dState);
    1941     }
     2267static int vmsvga3dCmdDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd, uint32_t cbCmd)
     2268{
     2269#ifdef VMSVGA3D_DX
     2270ASMBreakpoint();
     2271    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2272    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2273    return vmsvga3dDXBeginQuery(pThisCC, idDXContext);
     2274#else
     2275    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2276    return VERR_NOT_SUPPORTED;
     2277#endif
    19422278}
    19432279
    19442280
    19452281/* SVGA_3D_CMD_DX_END_QUERY 1170 */
    1946 static void vmsvga3dCmdDXEndQuery(PVGASTATECC pThisCC, SVGA3dCmdDXEndQuery const *pCmd)
    1947 {
    1948 ASMBreakpoint();
    1949     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1950     if (pSvgaR3State->pFuncsDX)
    1951     {
    1952         RT_NOREF(pCmd);
    1953         pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC->svga.p3dState);
    1954     }
     2282static int vmsvga3dCmdDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd, uint32_t cbCmd)
     2283{
     2284#ifdef VMSVGA3D_DX
     2285ASMBreakpoint();
     2286    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2287    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2288    return vmsvga3dDXEndQuery(pThisCC, idDXContext);
     2289#else
     2290    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2291    return VERR_NOT_SUPPORTED;
     2292#endif
    19552293}
    19562294
    19572295
    19582296/* SVGA_3D_CMD_DX_READBACK_QUERY 1171 */
    1959 static void vmsvga3dCmdDXReadbackQuery(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackQuery const *pCmd)
    1960 {
    1961 ASMBreakpoint();
    1962     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1963     if (pSvgaR3State->pFuncsDX)
    1964     {
    1965         RT_NOREF(pCmd);
    1966         pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC->svga.p3dState);
    1967     }
     2297static int vmsvga3dCmdDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd, uint32_t cbCmd)
     2298{
     2299#ifdef VMSVGA3D_DX
     2300ASMBreakpoint();
     2301    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2302    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2303    return vmsvga3dDXReadbackQuery(pThisCC, idDXContext);
     2304#else
     2305    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2306    return VERR_NOT_SUPPORTED;
     2307#endif
    19682308}
    19692309
    19702310
    19712311/* SVGA_3D_CMD_DX_SET_PREDICATION 1172 */
    1972 static void vmsvga3dCmdDXSetPredication(PVGASTATECC pThisCC, SVGA3dCmdDXSetPredication const *pCmd)
    1973 {
    1974 ASMBreakpoint();
    1975     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1976     if (pSvgaR3State->pFuncsDX)
    1977     {
    1978         RT_NOREF(pCmd);
    1979         pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC->svga.p3dState);
    1980     }
     2312static int vmsvga3dCmdDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPredication const *pCmd, uint32_t cbCmd)
     2313{
     2314#ifdef VMSVGA3D_DX
     2315ASMBreakpoint();
     2316    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2317    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2318    return vmsvga3dDXSetPredication(pThisCC, idDXContext);
     2319#else
     2320    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2321    return VERR_NOT_SUPPORTED;
     2322#endif
    19812323}
    19822324
    19832325
    19842326/* SVGA_3D_CMD_DX_SET_SOTARGETS 1173 */
    1985 static void vmsvga3dCmdDXSetSOTargets(PVGASTATECC pThisCC, SVGA3dCmdDXSetSOTargets const *pCmd)
    1986 {
    1987 ASMBreakpoint();
    1988     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    1989     if (pSvgaR3State->pFuncsDX)
    1990     {
    1991         RT_NOREF(pCmd);
    1992         pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC->svga.p3dState);
    1993     }
     2327static int vmsvga3dCmdDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSOTargets const *pCmd, uint32_t cbCmd)
     2328{
     2329#ifdef VMSVGA3D_DX
     2330ASMBreakpoint();
     2331    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2332    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2333    return vmsvga3dDXSetSOTargets(pThisCC, idDXContext);
     2334#else
     2335    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2336    return VERR_NOT_SUPPORTED;
     2337#endif
    19942338}
    19952339
    19962340
    19972341/* SVGA_3D_CMD_DX_SET_VIEWPORTS 1174 */
    1998 static void vmsvga3dCmdDXSetViewports(PVGASTATECC pThisCC, SVGA3dCmdDXSetViewports const *pCmd)
    1999 {
    2000 ASMBreakpoint();
    2001     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2002     if (pSvgaR3State->pFuncsDX)
    2003     {
    2004         RT_NOREF(pCmd);
    2005         pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC->svga.p3dState);
    2006     }
     2342static int vmsvga3dCmdDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetViewports const *pCmd, uint32_t cbCmd)
     2343{
     2344#ifdef VMSVGA3D_DX
     2345//ASMBreakpoint();
     2346    SVGA3dViewport const *paViewport = (SVGA3dViewport *)&pCmd[1];
     2347    uint32_t const cViewport = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dViewport);
     2348    return vmsvga3dDXSetViewports(pThisCC, idDXContext, cViewport, paViewport);
     2349#else
     2350    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2351    return VERR_NOT_SUPPORTED;
     2352#endif
    20072353}
    20082354
    20092355
    20102356/* SVGA_3D_CMD_DX_SET_SCISSORRECTS 1175 */
    2011 static void vmsvga3dCmdDXSetScissorRects(PVGASTATECC pThisCC, SVGA3dCmdDXSetScissorRects const *pCmd)
    2012 {
    2013 ASMBreakpoint();
    2014     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2015     if (pSvgaR3State->pFuncsDX)
    2016     {
    2017         RT_NOREF(pCmd);
    2018         pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC->svga.p3dState);
    2019     }
     2357static int vmsvga3dCmdDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetScissorRects const *pCmd, uint32_t cbCmd)
     2358{
     2359#ifdef VMSVGA3D_DX
     2360//ASMBreakpoint();
     2361    SVGASignedRect const *paRect = (SVGASignedRect *)&pCmd[1];
     2362    uint32_t const cRect = (cbCmd - sizeof(*pCmd)) / sizeof(SVGASignedRect);
     2363    return vmsvga3dDXSetScissorRects(pThisCC, idDXContext, cRect, paRect);
     2364#else
     2365    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2366    return VERR_NOT_SUPPORTED;
     2367#endif
    20202368}
    20212369
    20222370
    20232371/* SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW 1176 */
    2024 static void vmsvga3dCmdDXClearRenderTargetView(PVGASTATECC pThisCC, SVGA3dCmdDXClearRenderTargetView const *pCmd)
    2025 {
    2026 ASMBreakpoint();
    2027     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2028     if (pSvgaR3State->pFuncsDX)
    2029     {
    2030         RT_NOREF(pCmd);
    2031         pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC->svga.p3dState);
    2032     }
     2372static int vmsvga3dCmdDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd, uint32_t cbCmd)
     2373{
     2374#ifdef VMSVGA3D_DX
     2375ASMBreakpoint();
     2376    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2377    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2378    return vmsvga3dDXClearRenderTargetView(pThisCC, idDXContext);
     2379#else
     2380    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2381    return VERR_NOT_SUPPORTED;
     2382#endif
    20332383}
    20342384
    20352385
    20362386/* SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW 1177 */
    2037 static void vmsvga3dCmdDXClearDepthStencilView(PVGASTATECC pThisCC, SVGA3dCmdDXClearDepthStencilView const *pCmd)
    2038 {
    2039 ASMBreakpoint();
    2040     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2041     if (pSvgaR3State->pFuncsDX)
    2042     {
    2043         RT_NOREF(pCmd);
    2044         pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC->svga.p3dState);
    2045     }
     2387static int vmsvga3dCmdDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd, uint32_t cbCmd)
     2388{
     2389#ifdef VMSVGA3D_DX
     2390ASMBreakpoint();
     2391    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2392    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2393    return vmsvga3dDXClearDepthStencilView(pThisCC, idDXContext);
     2394#else
     2395    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2396    return VERR_NOT_SUPPORTED;
     2397#endif
    20462398}
    20472399
    20482400
    20492401/* SVGA_3D_CMD_DX_PRED_COPY_REGION 1178 */
    2050 static void vmsvga3dCmdDXPredCopyRegion(PVGASTATECC pThisCC, SVGA3dCmdDXPredCopyRegion const *pCmd)
    2051 {
    2052 ASMBreakpoint();
    2053     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2054     if (pSvgaR3State->pFuncsDX)
    2055     {
    2056         RT_NOREF(pCmd);
    2057         pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC->svga.p3dState);
    2058     }
     2402static int vmsvga3dCmdDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd, uint32_t cbCmd)
     2403{
     2404#ifdef VMSVGA3D_DX
     2405ASMBreakpoint();
     2406    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2407    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2408    return vmsvga3dDXPredCopyRegion(pThisCC, idDXContext);
     2409#else
     2410    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2411    return VERR_NOT_SUPPORTED;
     2412#endif
    20592413}
    20602414
    20612415
    20622416/* SVGA_3D_CMD_DX_PRED_COPY 1179 */
    2063 static void vmsvga3dCmdDXPredCopy(PVGASTATECC pThisCC, SVGA3dCmdDXPredCopy const *pCmd)
    2064 {
    2065 ASMBreakpoint();
    2066     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2067     if (pSvgaR3State->pFuncsDX)
    2068     {
    2069         RT_NOREF(pCmd);
    2070         pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC->svga.p3dState);
    2071     }
     2417static int vmsvga3dCmdDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopy const *pCmd, uint32_t cbCmd)
     2418{
     2419#ifdef VMSVGA3D_DX
     2420ASMBreakpoint();
     2421    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2422    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2423    return vmsvga3dDXPredCopy(pThisCC, idDXContext);
     2424#else
     2425    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2426    return VERR_NOT_SUPPORTED;
     2427#endif
    20722428}
    20732429
    20742430
    20752431/* SVGA_3D_CMD_DX_PRESENTBLT 1180 */
    2076 static void vmsvga3dCmdDXPresentBlt(PVGASTATECC pThisCC, SVGA3dCmdDXPresentBlt const *pCmd)
    2077 {
    2078 ASMBreakpoint();
    2079     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2080     if (pSvgaR3State->pFuncsDX)
    2081     {
    2082         RT_NOREF(pCmd);
    2083         pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC->svga.p3dState);
    2084     }
     2432static int vmsvga3dCmdDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPresentBlt const *pCmd, uint32_t cbCmd)
     2433{
     2434#ifdef VMSVGA3D_DX
     2435ASMBreakpoint();
     2436    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2437    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2438    return vmsvga3dDXPresentBlt(pThisCC, idDXContext);
     2439#else
     2440    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2441    return VERR_NOT_SUPPORTED;
     2442#endif
    20852443}
    20862444
    20872445
    20882446/* SVGA_3D_CMD_DX_GENMIPS 1181 */
    2089 static void vmsvga3dCmdDXGenMips(PVGASTATECC pThisCC, SVGA3dCmdDXGenMips const *pCmd)
    2090 {
    2091 ASMBreakpoint();
    2092     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2093     if (pSvgaR3State->pFuncsDX)
    2094     {
    2095         RT_NOREF(pCmd);
    2096         pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC->svga.p3dState);
    2097     }
     2447static int vmsvga3dCmdDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd, uint32_t cbCmd)
     2448{
     2449#ifdef VMSVGA3D_DX
     2450ASMBreakpoint();
     2451    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2452    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2453    return vmsvga3dDXGenMips(pThisCC, idDXContext);
     2454#else
     2455    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2456    return VERR_NOT_SUPPORTED;
     2457#endif
    20982458}
    20992459
    21002460
    21012461/* SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE 1182 */
    2102 static void vmsvga3dCmdDXUpdateSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXUpdateSubResource const *pCmd)
    2103 {
    2104 ASMBreakpoint();
    2105     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2106     if (pSvgaR3State->pFuncsDX)
    2107     {
    2108         RT_NOREF(pCmd);
    2109         pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource(pThisCC->svga.p3dState);
    2110     }
     2462static int vmsvga3dCmdDXUpdateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXUpdateSubResource const *pCmd, uint32_t cbCmd)
     2463{
     2464#ifdef VMSVGA3D_DX
     2465ASMBreakpoint();
     2466    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2467    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2468    return vmsvga3dDXUpdateSubResource(pThisCC, idDXContext);
     2469#else
     2470    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2471    return VERR_NOT_SUPPORTED;
     2472#endif
    21112473}
    21122474
    21132475
    21142476/* SVGA_3D_CMD_DX_READBACK_SUBRESOURCE 1183 */
    2115 static void vmsvga3dCmdDXReadbackSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackSubResource const *pCmd)
    2116 {
    2117 ASMBreakpoint();
    2118     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2119     if (pSvgaR3State->pFuncsDX)
    2120     {
    2121         RT_NOREF(pCmd);
    2122         pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource(pThisCC->svga.p3dState);
    2123     }
     2477static int vmsvga3dCmdDXReadbackSubResource(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackSubResource const *pCmd, uint32_t cbCmd)
     2478{
     2479#ifdef VMSVGA3D_DX
     2480ASMBreakpoint();
     2481    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2482    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2483    return vmsvga3dDXReadbackSubResource(pThisCC, idDXContext);
     2484#else
     2485    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2486    return VERR_NOT_SUPPORTED;
     2487#endif
    21242488}
    21252489
    21262490
    21272491/* SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE 1184 */
    2128 static void vmsvga3dCmdDXInvalidateSubResource(PVGASTATECC pThisCC, SVGA3dCmdDXInvalidateSubResource const *pCmd)
    2129 {
    2130 ASMBreakpoint();
    2131     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2132     if (pSvgaR3State->pFuncsDX)
    2133     {
    2134         RT_NOREF(pCmd);
    2135         pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource(pThisCC->svga.p3dState);
    2136     }
     2492static int vmsvga3dCmdDXInvalidateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXInvalidateSubResource const *pCmd, uint32_t cbCmd)
     2493{
     2494#ifdef VMSVGA3D_DX
     2495ASMBreakpoint();
     2496    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2497    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2498    return vmsvga3dDXInvalidateSubResource(pThisCC, idDXContext);
     2499#else
     2500    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2501    return VERR_NOT_SUPPORTED;
     2502#endif
    21372503}
    21382504
    21392505
    21402506/* SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW 1185 */
    2141 static void vmsvga3dCmdDXDefineShaderResourceView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
    2142 {
    2143 ASMBreakpoint();
    2144     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2145     if (pSvgaR3State->pFuncsDX)
    2146     {
    2147         RT_NOREF(pCmd);
    2148         pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC->svga.p3dState);
    2149     }
     2507static int vmsvga3dCmdDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd, uint32_t cbCmd)
     2508{
     2509#ifdef VMSVGA3D_DX
     2510ASMBreakpoint();
     2511    RT_NOREF(cbCmd);
     2512    return vmsvga3dDXDefineShaderResourceView(pThisCC, idDXContext, pCmd);
     2513#else
     2514    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2515    return VERR_NOT_SUPPORTED;
     2516#endif
    21502517}
    21512518
    21522519
    21532520/* SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW 1186 */
    2154 static void vmsvga3dCmdDXDestroyShaderResourceView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
    2155 {
    2156 ASMBreakpoint();
    2157     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2158     if (pSvgaR3State->pFuncsDX)
    2159     {
    2160         RT_NOREF(pCmd);
    2161         pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC->svga.p3dState);
    2162     }
     2521static int vmsvga3dCmdDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd, uint32_t cbCmd)
     2522{
     2523#ifdef VMSVGA3D_DX
     2524ASMBreakpoint();
     2525    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2526    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2527    return vmsvga3dDXDestroyShaderResourceView(pThisCC, idDXContext);
     2528#else
     2529    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2530    return VERR_NOT_SUPPORTED;
     2531#endif
    21632532}
    21642533
    21652534
    21662535/* SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW 1187 */
    2167 static void vmsvga3dCmdDXDefineRenderTargetView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
    2168 {
    2169 ASMBreakpoint();
    2170     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2171     if (pSvgaR3State->pFuncsDX)
    2172     {
    2173         RT_NOREF(pCmd);
    2174         pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC->svga.p3dState);
    2175     }
     2536static int vmsvga3dCmdDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd, uint32_t cbCmd)
     2537{
     2538#ifdef VMSVGA3D_DX
     2539//ASMBreakpoint();
     2540    RT_NOREF(cbCmd);
     2541    return vmsvga3dDXDefineRenderTargetView(pThisCC, idDXContext, pCmd);
     2542#else
     2543    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2544    return VERR_NOT_SUPPORTED;
     2545#endif
    21762546}
    21772547
    21782548
    21792549/* SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW 1188 */
    2180 static void vmsvga3dCmdDXDestroyRenderTargetView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
    2181 {
    2182 ASMBreakpoint();
    2183     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2184     if (pSvgaR3State->pFuncsDX)
    2185     {
    2186         RT_NOREF(pCmd);
    2187         pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC->svga.p3dState);
    2188     }
     2550static int vmsvga3dCmdDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd, uint32_t cbCmd)
     2551{
     2552#ifdef VMSVGA3D_DX
     2553ASMBreakpoint();
     2554    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2555    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2556    return vmsvga3dDXDestroyRenderTargetView(pThisCC, idDXContext);
     2557#else
     2558    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2559    return VERR_NOT_SUPPORTED;
     2560#endif
    21892561}
    21902562
    21912563
    21922564/* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW 1189 */
    2193 static void vmsvga3dCmdDXDefineDepthStencilView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineDepthStencilView const *pCmd)
    2194 {
    2195 ASMBreakpoint();
    2196     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2197     if (pSvgaR3State->pFuncsDX)
    2198     {
    2199         RT_NOREF(pCmd);
    2200         pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC->svga.p3dState);
    2201     }
     2565static int vmsvga3dCmdDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView const *pCmd, uint32_t cbCmd)
     2566{
     2567#ifdef VMSVGA3D_DX
     2568ASMBreakpoint();
     2569    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2570    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2571    return vmsvga3dDXDefineDepthStencilView(pThisCC, idDXContext);
     2572#else
     2573    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2574    return VERR_NOT_SUPPORTED;
     2575#endif
    22022576}
    22032577
    22042578
    22052579/* SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW 1190 */
    2206 static void vmsvga3dCmdDXDestroyDepthStencilView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
    2207 {
    2208 ASMBreakpoint();
    2209     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2210     if (pSvgaR3State->pFuncsDX)
    2211     {
    2212         RT_NOREF(pCmd);
    2213         pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC->svga.p3dState);
    2214     }
     2580static int vmsvga3dCmdDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd, uint32_t cbCmd)
     2581{
     2582#ifdef VMSVGA3D_DX
     2583ASMBreakpoint();
     2584    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2585    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2586    return vmsvga3dDXDestroyDepthStencilView(pThisCC, idDXContext);
     2587#else
     2588    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2589    return VERR_NOT_SUPPORTED;
     2590#endif
    22152591}
    22162592
    22172593
    22182594/* SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT 1191 */
    2219 static void vmsvga3dCmdDXDefineElementLayout(PVGASTATECC pThisCC, SVGA3dCmdDXDefineElementLayout const *pCmd)
    2220 {
    2221 ASMBreakpoint();
    2222     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2223     if (pSvgaR3State->pFuncsDX)
    2224     {
    2225         RT_NOREF(pCmd);
    2226         pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC->svga.p3dState);
    2227     }
     2595static int vmsvga3dCmdDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineElementLayout const *pCmd, uint32_t cbCmd)
     2596{
     2597#ifdef VMSVGA3D_DX
     2598//ASMBreakpoint();
     2599    SVGA3dInputElementDesc const *paDesc = (SVGA3dInputElementDesc *)&pCmd[1];
     2600    uint32_t const cDesc = (cbCmd - sizeof(*pCmd)) / sizeof(SVGA3dInputElementDesc);
     2601    return vmsvga3dDXDefineElementLayout(pThisCC, idDXContext, pCmd->elementLayoutId, cDesc, paDesc);
     2602#else
     2603    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2604    return VERR_NOT_SUPPORTED;
     2605#endif
    22282606}
    22292607
    22302608
    22312609/* SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT 1192 */
    2232 static void vmsvga3dCmdDXDestroyElementLayout(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyElementLayout const *pCmd)
    2233 {
    2234 ASMBreakpoint();
    2235     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2236     if (pSvgaR3State->pFuncsDX)
    2237     {
    2238         RT_NOREF(pCmd);
    2239         pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC->svga.p3dState);
    2240     }
     2610static int vmsvga3dCmdDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd, uint32_t cbCmd)
     2611{
     2612#ifdef VMSVGA3D_DX
     2613ASMBreakpoint();
     2614    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2615    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2616    return vmsvga3dDXDestroyElementLayout(pThisCC, idDXContext);
     2617#else
     2618    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2619    return VERR_NOT_SUPPORTED;
     2620#endif
    22412621}
    22422622
    22432623
    22442624/* SVGA_3D_CMD_DX_DEFINE_BLEND_STATE 1193 */
    2245 static void vmsvga3dCmdDXDefineBlendState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineBlendState const *pCmd)
    2246 {
    2247 ASMBreakpoint();
    2248     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2249     if (pSvgaR3State->pFuncsDX)
    2250     {
    2251         RT_NOREF(pCmd);
    2252         pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC->svga.p3dState);
    2253     }
     2625static int vmsvga3dCmdDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd, uint32_t cbCmd)
     2626{
     2627#ifdef VMSVGA3D_DX
     2628//ASMBreakpoint();
     2629    RT_NOREF(cbCmd);
     2630    return vmsvga3dDXDefineBlendState(pThisCC, idDXContext, pCmd);
     2631#else
     2632    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2633    return VERR_NOT_SUPPORTED;
     2634#endif
    22542635}
    22552636
    22562637
    22572638/* SVGA_3D_CMD_DX_DESTROY_BLEND_STATE 1194 */
    2258 static void vmsvga3dCmdDXDestroyBlendState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyBlendState const *pCmd)
    2259 {
    2260 ASMBreakpoint();
    2261     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2262     if (pSvgaR3State->pFuncsDX)
    2263     {
    2264         RT_NOREF(pCmd);
    2265         pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC->svga.p3dState);
    2266     }
     2639static int vmsvga3dCmdDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd, uint32_t cbCmd)
     2640{
     2641#ifdef VMSVGA3D_DX
     2642ASMBreakpoint();
     2643    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2644    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2645    return vmsvga3dDXDestroyBlendState(pThisCC, idDXContext);
     2646#else
     2647    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2648    return VERR_NOT_SUPPORTED;
     2649#endif
    22672650}
    22682651
    22692652
    22702653/* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE 1195 */
    2271 static void vmsvga3dCmdDXDefineDepthStencilState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
    2272 {
    2273 ASMBreakpoint();
    2274     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2275     if (pSvgaR3State->pFuncsDX)
    2276     {
    2277         RT_NOREF(pCmd);
    2278         pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC->svga.p3dState);
    2279     }
     2654static int vmsvga3dCmdDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd, uint32_t cbCmd)
     2655{
     2656#ifdef VMSVGA3D_DX
     2657//ASMBreakpoint();
     2658    RT_NOREF(cbCmd);
     2659    return vmsvga3dDXDefineDepthStencilState(pThisCC, idDXContext, pCmd);
     2660#else
     2661    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2662    return VERR_NOT_SUPPORTED;
     2663#endif
    22802664}
    22812665
    22822666
    22832667/* SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE 1196 */
    2284 static void vmsvga3dCmdDXDestroyDepthStencilState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyDepthStencilState const *pCmd)
    2285 {
    2286 ASMBreakpoint();
    2287     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2288     if (pSvgaR3State->pFuncsDX)
    2289     {
    2290         RT_NOREF(pCmd);
    2291         pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC->svga.p3dState);
    2292     }
     2668static int vmsvga3dCmdDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd, uint32_t cbCmd)
     2669{
     2670#ifdef VMSVGA3D_DX
     2671ASMBreakpoint();
     2672    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2673    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2674    return vmsvga3dDXDestroyDepthStencilState(pThisCC, idDXContext);
     2675#else
     2676    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2677    return VERR_NOT_SUPPORTED;
     2678#endif
    22932679}
    22942680
    22952681
    22962682/* SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE 1197 */
    2297 static void vmsvga3dCmdDXDefineRasterizerState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineRasterizerState const *pCmd)
    2298 {
    2299 ASMBreakpoint();
    2300     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2301     if (pSvgaR3State->pFuncsDX)
    2302     {
    2303         RT_NOREF(pCmd);
    2304         pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC->svga.p3dState);
    2305     }
     2683static int vmsvga3dCmdDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd, uint32_t cbCmd)
     2684{
     2685#ifdef VMSVGA3D_DX
     2686//ASMBreakpoint();
     2687    RT_NOREF(cbCmd);
     2688    return vmsvga3dDXDefineRasterizerState(pThisCC, idDXContext, pCmd);
     2689#else
     2690    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2691    return VERR_NOT_SUPPORTED;
     2692#endif
    23062693}
    23072694
    23082695
    23092696/* SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE 1198 */
    2310 static void vmsvga3dCmdDXDestroyRasterizerState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyRasterizerState const *pCmd)
    2311 {
    2312 ASMBreakpoint();
    2313     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2314     if (pSvgaR3State->pFuncsDX)
    2315     {
    2316         RT_NOREF(pCmd);
    2317         pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC->svga.p3dState);
    2318     }
     2697static int vmsvga3dCmdDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd, uint32_t cbCmd)
     2698{
     2699#ifdef VMSVGA3D_DX
     2700ASMBreakpoint();
     2701    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2702    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2703    return vmsvga3dDXDestroyRasterizerState(pThisCC, idDXContext);
     2704#else
     2705    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2706    return VERR_NOT_SUPPORTED;
     2707#endif
    23192708}
    23202709
    23212710
    23222711/* SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE 1199 */
    2323 static void vmsvga3dCmdDXDefineSamplerState(PVGASTATECC pThisCC, SVGA3dCmdDXDefineSamplerState const *pCmd)
    2324 {
    2325 ASMBreakpoint();
    2326     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2327     if (pSvgaR3State->pFuncsDX)
    2328     {
    2329         RT_NOREF(pCmd);
    2330         pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC->svga.p3dState);
    2331     }
     2712static int vmsvga3dCmdDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd, uint32_t cbCmd)
     2713{
     2714#ifdef VMSVGA3D_DX
     2715//ASMBreakpoint();
     2716    RT_NOREF(cbCmd);
     2717    return vmsvga3dDXDefineSamplerState(pThisCC, idDXContext, pCmd);
     2718#else
     2719    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2720    return VERR_NOT_SUPPORTED;
     2721#endif
    23322722}
    23332723
    23342724
    23352725/* SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE 1200 */
    2336 static void vmsvga3dCmdDXDestroySamplerState(PVGASTATECC pThisCC, SVGA3dCmdDXDestroySamplerState const *pCmd)
    2337 {
    2338 ASMBreakpoint();
    2339     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2340     if (pSvgaR3State->pFuncsDX)
    2341     {
    2342         RT_NOREF(pCmd);
    2343         pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC->svga.p3dState);
    2344     }
     2726static int vmsvga3dCmdDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd, uint32_t cbCmd)
     2727{
     2728#ifdef VMSVGA3D_DX
     2729ASMBreakpoint();
     2730    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2731    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2732    return vmsvga3dDXDestroySamplerState(pThisCC, idDXContext);
     2733#else
     2734    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2735    return VERR_NOT_SUPPORTED;
     2736#endif
    23452737}
    23462738
    23472739
    23482740/* SVGA_3D_CMD_DX_DEFINE_SHADER 1201 */
    2349 static void vmsvga3dCmdDXDefineShader(PVGASTATECC pThisCC, SVGA3dCmdDXDefineShader const *pCmd)
    2350 {
    2351 ASMBreakpoint();
    2352     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2353     if (pSvgaR3State->pFuncsDX)
    2354     {
    2355         RT_NOREF(pCmd);
    2356         pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC->svga.p3dState);
    2357     }
     2741static int vmsvga3dCmdDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd, uint32_t cbCmd)
     2742{
     2743#ifdef VMSVGA3D_DX
     2744//ASMBreakpoint();
     2745    RT_NOREF(cbCmd);
     2746    return vmsvga3dDXDefineShader(pThisCC, idDXContext, pCmd);
     2747#else
     2748    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2749    return VERR_NOT_SUPPORTED;
     2750#endif
    23582751}
    23592752
    23602753
    23612754/* SVGA_3D_CMD_DX_DESTROY_SHADER 1202 */
    2362 static void vmsvga3dCmdDXDestroyShader(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyShader const *pCmd)
    2363 {
    2364 ASMBreakpoint();
    2365     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2366     if (pSvgaR3State->pFuncsDX)
    2367     {
    2368         RT_NOREF(pCmd);
    2369         pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC->svga.p3dState);
    2370     }
     2755static int vmsvga3dCmdDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd, uint32_t cbCmd)
     2756{
     2757#ifdef VMSVGA3D_DX
     2758ASMBreakpoint();
     2759    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2760    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2761    return vmsvga3dDXDestroyShader(pThisCC, idDXContext);
     2762#else
     2763    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2764    return VERR_NOT_SUPPORTED;
     2765#endif
    23712766}
    23722767
    23732768
    23742769/* SVGA_3D_CMD_DX_BIND_SHADER 1203 */
    2375 static void vmsvga3dCmdDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd)
    2376 {
    2377 ASMBreakpoint();
    2378     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2379     if (pSvgaR3State->pFuncsDX)
    2380     {
    2381         RT_NOREF(pCmd);
    2382         pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC->svga.p3dState);
    2383     }
     2770static int vmsvga3dCmdDXBindShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindShader const *pCmd, uint32_t cbCmd)
     2771{
     2772#ifdef VMSVGA3D_DX
     2773//ASMBreakpoint();
     2774    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2775    RT_NOREF(cbCmd);
     2776    ASSERT_GUEST_LOGREL_MSG(idDXContext == pCmd->cid, ("idDXContext = %u, pCmd->cid = %u\n", idDXContext, pCmd->cid));
     2777    /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */
     2778    PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
     2779    return vmsvga3dDXBindShader(pThisCC, pCmd->cid, pMob, pCmd->shid, pCmd->offsetInBytes);
     2780#else
     2781    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2782    return VERR_NOT_SUPPORTED;
     2783#endif
    23842784}
    23852785
    23862786
    23872787/* SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT 1204 */
    2388 static void vmsvga3dCmdDXDefineStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXDefineStreamOutput const *pCmd)
    2389 {
    2390 ASMBreakpoint();
    2391     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2392     if (pSvgaR3State->pFuncsDX)
    2393     {
    2394         RT_NOREF(pCmd);
    2395         pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC->svga.p3dState);
    2396     }
     2788static int vmsvga3dCmdDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd, uint32_t cbCmd)
     2789{
     2790#ifdef VMSVGA3D_DX
     2791ASMBreakpoint();
     2792    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2793    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2794    return vmsvga3dDXDefineStreamOutput(pThisCC, idDXContext);
     2795#else
     2796    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2797    return VERR_NOT_SUPPORTED;
     2798#endif
    23972799}
    23982800
    23992801
    24002802/* SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT 1205 */
    2401 static void vmsvga3dCmdDXDestroyStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
    2402 {
    2403 ASMBreakpoint();
    2404     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2405     if (pSvgaR3State->pFuncsDX)
    2406     {
    2407         RT_NOREF(pCmd);
    2408         pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC->svga.p3dState);
    2409     }
     2803static int vmsvga3dCmdDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd, uint32_t cbCmd)
     2804{
     2805#ifdef VMSVGA3D_DX
     2806ASMBreakpoint();
     2807    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2808    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2809    return vmsvga3dDXDestroyStreamOutput(pThisCC, idDXContext);
     2810#else
     2811    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2812    return VERR_NOT_SUPPORTED;
     2813#endif
    24102814}
    24112815
    24122816
    24132817/* SVGA_3D_CMD_DX_SET_STREAMOUTPUT 1206 */
    2414 static void vmsvga3dCmdDXSetStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXSetStreamOutput const *pCmd)
    2415 {
    2416 ASMBreakpoint();
    2417     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2418     if (pSvgaR3State->pFuncsDX)
    2419     {
    2420         RT_NOREF(pCmd);
    2421         pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC->svga.p3dState);
    2422     }
     2818static int vmsvga3dCmdDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd, uint32_t cbCmd)
     2819{
     2820#ifdef VMSVGA3D_DX
     2821ASMBreakpoint();
     2822    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2823    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2824    return vmsvga3dDXSetStreamOutput(pThisCC, idDXContext);
     2825#else
     2826    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2827    return VERR_NOT_SUPPORTED;
     2828#endif
    24232829}
    24242830
    24252831
    24262832/* SVGA_3D_CMD_DX_SET_COTABLE 1207 */
    2427 static void vmsvga3dCmdDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd)
    2428 {
    2429 ASMBreakpoint();
    2430     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2431     if (pSvgaR3State->pFuncsDX)
    2432     {
    2433         RT_NOREF(pCmd);
    2434         pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC->svga.p3dState);
    2435     }
     2833static int vmsvga3dCmdDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, uint32_t cbCmd)
     2834{
     2835#ifdef VMSVGA3D_DX
     2836//ASMBreakpoint();
     2837    RT_NOREF(cbCmd);
     2838    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2839    /* This returns NULL if mob does not exist. If the guest sends a wrong mob id, the current mob will be unbound. */
     2840    PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
     2841    return vmsvga3dDXSetCOTable(pThisCC, pCmd->cid, pMob, pCmd->type, pCmd->validSizeInBytes);
     2842#else
     2843    RT_NOREF(pThisCC, pCmd, cbCmd);
     2844    return VERR_NOT_SUPPORTED;
     2845#endif
    24362846}
    24372847
    24382848
    24392849/* SVGA_3D_CMD_DX_READBACK_COTABLE 1208 */
    2440 static void vmsvga3dCmdDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
    2441 {
    2442 ASMBreakpoint();
    2443     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2444     if (pSvgaR3State->pFuncsDX)
    2445     {
    2446         RT_NOREF(pCmd);
    2447         pSvgaR3State->pFuncsDX->pfnDXReadbackCOTable(pThisCC->svga.p3dState);
    2448     }
     2850static int vmsvga3dCmdDXReadbackCOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackCOTable const *pCmd, uint32_t cbCmd)
     2851{
     2852#ifdef VMSVGA3D_DX
     2853ASMBreakpoint();
     2854    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2855    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2856    return vmsvga3dDXReadbackCOTable(pThisCC, idDXContext);
     2857#else
     2858    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2859    return VERR_NOT_SUPPORTED;
     2860#endif
    24492861}
    24502862
    24512863
    24522864/* SVGA_3D_CMD_DX_BUFFER_COPY 1209 */
    2453 static void vmsvga3dCmdDXBufferCopy(PVGASTATECC pThisCC, SVGA3dCmdDXBufferCopy const *pCmd)
    2454 {
    2455 ASMBreakpoint();
    2456     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2457     if (pSvgaR3State->pFuncsDX)
    2458     {
    2459         RT_NOREF(pCmd);
    2460         pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC->svga.p3dState);
    2461     }
     2865static int vmsvga3dCmdDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBufferCopy const *pCmd, uint32_t cbCmd)
     2866{
     2867#ifdef VMSVGA3D_DX
     2868ASMBreakpoint();
     2869    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2870    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2871    return vmsvga3dDXBufferCopy(pThisCC, idDXContext);
     2872#else
     2873    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2874    return VERR_NOT_SUPPORTED;
     2875#endif
    24622876}
    24632877
    24642878
    24652879/* SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER 1210 */
    2466 static void vmsvga3dCmdDXTransferFromBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXTransferFromBuffer const *pCmd)
    2467 {
    2468 ASMBreakpoint();
    2469     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2470     if (pSvgaR3State->pFuncsDX)
    2471     {
    2472         RT_NOREF(pCmd);
    2473         pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer(pThisCC->svga.p3dState);
    2474     }
     2880static int vmsvga3dCmdDXTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXTransferFromBuffer const *pCmd, uint32_t cbCmd)
     2881{
     2882#ifdef VMSVGA3D_DX
     2883ASMBreakpoint();
     2884    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2885    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2886    return vmsvga3dDXTransferFromBuffer(pThisCC, idDXContext);
     2887#else
     2888    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2889    return VERR_NOT_SUPPORTED;
     2890#endif
    24752891}
    24762892
    24772893
    24782894/* SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK 1211 */
    2479 static void vmsvga3dCmdDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, SVGA3dCmdDXSurfaceCopyAndReadback const *pCmd)
    2480 {
    2481 ASMBreakpoint();
    2482     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2483     if (pSvgaR3State->pFuncsDX)
    2484     {
    2485         RT_NOREF(pCmd);
    2486         pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC->svga.p3dState);
    2487     }
     2895static int vmsvga3dCmdDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSurfaceCopyAndReadback const *pCmd, uint32_t cbCmd)
     2896{
     2897#ifdef VMSVGA3D_DX
     2898ASMBreakpoint();
     2899    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2900    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2901    return vmsvga3dDXSurfaceCopyAndReadback(pThisCC, idDXContext);
     2902#else
     2903    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2904    return VERR_NOT_SUPPORTED;
     2905#endif
    24882906}
    24892907
    24902908
    24912909/* SVGA_3D_CMD_DX_MOVE_QUERY 1212 */
    2492 static void vmsvga3dCmdDXMoveQuery(PVGASTATECC pThisCC, SVGA3dCmdDXMoveQuery const *pCmd)
    2493 {
    2494 ASMBreakpoint();
    2495     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2496     if (pSvgaR3State->pFuncsDX)
    2497     {
    2498         RT_NOREF(pCmd);
    2499         pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC->svga.p3dState);
    2500     }
     2910static int vmsvga3dCmdDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXMoveQuery const *pCmd, uint32_t cbCmd)
     2911{
     2912#ifdef VMSVGA3D_DX
     2913ASMBreakpoint();
     2914    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2915    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2916    return vmsvga3dDXMoveQuery(pThisCC, idDXContext);
     2917#else
     2918    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2919    return VERR_NOT_SUPPORTED;
     2920#endif
    25012921}
    25022922
    25032923
    25042924/* SVGA_3D_CMD_DX_BIND_ALL_QUERY 1213 */
    2505 static void vmsvga3dCmdDXBindAllQuery(PVGASTATECC pThisCC, SVGA3dCmdDXBindAllQuery const *pCmd)
    2506 {
    2507 ASMBreakpoint();
    2508     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2509     if (pSvgaR3State->pFuncsDX)
    2510     {
    2511         RT_NOREF(pCmd);
    2512         pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC->svga.p3dState);
    2513     }
     2925static int vmsvga3dCmdDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd, uint32_t cbCmd)
     2926{
     2927#ifdef VMSVGA3D_DX
     2928ASMBreakpoint();
     2929    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2930    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2931    return vmsvga3dDXBindAllQuery(pThisCC, idDXContext);
     2932#else
     2933    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2934    return VERR_NOT_SUPPORTED;
     2935#endif
    25142936}
    25152937
    25162938
    25172939/* SVGA_3D_CMD_DX_READBACK_ALL_QUERY 1214 */
    2518 static void vmsvga3dCmdDXReadbackAllQuery(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackAllQuery const *pCmd)
    2519 {
    2520 ASMBreakpoint();
    2521     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2522     if (pSvgaR3State->pFuncsDX)
    2523     {
    2524         RT_NOREF(pCmd);
    2525         pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC->svga.p3dState);
    2526     }
     2940static int vmsvga3dCmdDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd, uint32_t cbCmd)
     2941{
     2942#ifdef VMSVGA3D_DX
     2943ASMBreakpoint();
     2944    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2945    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2946    return vmsvga3dDXReadbackAllQuery(pThisCC, idDXContext);
     2947#else
     2948    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2949    return VERR_NOT_SUPPORTED;
     2950#endif
    25272951}
    25282952
    25292953
    25302954/* SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER 1215 */
    2531 static void vmsvga3dCmdDXPredTransferFromBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXPredTransferFromBuffer const *pCmd)
    2532 {
    2533 ASMBreakpoint();
    2534     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2535     if (pSvgaR3State->pFuncsDX)
    2536     {
    2537         RT_NOREF(pCmd);
    2538         pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer(pThisCC->svga.p3dState);
    2539     }
     2955static int vmsvga3dCmdDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredTransferFromBuffer const *pCmd, uint32_t cbCmd)
     2956{
     2957#ifdef VMSVGA3D_DX
     2958ASMBreakpoint();
     2959    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2960    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2961    return vmsvga3dDXPredTransferFromBuffer(pThisCC, idDXContext);
     2962#else
     2963    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2964    return VERR_NOT_SUPPORTED;
     2965#endif
    25402966}
    25412967
    25422968
    25432969/* SVGA_3D_CMD_DX_MOB_FENCE_64 1216 */
    2544 static void vmsvga3dCmdDXMobFence64(PVGASTATECC pThisCC, SVGA3dCmdDXMobFence64 const *pCmd)
    2545 {
    2546 ASMBreakpoint();
    2547     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2548     if (pSvgaR3State->pFuncsDX)
    2549     {
    2550         RT_NOREF(pCmd);
    2551         pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC->svga.p3dState);
    2552     }
     2970static int vmsvga3dCmdDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXMobFence64 const *pCmd, uint32_t cbCmd)
     2971{
     2972#ifdef VMSVGA3D_DX
     2973ASMBreakpoint();
     2974    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2975    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2976    return vmsvga3dDXMobFence64(pThisCC, idDXContext);
     2977#else
     2978    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2979    return VERR_NOT_SUPPORTED;
     2980#endif
    25532981}
    25542982
    25552983
    25562984/* SVGA_3D_CMD_DX_BIND_ALL_SHADER 1217 */
    2557 static void vmsvga3dCmdDXBindAllShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindAllShader const *pCmd)
    2558 {
    2559 ASMBreakpoint();
    2560     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2561     if (pSvgaR3State->pFuncsDX)
    2562     {
    2563         RT_NOREF(pCmd);
    2564         pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC->svga.p3dState);
    2565     }
     2985static int vmsvga3dCmdDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllShader const *pCmd, uint32_t cbCmd)
     2986{
     2987#ifdef VMSVGA3D_DX
     2988ASMBreakpoint();
     2989    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     2990    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     2991    return vmsvga3dDXBindAllShader(pThisCC, idDXContext);
     2992#else
     2993    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     2994    return VERR_NOT_SUPPORTED;
     2995#endif
    25662996}
    25672997
    25682998
    25692999/* SVGA_3D_CMD_DX_HINT 1218 */
    2570 static void vmsvga3dCmdDXHint(PVGASTATECC pThisCC, SVGA3dCmdDXHint const *pCmd)
    2571 {
    2572 ASMBreakpoint();
    2573     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2574     if (pSvgaR3State->pFuncsDX)
    2575     {
    2576         RT_NOREF(pCmd);
    2577         pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC->svga.p3dState);
    2578     }
     3000static int vmsvga3dCmdDXHint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXHint const *pCmd, uint32_t cbCmd)
     3001{
     3002#ifdef VMSVGA3D_DX
     3003ASMBreakpoint();
     3004    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3005    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3006    return vmsvga3dDXHint(pThisCC, idDXContext);
     3007#else
     3008    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3009    return VERR_NOT_SUPPORTED;
     3010#endif
    25793011}
    25803012
    25813013
    25823014/* SVGA_3D_CMD_DX_BUFFER_UPDATE 1219 */
    2583 static void vmsvga3dCmdDXBufferUpdate(PVGASTATECC pThisCC, SVGA3dCmdDXBufferUpdate const *pCmd)
    2584 {
    2585 ASMBreakpoint();
    2586     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2587     if (pSvgaR3State->pFuncsDX)
    2588     {
    2589         RT_NOREF(pCmd);
    2590         pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC->svga.p3dState);
    2591     }
     3015static int vmsvga3dCmdDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBufferUpdate const *pCmd, uint32_t cbCmd)
     3016{
     3017#ifdef VMSVGA3D_DX
     3018ASMBreakpoint();
     3019    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3020    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3021    return vmsvga3dDXBufferUpdate(pThisCC, idDXContext);
     3022#else
     3023    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3024    return VERR_NOT_SUPPORTED;
     3025#endif
    25923026}
    25933027
    25943028
    25953029/* SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET 1220 */
    2596 static void vmsvga3dCmdDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetVSConstantBufferOffset const *pCmd)
    2597 {
    2598 ASMBreakpoint();
    2599     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2600     if (pSvgaR3State->pFuncsDX)
    2601     {
    2602         RT_NOREF(pCmd);
    2603         pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC->svga.p3dState);
    2604     }
     3030static int vmsvga3dCmdDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetVSConstantBufferOffset const *pCmd, uint32_t cbCmd)
     3031{
     3032#ifdef VMSVGA3D_DX
     3033ASMBreakpoint();
     3034    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3035    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3036    return vmsvga3dDXSetVSConstantBufferOffset(pThisCC, idDXContext);
     3037#else
     3038    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3039    return VERR_NOT_SUPPORTED;
     3040#endif
    26053041}
    26063042
    26073043
    26083044/* SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET 1221 */
    2609 static void vmsvga3dCmdDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetPSConstantBufferOffset const *pCmd)
    2610 {
    2611 ASMBreakpoint();
    2612     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2613     if (pSvgaR3State->pFuncsDX)
    2614     {
    2615         RT_NOREF(pCmd);
    2616         pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC->svga.p3dState);
    2617     }
     3045static int vmsvga3dCmdDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPSConstantBufferOffset const *pCmd, uint32_t cbCmd)
     3046{
     3047#ifdef VMSVGA3D_DX
     3048ASMBreakpoint();
     3049    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3050    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3051    return vmsvga3dDXSetPSConstantBufferOffset(pThisCC, idDXContext);
     3052#else
     3053    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3054    return VERR_NOT_SUPPORTED;
     3055#endif
    26183056}
    26193057
    26203058
    26213059/* SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET 1222 */
    2622 static void vmsvga3dCmdDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetGSConstantBufferOffset const *pCmd)
    2623 {
    2624 ASMBreakpoint();
    2625     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2626     if (pSvgaR3State->pFuncsDX)
    2627     {
    2628         RT_NOREF(pCmd);
    2629         pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC->svga.p3dState);
    2630     }
     3060static int vmsvga3dCmdDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetGSConstantBufferOffset const *pCmd, uint32_t cbCmd)
     3061{
     3062#ifdef VMSVGA3D_DX
     3063ASMBreakpoint();
     3064    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3065    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3066    return vmsvga3dDXSetGSConstantBufferOffset(pThisCC, idDXContext);
     3067#else
     3068    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3069    return VERR_NOT_SUPPORTED;
     3070#endif
    26313071}
    26323072
    26333073
    26343074/* SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET 1223 */
    2635 static void vmsvga3dCmdDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetHSConstantBufferOffset const *pCmd)
    2636 {
    2637 ASMBreakpoint();
    2638     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2639     if (pSvgaR3State->pFuncsDX)
    2640     {
    2641         RT_NOREF(pCmd);
    2642         pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC->svga.p3dState);
    2643     }
     3075static int vmsvga3dCmdDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetHSConstantBufferOffset const *pCmd, uint32_t cbCmd)
     3076{
     3077#ifdef VMSVGA3D_DX
     3078ASMBreakpoint();
     3079    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3080    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3081    return vmsvga3dDXSetHSConstantBufferOffset(pThisCC, idDXContext);
     3082#else
     3083    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3084    return VERR_NOT_SUPPORTED;
     3085#endif
    26443086}
    26453087
    26463088
    26473089/* SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET 1224 */
    2648 static void vmsvga3dCmdDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetDSConstantBufferOffset const *pCmd)
    2649 {
    2650 ASMBreakpoint();
    2651     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2652     if (pSvgaR3State->pFuncsDX)
    2653     {
    2654         RT_NOREF(pCmd);
    2655         pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC->svga.p3dState);
    2656     }
     3090static int vmsvga3dCmdDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDSConstantBufferOffset const *pCmd, uint32_t cbCmd)
     3091{
     3092#ifdef VMSVGA3D_DX
     3093ASMBreakpoint();
     3094    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3095    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3096    return vmsvga3dDXSetDSConstantBufferOffset(pThisCC, idDXContext);
     3097#else
     3098    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3099    return VERR_NOT_SUPPORTED;
     3100#endif
    26573101}
    26583102
    26593103
    26603104/* SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET 1225 */
    2661 static void vmsvga3dCmdDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, SVGA3dCmdDXSetCSConstantBufferOffset const *pCmd)
    2662 {
    2663 ASMBreakpoint();
    2664     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2665     if (pSvgaR3State->pFuncsDX)
    2666     {
    2667         RT_NOREF(pCmd);
    2668         pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC->svga.p3dState);
    2669     }
     3105static int vmsvga3dCmdDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSConstantBufferOffset const *pCmd, uint32_t cbCmd)
     3106{
     3107#ifdef VMSVGA3D_DX
     3108ASMBreakpoint();
     3109    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3110    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3111    return vmsvga3dDXSetCSConstantBufferOffset(pThisCC, idDXContext);
     3112#else
     3113    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3114    return VERR_NOT_SUPPORTED;
     3115#endif
    26703116}
    26713117
    26723118
    26733119/* SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER 1226 */
    2674 static void vmsvga3dCmdDXCondBindAllShader(PVGASTATECC pThisCC, SVGA3dCmdDXCondBindAllShader const *pCmd)
    2675 {
    2676 ASMBreakpoint();
    2677     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2678     if (pSvgaR3State->pFuncsDX)
    2679     {
    2680         RT_NOREF(pCmd);
    2681         pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC->svga.p3dState);
    2682     }
     3120static int vmsvga3dCmdDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCondBindAllShader const *pCmd, uint32_t cbCmd)
     3121{
     3122#ifdef VMSVGA3D_DX
     3123ASMBreakpoint();
     3124    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3125    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3126    return vmsvga3dDXCondBindAllShader(pThisCC, idDXContext);
     3127#else
     3128    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3129    return VERR_NOT_SUPPORTED;
     3130#endif
    26833131}
    26843132
    26853133
    26863134/* SVGA_3D_CMD_SCREEN_COPY 1227 */
    2687 static void vmsvga3dCmdScreenCopy(PVGASTATECC pThisCC, SVGA3dCmdScreenCopy const *pCmd)
    2688 {
    2689 ASMBreakpoint();
    2690     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2691     if (pSvgaR3State->pFuncsDX)
    2692     {
    2693         RT_NOREF(pCmd);
    2694         pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC->svga.p3dState);
    2695     }
     3135static int vmsvga3dCmdScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdScreenCopy const *pCmd, uint32_t cbCmd)
     3136{
     3137#ifdef VMSVGA3D_DX
     3138ASMBreakpoint();
     3139    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3140    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3141    return vmsvga3dScreenCopy(pThisCC, idDXContext);
     3142#else
     3143    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3144    return VERR_NOT_SUPPORTED;
     3145#endif
    26963146}
    26973147
    26983148
    26993149/* SVGA_3D_CMD_GROW_OTABLE 1236 */
    2700 static void vmsvga3dCmdGrowOTable(PVGASTATECC pThisCC, SVGA3dCmdGrowOTable const *pCmd)
    2701 {
    2702 ASMBreakpoint();
    2703     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2704     if (pSvgaR3State->pFuncsDX)
    2705     {
    2706         RT_NOREF(pCmd);
    2707         pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC->svga.p3dState);
    2708     }
     3150static int vmsvga3dCmdGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdGrowOTable const *pCmd, uint32_t cbCmd)
     3151{
     3152#ifdef VMSVGA3D_DX
     3153ASMBreakpoint();
     3154    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3155    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3156    return vmsvga3dGrowOTable(pThisCC, idDXContext);
     3157#else
     3158    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3159    return VERR_NOT_SUPPORTED;
     3160#endif
    27093161}
    27103162
    27113163
    27123164/* SVGA_3D_CMD_DX_GROW_COTABLE 1237 */
    2713 static void vmsvga3dCmdDXGrowCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXGrowCOTable const *pCmd)
    2714 {
    2715 ASMBreakpoint();
    2716     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2717     if (pSvgaR3State->pFuncsDX)
    2718     {
    2719         RT_NOREF(pCmd);
    2720         pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC->svga.p3dState);
    2721     }
     3165static int vmsvga3dCmdDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGrowCOTable const *pCmd, uint32_t cbCmd)
     3166{
     3167#ifdef VMSVGA3D_DX
     3168ASMBreakpoint();
     3169    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3170    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3171    return vmsvga3dDXGrowCOTable(pThisCC, idDXContext);
     3172#else
     3173    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3174    return VERR_NOT_SUPPORTED;
     3175#endif
    27223176}
    27233177
    27243178
    27253179/* SVGA_3D_CMD_INTRA_SURFACE_COPY 1238 */
    2726 static void vmsvga3dCmdIntraSurfaceCopy(PVGASTATECC pThisCC, SVGA3dCmdIntraSurfaceCopy const *pCmd)
    2727 {
    2728 ASMBreakpoint();
    2729     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2730     if (pSvgaR3State->pFuncsDX)
    2731     {
    2732         RT_NOREF(pCmd);
    2733         pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC->svga.p3dState);
    2734     }
     3180static int vmsvga3dCmdIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdIntraSurfaceCopy const *pCmd, uint32_t cbCmd)
     3181{
     3182#ifdef VMSVGA3D_DX
     3183ASMBreakpoint();
     3184    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3185    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3186    return vmsvga3dIntraSurfaceCopy(pThisCC, idDXContext);
     3187#else
     3188    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3189    return VERR_NOT_SUPPORTED;
     3190#endif
    27353191}
    27363192
    27373193
    27383194/* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 1239 */
    2739 static void vmsvga3dCmdDefineGBSurface_v3(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v3 const *pCmd)
    2740 {
    2741 ASMBreakpoint();
    2742     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2743     if (pSvgaR3State->pFuncsDX)
    2744     {
    2745         RT_NOREF(pCmd);
    2746         pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC->svga.p3dState);
    2747     }
     3195static int vmsvga3dCmdDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDefineGBSurface_v3 const *pCmd, uint32_t cbCmd)
     3196{
     3197#ifdef VMSVGA3D_DX
     3198ASMBreakpoint();
     3199    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3200    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3201    return vmsvga3dDefineGBSurface_v3(pThisCC, idDXContext);
     3202#else
     3203    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3204    return VERR_NOT_SUPPORTED;
     3205#endif
    27483206}
    27493207
    27503208
    27513209/* SVGA_3D_CMD_DX_RESOLVE_COPY 1240 */
    2752 static void vmsvga3dCmdDXResolveCopy(PVGASTATECC pThisCC, SVGA3dCmdDXResolveCopy const *pCmd)
    2753 {
    2754 ASMBreakpoint();
    2755     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2756     if (pSvgaR3State->pFuncsDX)
    2757     {
    2758         RT_NOREF(pCmd);
    2759         pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC->svga.p3dState);
    2760     }
     3210static int vmsvga3dCmdDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXResolveCopy const *pCmd, uint32_t cbCmd)
     3211{
     3212#ifdef VMSVGA3D_DX
     3213ASMBreakpoint();
     3214    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3215    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3216    return vmsvga3dDXResolveCopy(pThisCC, idDXContext);
     3217#else
     3218    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3219    return VERR_NOT_SUPPORTED;
     3220#endif
    27613221}
    27623222
    27633223
    27643224/* SVGA_3D_CMD_DX_PRED_RESOLVE_COPY 1241 */
    2765 static void vmsvga3dCmdDXPredResolveCopy(PVGASTATECC pThisCC, SVGA3dCmdDXPredResolveCopy const *pCmd)
    2766 {
    2767 ASMBreakpoint();
    2768     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2769     if (pSvgaR3State->pFuncsDX)
    2770     {
    2771         RT_NOREF(pCmd);
    2772         pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC->svga.p3dState);
    2773     }
     3225static int vmsvga3dCmdDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredResolveCopy const *pCmd, uint32_t cbCmd)
     3226{
     3227#ifdef VMSVGA3D_DX
     3228ASMBreakpoint();
     3229    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3230    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3231    return vmsvga3dDXPredResolveCopy(pThisCC, idDXContext);
     3232#else
     3233    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3234    return VERR_NOT_SUPPORTED;
     3235#endif
    27743236}
    27753237
    27763238
    27773239/* SVGA_3D_CMD_DX_PRED_CONVERT_REGION 1242 */
    2778 static void vmsvga3dCmdDXPredConvertRegion(PVGASTATECC pThisCC, SVGA3dCmdDXPredConvertRegion const *pCmd)
    2779 {
    2780 ASMBreakpoint();
    2781     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2782     if (pSvgaR3State->pFuncsDX)
    2783     {
    2784         RT_NOREF(pCmd);
    2785         pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC->svga.p3dState);
    2786     }
     3240static int vmsvga3dCmdDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredConvertRegion const *pCmd, uint32_t cbCmd)
     3241{
     3242#ifdef VMSVGA3D_DX
     3243ASMBreakpoint();
     3244    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3245    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3246    return vmsvga3dDXPredConvertRegion(pThisCC, idDXContext);
     3247#else
     3248    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3249    return VERR_NOT_SUPPORTED;
     3250#endif
    27873251}
    27883252
    27893253
    27903254/* SVGA_3D_CMD_DX_PRED_CONVERT 1243 */
    2791 static void vmsvga3dCmdDXPredConvert(PVGASTATECC pThisCC, SVGA3dCmdDXPredConvert const *pCmd)
    2792 {
    2793 ASMBreakpoint();
    2794     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2795     if (pSvgaR3State->pFuncsDX)
    2796     {
    2797         RT_NOREF(pCmd);
    2798         pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC->svga.p3dState);
    2799     }
     3255static int vmsvga3dCmdDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredConvert const *pCmd, uint32_t cbCmd)
     3256{
     3257#ifdef VMSVGA3D_DX
     3258ASMBreakpoint();
     3259    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3260    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3261    return vmsvga3dDXPredConvert(pThisCC, idDXContext);
     3262#else
     3263    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3264    return VERR_NOT_SUPPORTED;
     3265#endif
    28003266}
    28013267
    28023268
    28033269/* SVGA_3D_CMD_WHOLE_SURFACE_COPY 1244 */
    2804 static void vmsvga3dCmdWholeSurfaceCopy(PVGASTATECC pThisCC, SVGA3dCmdWholeSurfaceCopy const *pCmd)
    2805 {
    2806 ASMBreakpoint();
    2807     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2808     if (pSvgaR3State->pFuncsDX)
    2809     {
    2810         RT_NOREF(pCmd);
    2811         pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC->svga.p3dState);
    2812     }
     3270static int vmsvga3dCmdWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdWholeSurfaceCopy const *pCmd, uint32_t cbCmd)
     3271{
     3272#ifdef VMSVGA3D_DX
     3273ASMBreakpoint();
     3274    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3275    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3276    return vmsvga3dWholeSurfaceCopy(pThisCC, idDXContext);
     3277#else
     3278    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3279    return VERR_NOT_SUPPORTED;
     3280#endif
    28133281}
    28143282
    28153283
    28163284/* SVGA_3D_CMD_DX_DEFINE_UA_VIEW 1245 */
    2817 static void vmsvga3dCmdDXDefineUAView(PVGASTATECC pThisCC, SVGA3dCmdDXDefineUAView const *pCmd)
    2818 {
    2819 ASMBreakpoint();
    2820     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2821     if (pSvgaR3State->pFuncsDX)
    2822     {
    2823         RT_NOREF(pCmd);
    2824         pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC->svga.p3dState);
    2825     }
     3285static int vmsvga3dCmdDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineUAView const *pCmd, uint32_t cbCmd)
     3286{
     3287#ifdef VMSVGA3D_DX
     3288ASMBreakpoint();
     3289    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3290    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3291    return vmsvga3dDXDefineUAView(pThisCC, idDXContext);
     3292#else
     3293    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3294    return VERR_NOT_SUPPORTED;
     3295#endif
    28263296}
    28273297
    28283298
    28293299/* SVGA_3D_CMD_DX_DESTROY_UA_VIEW 1246 */
    2830 static void vmsvga3dCmdDXDestroyUAView(PVGASTATECC pThisCC, SVGA3dCmdDXDestroyUAView const *pCmd)
    2831 {
    2832 ASMBreakpoint();
    2833     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2834     if (pSvgaR3State->pFuncsDX)
    2835     {
    2836         RT_NOREF(pCmd);
    2837         pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC->svga.p3dState);
    2838     }
     3300static int vmsvga3dCmdDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyUAView const *pCmd, uint32_t cbCmd)
     3301{
     3302#ifdef VMSVGA3D_DX
     3303ASMBreakpoint();
     3304    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3305    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3306    return vmsvga3dDXDestroyUAView(pThisCC, idDXContext);
     3307#else
     3308    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3309    return VERR_NOT_SUPPORTED;
     3310#endif
    28393311}
    28403312
    28413313
    28423314/* SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT 1247 */
    2843 static void vmsvga3dCmdDXClearUAViewUint(PVGASTATECC pThisCC, SVGA3dCmdDXClearUAViewUint const *pCmd)
    2844 {
    2845 ASMBreakpoint();
    2846     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2847     if (pSvgaR3State->pFuncsDX)
    2848     {
    2849         RT_NOREF(pCmd);
    2850         pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC->svga.p3dState);
    2851     }
     3315static int vmsvga3dCmdDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewUint const *pCmd, uint32_t cbCmd)
     3316{
     3317#ifdef VMSVGA3D_DX
     3318ASMBreakpoint();
     3319    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3320    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3321    return vmsvga3dDXClearUAViewUint(pThisCC, idDXContext);
     3322#else
     3323    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3324    return VERR_NOT_SUPPORTED;
     3325#endif
    28523326}
    28533327
    28543328
    28553329/* SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT 1248 */
    2856 static void vmsvga3dCmdDXClearUAViewFloat(PVGASTATECC pThisCC, SVGA3dCmdDXClearUAViewFloat const *pCmd)
    2857 {
    2858 ASMBreakpoint();
    2859     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2860     if (pSvgaR3State->pFuncsDX)
    2861     {
    2862         RT_NOREF(pCmd);
    2863         pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC->svga.p3dState);
    2864     }
     3330static int vmsvga3dCmdDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewFloat const *pCmd, uint32_t cbCmd)
     3331{
     3332#ifdef VMSVGA3D_DX
     3333ASMBreakpoint();
     3334    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3335    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3336    return vmsvga3dDXClearUAViewFloat(pThisCC, idDXContext);
     3337#else
     3338    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3339    return VERR_NOT_SUPPORTED;
     3340#endif
    28653341}
    28663342
    28673343
    28683344/* SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT 1249 */
    2869 static void vmsvga3dCmdDXCopyStructureCount(PVGASTATECC pThisCC, SVGA3dCmdDXCopyStructureCount const *pCmd)
    2870 {
    2871 ASMBreakpoint();
    2872     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2873     if (pSvgaR3State->pFuncsDX)
    2874     {
    2875         RT_NOREF(pCmd);
    2876         pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC->svga.p3dState);
    2877     }
     3345static int vmsvga3dCmdDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCopyStructureCount const *pCmd, uint32_t cbCmd)
     3346{
     3347#ifdef VMSVGA3D_DX
     3348ASMBreakpoint();
     3349    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3350    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3351    return vmsvga3dDXCopyStructureCount(pThisCC, idDXContext);
     3352#else
     3353    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3354    return VERR_NOT_SUPPORTED;
     3355#endif
    28783356}
    28793357
    28803358
    28813359/* SVGA_3D_CMD_DX_SET_UA_VIEWS 1250 */
    2882 static void vmsvga3dCmdDXSetUAViews(PVGASTATECC pThisCC, SVGA3dCmdDXSetUAViews const *pCmd)
    2883 {
    2884 ASMBreakpoint();
    2885     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2886     if (pSvgaR3State->pFuncsDX)
    2887     {
    2888         RT_NOREF(pCmd);
    2889         pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC->svga.p3dState);
    2890     }
     3360static int vmsvga3dCmdDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetUAViews const *pCmd, uint32_t cbCmd)
     3361{
     3362#ifdef VMSVGA3D_DX
     3363ASMBreakpoint();
     3364    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3365    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3366    return vmsvga3dDXSetUAViews(pThisCC, idDXContext);
     3367#else
     3368    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3369    return VERR_NOT_SUPPORTED;
     3370#endif
    28913371}
    28923372
    28933373
    28943374/* SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT 1251 */
    2895 static void vmsvga3dCmdDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd)
    2896 {
    2897 ASMBreakpoint();
    2898     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2899     if (pSvgaR3State->pFuncsDX)
    2900     {
    2901         RT_NOREF(pCmd);
    2902         pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC->svga.p3dState);
    2903     }
     3375static int vmsvga3dCmdDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd, uint32_t cbCmd)
     3376{
     3377#ifdef VMSVGA3D_DX
     3378ASMBreakpoint();
     3379    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3380    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3381    return vmsvga3dDXDrawIndexedInstancedIndirect(pThisCC, idDXContext);
     3382#else
     3383    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3384    return VERR_NOT_SUPPORTED;
     3385#endif
    29043386}
    29053387
    29063388
    29073389/* SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT 1252 */
    2908 static void vmsvga3dCmdDXDrawInstancedIndirect(PVGASTATECC pThisCC, SVGA3dCmdDXDrawInstancedIndirect const *pCmd)
    2909 {
    2910 ASMBreakpoint();
    2911     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2912     if (pSvgaR3State->pFuncsDX)
    2913     {
    2914         RT_NOREF(pCmd);
    2915         pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC->svga.p3dState);
    2916     }
     3390static int vmsvga3dCmdDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstancedIndirect const *pCmd, uint32_t cbCmd)
     3391{
     3392#ifdef VMSVGA3D_DX
     3393ASMBreakpoint();
     3394    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3395    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3396    return vmsvga3dDXDrawInstancedIndirect(pThisCC, idDXContext);
     3397#else
     3398    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3399    return VERR_NOT_SUPPORTED;
     3400#endif
    29173401}
    29183402
    29193403
    29203404/* SVGA_3D_CMD_DX_DISPATCH 1253 */
    2921 static void vmsvga3dCmdDXDispatch(PVGASTATECC pThisCC, SVGA3dCmdDXDispatch const *pCmd)
    2922 {
    2923 ASMBreakpoint();
    2924     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2925     if (pSvgaR3State->pFuncsDX)
    2926     {
    2927         RT_NOREF(pCmd);
    2928         pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC->svga.p3dState);
    2929     }
     3405static int vmsvga3dCmdDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatch const *pCmd, uint32_t cbCmd)
     3406{
     3407#ifdef VMSVGA3D_DX
     3408ASMBreakpoint();
     3409    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3410    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3411    return vmsvga3dDXDispatch(pThisCC, idDXContext);
     3412#else
     3413    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3414    return VERR_NOT_SUPPORTED;
     3415#endif
    29303416}
    29313417
    29323418
    29333419/* SVGA_3D_CMD_DX_DISPATCH_INDIRECT 1254 */
    2934 static void vmsvga3dCmdDXDispatchIndirect(PVGASTATECC pThisCC, SVGA3dCmdDXDispatchIndirect const *pCmd)
    2935 {
    2936 ASMBreakpoint();
    2937     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2938     if (pSvgaR3State->pFuncsDX)
    2939     {
    2940         RT_NOREF(pCmd);
    2941         pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC->svga.p3dState);
    2942     }
     3420static int vmsvga3dCmdDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatchIndirect const *pCmd, uint32_t cbCmd)
     3421{
     3422#ifdef VMSVGA3D_DX
     3423ASMBreakpoint();
     3424    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3425    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3426    return vmsvga3dDXDispatchIndirect(pThisCC, idDXContext);
     3427#else
     3428    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3429    return VERR_NOT_SUPPORTED;
     3430#endif
    29433431}
    29443432
    29453433
    29463434/* SVGA_3D_CMD_WRITE_ZERO_SURFACE 1255 */
    2947 static void vmsvga3dCmdWriteZeroSurface(PVGASTATECC pThisCC, SVGA3dCmdWriteZeroSurface const *pCmd)
    2948 {
    2949 ASMBreakpoint();
    2950     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2951     if (pSvgaR3State->pFuncsDX)
    2952     {
    2953         RT_NOREF(pCmd);
    2954         pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC->svga.p3dState);
    2955     }
     3435static int vmsvga3dCmdWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdWriteZeroSurface const *pCmd, uint32_t cbCmd)
     3436{
     3437#ifdef VMSVGA3D_DX
     3438ASMBreakpoint();
     3439    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3440    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3441    return vmsvga3dWriteZeroSurface(pThisCC, idDXContext);
     3442#else
     3443    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3444    return VERR_NOT_SUPPORTED;
     3445#endif
    29563446}
    29573447
    29583448
    29593449/* SVGA_3D_CMD_HINT_ZERO_SURFACE 1256 */
    2960 static void vmsvga3dCmdHintZeroSurface(PVGASTATECC pThisCC, SVGA3dCmdHintZeroSurface const *pCmd)
    2961 {
    2962 ASMBreakpoint();
    2963     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2964     if (pSvgaR3State->pFuncsDX)
    2965     {
    2966         RT_NOREF(pCmd);
    2967         pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC->svga.p3dState);
    2968     }
     3450static int vmsvga3dCmdHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdHintZeroSurface const *pCmd, uint32_t cbCmd)
     3451{
     3452#ifdef VMSVGA3D_DX
     3453ASMBreakpoint();
     3454    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3455    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3456    return vmsvga3dHintZeroSurface(pThisCC, idDXContext);
     3457#else
     3458    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3459    return VERR_NOT_SUPPORTED;
     3460#endif
    29693461}
    29703462
    29713463
    29723464/* SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER 1257 */
    2973 static void vmsvga3dCmdDXTransferToBuffer(PVGASTATECC pThisCC, SVGA3dCmdDXTransferToBuffer const *pCmd)
    2974 {
    2975 ASMBreakpoint();
    2976     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2977     if (pSvgaR3State->pFuncsDX)
    2978     {
    2979         RT_NOREF(pCmd);
    2980         pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC->svga.p3dState);
    2981     }
     3465static int vmsvga3dCmdDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXTransferToBuffer const *pCmd, uint32_t cbCmd)
     3466{
     3467#ifdef VMSVGA3D_DX
     3468ASMBreakpoint();
     3469    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3470    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3471    return vmsvga3dDXTransferToBuffer(pThisCC, idDXContext);
     3472#else
     3473    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3474    return VERR_NOT_SUPPORTED;
     3475#endif
    29823476}
    29833477
    29843478
    29853479/* SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT 1258 */
    2986 static void vmsvga3dCmdDXSetStructureCount(PVGASTATECC pThisCC, SVGA3dCmdDXSetStructureCount const *pCmd)
    2987 {
    2988 ASMBreakpoint();
    2989     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    2990     if (pSvgaR3State->pFuncsDX)
    2991     {
    2992         RT_NOREF(pCmd);
    2993         pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC->svga.p3dState);
    2994     }
     3480static int vmsvga3dCmdDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStructureCount const *pCmd, uint32_t cbCmd)
     3481{
     3482#ifdef VMSVGA3D_DX
     3483ASMBreakpoint();
     3484    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3485    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3486    return vmsvga3dDXSetStructureCount(pThisCC, idDXContext);
     3487#else
     3488    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3489    return VERR_NOT_SUPPORTED;
     3490#endif
    29953491}
    29963492
    29973493
    29983494/* SVGA_3D_CMD_LOGICOPS_BITBLT 1259 */
    2999 static void vmsvga3dCmdLogicOpsBitBlt(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsBitBlt const *pCmd)
    3000 {
    3001 ASMBreakpoint();
    3002     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3003     if (pSvgaR3State->pFuncsDX)
    3004     {
    3005         RT_NOREF(pCmd);
    3006         pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC->svga.p3dState);
    3007     }
     3495static int vmsvga3dCmdLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsBitBlt const *pCmd, uint32_t cbCmd)
     3496{
     3497#ifdef VMSVGA3D_DX
     3498ASMBreakpoint();
     3499    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3500    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3501    return vmsvga3dLogicOpsBitBlt(pThisCC, idDXContext);
     3502#else
     3503    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3504    return VERR_NOT_SUPPORTED;
     3505#endif
    30083506}
    30093507
    30103508
    30113509/* SVGA_3D_CMD_LOGICOPS_TRANSBLT 1260 */
    3012 static void vmsvga3dCmdLogicOpsTransBlt(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsTransBlt const *pCmd)
    3013 {
    3014 ASMBreakpoint();
    3015     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3016     if (pSvgaR3State->pFuncsDX)
    3017     {
    3018         RT_NOREF(pCmd);
    3019         pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC->svga.p3dState);
    3020     }
     3510static int vmsvga3dCmdLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsTransBlt const *pCmd, uint32_t cbCmd)
     3511{
     3512#ifdef VMSVGA3D_DX
     3513ASMBreakpoint();
     3514    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3515    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3516    return vmsvga3dLogicOpsTransBlt(pThisCC, idDXContext);
     3517#else
     3518    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3519    return VERR_NOT_SUPPORTED;
     3520#endif
    30213521}
    30223522
    30233523
    30243524/* SVGA_3D_CMD_LOGICOPS_STRETCHBLT 1261 */
    3025 static void vmsvga3dCmdLogicOpsStretchBlt(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsStretchBlt const *pCmd)
    3026 {
    3027 ASMBreakpoint();
    3028     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3029     if (pSvgaR3State->pFuncsDX)
    3030     {
    3031         RT_NOREF(pCmd);
    3032         pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC->svga.p3dState);
    3033     }
     3525static int vmsvga3dCmdLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsStretchBlt const *pCmd, uint32_t cbCmd)
     3526{
     3527#ifdef VMSVGA3D_DX
     3528ASMBreakpoint();
     3529    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3530    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3531    return vmsvga3dLogicOpsStretchBlt(pThisCC, idDXContext);
     3532#else
     3533    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3534    return VERR_NOT_SUPPORTED;
     3535#endif
    30343536}
    30353537
    30363538
    30373539/* SVGA_3D_CMD_LOGICOPS_COLORFILL 1262 */
    3038 static void vmsvga3dCmdLogicOpsColorFill(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsColorFill const *pCmd)
    3039 {
    3040 ASMBreakpoint();
    3041     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3042     if (pSvgaR3State->pFuncsDX)
    3043     {
    3044         RT_NOREF(pCmd);
    3045         pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC->svga.p3dState);
    3046     }
     3540static int vmsvga3dCmdLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsColorFill const *pCmd, uint32_t cbCmd)
     3541{
     3542#ifdef VMSVGA3D_DX
     3543ASMBreakpoint();
     3544    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3545    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3546    return vmsvga3dLogicOpsColorFill(pThisCC, idDXContext);
     3547#else
     3548    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3549    return VERR_NOT_SUPPORTED;
     3550#endif
    30473551}
    30483552
    30493553
    30503554/* SVGA_3D_CMD_LOGICOPS_ALPHABLEND 1263 */
    3051 static void vmsvga3dCmdLogicOpsAlphaBlend(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsAlphaBlend const *pCmd)
    3052 {
    3053 ASMBreakpoint();
    3054     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3055     if (pSvgaR3State->pFuncsDX)
    3056     {
    3057         RT_NOREF(pCmd);
    3058         pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC->svga.p3dState);
    3059     }
     3555static int vmsvga3dCmdLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsAlphaBlend const *pCmd, uint32_t cbCmd)
     3556{
     3557#ifdef VMSVGA3D_DX
     3558ASMBreakpoint();
     3559    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3560    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3561    return vmsvga3dLogicOpsAlphaBlend(pThisCC, idDXContext);
     3562#else
     3563    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3564    return VERR_NOT_SUPPORTED;
     3565#endif
    30603566}
    30613567
    30623568
    30633569/* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND 1264 */
    3064 static void vmsvga3dCmdLogicOpsClearTypeBlend(PVGASTATECC pThisCC, SVGA3dCmdLogicOpsClearTypeBlend const *pCmd)
    3065 {
    3066 ASMBreakpoint();
    3067     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3068     if (pSvgaR3State->pFuncsDX)
    3069     {
    3070         RT_NOREF(pCmd);
    3071         pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC->svga.p3dState);
    3072     }
     3570static int vmsvga3dCmdLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdLogicOpsClearTypeBlend const *pCmd, uint32_t cbCmd)
     3571{
     3572#ifdef VMSVGA3D_DX
     3573ASMBreakpoint();
     3574    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3575    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3576    return vmsvga3dLogicOpsClearTypeBlend(pThisCC, idDXContext);
     3577#else
     3578    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3579    return VERR_NOT_SUPPORTED;
     3580#endif
    30733581}
    30743582
    30753583
    30763584/* SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 1267 */
    3077 static void vmsvga3dCmdDefineGBSurface_v4(PVGASTATECC pThisCC, SVGA3dCmdDefineGBSurface_v4 const *pCmd)
    3078 {
    3079 ASMBreakpoint();
    3080     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3081     if (pSvgaR3State->pFuncsDX)
    3082     {
    3083         RT_NOREF(pCmd);
    3084         pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC->svga.p3dState);
    3085     }
     3585static int vmsvga3dCmdDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDefineGBSurface_v4 const *pCmd, uint32_t cbCmd)
     3586{
     3587#ifdef VMSVGA3D_DX
     3588ASMBreakpoint();
     3589    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3590    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3591    return vmsvga3dDefineGBSurface_v4(pThisCC, idDXContext);
     3592#else
     3593    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3594    return VERR_NOT_SUPPORTED;
     3595#endif
    30863596}
    30873597
    30883598
    30893599/* SVGA_3D_CMD_DX_SET_CS_UA_VIEWS 1268 */
    3090 static void vmsvga3dCmdDXSetCSUAViews(PVGASTATECC pThisCC, SVGA3dCmdDXSetCSUAViews const *pCmd)
    3091 {
    3092 ASMBreakpoint();
    3093     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3094     if (pSvgaR3State->pFuncsDX)
    3095     {
    3096         RT_NOREF(pCmd);
    3097         pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC->svga.p3dState);
    3098     }
     3600static int vmsvga3dCmdDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSUAViews const *pCmd, uint32_t cbCmd)
     3601{
     3602#ifdef VMSVGA3D_DX
     3603ASMBreakpoint();
     3604    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3605    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3606    return vmsvga3dDXSetCSUAViews(pThisCC, idDXContext);
     3607#else
     3608    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3609    return VERR_NOT_SUPPORTED;
     3610#endif
    30993611}
    31003612
    31013613
    31023614/* SVGA_3D_CMD_DX_SET_MIN_LOD 1269 */
    3103 static void vmsvga3dCmdDXSetMinLOD(PVGASTATECC pThisCC, SVGA3dCmdDXSetMinLOD const *pCmd)
    3104 {
    3105 ASMBreakpoint();
    3106     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3107     if (pSvgaR3State->pFuncsDX)
    3108     {
    3109         RT_NOREF(pCmd);
    3110         pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC->svga.p3dState);
    3111     }
     3615static int vmsvga3dCmdDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetMinLOD const *pCmd, uint32_t cbCmd)
     3616{
     3617#ifdef VMSVGA3D_DX
     3618ASMBreakpoint();
     3619    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3620    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3621    return vmsvga3dDXSetMinLOD(pThisCC, idDXContext);
     3622#else
     3623    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3624    return VERR_NOT_SUPPORTED;
     3625#endif
    31123626}
    31133627
    31143628
    31153629/* SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 1272 */
    3116 static void vmsvga3dCmdDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
    3117 {
    3118 ASMBreakpoint();
    3119     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3120     if (pSvgaR3State->pFuncsDX)
    3121     {
    3122         RT_NOREF(pCmd);
    3123         pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView_v2(pThisCC->svga.p3dState);
    3124     }
     3630static int vmsvga3dCmdDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd, uint32_t cbCmd)
     3631{
     3632#ifdef VMSVGA3D_DX
     3633ASMBreakpoint();
     3634    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3635    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3636    return vmsvga3dDXDefineDepthStencilView_v2(pThisCC, idDXContext);
     3637#else
     3638    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3639    return VERR_NOT_SUPPORTED;
     3640#endif
    31253641}
    31263642
    31273643
    31283644/* SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB 1273 */
    3129 static void vmsvga3dCmdDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd)
    3130 {
    3131 ASMBreakpoint();
    3132     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3133     if (pSvgaR3State->pFuncsDX)
    3134     {
    3135         RT_NOREF(pCmd);
    3136         pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC->svga.p3dState);
    3137     }
     3645static int vmsvga3dCmdDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd, uint32_t cbCmd)
     3646{
     3647#ifdef VMSVGA3D_DX
     3648ASMBreakpoint();
     3649    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3650    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3651    return vmsvga3dDXDefineStreamOutputWithMob(pThisCC, idDXContext);
     3652#else
     3653    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3654    return VERR_NOT_SUPPORTED;
     3655#endif
    31383656}
    31393657
    31403658
    31413659/* SVGA_3D_CMD_DX_SET_SHADER_IFACE 1274 */
    3142 static void vmsvga3dCmdDXSetShaderIface(PVGASTATECC pThisCC, SVGA3dCmdDXSetShaderIface const *pCmd)
    3143 {
    3144 ASMBreakpoint();
    3145     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3146     if (pSvgaR3State->pFuncsDX)
    3147     {
    3148         RT_NOREF(pCmd);
    3149         pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC->svga.p3dState);
    3150     }
     3660static int vmsvga3dCmdDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderIface const *pCmd, uint32_t cbCmd)
     3661{
     3662#ifdef VMSVGA3D_DX
     3663ASMBreakpoint();
     3664    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3665    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3666    return vmsvga3dDXSetShaderIface(pThisCC, idDXContext);
     3667#else
     3668    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3669    return VERR_NOT_SUPPORTED;
     3670#endif
    31513671}
    31523672
    31533673
    31543674/* SVGA_3D_CMD_DX_BIND_STREAMOUTPUT 1275 */
    3155 static void vmsvga3dCmdDXBindStreamOutput(PVGASTATECC pThisCC, SVGA3dCmdDXBindStreamOutput const *pCmd)
    3156 {
    3157 ASMBreakpoint();
    3158     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3159     if (pSvgaR3State->pFuncsDX)
    3160     {
    3161         RT_NOREF(pCmd);
    3162         pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC->svga.p3dState);
    3163     }
     3675static int vmsvga3dCmdDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindStreamOutput const *pCmd, uint32_t cbCmd)
     3676{
     3677#ifdef VMSVGA3D_DX
     3678ASMBreakpoint();
     3679    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3680    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3681    return vmsvga3dDXBindStreamOutput(pThisCC, idDXContext);
     3682#else
     3683    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3684    return VERR_NOT_SUPPORTED;
     3685#endif
    31643686}
    31653687
    31663688
    31673689/* SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS 1276 */
    3168 static void vmsvga3dCmdSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, SVGA3dCmdSurfaceStretchBltNonMSToMS const *pCmd)
    3169 {
    3170 ASMBreakpoint();
    3171     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3172     if (pSvgaR3State->pFuncsDX)
    3173     {
    3174         RT_NOREF(pCmd);
    3175         pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC->svga.p3dState);
    3176     }
     3690static int vmsvga3dCmdSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdSurfaceStretchBltNonMSToMS const *pCmd, uint32_t cbCmd)
     3691{
     3692#ifdef VMSVGA3D_DX
     3693ASMBreakpoint();
     3694    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3695    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3696    return vmsvga3dSurfaceStretchBltNonMSToMS(pThisCC, idDXContext);
     3697#else
     3698    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3699    return VERR_NOT_SUPPORTED;
     3700#endif
    31773701}
    31783702
    31793703
    31803704/* SVGA_3D_CMD_DX_BIND_SHADER_IFACE 1277 */
    3181 static void vmsvga3dCmdDXBindShaderIface(PVGASTATECC pThisCC, SVGA3dCmdDXBindShaderIface const *pCmd)
    3182 {
    3183 ASMBreakpoint();
    3184     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
    3185     if (pSvgaR3State->pFuncsDX)
    3186     {
    3187         RT_NOREF(pCmd);
    3188         pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC->svga.p3dState);
    3189     }
     3705static int vmsvga3dCmdDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindShaderIface const *pCmd, uint32_t cbCmd)
     3706{
     3707#ifdef VMSVGA3D_DX
     3708ASMBreakpoint();
     3709    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
     3710    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
     3711    return vmsvga3dDXBindShaderIface(pThisCC, idDXContext);
     3712#else
     3713    RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
     3714    return VERR_NOT_SUPPORTED;
     3715#endif
    31903716}
    31913717
    … …  
    32113737 * @param   pThis       The shared VGA/VMSVGA state.
    32123738 * @param   pThisCC     The VGA/VMSVGA state for the current context.
     3739 * @param   idDXContext VGPU10 DX context of the commands or SVGA3D_INVALID_ID if they are not for a specific context.
    32133740 * @param   enmCmdId    SVGA_3D_CMD_* command identifier.
    32143741 * @param   cbCmd       Size of the command in bytes.
    … …  
    32163743 * @returns VBox status code if an error was detected parsing a command.
    32173744 */
    3218 int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd)
     3745int vmsvgaR3Process3dCmd(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDXContext, SVGAFifo3dCmdId enmCmdId, uint32_t cbCmd, void const *pvCmd)
    32193746{
    32203747    if (enmCmdId > SVGA_3D_CMD_MAX)
    … …  
    37854312        SVGA3dCmdInvalidateGBImage *pCmd = (SVGA3dCmdInvalidateGBImage *)pvCmd;
    37864313        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    3787         VMSVGA_3D_CMD_NOTIMPL(); RT_NOREF(pCmd);
     4314        vmsvga3dCmdInvalidateGBImage(pThisCC, pCmd);
    37884315        break;
    37894316    }
    … …  
    40124539    case SVGA_3D_CMD_DEFINE_GB_SURFACE_V2:
    40134540    {
    4014         /// @todo SVGA3dCmdDefineGBSurface_v2 is not defined in Mesa 17 header. Mesa 20 has it.
    4015         //SVGA3dCmdDefineGBSurface_v2 *pCmd = (SVGA3dCmdDefineGBSurface_v2 *)pvCmd;
    4016         //VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4017         VMSVGA_3D_CMD_NOTIMPL();
     4541        SVGA3dCmdDefineGBSurface_v2 *pCmd = (SVGA3dCmdDefineGBSurface_v2 *)pvCmd;
     4542        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
     4543        vmsvga3dCmdDefineGBSurface_v2(pThisCC, pCmd);
    40184544        break;
    40194545    }
    … …  
    40834609        SVGA3dCmdDXDefineContext *pCmd = (SVGA3dCmdDXDefineContext *)pvCmd;
    40844610        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4085         vmsvga3dCmdDXDefineContext(pThisCC, pCmd);
     4611        rcParse = vmsvga3dCmdDXDefineContext(pThisCC, pCmd, cbCmd);
    40864612        break;
    40874613    }
    … …  
    40914617        SVGA3dCmdDXDestroyContext *pCmd = (SVGA3dCmdDXDestroyContext *)pvCmd;
    40924618        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4093         vmsvga3dCmdDXDestroyContext(pThisCC, pCmd);
     4619        rcParse = vmsvga3dCmdDXDestroyContext(pThisCC, pCmd, cbCmd);
    40944620        break;
    40954621    }
    … …  
    40994625        SVGA3dCmdDXBindContext *pCmd = (SVGA3dCmdDXBindContext *)pvCmd;
    41004626        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4101         vmsvga3dCmdDXBindContext(pThisCC, pCmd);
     4627        rcParse = vmsvga3dCmdDXBindContext(pThisCC, pCmd, cbCmd);
    41024628        break;
    41034629    }
    … …  
    41074633        SVGA3dCmdDXReadbackContext *pCmd = (SVGA3dCmdDXReadbackContext *)pvCmd;
    41084634        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4109         vmsvga3dCmdDXReadbackContext(pThisCC, pCmd);
     4635        rcParse = vmsvga3dCmdDXReadbackContext(pThisCC, idDXContext, pCmd, cbCmd);
    41104636        break;
    41114637    }
    … …  
    41154641        SVGA3dCmdDXInvalidateContext *pCmd = (SVGA3dCmdDXInvalidateContext *)pvCmd;
    41164642        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4117         vmsvga3dCmdDXInvalidateContext(pThisCC, pCmd);
     4643        rcParse = vmsvga3dCmdDXInvalidateContext(pThisCC, idDXContext, pCmd, cbCmd);
    41184644        break;
    41194645    }
    … …  
    41234649        SVGA3dCmdDXSetSingleConstantBuffer *pCmd = (SVGA3dCmdDXSetSingleConstantBuffer *)pvCmd;
    41244650        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4125         vmsvga3dCmdDXSetSingleConstantBuffer(pThisCC, pCmd);
     4651        rcParse = vmsvga3dCmdDXSetSingleConstantBuffer(pThisCC, idDXContext, pCmd, cbCmd);
    41264652        break;
    41274653    }
    … …  
    41314657        SVGA3dCmdDXSetShaderResources *pCmd = (SVGA3dCmdDXSetShaderResources *)pvCmd;
    41324658        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4133         vmsvga3dCmdDXSetShaderResources(pThisCC, pCmd);
     4659        rcParse = vmsvga3dCmdDXSetShaderResources(pThisCC, idDXContext, pCmd, cbCmd);
    41344660        break;
    41354661    }
    … …  
    41394665        SVGA3dCmdDXSetShader *pCmd = (SVGA3dCmdDXSetShader *)pvCmd;
    41404666        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4141         vmsvga3dCmdDXSetShader(pThisCC, pCmd);
     4667        rcParse = vmsvga3dCmdDXSetShader(pThisCC, idDXContext, pCmd, cbCmd);
    41424668        break;
    41434669    }
    … …  
    41474673        SVGA3dCmdDXSetSamplers *pCmd = (SVGA3dCmdDXSetSamplers *)pvCmd;
    41484674        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4149         vmsvga3dCmdDXSetSamplers(pThisCC, pCmd);
     4675        rcParse = vmsvga3dCmdDXSetSamplers(pThisCC, idDXContext, pCmd, cbCmd);
    41504676        break;
    41514677    }
    … …  
    41554681        SVGA3dCmdDXDraw *pCmd = (SVGA3dCmdDXDraw *)pvCmd;
    41564682        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4157         vmsvga3dCmdDXDraw(pThisCC, pCmd);
     4683        rcParse = vmsvga3dCmdDXDraw(pThisCC, idDXContext, pCmd, cbCmd);
    41584684        break;
    41594685    }
    … …  
    41634689        SVGA3dCmdDXDrawIndexed *pCmd = (SVGA3dCmdDXDrawIndexed *)pvCmd;
    41644690        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4165         vmsvga3dCmdDXDrawIndexed(pThisCC, pCmd);
     4691        rcParse = vmsvga3dCmdDXDrawIndexed(pThisCC, idDXContext, pCmd, cbCmd);
    41664692        break;
    41674693    }
    … …  
    41714697        SVGA3dCmdDXDrawInstanced *pCmd = (SVGA3dCmdDXDrawInstanced *)pvCmd;
    41724698        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4173         vmsvga3dCmdDXDrawInstanced(pThisCC, pCmd);
     4699        rcParse = vmsvga3dCmdDXDrawInstanced(pThisCC, idDXContext, pCmd, cbCmd);
    41744700        break;
    41754701    }
    … …  
    41794705        SVGA3dCmdDXDrawIndexedInstanced *pCmd = (SVGA3dCmdDXDrawIndexedInstanced *)pvCmd;
    41804706        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4181         vmsvga3dCmdDXDrawIndexedInstanced(pThisCC, pCmd);
     4707        rcParse = vmsvga3dCmdDXDrawIndexedInstanced(pThisCC, idDXContext, pCmd, cbCmd);
    41824708        break;
    41834709    }
    … …  
    41874713        SVGA3dCmdDXDrawAuto *pCmd = (SVGA3dCmdDXDrawAuto *)pvCmd;
    41884714        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4189         vmsvga3dCmdDXDrawAuto(pThisCC, pCmd);
     4715        rcParse = vmsvga3dCmdDXDrawAuto(pThisCC, idDXContext, pCmd, cbCmd);
    41904716        break;
    41914717    }
    … …  
    41954721        SVGA3dCmdDXSetInputLayout *pCmd = (SVGA3dCmdDXSetInputLayout *)pvCmd;
    41964722        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4197         vmsvga3dCmdDXSetInputLayout(pThisCC, pCmd);
     4723        rcParse = vmsvga3dCmdDXSetInputLayout(pThisCC, idDXContext, pCmd, cbCmd);
    41984724        break;
    41994725    }
    … …  
    42034729        SVGA3dCmdDXSetVertexBuffers *pCmd = (SVGA3dCmdDXSetVertexBuffers *)pvCmd;
    42044730        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4205         vmsvga3dCmdDXSetVertexBuffers(pThisCC, pCmd);
     4731        rcParse = vmsvga3dCmdDXSetVertexBuffers(pThisCC, idDXContext, pCmd, cbCmd);
    42064732        break;
    42074733    }
    … …  
    42114737        SVGA3dCmdDXSetIndexBuffer *pCmd = (SVGA3dCmdDXSetIndexBuffer *)pvCmd;
    42124738        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4213         vmsvga3dCmdDXSetIndexBuffer(pThisCC, pCmd);
     4739        rcParse = vmsvga3dCmdDXSetIndexBuffer(pThisCC, idDXContext, pCmd, cbCmd);
    42144740        break;
    42154741    }
    … …  
    42194745        SVGA3dCmdDXSetTopology *pCmd = (SVGA3dCmdDXSetTopology *)pvCmd;
    42204746        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4221         vmsvga3dCmdDXSetTopology(pThisCC, pCmd);
     4747        rcParse = vmsvga3dCmdDXSetTopology(pThisCC, idDXContext, pCmd, cbCmd);
    42224748        break;
    42234749    }
    … …  
    42274753        SVGA3dCmdDXSetRenderTargets *pCmd = (SVGA3dCmdDXSetRenderTargets *)pvCmd;
    42284754        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4229         vmsvga3dCmdDXSetRenderTargets(pThisCC, pCmd);
     4755        rcParse = vmsvga3dCmdDXSetRenderTargets(pThisCC, idDXContext, pCmd, cbCmd);
    42304756        break;
    42314757    }
    … …  
    42354761        SVGA3dCmdDXSetBlendState *pCmd = (SVGA3dCmdDXSetBlendState *)pvCmd;
    42364762        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4237         vmsvga3dCmdDXSetBlendState(pThisCC, pCmd);
     4763        rcParse = vmsvga3dCmdDXSetBlendState(pThisCC, idDXContext, pCmd, cbCmd);
    42384764        break;
    42394765    }
    … …  
    42434769        SVGA3dCmdDXSetDepthStencilState *pCmd = (SVGA3dCmdDXSetDepthStencilState *)pvCmd;
    42444770        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4245         vmsvga3dCmdDXSetDepthStencilState(pThisCC, pCmd);
     4771        rcParse = vmsvga3dCmdDXSetDepthStencilState(pThisCC, idDXContext, pCmd, cbCmd);
    42464772        break;
    42474773    }
    … …  
    42514777        SVGA3dCmdDXSetRasterizerState *pCmd = (SVGA3dCmdDXSetRasterizerState *)pvCmd;
    42524778        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4253         vmsvga3dCmdDXSetRasterizerState(pThisCC, pCmd);
     4779        rcParse = vmsvga3dCmdDXSetRasterizerState(pThisCC, idDXContext, pCmd, cbCmd);
    42544780        break;
    42554781    }
    … …  
    42594785        SVGA3dCmdDXDefineQuery *pCmd = (SVGA3dCmdDXDefineQuery *)pvCmd;
    42604786        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4261         vmsvga3dCmdDXDefineQuery(pThisCC, pCmd);
     4787        rcParse = vmsvga3dCmdDXDefineQuery(pThisCC, idDXContext, pCmd, cbCmd);
    42624788        break;
    42634789    }
    … …  
    42674793        SVGA3dCmdDXDestroyQuery *pCmd = (SVGA3dCmdDXDestroyQuery *)pvCmd;
    42684794        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4269         vmsvga3dCmdDXDestroyQuery(pThisCC, pCmd);
     4795        rcParse = vmsvga3dCmdDXDestroyQuery(pThisCC, idDXContext, pCmd, cbCmd);
    42704796        break;
    42714797    }
    … …  
    42754801        SVGA3dCmdDXBindQuery *pCmd = (SVGA3dCmdDXBindQuery *)pvCmd;
    42764802        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4277         vmsvga3dCmdDXBindQuery(pThisCC, pCmd);
     4803        rcParse = vmsvga3dCmdDXBindQuery(pThisCC, idDXContext, pCmd, cbCmd);
    42784804        break;
    42794805    }
    … …  
    42834809        SVGA3dCmdDXSetQueryOffset *pCmd = (SVGA3dCmdDXSetQueryOffset *)pvCmd;
    42844810        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4285         vmsvga3dCmdDXSetQueryOffset(pThisCC, pCmd);
     4811        rcParse = vmsvga3dCmdDXSetQueryOffset(pThisCC, idDXContext, pCmd, cbCmd);
    42864812        break;
    42874813    }
    … …  
    42914817        SVGA3dCmdDXBeginQuery *pCmd = (SVGA3dCmdDXBeginQuery *)pvCmd;
    42924818        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4293         vmsvga3dCmdDXBeginQuery(pThisCC, pCmd);
     4819        rcParse = vmsvga3dCmdDXBeginQuery(pThisCC, idDXContext, pCmd, cbCmd);
    42944820        break;
    42954821    }
    … …  
    42994825        SVGA3dCmdDXEndQuery *pCmd = (SVGA3dCmdDXEndQuery *)pvCmd;
    43004826        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4301         vmsvga3dCmdDXEndQuery(pThisCC, pCmd);
     4827        rcParse = vmsvga3dCmdDXEndQuery(pThisCC, idDXContext, pCmd, cbCmd);
    43024828        break;
    43034829    }
    … …  
    43074833        SVGA3dCmdDXReadbackQuery *pCmd = (SVGA3dCmdDXReadbackQuery *)pvCmd;
    43084834        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4309         vmsvga3dCmdDXReadbackQuery(pThisCC, pCmd);
     4835        rcParse = vmsvga3dCmdDXReadbackQuery(pThisCC, idDXContext, pCmd, cbCmd);
    43104836        break;
    43114837    }
    … …  
    43154841        SVGA3dCmdDXSetPredication *pCmd = (SVGA3dCmdDXSetPredication *)pvCmd;
    43164842        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4317         vmsvga3dCmdDXSetPredication(pThisCC, pCmd);
     4843        rcParse = vmsvga3dCmdDXSetPredication(pThisCC, idDXContext, pCmd, cbCmd);
    43184844        break;
    43194845    }
    … …  
    43234849        SVGA3dCmdDXSetSOTargets *pCmd = (SVGA3dCmdDXSetSOTargets *)pvCmd;
    43244850        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4325         vmsvga3dCmdDXSetSOTargets(pThisCC, pCmd);
     4851        rcParse = vmsvga3dCmdDXSetSOTargets(pThisCC, idDXContext, pCmd, cbCmd);
    43264852        break;
    43274853    }
    … …  
    43314857        SVGA3dCmdDXSetViewports *pCmd = (SVGA3dCmdDXSetViewports *)pvCmd;
    43324858        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4333         vmsvga3dCmdDXSetViewports(pThisCC, pCmd);
     4859        rcParse = vmsvga3dCmdDXSetViewports(pThisCC, idDXContext, pCmd, cbCmd);
    43344860        break;
    43354861    }
    … …  
    43394865        SVGA3dCmdDXSetScissorRects *pCmd = (SVGA3dCmdDXSetScissorRects *)pvCmd;
    43404866        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4341         vmsvga3dCmdDXSetScissorRects(pThisCC, pCmd);
     4867        rcParse = vmsvga3dCmdDXSetScissorRects(pThisCC, idDXContext, pCmd, cbCmd);
    43424868        break;
    43434869    }
    … …  
    43474873        SVGA3dCmdDXClearRenderTargetView *pCmd = (SVGA3dCmdDXClearRenderTargetView *)pvCmd;
    43484874        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4349         vmsvga3dCmdDXClearRenderTargetView(pThisCC, pCmd);
     4875        rcParse = vmsvga3dCmdDXClearRenderTargetView(pThisCC, idDXContext, pCmd, cbCmd);
    43504876        break;
    43514877    }
    … …  
    43554881        SVGA3dCmdDXClearDepthStencilView *pCmd = (SVGA3dCmdDXClearDepthStencilView *)pvCmd;
    43564882        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4357         vmsvga3dCmdDXClearDepthStencilView(pThisCC, pCmd);
     4883        rcParse = vmsvga3dCmdDXClearDepthStencilView(pThisCC, idDXContext, pCmd, cbCmd);
    43584884        break;
    43594885    }
    … …  
    43634889        SVGA3dCmdDXPredCopyRegion *pCmd = (SVGA3dCmdDXPredCopyRegion *)pvCmd;
    43644890        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4365         vmsvga3dCmdDXPredCopyRegion(pThisCC, pCmd);
     4891        rcParse = vmsvga3dCmdDXPredCopyRegion(pThisCC, idDXContext, pCmd, cbCmd);
    43664892        break;
    43674893    }
    … …  
    43714897        SVGA3dCmdDXPredCopy *pCmd = (SVGA3dCmdDXPredCopy *)pvCmd;
    43724898        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4373         vmsvga3dCmdDXPredCopy(pThisCC, pCmd);
     4899        rcParse = vmsvga3dCmdDXPredCopy(pThisCC, idDXContext, pCmd, cbCmd);
    43744900        break;
    43754901    }
    … …  
    43794905        SVGA3dCmdDXPresentBlt *pCmd = (SVGA3dCmdDXPresentBlt *)pvCmd;
    43804906        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4381         vmsvga3dCmdDXPresentBlt(pThisCC, pCmd);
     4907        rcParse = vmsvga3dCmdDXPresentBlt(pThisCC, idDXContext, pCmd, cbCmd);
    43824908        break;
    43834909    }
    … …  
    43874913        SVGA3dCmdDXGenMips *pCmd = (SVGA3dCmdDXGenMips *)pvCmd;
    43884914        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4389         vmsvga3dCmdDXGenMips(pThisCC, pCmd);
     4915        rcParse = vmsvga3dCmdDXGenMips(pThisCC, idDXContext, pCmd, cbCmd);
    43904916        break;
    43914917    }
    … …  
    43954921        SVGA3dCmdDXUpdateSubResource *pCmd = (SVGA3dCmdDXUpdateSubResource *)pvCmd;
    43964922        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4397         vmsvga3dCmdDXUpdateSubResource(pThisCC, pCmd);
     4923        rcParse = vmsvga3dCmdDXUpdateSubResource(pThisCC, idDXContext, pCmd, cbCmd);
    43984924        break;
    43994925    }
    … …  
    44034929        SVGA3dCmdDXReadbackSubResource *pCmd = (SVGA3dCmdDXReadbackSubResource *)pvCmd;
    44044930        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4405         vmsvga3dCmdDXReadbackSubResource(pThisCC, pCmd);
     4931        rcParse = vmsvga3dCmdDXReadbackSubResource(pThisCC, idDXContext, pCmd, cbCmd);
    44064932        break;
    44074933    }
    … …  
    44114937        SVGA3dCmdDXInvalidateSubResource *pCmd = (SVGA3dCmdDXInvalidateSubResource *)pvCmd;
    44124938        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4413         vmsvga3dCmdDXInvalidateSubResource(pThisCC, pCmd);
     4939        rcParse = vmsvga3dCmdDXInvalidateSubResource(pThisCC, idDXContext, pCmd, cbCmd);
    44144940        break;
    44154941    }
    … …  
    44194945        SVGA3dCmdDXDefineShaderResourceView *pCmd = (SVGA3dCmdDXDefineShaderResourceView *)pvCmd;
    44204946        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4421         vmsvga3dCmdDXDefineShaderResourceView(pThisCC, pCmd);
     4947        rcParse = vmsvga3dCmdDXDefineShaderResourceView(pThisCC, idDXContext, pCmd, cbCmd);
    44224948        break;
    44234949    }
    … …  
    44274953        SVGA3dCmdDXDestroyShaderResourceView *pCmd = (SVGA3dCmdDXDestroyShaderResourceView *)pvCmd;
    44284954        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4429         vmsvga3dCmdDXDestroyShaderResourceView(pThisCC, pCmd);
     4955        rcParse = vmsvga3dCmdDXDestroyShaderResourceView(pThisCC, idDXContext, pCmd, cbCmd);
    44304956        break;
    44314957    }
    … …  
    44354961        SVGA3dCmdDXDefineRenderTargetView *pCmd = (SVGA3dCmdDXDefineRenderTargetView *)pvCmd;
    44364962        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4437         vmsvga3dCmdDXDefineRenderTargetView(pThisCC, pCmd);
     4963        rcParse = vmsvga3dCmdDXDefineRenderTargetView(pThisCC, idDXContext, pCmd, cbCmd);
    44384964        break;
    44394965    }
    … …  
    44434969        SVGA3dCmdDXDestroyRenderTargetView *pCmd = (SVGA3dCmdDXDestroyRenderTargetView *)pvCmd;
    44444970        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4445         vmsvga3dCmdDXDestroyRenderTargetView(pThisCC, pCmd);
     4971        rcParse = vmsvga3dCmdDXDestroyRenderTargetView(pThisCC, idDXContext, pCmd, cbCmd);
    44464972        break;
    44474973    }
    … …  
    44514977        SVGA3dCmdDXDefineDepthStencilView *pCmd = (SVGA3dCmdDXDefineDepthStencilView *)pvCmd;
    44524978        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4453         vmsvga3dCmdDXDefineDepthStencilView(pThisCC, pCmd);
     4979        rcParse = vmsvga3dCmdDXDefineDepthStencilView(pThisCC, idDXContext, pCmd, cbCmd);
    44544980        break;
    44554981    }
    … …  
    44594985        SVGA3dCmdDXDestroyDepthStencilView *pCmd = (SVGA3dCmdDXDestroyDepthStencilView *)pvCmd;
    44604986        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4461         vmsvga3dCmdDXDestroyDepthStencilView(pThisCC, pCmd);
     4987        rcParse = vmsvga3dCmdDXDestroyDepthStencilView(pThisCC, idDXContext, pCmd, cbCmd);
    44624988        break;
    44634989    }
    … …  
    44674993        SVGA3dCmdDXDefineElementLayout *pCmd = (SVGA3dCmdDXDefineElementLayout *)pvCmd;
    44684994        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4469         vmsvga3dCmdDXDefineElementLayout(pThisCC, pCmd);
     4995        rcParse = vmsvga3dCmdDXDefineElementLayout(pThisCC, idDXContext, pCmd, cbCmd);
    44704996        break;
    44714997    }
    … …  
    44755001        SVGA3dCmdDXDestroyElementLayout *pCmd = (SVGA3dCmdDXDestroyElementLayout *)pvCmd;
    44765002        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4477         vmsvga3dCmdDXDestroyElementLayout(pThisCC, pCmd);
     5003        rcParse = vmsvga3dCmdDXDestroyElementLayout(pThisCC, idDXContext, pCmd, cbCmd);
    44785004        break;
    44795005    }
    … …  
    44835009        SVGA3dCmdDXDefineBlendState *pCmd = (SVGA3dCmdDXDefineBlendState *)pvCmd;
    44845010        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4485         vmsvga3dCmdDXDefineBlendState(pThisCC, pCmd);
     5011        rcParse = vmsvga3dCmdDXDefineBlendState(pThisCC, idDXContext, pCmd, cbCmd);
    44865012        break;
    44875013    }
    … …  
    44915017        SVGA3dCmdDXDestroyBlendState *pCmd = (SVGA3dCmdDXDestroyBlendState *)pvCmd;
    44925018        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4493         vmsvga3dCmdDXDestroyBlendState(pThisCC, pCmd);
     5019        rcParse = vmsvga3dCmdDXDestroyBlendState(pThisCC, idDXContext, pCmd, cbCmd);
    44945020        break;
    44955021    }
    … …  
    44995025        SVGA3dCmdDXDefineDepthStencilState *pCmd = (SVGA3dCmdDXDefineDepthStencilState *)pvCmd;
    45005026        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4501         vmsvga3dCmdDXDefineDepthStencilState(pThisCC, pCmd);
     5027        rcParse = vmsvga3dCmdDXDefineDepthStencilState(pThisCC, idDXContext, pCmd, cbCmd);
    45025028        break;
    45035029    }
    … …  
    45075033        SVGA3dCmdDXDestroyDepthStencilState *pCmd = (SVGA3dCmdDXDestroyDepthStencilState *)pvCmd;
    45085034        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4509         vmsvga3dCmdDXDestroyDepthStencilState(pThisCC, pCmd);
     5035        rcParse = vmsvga3dCmdDXDestroyDepthStencilState(pThisCC, idDXContext, pCmd, cbCmd);
    45105036        break;
    45115037    }
    … …  
    45155041        SVGA3dCmdDXDefineRasterizerState *pCmd = (SVGA3dCmdDXDefineRasterizerState *)pvCmd;
    45165042        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4517         vmsvga3dCmdDXDefineRasterizerState(pThisCC, pCmd);
     5043        rcParse = vmsvga3dCmdDXDefineRasterizerState(pThisCC, idDXContext, pCmd, cbCmd);
    45185044        break;
    45195045    }
    … …  
    45235049        SVGA3dCmdDXDestroyRasterizerState *pCmd = (SVGA3dCmdDXDestroyRasterizerState *)pvCmd;
    45245050        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4525         vmsvga3dCmdDXDestroyRasterizerState(pThisCC, pCmd);
     5051        rcParse = vmsvga3dCmdDXDestroyRasterizerState(pThisCC, idDXContext, pCmd, cbCmd);
    45265052        break;
    45275053    }
    … …  
    45315057        SVGA3dCmdDXDefineSamplerState *pCmd = (SVGA3dCmdDXDefineSamplerState *)pvCmd;
    45325058        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4533         vmsvga3dCmdDXDefineSamplerState(pThisCC, pCmd);
     5059        rcParse = vmsvga3dCmdDXDefineSamplerState(pThisCC, idDXContext, pCmd, cbCmd);
    45345060        break;
    45355061    }
    … …  
    45395065        SVGA3dCmdDXDestroySamplerState *pCmd = (SVGA3dCmdDXDestroySamplerState *)pvCmd;
    45405066        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4541         vmsvga3dCmdDXDestroySamplerState(pThisCC, pCmd);
     5067        rcParse = vmsvga3dCmdDXDestroySamplerState(pThisCC, idDXContext, pCmd, cbCmd);
    45425068        break;
    45435069    }
    … …  
    45475073        SVGA3dCmdDXDefineShader *pCmd = (SVGA3dCmdDXDefineShader *)pvCmd;
    45485074        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4549         vmsvga3dCmdDXDefineShader(pThisCC, pCmd);
     5075        rcParse = vmsvga3dCmdDXDefineShader(pThisCC, idDXContext, pCmd, cbCmd);
    45505076        break;
    45515077    }
    … …  
    45555081        SVGA3dCmdDXDestroyShader *pCmd = (SVGA3dCmdDXDestroyShader *)pvCmd;
    45565082        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4557         vmsvga3dCmdDXDestroyShader(pThisCC, pCmd);
     5083        rcParse = vmsvga3dCmdDXDestroyShader(pThisCC, idDXContext, pCmd, cbCmd);
    45585084        break;
    45595085    }
    … …  
    45635089        SVGA3dCmdDXBindShader *pCmd = (SVGA3dCmdDXBindShader *)pvCmd;
    45645090        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4565         vmsvga3dCmdDXBindShader(pThisCC, pCmd);
     5091        rcParse = vmsvga3dCmdDXBindShader(pThisCC, idDXContext, pCmd, cbCmd);
    45665092        break;
    45675093    }
    … …  
    45715097        SVGA3dCmdDXDefineStreamOutput *pCmd = (SVGA3dCmdDXDefineStreamOutput *)pvCmd;
    45725098        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4573         vmsvga3dCmdDXDefineStreamOutput(pThisCC, pCmd);
     5099        rcParse = vmsvga3dCmdDXDefineStreamOutput(pThisCC, idDXContext, pCmd, cbCmd);
    45745100        break;
    45755101    }
    … …  
    45795105        SVGA3dCmdDXDestroyStreamOutput *pCmd = (SVGA3dCmdDXDestroyStreamOutput *)pvCmd;
    45805106        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4581         vmsvga3dCmdDXDestroyStreamOutput(pThisCC, pCmd);
     5107        rcParse = vmsvga3dCmdDXDestroyStreamOutput(pThisCC, idDXContext, pCmd, cbCmd);
    45825108        break;
    45835109    }
    … …  
    45875113        SVGA3dCmdDXSetStreamOutput *pCmd = (SVGA3dCmdDXSetStreamOutput *)pvCmd;
    45885114        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4589         vmsvga3dCmdDXSetStreamOutput(pThisCC, pCmd);
     5115        rcParse = vmsvga3dCmdDXSetStreamOutput(pThisCC, idDXContext, pCmd, cbCmd);
    45905116        break;
    45915117    }
    … …  
    45955121        SVGA3dCmdDXSetCOTable *pCmd = (SVGA3dCmdDXSetCOTable *)pvCmd;
    45965122        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4597         vmsvga3dCmdDXSetCOTable(pThisCC, pCmd);
     5123        rcParse = vmsvga3dCmdDXSetCOTable(pThisCC, pCmd, cbCmd);
    45985124        break;
    45995125    }
    … …  
    46035129        SVGA3dCmdDXReadbackCOTable *pCmd = (SVGA3dCmdDXReadbackCOTable *)pvCmd;
    46045130        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4605         vmsvga3dCmdDXReadbackCOTable(pThisCC, pCmd);
     5131        rcParse = vmsvga3dCmdDXReadbackCOTable(pThisCC, idDXContext, pCmd, cbCmd);
    46065132        break;
    46075133    }
    … …  
    46115137        SVGA3dCmdDXBufferCopy *pCmd = (SVGA3dCmdDXBufferCopy *)pvCmd;
    46125138        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4613         vmsvga3dCmdDXBufferCopy(pThisCC, pCmd);
     5139        rcParse = vmsvga3dCmdDXBufferCopy(pThisCC, idDXContext, pCmd, cbCmd);
    46145140        break;
    46155141    }
    … …  
    46195145        SVGA3dCmdDXTransferFromBuffer *pCmd = (SVGA3dCmdDXTransferFromBuffer *)pvCmd;
    46205146        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4621         vmsvga3dCmdDXTransferFromBuffer(pThisCC, pCmd);
     5147        rcParse = vmsvga3dCmdDXTransferFromBuffer(pThisCC, idDXContext, pCmd, cbCmd);
    46225148        break;
    46235149    }
    … …  
    46275153        SVGA3dCmdDXSurfaceCopyAndReadback *pCmd = (SVGA3dCmdDXSurfaceCopyAndReadback *)pvCmd;
    46285154        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4629         vmsvga3dCmdDXSurfaceCopyAndReadback(pThisCC, pCmd);
     5155        rcParse = vmsvga3dCmdDXSurfaceCopyAndReadback(pThisCC, idDXContext, pCmd, cbCmd);
    46305156        break;
    46315157    }
    … …  
    46355161        SVGA3dCmdDXMoveQuery *pCmd = (SVGA3dCmdDXMoveQuery *)pvCmd;
    46365162        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4637         vmsvga3dCmdDXMoveQuery(pThisCC, pCmd);
     5163        rcParse = vmsvga3dCmdDXMoveQuery(pThisCC, idDXContext, pCmd, cbCmd);
    46385164        break;
    46395165    }
    … …  
    46435169        SVGA3dCmdDXBindAllQuery *pCmd = (SVGA3dCmdDXBindAllQuery *)pvCmd;
    46445170        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4645         vmsvga3dCmdDXBindAllQuery(pThisCC, pCmd);
     5171        rcParse = vmsvga3dCmdDXBindAllQuery(pThisCC, idDXContext, pCmd, cbCmd);
    46465172        break;
    46475173    }
    … …  
    46515177        SVGA3dCmdDXReadbackAllQuery *pCmd = (SVGA3dCmdDXReadbackAllQuery *)pvCmd;
    46525178        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4653         vmsvga3dCmdDXReadbackAllQuery(pThisCC, pCmd);
     5179        rcParse = vmsvga3dCmdDXReadbackAllQuery(pThisCC, idDXContext, pCmd, cbCmd);
    46545180        break;
    46555181    }
    … …  
    46595185        SVGA3dCmdDXPredTransferFromBuffer *pCmd = (SVGA3dCmdDXPredTransferFromBuffer *)pvCmd;
    46605186        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4661         vmsvga3dCmdDXPredTransferFromBuffer(pThisCC, pCmd);
     5187        rcParse = vmsvga3dCmdDXPredTransferFromBuffer(pThisCC, idDXContext, pCmd, cbCmd);
    46625188        break;
    46635189    }
    … …  
    46675193        SVGA3dCmdDXMobFence64 *pCmd = (SVGA3dCmdDXMobFence64 *)pvCmd;
    46685194        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4669         vmsvga3dCmdDXMobFence64(pThisCC, pCmd);
     5195        rcParse = vmsvga3dCmdDXMobFence64(pThisCC, idDXContext, pCmd, cbCmd);
    46705196        break;
    46715197    }
    … …  
    46755201        SVGA3dCmdDXBindAllShader *pCmd = (SVGA3dCmdDXBindAllShader *)pvCmd;
    46765202        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4677         vmsvga3dCmdDXBindAllShader(pThisCC, pCmd);
     5203        rcParse = vmsvga3dCmdDXBindAllShader(pThisCC, idDXContext, pCmd, cbCmd);
    46785204        break;
    46795205    }
    … …  
    46835209        SVGA3dCmdDXHint *pCmd = (SVGA3dCmdDXHint *)pvCmd;
    46845210        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4685         vmsvga3dCmdDXHint(pThisCC, pCmd);
     5211        rcParse = vmsvga3dCmdDXHint(pThisCC, idDXContext, pCmd, cbCmd);
    46865212        break;
    46875213    }
    … …  
    46915217        SVGA3dCmdDXBufferUpdate *pCmd = (SVGA3dCmdDXBufferUpdate *)pvCmd;
    46925218        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4693         vmsvga3dCmdDXBufferUpdate(pThisCC, pCmd);
     5219        rcParse = vmsvga3dCmdDXBufferUpdate(pThisCC, idDXContext, pCmd, cbCmd);
    46945220        break;
    46955221    }
    … …  
    46995225        SVGA3dCmdDXSetVSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetVSConstantBufferOffset *)pvCmd;
    47005226        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4701         vmsvga3dCmdDXSetVSConstantBufferOffset(pThisCC, pCmd);
     5227        rcParse = vmsvga3dCmdDXSetVSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd);
    47025228        break;
    47035229    }
    … …  
    47075233        SVGA3dCmdDXSetPSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetPSConstantBufferOffset *)pvCmd;
    47085234        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4709         vmsvga3dCmdDXSetPSConstantBufferOffset(pThisCC, pCmd);
     5235        rcParse = vmsvga3dCmdDXSetPSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd);
    47105236        break;
    47115237    }
    … …  
    47155241        SVGA3dCmdDXSetGSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetGSConstantBufferOffset *)pvCmd;
    47165242        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4717         vmsvga3dCmdDXSetGSConstantBufferOffset(pThisCC, pCmd);
     5243        rcParse = vmsvga3dCmdDXSetGSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd);
    47185244        break;
    47195245    }
    … …  
    47235249        SVGA3dCmdDXSetHSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetHSConstantBufferOffset *)pvCmd;
    47245250        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4725         vmsvga3dCmdDXSetHSConstantBufferOffset(pThisCC, pCmd);
     5251        rcParse = vmsvga3dCmdDXSetHSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd);
    47265252        break;
    47275253    }
    … …  
    47315257        SVGA3dCmdDXSetDSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetDSConstantBufferOffset *)pvCmd;
    47325258        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4733         vmsvga3dCmdDXSetDSConstantBufferOffset(pThisCC, pCmd);
     5259        rcParse = vmsvga3dCmdDXSetDSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd);
    47345260        break;
    47355261    }
    … …  
    47395265        SVGA3dCmdDXSetCSConstantBufferOffset *pCmd = (SVGA3dCmdDXSetCSConstantBufferOffset *)pvCmd;
    47405266        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4741         vmsvga3dCmdDXSetCSConstantBufferOffset(pThisCC, pCmd);
     5267        rcParse = vmsvga3dCmdDXSetCSConstantBufferOffset(pThisCC, idDXContext, pCmd, cbCmd);
    47425268        break;
    47435269    }
    … …  
    47475273        SVGA3dCmdDXCondBindAllShader *pCmd = (SVGA3dCmdDXCondBindAllShader *)pvCmd;
    47485274        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4749         vmsvga3dCmdDXCondBindAllShader(pThisCC, pCmd);
     5275        rcParse = vmsvga3dCmdDXCondBindAllShader(pThisCC, idDXContext, pCmd, cbCmd);
    47505276        break;
    47515277    }
    … …  
    47555281        SVGA3dCmdScreenCopy *pCmd = (SVGA3dCmdScreenCopy *)pvCmd;
    47565282        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4757         vmsvga3dCmdScreenCopy(pThisCC, pCmd);
     5283        rcParse = vmsvga3dCmdScreenCopy(pThisCC, idDXContext, pCmd, cbCmd);
    47585284        break;
    47595285    }
    … …  
    48115337        SVGA3dCmdGrowOTable *pCmd = (SVGA3dCmdGrowOTable *)pvCmd;
    48125338        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4813         vmsvga3dCmdGrowOTable(pThisCC, pCmd);
     5339        rcParse = vmsvga3dCmdGrowOTable(pThisCC, idDXContext, pCmd, cbCmd);
    48145340        break;
    48155341    }
    … …  
    48195345        SVGA3dCmdDXGrowCOTable *pCmd = (SVGA3dCmdDXGrowCOTable *)pvCmd;
    48205346        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4821         vmsvga3dCmdDXGrowCOTable(pThisCC, pCmd);
     5347        rcParse = vmsvga3dCmdDXGrowCOTable(pThisCC, idDXContext, pCmd, cbCmd);
    48225348        break;
    48235349    }
    … …  
    48275353        SVGA3dCmdIntraSurfaceCopy *pCmd = (SVGA3dCmdIntraSurfaceCopy *)pvCmd;
    48285354        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4829         vmsvga3dCmdIntraSurfaceCopy(pThisCC, pCmd);
     5355        rcParse = vmsvga3dCmdIntraSurfaceCopy(pThisCC, idDXContext, pCmd, cbCmd);
    48305356        break;
    48315357    }
    … …  
    48355361        SVGA3dCmdDefineGBSurface_v3 *pCmd = (SVGA3dCmdDefineGBSurface_v3 *)pvCmd;
    48365362        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4837         vmsvga3dCmdDefineGBSurface_v3(pThisCC, pCmd);
     5363        rcParse = vmsvga3dCmdDefineGBSurface_v3(pThisCC, idDXContext, pCmd, cbCmd);
    48385364        break;
    48395365    }
    … …  
    48435369        SVGA3dCmdDXResolveCopy *pCmd = (SVGA3dCmdDXResolveCopy *)pvCmd;
    48445370        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4845         vmsvga3dCmdDXResolveCopy(pThisCC, pCmd);
     5371        rcParse = vmsvga3dCmdDXResolveCopy(pThisCC, idDXContext, pCmd, cbCmd);
    48465372        break;
    48475373    }
    … …  
    48515377        SVGA3dCmdDXPredResolveCopy *pCmd = (SVGA3dCmdDXPredResolveCopy *)pvCmd;
    48525378        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4853         vmsvga3dCmdDXPredResolveCopy(pThisCC, pCmd);
     5379        rcParse = vmsvga3dCmdDXPredResolveCopy(pThisCC, idDXContext, pCmd, cbCmd);
    48545380        break;
    48555381    }
    … …  
    48595385        SVGA3dCmdDXPredConvertRegion *pCmd = (SVGA3dCmdDXPredConvertRegion *)pvCmd;
    48605386        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4861         vmsvga3dCmdDXPredConvertRegion(pThisCC, pCmd);
     5387        rcParse = vmsvga3dCmdDXPredConvertRegion(pThisCC, idDXContext, pCmd, cbCmd);
    48625388        break;
    48635389    }
    … …  
    48675393        SVGA3dCmdDXPredConvert *pCmd = (SVGA3dCmdDXPredConvert *)pvCmd;
    48685394        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4869         vmsvga3dCmdDXPredConvert(pThisCC, pCmd);
     5395        rcParse = vmsvga3dCmdDXPredConvert(pThisCC, idDXContext, pCmd, cbCmd);
    48705396        break;
    48715397    }
    … …  
    48755401        SVGA3dCmdWholeSurfaceCopy *pCmd = (SVGA3dCmdWholeSurfaceCopy *)pvCmd;
    48765402        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4877         vmsvga3dCmdWholeSurfaceCopy(pThisCC, pCmd);
     5403        rcParse = vmsvga3dCmdWholeSurfaceCopy(pThisCC, idDXContext, pCmd, cbCmd);
    48785404        break;
    48795405    }
    … …  
    48835409        SVGA3dCmdDXDefineUAView *pCmd = (SVGA3dCmdDXDefineUAView *)pvCmd;
    48845410        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4885         vmsvga3dCmdDXDefineUAView(pThisCC, pCmd);
     5411        rcParse = vmsvga3dCmdDXDefineUAView(pThisCC, idDXContext, pCmd, cbCmd);
    48865412        break;
    48875413    }
    … …  
    48915417        SVGA3dCmdDXDestroyUAView *pCmd = (SVGA3dCmdDXDestroyUAView *)pvCmd;
    48925418        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4893         vmsvga3dCmdDXDestroyUAView(pThisCC, pCmd);
     5419        rcParse = vmsvga3dCmdDXDestroyUAView(pThisCC, idDXContext, pCmd, cbCmd);
    48945420        break;
    48955421    }
    … …  
    48995425        SVGA3dCmdDXClearUAViewUint *pCmd = (SVGA3dCmdDXClearUAViewUint *)pvCmd;
    49005426        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4901         vmsvga3dCmdDXClearUAViewUint(pThisCC, pCmd);
     5427        rcParse = vmsvga3dCmdDXClearUAViewUint(pThisCC, idDXContext, pCmd, cbCmd);
    49025428        break;
    49035429    }
    … …  
    49075433        SVGA3dCmdDXClearUAViewFloat *pCmd = (SVGA3dCmdDXClearUAViewFloat *)pvCmd;
    49085434        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4909         vmsvga3dCmdDXClearUAViewFloat(pThisCC, pCmd);
     5435        rcParse = vmsvga3dCmdDXClearUAViewFloat(pThisCC, idDXContext, pCmd, cbCmd);
    49105436        break;
    49115437    }
    … …  
    49155441        SVGA3dCmdDXCopyStructureCount *pCmd = (SVGA3dCmdDXCopyStructureCount *)pvCmd;
    49165442        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4917         vmsvga3dCmdDXCopyStructureCount(pThisCC, pCmd);
     5443        rcParse = vmsvga3dCmdDXCopyStructureCount(pThisCC, idDXContext, pCmd, cbCmd);
    49185444        break;
    49195445    }
    … …  
    49235449        SVGA3dCmdDXSetUAViews *pCmd = (SVGA3dCmdDXSetUAViews *)pvCmd;
    49245450        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4925         vmsvga3dCmdDXSetUAViews(pThisCC, pCmd);
     5451        rcParse = vmsvga3dCmdDXSetUAViews(pThisCC, idDXContext, pCmd, cbCmd);
    49265452        break;
    49275453    }
    … …  
    49315457        SVGA3dCmdDXDrawIndexedInstancedIndirect *pCmd = (SVGA3dCmdDXDrawIndexedInstancedIndirect *)pvCmd;
    49325458        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4933         vmsvga3dCmdDXDrawIndexedInstancedIndirect(pThisCC, pCmd);
     5459        rcParse = vmsvga3dCmdDXDrawIndexedInstancedIndirect(pThisCC, idDXContext, pCmd, cbCmd);
    49345460        break;
    49355461    }
    … …  
    49395465        SVGA3dCmdDXDrawInstancedIndirect *pCmd = (SVGA3dCmdDXDrawInstancedIndirect *)pvCmd;
    49405466        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4941         vmsvga3dCmdDXDrawInstancedIndirect(pThisCC, pCmd);
     5467        rcParse = vmsvga3dCmdDXDrawInstancedIndirect(pThisCC, idDXContext, pCmd, cbCmd);
    49425468        break;
    49435469    }
    … …  
    49475473        SVGA3dCmdDXDispatch *pCmd = (SVGA3dCmdDXDispatch *)pvCmd;
    49485474        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4949         vmsvga3dCmdDXDispatch(pThisCC, pCmd);
     5475        rcParse = vmsvga3dCmdDXDispatch(pThisCC, idDXContext, pCmd, cbCmd);
    49505476        break;
    49515477    }
    … …  
    49555481        SVGA3dCmdDXDispatchIndirect *pCmd = (SVGA3dCmdDXDispatchIndirect *)pvCmd;
    49565482        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4957         vmsvga3dCmdDXDispatchIndirect(pThisCC, pCmd);
     5483        rcParse = vmsvga3dCmdDXDispatchIndirect(pThisCC, idDXContext, pCmd, cbCmd);
    49585484        break;
    49595485    }
    … …  
    49635489        SVGA3dCmdWriteZeroSurface *pCmd = (SVGA3dCmdWriteZeroSurface *)pvCmd;
    49645490        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4965         vmsvga3dCmdWriteZeroSurface(pThisCC, pCmd);
     5491        rcParse = vmsvga3dCmdWriteZeroSurface(pThisCC, idDXContext, pCmd, cbCmd);
    49665492        break;
    49675493    }
    … …  
    49715497        SVGA3dCmdHintZeroSurface *pCmd = (SVGA3dCmdHintZeroSurface *)pvCmd;
    49725498        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4973         vmsvga3dCmdHintZeroSurface(pThisCC, pCmd);
     5499        rcParse = vmsvga3dCmdHintZeroSurface(pThisCC, idDXContext, pCmd, cbCmd);
    49745500        break;
    49755501    }
    … …  
    49795505        SVGA3dCmdDXTransferToBuffer *pCmd = (SVGA3dCmdDXTransferToBuffer *)pvCmd;
    49805506        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4981         vmsvga3dCmdDXTransferToBuffer(pThisCC, pCmd);
     5507        rcParse = vmsvga3dCmdDXTransferToBuffer(pThisCC, idDXContext, pCmd, cbCmd);
    49825508        break;
    49835509    }
    … …  
    49875513        SVGA3dCmdDXSetStructureCount *pCmd = (SVGA3dCmdDXSetStructureCount *)pvCmd;
    49885514        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4989         vmsvga3dCmdDXSetStructureCount(pThisCC, pCmd);
     5515        rcParse = vmsvga3dCmdDXSetStructureCount(pThisCC, idDXContext, pCmd, cbCmd);
    49905516        break;
    49915517    }
    … …  
    49955521        SVGA3dCmdLogicOpsBitBlt *pCmd = (SVGA3dCmdLogicOpsBitBlt *)pvCmd;
    49965522        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    4997         vmsvga3dCmdLogicOpsBitBlt(pThisCC, pCmd);
     5523        rcParse = vmsvga3dCmdLogicOpsBitBlt(pThisCC, idDXContext, pCmd, cbCmd);
    49985524        break;
    49995525    }
    … …  
    50035529        SVGA3dCmdLogicOpsTransBlt *pCmd = (SVGA3dCmdLogicOpsTransBlt *)pvCmd;
    50045530        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5005         vmsvga3dCmdLogicOpsTransBlt(pThisCC, pCmd);
     5531        rcParse = vmsvga3dCmdLogicOpsTransBlt(pThisCC, idDXContext, pCmd, cbCmd);
    50065532        break;
    50075533    }
    … …  
    50115537        SVGA3dCmdLogicOpsStretchBlt *pCmd = (SVGA3dCmdLogicOpsStretchBlt *)pvCmd;
    50125538        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5013         vmsvga3dCmdLogicOpsStretchBlt(pThisCC, pCmd);
     5539        rcParse = vmsvga3dCmdLogicOpsStretchBlt(pThisCC, idDXContext, pCmd, cbCmd);
    50145540        break;
    50155541    }
    … …  
    50195545        SVGA3dCmdLogicOpsColorFill *pCmd = (SVGA3dCmdLogicOpsColorFill *)pvCmd;
    50205546        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5021         vmsvga3dCmdLogicOpsColorFill(pThisCC, pCmd);
     5547        rcParse = vmsvga3dCmdLogicOpsColorFill(pThisCC, idDXContext, pCmd, cbCmd);
    50225548        break;
    50235549    }
    … …  
    50275553        SVGA3dCmdLogicOpsAlphaBlend *pCmd = (SVGA3dCmdLogicOpsAlphaBlend *)pvCmd;
    50285554        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5029         vmsvga3dCmdLogicOpsAlphaBlend(pThisCC, pCmd);
     5555        rcParse = vmsvga3dCmdLogicOpsAlphaBlend(pThisCC, idDXContext, pCmd, cbCmd);
    50305556        break;
    50315557    }
    … …  
    50355561        SVGA3dCmdLogicOpsClearTypeBlend *pCmd = (SVGA3dCmdLogicOpsClearTypeBlend *)pvCmd;
    50365562        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5037         vmsvga3dCmdLogicOpsClearTypeBlend(pThisCC, pCmd);
     5563        rcParse = vmsvga3dCmdLogicOpsClearTypeBlend(pThisCC, idDXContext, pCmd, cbCmd);
    50385564        break;
    50395565    }
    … …  
    50555581        SVGA3dCmdDefineGBSurface_v4 *pCmd = (SVGA3dCmdDefineGBSurface_v4 *)pvCmd;
    50565582        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5057         vmsvga3dCmdDefineGBSurface_v4(pThisCC, pCmd);
     5583        rcParse = vmsvga3dCmdDefineGBSurface_v4(pThisCC, idDXContext, pCmd, cbCmd);
    50585584        break;
    50595585    }
    … …  
    50635589        SVGA3dCmdDXSetCSUAViews *pCmd = (SVGA3dCmdDXSetCSUAViews *)pvCmd;
    50645590        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5065         vmsvga3dCmdDXSetCSUAViews(pThisCC, pCmd);
     5591        rcParse = vmsvga3dCmdDXSetCSUAViews(pThisCC, idDXContext, pCmd, cbCmd);
    50665592        break;
    50675593    }
    … …  
    50715597        SVGA3dCmdDXSetMinLOD *pCmd = (SVGA3dCmdDXSetMinLOD *)pvCmd;
    50725598        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5073         vmsvga3dCmdDXSetMinLOD(pThisCC, pCmd);
     5599        rcParse = vmsvga3dCmdDXSetMinLOD(pThisCC, idDXContext, pCmd, cbCmd);
    50745600        break;
    50755601    }
    … …  
    50915617        SVGA3dCmdDXDefineDepthStencilView_v2 *pCmd = (SVGA3dCmdDXDefineDepthStencilView_v2 *)pvCmd;
    50925618        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5093         vmsvga3dCmdDXDefineDepthStencilView_v2(pThisCC, pCmd);
     5619        rcParse = vmsvga3dCmdDXDefineDepthStencilView_v2(pThisCC, idDXContext, pCmd, cbCmd);
    50945620        break;
    50955621    }
    … …  
    50995625        SVGA3dCmdDXDefineStreamOutputWithMob *pCmd = (SVGA3dCmdDXDefineStreamOutputWithMob *)pvCmd;
    51005626        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5101         vmsvga3dCmdDXDefineStreamOutputWithMob(pThisCC, pCmd);
     5627        rcParse = vmsvga3dCmdDXDefineStreamOutputWithMob(pThisCC, idDXContext, pCmd, cbCmd);
    51025628        break;
    51035629    }
    … …  
    51075633        SVGA3dCmdDXSetShaderIface *pCmd = (SVGA3dCmdDXSetShaderIface *)pvCmd;
    51085634        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5109         vmsvga3dCmdDXSetShaderIface(pThisCC, pCmd);
     5635        rcParse = vmsvga3dCmdDXSetShaderIface(pThisCC, idDXContext, pCmd, cbCmd);
    51105636        break;
    51115637    }
    … …  
    51155641        SVGA3dCmdDXBindStreamOutput *pCmd = (SVGA3dCmdDXBindStreamOutput *)pvCmd;
    51165642        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5117         vmsvga3dCmdDXBindStreamOutput(pThisCC, pCmd);
     5643        rcParse = vmsvga3dCmdDXBindStreamOutput(pThisCC, idDXContext, pCmd, cbCmd);
    51185644        break;
    51195645    }
    … …  
    51235649        SVGA3dCmdSurfaceStretchBltNonMSToMS *pCmd = (SVGA3dCmdSurfaceStretchBltNonMSToMS *)pvCmd;
    51245650        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5125         vmsvga3dCmdSurfaceStretchBltNonMSToMS(pThisCC, pCmd);
     5651        rcParse = vmsvga3dCmdSurfaceStretchBltNonMSToMS(pThisCC, idDXContext, pCmd, cbCmd);
    51265652        break;
    51275653    }
    … …  
    51315657        SVGA3dCmdDXBindShaderIface *pCmd = (SVGA3dCmdDXBindShaderIface *)pvCmd;
    51325658        VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK(sizeof(*pCmd));
    5133         vmsvga3dCmdDXBindShaderIface(pThisCC, pCmd);
     5659        rcParse = vmsvga3dCmdDXBindShaderIface(pThisCC, idDXContext, pCmd, cbCmd);
    51345660        break;
    51355661    }
    … …  
    51565682    }
    51575683
    5158     return rcParse;
     5684    return VINF_SUCCESS;
     5685//    return rcParse;
    51595686}
    51605687# undef VMSVGAFIFO_CHECK_3D_CMD_MIN_SIZE_BREAK
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette