Changeset 9212 in vbox
- Timestamp:
- May 29, 2008 9:38:38 AM (17 years ago)
- svn:sync-xref-src-repo-rev:
- 31380
- Location:
- trunk
- Files:
-
- 85 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/cpum.h
r9013 r9212 313 313 * @{ */ 314 314 uint64_t msrEFER; 315 uint64_t msrSTAR; 315 uint64_t msrSTAR; /* legacy syscall eip, cs & ss */ 316 316 uint64_t msrPAT; 317 uint64_t msrLSTAR; 318 uint64_t msrCSTAR; 319 uint64_t msrSFMASK; 317 uint64_t msrLSTAR; /* 64 bits mode syscall rip */ 318 uint64_t msrCSTAR; /* compatibility mode syscall rip */ 319 uint64_t msrSFMASK; /* syscall flag mask */ 320 320 uint64_t msrFSBASE; 321 321 uint64_t msrGSBASE; 322 uint64_t msrKERNELGSBASE; 322 uint64_t msrKERNELGSBASE;/* swapgs exchange value */ 323 323 /** @} */ 324 324 … … 398 398 CPUMDECL(RTSEL) CPUMGetGuestGS(PVM pVM); 399 399 CPUMDECL(RTSEL) CPUMGetGuestSS(PVM pVM); 400 CPUMDECL(RT UINTREG) CPUMGetGuestDR0(PVM pVM);401 CPUMDECL(RT UINTREG) CPUMGetGuestDR1(PVM pVM);402 CPUMDECL(RT UINTREG) CPUMGetGuestDR2(PVM pVM);403 CPUMDECL(RT UINTREG) CPUMGetGuestDR3(PVM pVM);404 CPUMDECL(RT UINTREG) CPUMGetGuestDR6(PVM pVM);405 CPUMDECL(RT UINTREG) CPUMGetGuestDR7(PVM pVM);400 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR0(PVM pVM); 401 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR1(PVM pVM); 402 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR2(PVM pVM); 403 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR3(PVM pVM); 404 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR6(PVM pVM); 405 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR7(PVM pVM); 406 406 CPUMDECL(int) CPUMGetGuestDRx(PVM pVM, uint32_t iReg, uint32_t *pValue); 407 407 CPUMDECL(void) CPUMGetGuestCpuId(PVM pVM, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx); 408 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdGCPtr(PVM pVM);409 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdExtGCPtr(PVM pVM);410 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdCentaurGCPtr(PVM pVM);411 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdDefGCPtr(PVM pVM);408 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdGCPtr(PVM pVM); 409 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdExtGCPtr(PVM pVM); 410 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdCentaurGCPtr(PVM pVM); 411 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdDefGCPtr(PVM pVM); 412 412 CPUMDECL(uint32_t) CPUMGetGuestCpuIdStdMax(PVM pVM); 413 413 CPUMDECL(uint32_t) CPUMGetGuestCpuIdExtMax(PVM pVM); … … 882 882 * @param ppCtx Receives the CPUMCTX GC pointer when successful. 883 883 */ 884 CPUMR3DECL(int) CPUMR3QueryGuestCtxGCPtr(PVM pVM, GCPTRTYPE(PCPUMCTX) *ppCtx);884 CPUMR3DECL(int) CPUMR3QueryGuestCtxGCPtr(PVM pVM, RCPTRTYPE(PCPUMCTX) *ppCtx); 885 885 886 886 … … 930 930 * 931 931 */ 932 DECLASM(void) CPUMGCCallGuestTrapHandler(PCPUMCTXCORE pRegFrame, uint32_t selCS, RTGCPTR pHandler, uint32_t eflags, uint32_t selSS, RTGCPTRpEsp);932 DECLASM(void) CPUMGCCallGuestTrapHandler(PCPUMCTXCORE pRegFrame, uint32_t selCS, RTGCPTR32 pHandler, uint32_t eflags, uint32_t selSS, RTGCPTR32 pEsp); 933 933 934 934 /** -
trunk/include/VBox/dbgf.h
r8819 r9212 62 62 * @param uDr6 The DR6 register value. 63 63 */ 64 DBGFGCDECL(int) DBGFGCTrap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RT UINTREG uDr6);64 DBGFGCDECL(int) DBGFGCTrap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6); 65 65 66 66 /** … … 96 96 * @param uDr6 The DR6 register value. 97 97 */ 98 DBGFR0DECL(int) DBGFR0Trap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RT UINTREG uDr6);98 DBGFR0DECL(int) DBGFR0Trap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6); 99 99 100 100 /** -
trunk/include/VBox/em.h
r9069 r9212 319 319 EMDECL(uint32_t) EMEmulateDec(uint32_t *pu32Param1, size_t cb); 320 320 EMDECL(uint32_t) EMEmulateOr(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb); 321 EMDECL(int) EMEmulateLockOr(RTGCPTR GCPtrParam1, RTGCUINTREG Param2, size_t cbSize, uint32_t*pf);321 EMDECL(int) EMEmulateLockOr(RTGCPTR GCPtrParam1, RTGCUINTREG Param2, size_t cbSize, RTGCUINTREG32 *pf); 322 322 EMDECL(uint32_t) EMEmulateXor(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb); 323 323 EMDECL(uint32_t) EMEmulateAdd(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb); … … 325 325 EMDECL(uint32_t) EMEmulateAdcWithCarrySet(uint32_t *pu32Param1, uint32_t u32Param2, size_t cb); 326 326 EMDECL(uint32_t) EMEmulateBtr(uint32_t *pu32Param1, uint32_t u32Param2); 327 EMDECL(int) EMEmulateLockBtr(RTGCPTR GCPtrParam1, RTGCUINTREG Param2, uint32_t*pf);327 EMDECL(int) EMEmulateLockBtr(RTGCPTR GCPtrParam1, RTGCUINTREG Param2, RTGCUINTREG32 *pf); 328 328 EMDECL(uint32_t) EMEmulateBts(uint32_t *pu32Param1, uint32_t u32Param2); 329 329 EMDECL(uint32_t) EMEmulateBtc(uint32_t *pu32Param1, uint32_t u32Param2); -
trunk/include/VBox/iom.h
r9155 r9212 240 240 const char *pszDesc); 241 241 IOMR3DECL(int) IOMR3IOPortRegisterGC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTGCPTR pvUser, 242 GCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, GCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,243 GCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, GCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,242 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback, 243 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, 244 244 const char *pszDesc); 245 245 IOMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser, … … 258 258 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback); 259 259 IOMR3DECL(int) IOMR3MMIORegisterGC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser, 260 GCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,261 GCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,262 GCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback);260 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, 261 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback, 262 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback); 263 263 IOMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange); 264 264 /** @} */ -
trunk/include/VBox/mm.h
r8797 r9212 239 239 { 240 240 NOREF(pVM); 241 return GCPtr;241 return (void *)GCPtr; 242 242 } 243 243 #endif … … 264 264 265 265 #ifndef IN_GC 266 MMDECL(R TGCPTR) MMHyperCCToGC(PVM pVM, void *pv);267 #else 268 DECLINLINE(R TGCPTR) MMHyperCCToGC(PVM pVM, void *pv)269 { 270 NOREF(pVM); 271 return pv;266 MMDECL(RCPTRTYPE(void *)) MMHyperCCToGC(PVM pVM, void *pv); 267 #else 268 DECLINLINE(RCPTRTYPE(void *)) MMHyperCCToGC(PVM pVM, void *pv) 269 { 270 NOREF(pVM); 271 return (RCPTRTYPE(void *))pv; 272 272 } 273 273 #endif … … 285 285 286 286 #ifndef IN_GC 287 MMDECL(R TGCPTR) MMHyper2GC(PVM pVM, uintptr_t Ptr);288 #else 289 DECLINLINE(R TGCPTR) MMHyper2GC(PVM pVM, uintptr_t Ptr)290 { 291 NOREF(pVM); 292 return (R TGCPTR)Ptr;293 } 294 #endif 295 296 MMDECL(R TGCPTR) MMHyperHC2GC(PVM pVM, RTHCPTR HCPtr);297 MMDECL(RTHCPTR) MMHyperGC2HC(PVM pVM, R TGCPTRGCPtr);287 MMDECL(RCPTRTYPE(void *)) MMHyper2GC(PVM pVM, uintptr_t Ptr); 288 #else 289 DECLINLINE(RCPTRTYPE(void *)) MMHyper2GC(PVM pVM, uintptr_t Ptr) 290 { 291 NOREF(pVM); 292 return (RCPTRTYPE(void *))Ptr; 293 } 294 #endif 295 296 MMDECL(RCPTRTYPE(void *)) MMHyperHC2GC(PVM pVM, RTHCPTR HCPtr); 297 MMDECL(RTHCPTR) MMHyperGC2HC(PVM pVM, RCPTRTYPE(void *) GCPtr); 298 298 MMDECL(int) MMHyperAlloc(PVM pVM, size_t cb, uint32_t uAlignment, MMTAG enmTag, void **ppv); 299 299 MMDECL(int) MMHyperFree(PVM pVM, void *pv); -
trunk/include/VBox/patm.h
r8155 r9212 186 186 * @param pVM The VM to operate on. 187 187 */ 188 PATMDECL( GCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM);188 PATMDECL(RCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM); 189 189 190 190 /** … … 551 551 * 552 552 */ 553 PATMR3DECL(RTGCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, GCPTRTYPE(uint8_t*) pInstrGC);553 PATMR3DECL(RTGCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC); 554 554 555 555 /** -
trunk/include/VBox/pdmdev.h
r8155 r9212 554 554 } PDMPCIHLPGC; 555 555 /** Pointer to PCI helpers. */ 556 typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;556 typedef RCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC; 557 557 /** Pointer to const PCI helpers. */ 558 typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;558 typedef RCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC; 559 559 560 560 /** Current PDMPCIHLPR3 version number. */ … … 799 799 800 800 /** Pointer to PIC GC helpers. */ 801 typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;801 typedef RCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC; 802 802 /** Pointer to const PIC GC helpers. */ 803 typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;803 typedef RCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC; 804 804 805 805 /** Current PDMPICHLPGC version number. */ … … 1092 1092 } PDMAPICHLPGC; 1093 1093 /** Pointer to APIC GC helpers. */ 1094 typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;1094 typedef RCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC; 1095 1095 /** Pointer to const APIC helpers. */ 1096 typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;1096 typedef RCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC; 1097 1097 1098 1098 /** Current PDMAPICHLPGC version number. */ … … 1153 1153 } PDMAPICHLPR0; 1154 1154 /** Pointer to APIC GC helpers. */ 1155 typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;1155 typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0; 1156 1156 /** Pointer to const APIC helpers. */ 1157 1157 typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0; … … 1321 1321 } PDMIOAPICHLPGC; 1322 1322 /** Pointer to IOAPIC GC helpers. */ 1323 typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;1323 typedef RCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC; 1324 1324 /** Pointer to const IOAPIC helpers. */ 1325 typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;1325 typedef RCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC; 1326 1326 1327 1327 /** Current PDMIOAPICHLPGC version number. */ … … 2806 2806 } PDMDEVHLPGC; 2807 2807 /** Pointer PDM Device GC API. */ 2808 typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;2808 typedef RCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC; 2809 2809 /** Pointer PDM Device GC API. */ 2810 typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;2810 typedef RCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC; 2811 2811 2812 2812 /** Current PDMDEVHLP version number. */ … … 2980 2980 R0PTRTYPE(void *) pvInstanceDataR0; 2981 2981 /** Pointer the GC PDM Device API. */ 2982 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;2982 RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC; 2983 2983 /** Pointer to device instance data. */ 2984 GCPTRTYPE(void *) pvInstanceDataGC;2984 RCPTRTYPE(void *) pvInstanceDataGC; 2985 2985 /* padding to make achInstanceData aligned at 32 byte boundrary. */ 2986 2986 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6]; … … 3039 3039 * Converts a PDM Device instance pointer a GC PDM Device instance pointer. 3040 3040 */ 3041 #define PDMDEVINS_2_GCPTR(pDevIns) ( ( GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )3041 #define PDMDEVINS_2_GCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) ) 3042 3042 3043 3043 /** @def PDMDEVINS_2_R3PTR -
trunk/include/VBox/pdmqueue.h
r8155 r9212 54 54 R3R0PTRTYPE(PPDMQUEUEITEMCORE) pNextHC; 55 55 /** Pointer to the next item in the pending list - GC Pointer. */ 56 GCPTRTYPE(PPDMQUEUEITEMCORE) pNextGC;56 RCPTRTYPE(PPDMQUEUEITEMCORE) pNextGC; 57 57 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 58 58 uint32_t Alignment0; … … 280 280 * @param pQueue The queue handle. 281 281 */ 282 PDMDECL( GCPTRTYPE(PPDMQUEUE)) PDMQueueGCPtr(PPDMQUEUE pQueue);282 PDMDECL(RCPTRTYPE(PPDMQUEUE)) PDMQueueGCPtr(PPDMQUEUE pQueue); 283 283 284 284 /** @} */ -
trunk/include/VBox/pgm.h
r9064 r9212 344 344 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 345 345 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 346 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTRpvUserGC,346 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RCPTRTYPE(void *) pvUserGC, 347 347 R3PTRTYPE(const char *) pszDesc); 348 348 PGMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast); … … 351 351 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 352 352 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 353 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTRpvUserGC,353 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RCPTRTYPE(void *) pvUserGC, 354 354 R3PTRTYPE(const char *) pszDesc); 355 355 PGMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit); … … 483 483 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 484 484 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 485 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,485 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC, 486 486 R3PTRTYPE(const char *) pszDesc); 487 487 PDMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb); -
trunk/include/VBox/selm.h
r8155 r9212 65 65 * @param esp Ring1 ESP register value. 66 66 */ 67 SELMDECL(void) SELMSetRing1Stack(PVM pVM, uint32_t ss, uint32_tesp);67 SELMDECL(void) SELMSetRing1Stack(PVM pVM, uint32_t ss, RTGCPTR32 esp); 68 68 69 69 /** … … 75 75 * @param pEsp Ring1 ESP register value. 76 76 */ 77 SELMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, uint32_t *pEsp);77 SELMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp); 78 78 79 79 /** -
trunk/include/VBox/types.h
r8155 r9212 83 83 typedef R3PTRTYPE(struct VM *) PVMR3; 84 84 /** Pointer to a VM - GC Ptr. */ 85 typedef GCPTRTYPE(struct VM *) PVMGC;85 typedef RCPTRTYPE(struct VM *) PVMGC; 86 86 87 87 /** Pointer to a ring-0 (global) VM structure. */ … … 139 139 typedef R0PTRTYPE(PPDMDEVINS) PPDMDEVINSR0; 140 140 /** GC pointer to a PDM Device Instance. */ 141 typedef GCPTRTYPE(PPDMDEVINS) PPDMDEVINSGC;141 typedef RCPTRTYPE(PPDMDEVINS) PPDMDEVINSGC; 142 142 143 143 /** Pointer to a PDM USB Device Instance. */ … … 167 167 168 168 /** GC pointer to a timer. */ 169 typedef GCPTRTYPE(struct TMTIMER *) PTMTIMERGC;169 typedef RCPTRTYPE(struct TMTIMER *) PTMTIMERGC; 170 170 /** Pointer to a GC pointer to a timer. */ 171 171 typedef PTMTIMERGC *PPTMTIMERGC; -
trunk/include/VBox/vm.h
r9148 r9212 280 280 R0PTRTYPE(struct VM *) pVMR0; 281 281 /** Guest Context VM Pointer. */ 282 GCPTRTYPE(struct VM *) pVMGC;282 RCPTRTYPE(struct VM *) pVMGC; 283 283 284 284 /** The GVM VM handle. Only the GVM should modify this field. */ … … 513 513 struct TM s; 514 514 #endif 515 char padding[13 12]; /* multiple of 32 */515 char padding[1344]; /* multiple of 32 */ 516 516 } tm; 517 517 … … 522 522 struct DBGF s; 523 523 #endif 524 char padding[ HC_ARCH_BITS == 32 ? 1920 : 1952]; /* multiple of 32 */524 char padding[2368]; /* multiple of 32 */ 525 525 } dbgf; 526 526 … … 549 549 struct REM s; 550 550 #endif 551 #if GC_ARCH_BITS == 32 551 552 char padding[HC_ARCH_BITS == 32 ? 0x6f00 : 0xbf00]; /* multiple of 32 */ 553 #else 554 char padding[HC_ARCH_BITS == 32 ? 0x8f00 : 0xdf00]; /* multiple of 32 */ 555 #endif 552 556 } rem; 553 557 } VM; -
trunk/include/VBox/vm.mac
r8155 r9212 49 49 .enmVMState resd 1 50 50 .fForcedActions resd 1 51 .paVMPagesR3 RTR3PTR_RES 152 .pSession RTR0PTR_RES 153 .pUVM RTR3PTR_RES 154 .pVMR3 RTR3PTR_RES 155 .pVMR0 RTR0PTR_RES 156 .pVMGC RTGCPTR _RES 151 .paVMPagesR3 RTR3PTR_RES 1 52 .pSession RTR0PTR_RES 1 53 .pUVM RTR3PTR_RES 1 54 .pVMR3 RTR3PTR_RES 1 55 .pVMR0 RTR0PTR_RES 1 56 .pVMGC RTGCPTR32_RES 1 57 57 .hSelf resd 1 58 58 .u32Reserved resd 1 59 59 60 .pfnVMMGCGuestToHostAsmGuestCtx RTGCPTR _RES 161 .pfnVMMGCGuestToHostAsmHyperCtx RTGCPTR _RES 162 .pfnVMMGCGuestToHostAsm RTGCPTR _RES 160 .pfnVMMGCGuestToHostAsmGuestCtx RTGCPTR32_RES 1 61 .pfnVMMGCGuestToHostAsmHyperCtx RTGCPTR32_RES 1 62 .pfnVMMGCGuestToHostAsm RTGCPTR32_RES 1 63 63 64 64 .ThreadEMT RTHCPTR_RES 1 -
trunk/include/iprt/asm.h
r9183 r9212 3860 3860 3861 3861 # elif RT_INLINE_ASM_GNU_STYLE 3862 RT UINTREG uDummy;3862 RTCCUINTREG uDummy; 3863 3863 # ifdef RT_ARCH_AMD64 3864 3864 __asm__ __volatile__ ("rep stosq" … … 4129 4129 # else /* !RT_ARCH_AMD64 */ 4130 4130 # if RT_INLINE_ASM_GNU_STYLE 4131 RT UINTREG uDummy;4131 RTCCUINTREG uDummy; 4132 4132 __asm__ __volatile__("divl %3" 4133 4133 : "=a" (u32), "=d"(uDummy) … … 4163 4163 # else /* !RT_ARCH_AMD64 */ 4164 4164 # if RT_INLINE_ASM_GNU_STYLE 4165 RT UINTREG iDummy;4165 RTCCUINTREG iDummy; 4166 4166 __asm__ __volatile__("idivl %3" 4167 4167 : "=a" (i32), "=d"(iDummy) -
trunk/include/iprt/asmdefs.mac
r9145 r9212 429 429 %endif 430 430 431 %define RTGCPTR32_RES resd 432 %define RTGCPTR64_RES resq 433 431 434 ;; @def RTGCPTR_PRE 432 435 ; The memory operand prefix used for a pointer in the guest context. … … 504 507 %define RTGCPHYS_DEF dq 505 508 506 ;; @def RTGCP TR_RES509 ;; @def RTGCPHYS_RES 507 510 ; The pesudo-instruction used to declare (=reserve space for) an uninitialized 508 511 ; guest physical address variable -
trunk/include/iprt/cdefs.h
r9148 r9212 217 217 * @param R3Type The R3 type. 218 218 * @param R0Type The R0 type. 219 * @remark For pointers used only in one context use GCPTRTYPE(), R3R0PTRTYPE(), R3PTRTYPE() or R0PTRTYPE().219 * @remark For pointers used only in one context use RCPTRTYPE(), R3R0PTRTYPE(), R3PTRTYPE() or R0PTRTYPE(). 220 220 */ 221 221 #ifdef IN_GC … … 232 232 * @param GCType The GC type. 233 233 * @param HCType The HC type. 234 * @remark For pointers used only in one context use GCPTRTYPE(), R3R0PTRTYPE(), R3PTRTYPE() or R0PTRTYPE().234 * @remark For pointers used only in one context use RCPTRTYPE(), R3R0PTRTYPE(), R3PTRTYPE() or R0PTRTYPE(). 235 235 */ 236 236 #define GCTYPE(GCType, HCType) CTXTYPE(GCType, HCType, HCType) 237 237 238 /** @def GCPTRTYPE238 /** @def RCPTRTYPE 239 239 * Declare a pointer which is used in GC but appears in structure(s) used by 240 240 * both HC and GC. The main purpose is to make sure structures have the same … … 243 243 * @param GCType The GC type. 244 244 */ 245 #define GCPTRTYPE(GCType) CTXTYPE(GCType, RTGCPTR32, RTGCPTR32)245 #define RCPTRTYPE(GCType) CTXTYPE(GCType, RTGCPTR32, RTGCPTR32) 246 246 247 247 /** @def R3R0PTRTYPE -
trunk/include/iprt/log.h
r8964 r9212 193 193 typedef DECLCALLBACK(void) FNRTLOGFLUSHGC(PRTLOGGERGC pLogger); 194 194 /** Pointer to logger function. */ 195 typedef GCPTRTYPE(FNRTLOGFLUSHGC *) PFNRTLOGFLUSHGC;195 typedef RCPTRTYPE(FNRTLOGFLUSHGC *) PFNRTLOGFLUSHGC; 196 196 197 197 … … 212 212 * instance pointer onto the stack before jumping to the real logger function. 213 213 * A very unfortunate hack to work around the missing variadic macro support in C++. */ 214 GCPTRTYPE(PFNRTLOGGER) pfnLogger;214 RCPTRTYPE(PFNRTLOGGER) pfnLogger; 215 215 /** Pointer to the flush function. */ 216 216 PFNRTLOGFLUSHGC pfnFlush; -
trunk/include/iprt/spinlock.h
r8245 r9212 56 56 # elif defined(RT_OS_WINDOWS) 57 57 /** The saved [R|E]FLAGS. */ 58 RT UINTREG uFlags;58 RTCCUINTREG uFlags; 59 59 /** The KIRQL. */ 60 60 unsigned char uchIrqL; … … 68 68 # elif defined(RT_OS_DARWIN) 69 69 /** The saved [R|E]FLAGS. */ 70 RT UINTREG uFlags;70 RTCCUINTREG uFlags; 71 71 # define RTSPINLOCKTMP_INITIALIZER { 0 } 72 72 73 73 # elif defined(RT_OS_OS2) || defined(RT_OS_FREEBSD) || defined(RT_OS_SOLARIS) 74 74 /** The saved [R|E]FLAGS. (dummy) */ 75 RT UINTREG uFlags;75 RTCCUINTREG uFlags; 76 76 # define RTSPINLOCKTMP_INITIALIZER { 0 } 77 77 … … 79 79 # error "Your OS is not supported.\n" 80 80 /** The saved [R|E]FLAGS. */ 81 RT UINTREG uFlags;81 RTCCUINTREG uFlags; 82 82 # endif 83 83 … … 85 85 /** The saved [R|E]FLAGS. 86 86 * (RT spinlocks will by definition disable interrupts.) */ 87 RT UINTREG uFlags;87 RTCCUINTREG uFlags; 88 88 # define RTSPINLOCKTMP_INITIALIZER { 0 } 89 89 #endif /* !IN_RING0 */ -
trunk/include/iprt/time.h
r8245 r9212 842 842 typedef struct RTTIMENANOTSDATAGC 843 843 { 844 GCPTRTYPE(uint64_t volatile *) pu64Prev;844 RCPTRTYPE(uint64_t volatile *) pu64Prev; 845 845 DECLGCCALLBACKMEMBER(void, pfnBad,(PRTTIMENANOTSDATA pData, uint64_t u64NanoTS, uint64_t u64DeltaPrev, uint64_t u64PrevNanoTS)); 846 846 DECLGCCALLBACKMEMBER(uint64_t, pfnRediscover,(PRTTIMENANOTSDATA pData)); 847 R TGCPTRpvDummy;847 RCPTRTYPE(void *) pvDummy; 848 848 uint32_t c1nsSteps; 849 849 uint32_t cExpired; -
trunk/include/iprt/types.h
r9145 r9212 707 707 708 708 /** Natural signed integer in the GC. */ 709 #if GC_ARCH_BITS == 32 709 710 typedef int32_t RTGCINT; 711 #elif GC_ARCH_BITS == 64 712 typedef int64_t RTGCINT; 713 #endif 710 714 /** Pointer to natural signed interger in GC. */ 711 715 typedef RTGCINT *PRTGCINT; … … 713 717 typedef const RTGCINT *PCRTGCINT; 714 718 715 /** Natural signed uninteger in the GC. */ 719 /** Natural unsigned integer in the GC. */ 720 #if GC_ARCH_BITS == 32 716 721 typedef uint32_t RTGCUINT; 717 /** Pointer to natural unsigned interger in GC. */ 722 #elif GC_ARCH_BITS == 64 723 typedef uint64_t RTGCUINT; 724 #endif 725 /** Pointer to natural unsigned integer in GC. */ 718 726 typedef RTGCUINT *PRTGCUINT; 719 /** Pointer to const natural unsigned inte rger in GC. */727 /** Pointer to const natural unsigned integer in GC. */ 720 728 typedef const RTGCUINT *PCRTGCUINT; 721 729 … … 725 733 #elif GC_ARCH_BITS == 64 726 734 typedef int64_t RTGCINTPTR; 727 #else728 # error Unsupported GC_ARCH_BITS value.729 735 #endif 730 736 /** Pointer to signed interger which can contain a GC pointer. */ … … 808 814 * HC and void pointer in GC. 809 815 */ 810 #ifdef IN_GC811 typedef void *RTGCPTR32;812 #else813 816 typedef RTGCUINTPTR32 RTGCPTR32; 814 #endif815 817 /** Pointer to a guest context pointer. */ 816 818 typedef RTGCPTR32 *PRTGCPTR32; … … 863 865 864 866 /** Unsigned integer register in the guest context. */ 867 typedef uint32_t RTGCUINTREG32; 868 /** Pointer to an unsigned integer register in the guest context. */ 869 typedef RTGCUINTREG32 *PRTGCUINTREG32; 870 /** Pointer to a const unsigned integer register in the guest context. */ 871 typedef const RTGCUINTREG32 *PCRTGCUINTREG32; 872 873 typedef uint64_t RTGCUINTREG64; 874 /** Pointer to an unsigned integer register in the guest context. */ 875 typedef RTGCUINTREG64 *PRTGCUINTREG64; 876 /** Pointer to a const unsigned integer register in the guest context. */ 877 typedef const RTGCUINTREG64 *PCRTGCUINTREG64; 878 865 879 #if GC_ARCH_BITS == 64 866 typedef uint64_tRTGCUINTREG;880 typedef RTGCUINTREG64 RTGCUINTREG; 867 881 #elif GC_ARCH_BITS == 32 868 typedef uint32_tRTGCUINTREG;882 typedef RTGCUINTREG32 RTGCUINTREG; 869 883 #else 870 884 # error "Unsupported GC_ARCH_BITS!" … … 904 918 #endif 905 919 920 /** Unsigned integer register in the current 32 bits context. */ 921 typedef uint32_t RTCCUINTREG32; 922 /** Pointer to an unsigned integer register in the current context. */ 923 typedef RTCCUINTREG32 *PRTCCUINTREG32; 924 /** Pointer to a const unsigned integer register in the current context. */ 925 typedef const RTCCUINTREG32 *PCRTCCUINTREG32; 926 927 /** Unsigned integer register in the current 64 bits context. */ 928 typedef uint64_t RTCCUINTREG64; 929 /** Pointer to an unsigned integer register in the current context. */ 930 typedef RTCCUINTREG64 *PRTCCUINTREG64; 931 /** Pointer to a const unsigned integer register in the current context. */ 932 typedef const RTCCUINTREG64 *PCRTCCUINTREG64; 933 906 934 /** Unsigned integer register in the current context. */ 907 935 #if ARCH_BITS == 32 908 typedef uint32_t RTCCUINTREG; 936 typedef RTCCUINTREG32 RTCCUINTREG; 937 /** Pointer to an unsigned integer register in the current context. */ 938 typedef PRTCCUINTREG32 PRTCCUINTREG; 939 /** Pointer to a const unsigned integer register in the current context. */ 940 typedef PCRTCCUINTREG32 PCRTCCUINTREG; 909 941 #elif ARCH_BITS == 64 910 typedef uint64_t RTCCUINTREG; 942 typedef RTCCUINTREG64 RTCCUINTREG; 943 /** Pointer to an unsigned integer register in the current context. */ 944 typedef PRTCCUINTREG64 PRTCCUINTREG; 945 /** Pointer to a const unsigned integer register in the current context. */ 946 typedef PCRTCCUINTREG64 PCRTCCUINTREG; 911 947 #else 912 948 # error "Unsupported ARCH_BITS!" 913 949 #endif 914 /** Pointer to an unsigned integer register in the current context. */915 typedef RTCCUINTREG *PRTCCUINTREG;916 /** Pointer to a const unsigned integer register in the current context. */917 typedef const RTCCUINTREG *PCRTCCUINTREG;918 919 /** @deprecated */920 typedef RTCCUINTREG RTUINTREG;921 /** @deprecated */922 typedef RTCCUINTREG *PRTUINTREG;923 /** @deprecated */924 typedef const RTCCUINTREG *PCRTUINTREG;925 950 926 951 /** @} */ -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r8642 r9212 5231 5231 AssertMsgRC(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pData->vram_size, rc)); 5232 5232 5233 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pData->vram_ptrGC); 5233 RTGCPTR pGCMapping = 0; 5234 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pGCMapping); 5234 5235 AssertMsgRC(rc, ("MMR3HyperMapGCPhys(%#x,) -> %Rrc\n", pData->vram_size, rc)); 5236 Assert(!(pGCMapping >> 32ULL)); 5237 pData->vram_ptrGC = pGCMapping; 5235 5238 5236 5239 /* -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r8155 r9212 251 251 RTGCPHYS32 GCPhysVRAM; 252 252 /** Pointer to GC vram mapping. */ 253 GCPTRTYPE(uint8_t *) vram_ptrGC;253 RCPTRTYPE(uint8_t *) vram_ptrGC; 254 254 /** @todo r=bird: bool not RTUINT (my fault I guess). */ 255 255 /** LFB was updated flag. */ … … 260 260 RTUINT fR0Enabled; 261 261 /** Pointer to vgaGCLFBAccessHandler(). */ 262 RTGCPTR 262 RTGCPTR32 GCPtrLFBHandler; 263 263 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */ 264 264 bool fHaveDirtyBits; … … 268 268 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 269 269 /* * Pointer to the device instance - GC Ptr. */ 270 /* GCPTRTYPE(PPDMDEVINS) pDevInsGC;*/270 /*RCPTRTYPE(PPDMDEVINS) pDevInsGC;*/ 271 271 272 272 /** The display port base interface. */ -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r8613 r9212 114 114 R3R0PTRTYPE(PTMTIMER) pTimerPollHC; 115 115 /** Poll timer (address for guest context) */ 116 GCPTRTYPE(PTMTIMER) pTimerPollGC;116 RCPTRTYPE(PTMTIMER) pTimerPollGC; 117 117 #endif 118 118 … … 124 124 R3R0PTRTYPE(PTMTIMER) pTimerSoftIntHC; 125 125 /** Software Interrupt timer (address for guest context) */ 126 GCPTRTYPE(PTMTIMER) pTimerSoftIntGC;126 RCPTRTYPE(PTMTIMER) pTimerSoftIntGC; 127 127 128 128 /** Register Address Pointer */ … … 166 166 167 167 /** Transmit signaller */ 168 GCPTRTYPE(PPDMQUEUE) pXmitQueueGC;168 RCPTRTYPE(PPDMQUEUE) pXmitQueueGC; 169 169 R3R0PTRTYPE(PPDMQUEUE) pXmitQueueHC; 170 170 171 171 /** Receive signaller */ 172 172 R3R0PTRTYPE(PPDMQUEUE) pCanRxQueueHC; 173 GCPTRTYPE(PPDMQUEUE) pCanRxQueueGC;173 RCPTRTYPE(PPDMQUEUE) pCanRxQueueGC; 174 174 /** Pointer to the device instance. */ 175 GCPTRTYPE(PPDMDEVINS) pDevInsGC;175 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 176 176 /** Pointer to the device instance. */ 177 177 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; … … 241 241 R3R0PTRTYPE(PPCNETGUESTSHAREDMEMORY) pSharedMMIOHC; 242 242 /** The hypervisor/guest context of the shared memory used for the private interface. */ 243 GCPTRTYPE(PPCNETGUESTSHAREDMEMORY) pSharedMMIOGC;243 RCPTRTYPE(PPCNETGUESTSHAREDMEMORY) pSharedMMIOGC; 244 244 245 245 #if HC_ARCH_BITS == 64 … … 4745 4745 if (fPrivIfEnabled) 4746 4746 { 4747 RTGCPTR pGCMapping; 4748 4747 4749 /* 4748 4750 * Initialize shared memory between host and guest for descriptors and RX buffers. Most guests … … 4753 4755 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 4754 4756 N_("Failed to allocate %u bytes of memory for the PCNet device"), PCNET_GUEST_SHARED_MEMORY_SIZE); 4755 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 2, 0, 8192, "PCNetShMem", &p Data->pSharedMMIOGC);4757 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 2, 0, 8192, "PCNetShMem", &pGCMapping); 4756 4758 if (VBOX_FAILURE(rc)) 4757 4759 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 4758 4760 N_("Failed to map 8192 bytes of memory for the PCNet device into the hyper memory")); 4761 pData->pSharedMMIOGC = pGCMapping; 4759 4762 pcnetInitSharedMemory(pData); 4760 4763 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, PCNET_GUEST_SHARED_MEMORY_SIZE, -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r8155 r9212 162 162 int64_t pm_timer_initial; 163 163 R3R0PTRTYPE(PTMTIMER) tsHC; 164 GCPTRTYPE(PTMTIMER) tsGC;164 RCPTRTYPE(PTMTIMER) tsGC; 165 165 166 166 uint32_t gpe0_en; -
trunk/src/VBox/Devices/PC/DevPIC.cpp
r8923 r9212 119 119 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 120 120 /** Pointer to the device instance, GCPtr. */ 121 GCPTRTYPE(PPDMDEVINS) pDevInsGC;121 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 122 122 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS != 64 123 123 RTGCPTR Alignment0; … … 139 139 PCPDMPICHLPGC pPicHlpGC; 140 140 /** Pointer to the device instance - GC Ptr. */ 141 GCPTRTYPE(PPDMDEVINS) pDevInsGC;141 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 142 142 /** Pointer to the device instance - GC Ptr. */ 143 143 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; … … 455 455 { 456 456 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC = s->pDevInsHC; 457 GCPTRTYPE(PPDMDEVINS) pDevInsGC = s->pDevInsGC;457 RCPTRTYPE(PPDMDEVINS) pDevInsGC = s->pDevInsGC; 458 458 int tmp, tmp2; 459 459 -
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r8155 r9212 87 87 R3R0PTRTYPE(PTMTIMER) pTimerHC; 88 88 /** Pointer to the instance data - GCPtr. */ 89 GCPTRTYPE(struct PITState *) pPitGC;89 RCPTRTYPE(struct PITState *) pPitGC; 90 90 /** The timer - HCPtr. */ 91 91 PTMTIMERGC pTimerGC; -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r9117 r9212 125 125 int32_t irq; 126 126 /* periodic timer */ 127 GCPTRTYPE(PTMTIMER) pPeriodicTimerGC;127 RCPTRTYPE(PTMTIMER) pPeriodicTimerGC; 128 128 R3R0PTRTYPE(PTMTIMER) pPeriodicTimerHC; 129 129 int64_t next_periodic_time; … … 131 131 int64_t next_second_time; 132 132 R3R0PTRTYPE(PTMTIMER) pSecondTimerHC; 133 GCPTRTYPE(PTMTIMER) pSecondTimerGC;134 GCPTRTYPE(PTMTIMER) pSecondTimer2GC;133 RCPTRTYPE(PTMTIMER) pSecondTimerGC; 134 RCPTRTYPE(PTMTIMER) pSecondTimer2GC; 135 135 R3R0PTRTYPE(PTMTIMER) pSecondTimer2HC; 136 136 /** Pointer to the device instance - HC Ptr. */ -
trunk/src/VBox/Devices/Parallel/DevParallel.cpp
r8747 r9212 95 95 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 96 96 /** Pointer to the device instance. */ 97 GCPTRTYPE(PPDMDEVINS) pDevInsGC;97 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 98 98 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS != 64 99 99 RTGCPTR Alignment0; -
trunk/src/VBox/Devices/Serial/DevSerial.cpp
r8155 r9212 123 123 R3PTRTYPE(PPDMDEVINS) pDevInsHC; 124 124 /** Pointer to the device instance. */ 125 GCPTRTYPE(PPDMDEVINS) pDevInsGC;125 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 126 126 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS != 64 127 127 RTGCPTR Alignment0; -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r8708 r9212 177 177 R3R0PTRTYPE(uint8_t *) pbIOBufferHC; 178 178 /** Pointer to the I/O buffer. */ 179 GCPTRTYPE(uint8_t *) pbIOBufferGC;179 RCPTRTYPE(uint8_t *) pbIOBufferGC; 180 180 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS != 64 181 181 RTGCPTR Aligmnent0; /**< Align the statistics at an 8-byte boundrary. */ … … 245 245 R3R0PTRTYPE(struct ATACONTROLLER *) pControllerHC; 246 246 /** Pointer to device instance. */ 247 GCPTRTYPE(PPDMDEVINS) pDevInsGC;247 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 248 248 /** Pointer to controller instance. */ 249 GCPTRTYPE(struct ATACONTROLLER *) pControllerGC;249 RCPTRTYPE(struct ATACONTROLLER *) pControllerGC; 250 250 } ATADevState; 251 251 … … 340 340 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 341 341 /** Pointer to device instance. */ 342 GCPTRTYPE(PPDMDEVINS) pDevInsGC;342 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 343 343 344 344 /** Set when the destroying the device instance and the thread must exit. */ … … 416 416 PDMBOTHCBDECL(int) ataIOPortWrite1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb); 417 417 PDMBOTHCBDECL(int) ataIOPortRead1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *u32, unsigned cb); 418 PDMBOTHCBDECL(int) ataIOPortWriteStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, unsigned *pcTransfer, unsigned cb);419 PDMBOTHCBDECL(int) ataIOPortReadStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, unsigned *pcTransfer, unsigned cb);418 PDMBOTHCBDECL(int) ataIOPortWriteStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb); 419 PDMBOTHCBDECL(int) ataIOPortReadStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb); 420 420 PDMBOTHCBDECL(int) ataIOPortWrite2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb); 421 421 PDMBOTHCBDECL(int) ataIOPortRead2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *u32, unsigned cb); … … 4993 4993 * @see FNIOMIOPORTINSTRING for details. 4994 4994 */ 4995 PDMBOTHCBDECL(int) ataIOPortReadStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, unsigned *pcTransfer, unsigned cb)4995 PDMBOTHCBDECL(int) ataIOPortReadStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb) 4996 4996 { 4997 4997 uint32_t i = (uint32_t)(uintptr_t)pvUser; … … 5050 5050 * @see FNIOMIOPORTOUTSTRING for details. 5051 5051 */ 5052 PDMBOTHCBDECL(int) ataIOPortWriteStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, unsigned *pcTransfer, unsigned cb)5052 PDMBOTHCBDECL(int) ataIOPortWriteStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb) 5053 5053 { 5054 5054 uint32_t i = (uint32_t)(uintptr_t)pvUser; -
trunk/src/VBox/HostDrivers/Support/SUPDRVShared.c
r8883 r9212 2990 2990 static void supdrvIdtWrite(volatile void *pvIdtEntry, const SUPDRVIDTE *pNewIDTEntry) 2991 2991 { 2992 RT UINTREG uCR0;2993 RT UINTREG uFlags;2992 RTR0UINTREG uCR0; 2993 RTR0UINTREG uFlags; 2994 2994 2995 2995 /* … … 3006 3006 /* Save & Clear interrupt flag; Save & clear WP. */ 3007 3007 uFlags = ASMGetFlags(); 3008 ASMSetFlags(uFlags & ~(RT UINTREG)(1 << 9)); /*X86_EFL_IF*/3008 ASMSetFlags(uFlags & ~(RTR0UINTREG)(1 << 9)); /*X86_EFL_IF*/ 3009 3009 Assert(!(ASMGetFlags() & (1 << 9))); 3010 3010 uCR0 = ASMGetCR0(); 3011 ASMSetCR0(uCR0 & ~(RT UINTREG)(1 << 16)); /*X86_CR0_WP*/3011 ASMSetCR0(uCR0 & ~(RTR0UINTREG)(1 << 16)); /*X86_CR0_WP*/ 3012 3012 3013 3013 /* Update IDT Entry */ … … 3623 3623 SUPPAGINGMODE enmMode; 3624 3624 3625 RT UINTREG cr0 = ASMGetCR0();3625 RTR0UINTREG cr0 = ASMGetCR0(); 3626 3626 if ((cr0 & (X86_CR0_PG | X86_CR0_PE)) != (X86_CR0_PG | X86_CR0_PE)) 3627 3627 enmMode = SUPPAGINGMODE_INVALID; 3628 3628 else 3629 3629 { 3630 RT UINTREG cr4 = ASMGetCR4();3630 RTR0UINTREG cr4 = ASMGetCR4(); 3631 3631 uint32_t fNXEPlusLMA = 0; 3632 3632 if (cr4 & X86_CR4_PAE) -
trunk/src/VBox/Runtime/common/misc/sanity.h
r8245 r9212 46 46 # error "defined(IN_RING0) && ARCH_BITS != R0_ARCH_BITS" 47 47 #endif 48 #if defined(IN_GC) && ARCH_BITS != GC_ARCH_BITS49 # error "defined(IN_GC) && ARCH_BITS != GC_ARCH_BITS"48 #if defined(IN_GC) && ARCH_BITS != 32 49 # error "defined(IN_GC) && ARCH_BITS != 32" 50 50 #endif 51 51 #if (defined(IN_RING0) || defined(IN_RING3)) && HC_ARCH_BITS != ARCH_BITS 52 52 # error "(defined(IN_RING0) || defined(IN_RING3)) && HC_ARCH_BITS != ARCH_BITS" 53 53 #endif 54 #if defined(IN_GC) && GC_ARCH_BITS != ARCH_BITS54 #if defined(IN_GC) && GC_ARCH_BITS != 64 && GC_ARCH_BITS != ARCH_BITS 55 55 # error "defined(IN_GC) && GC_ARCH_BITS != ARCH_BITS" 56 56 #endif … … 124 124 #if GC_ARCH_BITS == 64 125 125 126 AssertCompileSize(RTGCINT, 4);127 AssertCompileSize(RTGCUINT, 4);126 AssertCompileSize(RTGCINT, 8); 127 AssertCompileSize(RTGCUINT, 8); 128 128 AssertCompileSize(RTGCINTPTR, 8); 129 129 AssertCompileSize(RTGCUINTPTR, 8); … … 133 133 # ifdef IN_GC 134 134 /*AssertCompileSize(RTCCINTREG, 8);*/ 135 AssertCompileSize(RTCCUINTREG, 8); 135 /* Hack alert: there is no such thing as a GC context when GC_ARCH_BITS == 64; it's still 32 bits */ 136 AssertCompileSize(RTCCUINTREG, 4); 136 137 # endif 137 138 -
trunk/src/VBox/Runtime/common/string/strformatrt.cpp
r8479 r9212 54 54 * - \%RTproc - Takes a #RTPROCESS value. 55 55 * - \%RTptr - Takes a #RTINTPTR or #RTUINTPTR value (but not void *). 56 * - \%RTreg - Takes a #RT UINTREG value.56 * - \%RTreg - Takes a #RTCCUINTREG value. 57 57 * - \%RTsel - Takes a #RTSEL value. 58 58 * - \%RTsem - Takes a #RTSEMEVENT, #RTSEMEVENTMULTI, #RTSEMMUTEX, #RTSEMFASTMUTEX, or #RTSEMRW value. … … 245 245 { STRMEM("Tproc"), sizeof(RTPROCESS), 16, RTSF_INTW, 0 }, 246 246 { STRMEM("Tptr"), sizeof(RTUINTPTR), 16, RTSF_INTW, 0 }, 247 { STRMEM("Treg"), sizeof(RT UINTREG),16, RTSF_INTW, 0 },247 { STRMEM("Treg"), sizeof(RTCCUINTREG), 16, RTSF_INTW, 0 }, 248 248 { STRMEM("Tsel"), sizeof(RTSEL), 16, RTSF_INTW, 0 }, 249 249 { STRMEM("Tsem"), sizeof(RTSEMEVENT), 16, RTSF_INTW, 0 }, -
trunk/src/VBox/Runtime/testcase/tstStrFormat.cpp
r8245 r9212 294 294 } 295 295 296 if (sizeof(RT UINTREG) == 8)297 { 298 CHECK42("%RTreg", (RT UINTREG)0, "0000000000000000");299 CHECK42("%RTreg", ~(RT UINTREG)0, "ffffffffffffffff");300 CHECK42("%RTreg", (RT UINTREG)0x84342134, "0000000084342134");301 CHECK42("%RTreg", (RT UINTREG)0x23484342134ULL, "0000023484342134");296 if (sizeof(RTCCUINTREG) == 8) 297 { 298 CHECK42("%RTreg", (RTCCUINTREG)0, "0000000000000000"); 299 CHECK42("%RTreg", ~(RTCCUINTREG)0, "ffffffffffffffff"); 300 CHECK42("%RTreg", (RTCCUINTREG)0x84342134, "0000000084342134"); 301 CHECK42("%RTreg", (RTCCUINTREG)0x23484342134ULL, "0000023484342134"); 302 302 } 303 303 else 304 304 { 305 CHECK42("%RTreg", (RT UINTREG)0, "00000000");306 CHECK42("%RTreg", ~(RT UINTREG)0, "ffffffff");307 CHECK42("%RTreg", (RT UINTREG)0x84342134, "84342134");305 CHECK42("%RTreg", (RTCCUINTREG)0, "00000000"); 306 CHECK42("%RTreg", ~(RTCCUINTREG)0, "ffffffff"); 307 CHECK42("%RTreg", (RTCCUINTREG)0x84342134, "84342134"); 308 308 } 309 309 -
trunk/src/VBox/VMM/CPUM.cpp
r9211 r9212 460 460 * @param ppCtx Receives the CPUMCTX GC pointer when successful. 461 461 */ 462 CPUMR3DECL(int) CPUMR3QueryGuestCtxGCPtr(PVM pVM, GCPTRTYPE(PCPUMCTX) *ppCtx)462 CPUMR3DECL(int) CPUMR3QueryGuestCtxGCPtr(PVM pVM, RCPTRTYPE(PCPUMCTX) *ppCtx) 463 463 { 464 464 LogFlow(("CPUMR3QueryGuestCtxGCPtr\n")); -
trunk/src/VBox/VMM/CPUMInternal.h
r8155 r9212 262 262 RTUINT offVM; 263 263 /** Pointer to CPU structure in GC. */ 264 GCPTRTYPE(struct CPUM *) pCPUMGC;264 RCPTRTYPE(struct CPUM *) pCPUMGC; 265 265 /** Pointer to CPU structure in HC. */ 266 266 R3R0PTRTYPE(struct CPUM *) pCPUMHC; … … 293 293 R0PTRTYPE(PCPUMCTXCORE) pHyperCoreR0; 294 294 /** Pointer to the current hypervisor core context - GCPtr. */ 295 GCPTRTYPE(PCPUMCTXCORE) pHyperCoreGC;295 RCPTRTYPE(PCPUMCTXCORE) pHyperCoreGC; 296 296 297 297 /** Use flags. -
trunk/src/VBox/VMM/CPUMInternal.mac
r8155 r9212 50 50 51 51 struc CPUM 52 .offVM resd 153 .pCPUMGC RTGCPTR _RES 1 ; Guest Context pointer54 .pCPUMHC RTHCPTR_RES 1 ; Host Context pointer52 .offVM resd 1 53 .pCPUMGC RTGCPTR32_RES 1 ; Guest Context pointer 54 .pCPUMHC RTHCPTR_RES 1 ; Host Context pointer 55 55 56 56 … … 404 404 alignb 32 405 405 ; hypervisor core context. 406 .pHyperCoreR3 RTR3PTR_RES 1407 .pHyperCoreR0 RTR0PTR_RES 1408 .pHyperCoreGC RTGCPTR _RES 1406 .pHyperCoreR3 RTR3PTR_RES 1 407 .pHyperCoreR0 RTR0PTR_RES 1 408 .pHyperCoreGC RTGCPTR32_RES 1 409 409 ;... 410 410 .fUseFlags resd 1 -
trunk/src/VBox/VMM/EM.cpp
r9069 r9212 2043 2043 { 2044 2044 uint8_t u8Interrupt; 2045 uint32_tuErrorCode;2045 RTGCUINT uErrorCode; 2046 2046 TRPMERRORCODE enmError = TRPM_TRAP_NO_ERRORCODE; 2047 2047 -
trunk/src/VBox/VMM/EMInternal.h
r9069 r9212 285 285 R3R0PTRTYPE(PCPUMCTX) pCtx; 286 286 287 #if GC_ARCH_BITS == 64 288 RTGCPTR aPadding1; 289 #endif 287 290 288 291 union … … 333 336 R3R0PTRTYPE(PEMSTATS) pStatsHC; 334 337 /** More statistics (GC). */ 335 GCPTRTYPE(PEMSTATS) pStatsGC;338 RCPTRTYPE(PEMSTATS) pStatsGC; 336 339 #if HC_ARCH_BITS != GC_ARCH_BITS && GC_ARCH_BITS == 32 337 340 RTGCPTR padding0; -
trunk/src/VBox/VMM/IOM.cpp
r9155 r9212 618 618 */ 619 619 IOMR3DECL(int) IOMR3IOPortRegisterGC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTGCPTR pvUser, 620 GCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, GCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,621 GCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, GCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)620 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback, 621 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc) 622 622 { 623 623 LogFlow(("IOMR3IOPortRegisterGC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VGv pfnOutCallback=%VGv pfnInCallback=%VGv pfnOutStrCallback=%VGv pfnInStrCallback=%VGv pszDesc=%s\n", … … 1493 1493 */ 1494 1494 IOMR3DECL(int) IOMR3MMIORegisterGC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser, 1495 GCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, GCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,1496 GCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)1495 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback, 1496 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback) 1497 1497 { 1498 1498 LogFlow(("IOMR3MMIORegisterGC: pDevIns=%p GCPhysStart=%VGp cbRange=%#x pvUser=%VGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n", -
trunk/src/VBox/VMM/IOMInternal.h
r8234 r9212 78 78 79 79 /** Pointer to user argument. */ 80 R TGCPTRpvUserGC;80 RCPTRTYPE(void *) pvUserGC; 81 81 /** Pointer to device instance. */ 82 82 PPDMDEVINSGC pDevInsGC; 83 83 /** Pointer to write callback function. */ 84 GCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackGC;84 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackGC; 85 85 /** Pointer to read callback function. */ 86 GCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackGC;86 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackGC; 87 87 /** Pointer to fill (memset) callback function. */ 88 GCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackGC;88 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackGC; 89 89 RTGCPTR GCPtrAlignment; /**< Alignment padding */ 90 90 … … 219 219 uint16_t cPorts; 220 220 /** Pointer to user argument. */ 221 R TGCPTRpvUser;221 RCPTRTYPE(void *) pvUser; 222 222 /** Pointer to the associated device instance. */ 223 GCPTRTYPE(PPDMDEVINS) pDevIns;223 RCPTRTYPE(PPDMDEVINS) pDevIns; 224 224 /** Pointer to OUT callback function. */ 225 GCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback;225 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback; 226 226 /** Pointer to IN callback function. */ 227 GCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback;227 RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback; 228 228 /** Pointer to string OUT callback function. */ 229 GCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback;229 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback; 230 230 /** Pointer to string IN callback function. */ 231 GCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback;231 RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback; 232 232 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 233 233 RTGCPTR GCPtrAlignment; /**< pszDesc is 8 byte aligned. */ … … 333 333 334 334 /** Pointer to the trees - GC ptr. */ 335 GCPTRTYPE(PIOMTREES) pTreesGC;335 RCPTRTYPE(PIOMTREES) pTreesGC; 336 336 /** Pointer to the trees - HC ptr. */ 337 337 R3R0PTRTYPE(PIOMTREES) pTreesHC; … … 340 340 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnMMIOHandlerR0; 341 341 /** The GC address of IOMMMIOHandler. */ 342 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnMMIOHandlerGC;342 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnMMIOHandlerGC; 343 343 RTGCPTR Alignment; 344 344 … … 360 360 R0PTRTYPE(PIOMMMIOSTATS) pMMIOStatsLastR0; 361 361 362 GCPTRTYPE(PIOMIOPORTRANGEGC) pRangeLastReadGC;363 GCPTRTYPE(PIOMIOPORTRANGEGC) pRangeLastWriteGC;364 GCPTRTYPE(PIOMIOPORTSTATS) pStatsLastReadGC;365 GCPTRTYPE(PIOMIOPORTSTATS) pStatsLastWriteGC;366 GCPTRTYPE(PIOMMMIORANGE) pMMIORangeLastGC;367 GCPTRTYPE(PIOMMMIOSTATS) pMMIOStatsLastGC;362 RCPTRTYPE(PIOMIOPORTRANGEGC) pRangeLastReadGC; 363 RCPTRTYPE(PIOMIOPORTRANGEGC) pRangeLastWriteGC; 364 RCPTRTYPE(PIOMIOPORTSTATS) pStatsLastReadGC; 365 RCPTRTYPE(PIOMIOPORTSTATS) pStatsLastWriteGC; 366 RCPTRTYPE(PIOMMMIORANGE) pMMIORangeLastGC; 367 RCPTRTYPE(PIOMMMIOSTATS) pMMIOStatsLastGC; 368 368 /** @} */ 369 369 -
trunk/src/VBox/VMM/MMInternal.h
r8155 r9212 250 250 R3R0PTRTYPE(uint8_t *) pbHeapHC; 251 251 /** The GC address of the heap. */ 252 GCPTRTYPE(uint8_t *) pbHeapGC;252 RCPTRTYPE(uint8_t *) pbHeapGC; 253 253 /** The GC address of the VM. */ 254 GCPTRTYPE(PVM) pVMGC;254 RCPTRTYPE(PVM) pVMGC; 255 255 /** The amount of free memory in the heap. */ 256 256 uint32_t cbFree; … … 675 675 676 676 /** The hypervisor heap (GC Ptr). */ 677 GCPTRTYPE(PMMHYPERHEAP) pHyperHeapGC;677 RCPTRTYPE(PMMHYPERHEAP) pHyperHeapGC; 678 678 /** The hypervisor heap (HC Ptr). */ 679 679 R3R0PTRTYPE(PMMHYPERHEAP) pHyperHeapHC; -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r8217 r9212 80 80 static int csamReinit(PVM pVM); 81 81 static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTGCPTR pInstr, uint32_t opsize, bool fScanned); 82 static int csamAnalyseCodeStream(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,82 static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32, 83 83 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec); 84 84 … … 555 555 * 556 556 */ 557 static R3PTRTYPE(void *) CSAMGCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, GCPTRTYPE(uint8_t *) pGCPtr)557 static R3PTRTYPE(void *) CSAMGCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, RCPTRTYPE(uint8_t *) pGCPtr) 558 558 { 559 559 int rc; … … 668 668 * 669 669 */ 670 static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC,670 static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, 671 671 PCSAMP2GLOOKUPREC pCacheRec, void *pUserData) 672 672 { … … 864 864 * 865 865 */ 866 static int csamAnalyseCallCodeStream(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,866 static int csamAnalyseCallCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32, 867 867 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec) 868 868 { … … 941 941 STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize); 942 942 943 GCPTRTYPE(uint8_t *) addr = 0;943 RCPTRTYPE(uint8_t *) addr = 0; 944 944 PCSAMPAGE pJmpPage = NULL; 945 945 … … 1068 1068 * 1069 1069 */ 1070 static int csamAnalyseCodeStream(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,1070 static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32, 1071 1071 PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec) 1072 1072 { … … 1154 1154 csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true); 1155 1155 1156 GCPTRTYPE(uint8_t *) addr = 0;1156 RCPTRTYPE(uint8_t *) addr = 0; 1157 1157 PCSAMPAGE pJmpPage = NULL; 1158 1158 … … 1911 1911 * @param cbBuf How much it's reading/writing. 1912 1912 */ 1913 static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTGCPTR GCPtr, size_t cbBuf)1913 static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTGCPTR32 GCPtr, size_t cbBuf) 1914 1914 { 1915 1915 int rc = PATMR3PatchWrite(pVM, GCPtr, cbBuf); … … 1951 1951 */ 1952 1952 Log(("CSAMCodePageWriteHandler: delayed write!\n")); 1953 AssertCompileSize(RTGCPTR , 4);1953 AssertCompileSize(RTGCPTR32, 4); 1954 1954 rc = VMR3ReqCallEx(pVM, NULL, 0, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID, 1955 (PFNRT)CSAMDelayedWriteHandler, 3, pVM, GCPtr, cbBuf);1955 (PFNRT)CSAMDelayedWriteHandler, 3, pVM, (RTGCPTR32)GCPtr, cbBuf); 1956 1956 } 1957 1957 AssertRC(rc); -
trunk/src/VBox/VMM/PATM/CSAMInternal.h
r8155 r9212 68 68 typedef struct 69 69 { 70 RTGCPTR 70 RTGCPTR32 pInstrAfterRetGC[CSAM_MAX_CALLEXIT_RET]; 71 71 uint32_t cInstrAfterRet; 72 72 } CSAMCALLEXITREC, *PCSAMCALLEXITREC; … … 76 76 R3PTRTYPE(uint8_t *) pPageLocStartHC; 77 77 R3PTRTYPE(uint8_t *) pPageLocEndHC; 78 GCPTRTYPE(uint8_t *) pGuestLoc;78 RCPTRTYPE(uint8_t *) pGuestLoc; 79 79 uint32_t depth; //call/jump depth 80 80 … … 84 84 typedef struct 85 85 { 86 RTGCPTR 86 RTGCPTR32 pPageGC; 87 87 RTGCPHYS GCPhys; 88 88 uint64_t fFlags; … … 103 103 { 104 104 // GC Patch pointer 105 RTGCPTR 105 RTGCPTR32 pInstrGC; 106 106 107 107 // Disassembly state for original instruction … … 155 155 * switch back to ring 3 each time we encounter them in GC. 156 156 */ 157 RTGCPTR 157 RTGCPTR32 aDangerousInstr[CSAM_MAX_DANGR_INSTR]; 158 158 uint32_t cDangerousInstr; 159 159 uint32_t iDangerousInstr; 160 160 161 GCPTRTYPE(RTGCPTR*) pPDBitmapGC;162 GCPTRTYPE(RTHCPTR *)pPDHCBitmapGC;163 R3PTRTYPE(uint8_t **) pPDBitmapHC;164 R3PTRTYPE(RTGCPTR *) pPDGCBitmapHC;161 RCPTRTYPE(RTGCPTR32 *) pPDBitmapGC; 162 RCPTRTYPE(RTHCPTR *) pPDHCBitmapGC; 163 R3PTRTYPE(uint8_t **) pPDBitmapHC; 164 R3PTRTYPE(RTGCPTR32 *) pPDGCBitmapHC; 165 165 166 166 /* Temporary storage during load/save state */ … … 174 174 /* To keep track of dirty pages */ 175 175 uint32_t cDirtyPages; 176 RTGCPTR 177 RTGCPTR 176 RTGCPTR32 pvDirtyBasePage[CSAM_MAX_DIRTY_PAGES]; 177 RTGCPTR32 pvDirtyFaultPage[CSAM_MAX_DIRTY_PAGES]; 178 178 179 179 /* To keep track of possible code pages */ 180 180 uint32_t cPossibleCodePages; 181 RTGCPTR 181 RTGCPTR32 pvPossibleCodePage[CSAM_MAX_CODE_PAGES_FLUSH]; 182 182 183 183 /* call addresses reported by the recompiler */ 184 RTGCPTR 184 RTGCPTR32 pvCallInstruction[16]; 185 185 RTUINT iCallInstruction; 186 186 … … 243 243 * 244 244 */ 245 typedef int (VBOXCALL *PFN_CSAMR3ANALYSE)(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PCSAMP2GLOOKUPREC pCacheRec, void *pUserData);245 typedef int (VBOXCALL *PFN_CSAMR3ANALYSE)(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, PCSAMP2GLOOKUPREC pCacheRec, void *pUserData); 246 246 247 247 /** -
trunk/src/VBox/VMM/PATM/PATM.cpp
r8984 r9212 126 126 127 127 /* PATM stack page for call instruction execution. (2 parts: one for our private stack and one to store the original return address */ 128 pVM->patm.s.pGCStackHC = (RTGCPTR *)(pVM->patm.s.pPatchMemHC + PATCH_MEMORY_SIZE + PAGE_SIZE);128 pVM->patm.s.pGCStackHC = (RTGCPTR32 *)(pVM->patm.s.pPatchMemHC + PATCH_MEMORY_SIZE + PAGE_SIZE); 129 129 pVM->patm.s.pGCStackGC = MMHyperHC2GC(pVM, pVM->patm.s.pGCStackHC); 130 130 … … 978 978 * 979 979 */ 980 R3PTRTYPE(uint8_t *) PATMGCVirtToHCVirt(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pGCPtr)980 R3PTRTYPE(uint8_t *) PATMGCVirtToHCVirt(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pGCPtr) 981 981 { 982 982 int rc; … … 1029 1029 while (true) 1030 1030 { 1031 GCPTRTYPE(uint8_t *) pInstrGC;1032 GCPTRTYPE(uint8_t *) pBranchTargetGC = 0;1031 RCPTRTYPE(uint8_t *) pInstrGC; 1032 RCPTRTYPE(uint8_t *) pBranchTargetGC = 0; 1033 1033 1034 1034 pRec = (PJUMPREC)RTAvlPVRemoveBestFit(&pPatch->JumpTree, 0, true); … … 1282 1282 * 1283 1283 */ 1284 static int patmAnalyseBlockCallback(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData)1284 static int patmAnalyseBlockCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData) 1285 1285 { 1286 1286 PPATCHINFO pPatch = (PPATCHINFO)pUserData; … … 1441 1441 * 1442 1442 */ 1443 static int patmAnalyseFunctionCallback(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData)1443 static int patmAnalyseFunctionCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData) 1444 1444 { 1445 1445 PPATCHINFO pPatch = (PPATCHINFO)pUserData; … … 1546 1546 * 1547 1547 */ 1548 static int patmRecompileCallback(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData)1548 static int patmRecompileCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData) 1549 1549 { 1550 1550 PPATCHINFO pPatch = (PPATCHINFO)pUserData; … … 1606 1606 && (OP_PARM_VTYPE(pCpu->pCurInstr->param1) == OP_PARM_J)) 1607 1607 { 1608 GCPTRTYPE(uint8_t *) pTargetGC = PATMResolveBranch(pCpu, pCurInstrGC);1608 RCPTRTYPE(uint8_t *) pTargetGC = PATMResolveBranch(pCpu, pCurInstrGC); 1609 1609 if (pTargetGC == 0) 1610 1610 { … … 1708 1708 unsigned opsize; 1709 1709 int disret; 1710 GCPTRTYPE(uint8_t *) pNextInstrGC, pReturnInstrGC;1710 RCPTRTYPE(uint8_t *) pNextInstrGC, pReturnInstrGC; 1711 1711 R3PTRTYPE(uint8_t *) pNextInstrHC; 1712 1712 … … 2023 2023 * 2024 2024 */ 2025 int patmr3DisasmCallback(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData)2025 int patmr3DisasmCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData) 2026 2026 { 2027 2027 PPATCHINFO pPatch = (PPATCHINFO)pUserData; … … 2081 2081 * 2082 2082 */ 2083 int patmr3DisasmCode(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Disasm, void *pUserData)2083 int patmr3DisasmCode(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Disasm, void *pUserData) 2084 2084 { 2085 2085 DISCPUSTATE cpu; … … 2208 2208 * 2209 2209 */ 2210 int patmr3DisasmCodeStream(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Disasm, void *pUserData)2210 int patmr3DisasmCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Disasm, void *pUserData) 2211 2211 { 2212 2212 PPATCHINFO pPatch = (PPATCHINFO)pUserData; … … 2252 2252 * 2253 2253 */ 2254 static int patmRecompileCodeStream(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Recompile, void *pUserData)2254 static int patmRecompileCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Recompile, void *pUserData) 2255 2255 { 2256 2256 DISCPUSTATE cpu; … … 2370 2370 ) 2371 2371 { 2372 GCPTRTYPE(uint8_t *) addr = PATMResolveBranch(&cpu, pCurInstrGC);2372 RCPTRTYPE(uint8_t *) addr = PATMResolveBranch(&cpu, pCurInstrGC); 2373 2373 if (addr == 0) 2374 2374 { … … 5625 5625 * @param pPatchGC GC address in patch block 5626 5626 */ 5627 RTGCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pPatchGC)5627 RTGCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC) 5628 5628 { 5629 5629 Assert(pPatch->Patch2GuestAddrTree); … … 5644 5644 * 5645 5645 */ 5646 RTGCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t*) pInstrGC)5646 RTGCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC) 5647 5647 { 5648 5648 if (pPatch->Guest2PatchAddrTree) … … 5664 5664 * 5665 5665 */ 5666 RTGCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t*) pInstrGC)5666 RTGCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC) 5667 5667 { 5668 5668 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlGCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pInstrGC, false); … … 5680 5680 * 5681 5681 */ 5682 PATMR3DECL(RTGCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, GCPTRTYPE(uint8_t*) pInstrGC)5682 PATMR3DECL(RTGCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC) 5683 5683 { 5684 5684 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloGCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false); -
trunk/src/VBox/VMM/PATM/PATMInternal.h
r8155 r9212 136 136 uint32_t uType; 137 137 R3PTRTYPE(uint8_t *) pRelocPos; 138 RTGCPTR 139 RTGCPTR 138 RTGCPTR32 pSource; 139 RTGCPTR32 pDest; 140 140 } RELOCREC, *PRELOCREC; 141 141 … … 144 144 R3PTRTYPE(uint8_t *) pPatchLocStartHC; 145 145 R3PTRTYPE(uint8_t *) pPatchLocEndHC; 146 GCPTRTYPE(uint8_t *) pGuestLoc;146 RCPTRTYPE(uint8_t *) pGuestLoc; 147 147 uint32_t opsize; 148 148 } P2GLOOKUPREC, *PP2GLOOKUPREC; … … 154 154 155 155 R3PTRTYPE(uint8_t *) pJumpHC; 156 GCPTRTYPE(uint8_t *) pTargetGC;156 RCPTRTYPE(uint8_t *) pTargetGC; 157 157 uint32_t offDispl; 158 158 uint32_t opcode; … … 176 176 AVLU32NODECORE Core; 177 177 178 RTGCPTR 178 RTGCPTR32 pOrgInstrGC; 179 179 PATM_LOOKUP_TYPE enmType; 180 180 bool fDirty; … … 213 213 214 214 /** Last original guest instruction pointer; used for disassmebly log. */ 215 RTGCPTR 215 RTGCPTR32 pLastDisasmInstrGC; 216 216 217 217 /** Keeping track of multiple ret instructions. */ 218 RTGCPTR 218 RTGCPTR32 pPatchRetInstrGC; 219 219 uint32_t uPatchRetParam1; 220 220 } PATCHINFOTEMP, *PPATCHINFOTEMP; … … 226 226 DISCPUMODE uOpMode; 227 227 228 GCPTRTYPE(uint8_t *) pPrivInstrGC; //GC pointer of privileged instruction228 RCPTRTYPE(uint8_t *) pPrivInstrGC; //GC pointer of privileged instruction 229 229 R3PTRTYPE(uint8_t *) pPrivInstrHC; //HC pointer of privileged instruction 230 230 uint8_t aPrivInstr[MAX_INSTR_SIZE]; … … 234 234 235 235 /* Only valid for PATMFL_JUMP_CONFLICT patches */ 236 RTGCPTR 236 RTGCPTR32 pPatchJumpDestGC; 237 237 238 238 RTGCUINTPTR pPatchBlockOffset; … … 248 248 * Lowest and highest patched GC instruction address. To optimize searches. 249 249 */ 250 RTGCPTR 251 RTGCPTR 250 RTGCPTR32 pInstrGCLowest; 251 RTGCPTR32 pInstrGCHighest; 252 252 253 253 /* Tree of fixup records for the patch. */ … … 320 320 AVLOGCPTRNODECORE Core; 321 321 /** Region to monitor. */ 322 RTGCPTR 323 RTGCPTR 322 RTGCPTR32 pLowestAddrGC; 323 RTGCPTR32 pHighestAddrGC; 324 324 /** Number of patches for this page. */ 325 325 uint32_t cCount; … … 363 363 RTINT offVM; 364 364 365 GCPTRTYPE(uint8_t *) pPatchMemGC;365 RCPTRTYPE(uint8_t *) pPatchMemGC; 366 366 R3PTRTYPE(uint8_t *) pPatchMemHC; 367 367 uint32_t cbPatchMem; … … 373 373 /* GC PATM state pointers */ 374 374 R3PTRTYPE(PPATMGCSTATE) pGCStateHC; 375 GCPTRTYPE(PPATMGCSTATE) pGCStateGC;375 RCPTRTYPE(PPATMGCSTATE) pGCStateGC; 376 376 377 377 /** PATM stack page for call instruction execution. (2 parts: one for our private stack and one to store the original return address */ 378 GCPTRTYPE(RTGCPTR*) pGCStackGC;379 R3PTRTYPE(RTGCPTR *) pGCStackHC;378 RCPTRTYPE(RTGCPTR32 *) pGCStackGC; 379 R3PTRTYPE(RTGCPTR32 *) pGCStackHC; 380 380 381 381 /** GC pointer to CPUMCTX structure. */ 382 GCPTRTYPE(PCPUMCTX) pCPUMCtxGC;382 RCPTRTYPE(PCPUMCTX) pCPUMCtxGC; 383 383 384 384 /* GC statistics pointers */ 385 GCPTRTYPE(PSTAMRATIOU32) pStatsGC;385 RCPTRTYPE(PSTAMRATIOU32) pStatsGC; 386 386 R3PTRTYPE(PSTAMRATIOU32) pStatsHC; 387 387 … … 398 398 * Lowest and highest patched GC instruction addresses. To optimize searches. 399 399 */ 400 RTGCPTR 401 RTGCPTR 400 RTGCPTR32 pPatchedInstrGCLowest; 401 RTGCPTR32 pPatchedInstrGCHighest; 402 402 403 403 /** Pointer to the patch tree for instructions replaced by 'int 3'. */ 404 GCPTRTYPE(PPATMTREES) PatchLookupTreeGC;404 RCPTRTYPE(PPATMTREES) PatchLookupTreeGC; 405 405 R3PTRTYPE(PPATMTREES) PatchLookupTreeHC; 406 406 407 407 /** Global PATM lookup and call function (used by call patches). */ 408 RTGCPTR 408 RTGCPTR32 pfnHelperCallGC; 409 409 /** Global PATM return function (used by ret patches). */ 410 RTGCPTR 410 RTGCPTR32 pfnHelperRetGC; 411 411 /** Global PATM jump function (used by indirect jmp patches). */ 412 RTGCPTR 412 RTGCPTR32 pfnHelperJumpGC; 413 413 /** Global PATM return function (used by iret patches). */ 414 RTGCPTR 414 RTGCPTR32 pfnHelperIretGC; 415 415 416 416 /** Fake patch record for global functions. */ … … 418 418 419 419 /** Pointer to original sysenter handler */ 420 RTGCPTR 420 RTGCPTR32 pfnSysEnterGC; 421 421 /** Pointer to sysenter handler trampoline */ 422 RTGCPTR 422 RTGCPTR32 pfnSysEnterPatchGC; 423 423 /** Sysenter patch index (for stats only) */ 424 424 uint32_t uSysEnterPatchIdx; 425 425 426 426 // GC address of fault in monitored page (set by PATMGCMonitorPage, used by PATMR3HandleMonitoredPage) 427 RTGCPTR 427 RTGCPTR32 pvFaultMonitor; 428 428 429 429 /* Temporary information for pending MMIO patch. Set in GC or R0 context. */ … … 431 431 { 432 432 RTGCPHYS GCPhys; 433 RTGCPTR 433 RTGCPTR32 pCachedData; 434 434 #if GC_ARCH_BITS == 32 435 RTGCPTR 435 RTGCPTR32 Alignment0; /**< Align the structure size on a 8-byte boundrary. */ 436 436 #endif 437 437 } mmio; … … 529 529 530 530 #ifdef IN_RING3 531 RTGCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pPatchGC);532 RTGCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t*) pInstrGC);533 RTGCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t*) pInstrGC);531 RTGCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC); 532 RTGCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC); 533 RTGCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC); 534 534 #endif 535 535 … … 594 594 * 595 595 */ 596 typedef int (VBOXCALL *PFN_PATMR3ANALYSE)(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData);596 typedef int (VBOXCALL *PFN_PATMR3ANALYSE)(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData); 597 597 598 598 /** … … 620 620 * 621 621 */ 622 R3PTRTYPE(uint8_t *) PATMGCVirtToHCVirt(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pGCPtr);622 R3PTRTYPE(uint8_t *) PATMGCVirtToHCVirt(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pGCPtr); 623 623 624 624 … … 820 820 821 821 #ifdef DEBUG 822 int patmr3DisasmCallback(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData);823 int patmr3DisasmCodeStream(PVM pVM, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Analyse, void *pUserData);824 #endif 825 826 #endif 822 int patmr3DisasmCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, void *pUserData); 823 int patmr3DisasmCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, PFN_PATMR3ANALYSE pfnPATMR3Analyse, void *pUserData); 824 #endif 825 826 #endif -
trunk/src/VBox/VMM/PATM/PATMPatch.cpp
r8333 r9212 128 128 129 129 130 static uint32_t patmPatchGenCode(PVM pVM, PPATCHINFO pPatch, uint8_t *pPB, PPATCHASMRECORD pAsmRecord, GCPTRTYPE(uint8_t *) pReturnAddrGC, bool fGenJump,130 static uint32_t patmPatchGenCode(PVM pVM, PPATCHINFO pPatch, uint8_t *pPB, PPATCHASMRECORD pAsmRecord, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fGenJump, 131 131 PPATMCALLINFO pCallInfo = 0) 132 132 { … … 147 147 if (*(uint32_t*)&pPB[j] == pAsmRecord->uReloc[i]) 148 148 { 149 GCPTRTYPE(uint32_t *) dest;149 RCPTRTYPE(uint32_t *) dest; 150 150 151 151 #ifdef VBOX_STRICT … … 415 415 } 416 416 417 int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pCurInstrGC)417 int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC) 418 418 { 419 419 int rc = VINF_SUCCESS; … … 472 472 473 473 474 int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack)474 int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack) 475 475 { 476 476 uint32_t size; … … 527 527 } 528 528 529 int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride)529 int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride) 530 530 { 531 531 uint32_t size = 0; … … 572 572 } 573 573 574 int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride)574 int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride) 575 575 { 576 576 uint32_t offset = 0; … … 843 843 * 844 844 */ 845 int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pCurInstrGC)845 int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC) 846 846 { 847 847 int size = 0, rc; … … 1555 1555 * @param fClearInhibitIRQs Clear inhibit irq flag 1556 1556 */ 1557 int patmPatchGenJumpToGuest(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pReturnAddrGC, bool fClearInhibitIRQs)1557 int patmPatchGenJumpToGuest(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fClearInhibitIRQs) 1558 1558 { 1559 1559 int rc = VINF_SUCCESS; … … 1583 1583 * Relative jump from patch code to patch code (no fixup required) 1584 1584 */ 1585 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, GCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord)1585 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord) 1586 1586 { 1587 1587 int32_t displ; -
trunk/src/VBox/VMM/PATM/PATMPatch.h
r8155 r9212 31 31 int patmPatchGenMovDebug(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu); 32 32 int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC); 33 int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride);34 int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride);33 int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride); 34 int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride); 35 35 int patmPatchGenPushf(PVM pVM, PPATCHINFO pPatch, bool fSizeOverride); 36 int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack);36 int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack); 37 37 int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RTGCPTR pNextInstrGC); 38 38 39 39 int patmPatchGenCli(PVM pVM, PPATCHINFO pPatch); 40 40 int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, bool fSizeOverride); 41 int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pCurInstrGC);41 int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC); 42 42 int patmPatchGenPushCS(PVM pVM, PPATCHINFO pPatch); 43 43 … … 45 45 46 46 int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pInstrGC, RTGCPTR pTargetGC, bool fIndirect); 47 int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pCurInstrGC);47 int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC); 48 48 49 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, GCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord = true);49 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord = true); 50 50 51 51 /** … … 89 89 * @param fClearInhibitIRQs Clear inhibit irq flag 90 90 */ 91 int patmPatchGenJumpToGuest(PVM pVM, PPATCHINFO pPatch, GCPTRTYPE(uint8_t *) pReturnAddrGC, bool fClearInhibitIRQs = false);91 int patmPatchGenJumpToGuest(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fClearInhibitIRQs = false); 92 92 93 93 /** -
trunk/src/VBox/VMM/PATM/VMMAll/CSAMAll.cpp
r8155 r9212 92 92 Assert(bit < PAGE_SIZE); 93 93 94 return pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir] && ASMBitTest( pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir], bit);94 return pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir] && ASMBitTest((void *)pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir], bit); 95 95 } 96 96 … … 138 138 } 139 139 #ifdef IN_GC 140 pVM->csam.s.pPDHCBitmapGC[pgdir] = MMHyperGC2HC(pVM, pVM->csam.s.pPDBitmapGC[pgdir]);140 pVM->csam.s.pPDHCBitmapGC[pgdir] = MMHyperGC2HC(pVM, (RCPTRTYPE(void*))pVM->csam.s.pPDBitmapGC[pgdir]); 141 141 if (!pVM->csam.s.pPDHCBitmapGC[pgdir]) 142 142 { … … 154 154 } 155 155 if(fScanned) 156 ASMBitSet( pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir], bit);156 ASMBitSet((void *)pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir], bit); 157 157 else 158 ASMBitClear( pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir], bit);158 ASMBitClear((void *)pVM->csam.s.CTXSUFF(pPDBitmap)[pgdir], bit); 159 159 160 160 return VINF_SUCCESS; … … 204 204 if (pVM->csam.s.cPossibleCodePages < RT_ELEMENTS(pVM->csam.s.pvPossibleCodePage)) 205 205 { 206 pVM->csam.s.pvPossibleCodePage[pVM->csam.s.cPossibleCodePages++] = GCPtr;206 pVM->csam.s.pvPossibleCodePage[pVM->csam.s.cPossibleCodePages++] = (RTGCPTR32)GCPtr; 207 207 VM_FF_SET(pVM, VM_FF_CSAM_PENDING_ACTION); 208 208 } … … 251 251 for (uint32_t i=0;i<pVM->csam.s.cDangerousInstr;i++) 252 252 { 253 if (pVM->csam.s.aDangerousInstr[i] == GCPtr)253 if (pVM->csam.s.aDangerousInstr[i] == (RTGCPTR32)GCPtr) 254 254 { 255 255 STAM_COUNTER_INC(&pVM->csam.s.StatInstrCacheHit); … … 258 258 } 259 259 /* Record that we're about to process it in ring 3. */ 260 pVM->csam.s.aDangerousInstr[pVM->csam.s.iDangerousInstr++] = GCPtr;260 pVM->csam.s.aDangerousInstr[pVM->csam.s.iDangerousInstr++] = (RTGCPTR32)GCPtr; 261 261 pVM->csam.s.iDangerousInstr &= CSAM_MAX_DANGR_INSTR_MASK; 262 262 -
trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp
r8155 r9212 60 60 register uint32_t efl = pCtxCore->eflags.u32; 61 61 CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK; 62 AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTGCPTR )pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VGv eflags=%08x fPATM=%d pPATMGC=%VGv-%VGv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));62 AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTGCPTR32)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VGv eflags=%08x fPATM=%d pPATMGC=%VGv-%VGv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)); 63 63 64 64 AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode, ("fPIF=%d eip=%VGv\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip)); … … 249 249 { 250 250 return ( PATMIsEnabled(pVM) 251 && ((pAddrGC >= pVM->patm.s.pPatchMemGC && pAddrGC <pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem))) ? true : false;251 && ((pAddrGC >= (RTGCPTR)pVM->patm.s.pPatchMemGC && pAddrGC < (RTGCPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem))) ? true : false; 252 252 } 253 253 … … 258 258 * @param pVM The VM to operate on. 259 259 */ 260 PATMDECL( GCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM)260 PATMDECL(RCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM) 261 261 { 262 262 return pVM->patm.s.pGCStateGC; … … 272 272 PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTGCPTR pAddrGC) 273 273 { 274 return (PATMIsEnabled(pVM) && pAddrGC >= pVM->patm.s.pPatchMemGC && pAddrGC < pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem) ? true : false; 274 RTGCPTR32 pAddrGG32 = (RTGCPTR32)pAddrGC; 275 276 return (PATMIsEnabled(pVM) && pAddrGG32 >= (RTGCPTR)pVM->patm.s.pPatchMemGC && pAddrGG32 < (RTGCPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem) ? true : false; 275 277 } 276 278 … … 286 288 { 287 289 pVM->patm.s.mmio.GCPhys = GCPhys; 288 pVM->patm.s.mmio.pCachedData = pCachedData;290 pVM->patm.s.mmio.pCachedData = (RTGCPTR32)pCachedData; 289 291 290 292 return VINF_SUCCESS; … … 400 402 || (pRegFrame->cs & X86_SEL_RPL) != 3 401 403 || pVM->patm.s.pfnSysEnterPatchGC == 0 402 || pVM->patm.s.pfnSysEnterGC != (RTGCPTR )pCtx->SysEnter.eip404 || pVM->patm.s.pfnSysEnterGC != (RTGCPTR32)pCtx->SysEnter.eip 403 405 || !(PATMRawGetEFlags(pVM, pRegFrame) & X86_EFL_IF)) 404 406 goto end; -
trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp
r8155 r9212 87 87 int rc = PGMShwModifyPage(pVM, pvFault, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW); 88 88 AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Vrc\n", rc)); 89 ASMInvalidatePage( pvFault);89 ASMInvalidatePage((void *)pvFault); 90 90 return VINF_SUCCESS; 91 91 } … … 117 117 118 118 /* Note that pvFault might be a different address in case of aliases. So use pvRange + offset instead!. */ 119 pVM->csam.s.pvDirtyBasePage[pVM->csam.s.cDirtyPages] = (RTGCPTR )((RTGCUINTPTR)pvRange + offRange);120 pVM->csam.s.pvDirtyFaultPage[pVM->csam.s.cDirtyPages] = (RTGCPTR )((RTGCUINTPTR)pvRange + offRange);119 pVM->csam.s.pvDirtyBasePage[pVM->csam.s.cDirtyPages] = (RTGCPTR32)((RTGCUINTPTR)pvRange + offRange); 120 pVM->csam.s.pvDirtyFaultPage[pVM->csam.s.cDirtyPages] = (RTGCPTR32)((RTGCUINTPTR)pvRange + offRange); 121 121 if (++pVM->csam.s.cDirtyPages == CSAM_MAX_DIRTY_PAGES) 122 122 return VINF_CSAM_PENDING_ACTION; … … 128 128 rc = PGMShwModifyPage(pVM, pvFault, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW); 129 129 AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Vrc\n", rc)); 130 ASMInvalidatePage( pvFault);130 ASMInvalidatePage((void *)pvFault); 131 131 132 132 STAM_COUNTER_INC(&pVM->csam.s.StatCodePageModified); -
trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp
r8155 r9212 65 65 PATMGCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, void *pvRange, uintptr_t offRange) 66 66 { 67 pVM->patm.s.pvFaultMonitor = pvFault;67 pVM->patm.s.pvFaultMonitor = (RTGCPTR32)pvFault; 68 68 return VINF_PATM_CHECK_PATCH_PAGE; 69 69 } … … 112 112 if (pPatchPage) 113 113 { 114 if ( pPatchPage->pLowestAddrGC > (RTGCPTR )((RTGCUINTPTR)GCPtr + cbWrite - 1)115 || pPatchPage->pHighestAddrGC < GCPtr)114 if ( pPatchPage->pLowestAddrGC > (RTGCPTR32)((RTGCUINTPTR)GCPtr + cbWrite - 1) 115 || pPatchPage->pHighestAddrGC < (RTGCPTR32)GCPtr) 116 116 { 117 117 /* This part of the page was not patched; try to emulate the instruction. */ -
trunk/src/VBox/VMM/PDM.cpp
r8677 r9212 312 312 * Devices. 313 313 */ 314 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;314 RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC; 315 315 int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC); 316 316 AssertReleaseMsgRC(rc, ("rc=%Vrc when resolving g_pdmGCDevHlp\n", rc)); -
trunk/src/VBox/VMM/PDMDevice.cpp
r9148 r9212 609 609 * Get the GC & R0 devhlps and create the devhlp R3 task queue. 610 610 */ 611 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;611 RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC; 612 612 int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC); 613 613 AssertReleaseRCReturn(rc, rc); -
trunk/src/VBox/VMM/PDMInternal.h
r8155 r9212 105 105 106 106 /** GC pointer to associated PCI device structure. */ 107 GCPTRTYPE(struct PCIDevice *) pPciDeviceGC;107 RCPTRTYPE(struct PCIDevice *) pPciDeviceGC; 108 108 /** Pointer to the VM this instance was created for - GC Ptr. */ 109 GCPTRTYPE(PVM) pVMGC;109 RCPTRTYPE(PVM) pVMGC; 110 110 /** GC pointer to associated PCI bus structure. */ 111 GCPTRTYPE(PPDMPCIBUS) pPciBusGC;111 RCPTRTYPE(PPDMPCIBUS) pPciBusGC; 112 112 #if GC_ARCH_BITS == 32 113 113 uint32_t Alignment0; … … 200 200 R0PTRTYPE(PVM) pVMR0; 201 201 /** Pointer to the VM - GCPtr. */ 202 GCPTRTYPE(PVM) pVMGC;202 RCPTRTYPE(PVM) pVMGC; 203 203 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 204 204 uint32_t padding; … … 370 370 371 371 /** Pointer to the PIC device instance - GC. */ 372 GCPTRTYPE(PPDMDEVINS) pDevInsGC;372 RCPTRTYPE(PPDMDEVINS) pDevInsGC; 373 373 /** @copydoc PDMPICREG::pfnSetIrqHC */ 374 374 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel)); … … 653 653 * If this is NULL, the queue cannot be used in GC. 654 654 */ 655 GCPTRTYPE(PVM) pVMGC;655 RCPTRTYPE(PVM) pVMGC; 656 656 /** LIFO of pending items - GC. */ 657 GCPTRTYPE(PPDMQUEUEITEMCORE) pPendingGC;657 RCPTRTYPE(PPDMQUEUEITEMCORE) pPendingGC; 658 658 /** Item size (bytes). */ 659 659 RTUINT cbItem; … … 670 670 R3R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC; 671 671 /** Pointer to the free item - GC Ptr. */ 672 GCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC;672 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC; 673 673 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 674 674 uint32_t Alignment0; … … 810 810 R3R0PTRTYPE(PPDMQUEUE) pDevHlpQueueHC; 811 811 /** Queue in which devhlp tasks are queued for R3 execution - GC Ptr. */ 812 GCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC;812 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC; 813 813 814 814 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */ … … 826 826 R3R0PTRTYPE(struct PDMQUEUE *) pQueueFlushHC; 827 827 /** Pointer to the queue which should be manually flushed - GCPtr. */ 828 GCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC;828 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC; 829 829 #if HC_ARCH_BITS == 64 830 830 uint32_t padding0; -
trunk/src/VBox/VMM/PGMInternal.h
r9026 r9212 311 311 R0PTRTYPE(struct PGMMAPPING *) pNextR0; 312 312 /** Pointer to next entry. */ 313 GCPTRTYPE(struct PGMMAPPING *) pNextGC;313 RCPTRTYPE(struct PGMMAPPING *) pNextGC; 314 314 /** Start Virtual address. */ 315 315 RTGCUINTPTR GCPtr; … … 346 346 R3PTRTYPE(PX86PTPAE) paPaePTsR3; 347 347 /** The GC virtual address of the 32-bit page table. */ 348 GCPTRTYPE(PX86PT) pPTGC;348 RCPTRTYPE(PX86PT) pPTGC; 349 349 /** The GC virtual address of the two PAE page table. */ 350 GCPTRTYPE(PX86PTPAE) paPaePTsGC;350 RCPTRTYPE(PX86PTPAE) paPaePTsGC; 351 351 /** The GC virtual address of the 32-bit page table. */ 352 352 R0PTRTYPE(PX86PT) pPTR0; … … 381 381 R0PTRTYPE(void *) pvUserR0; 382 382 /** Pointer to GC callback function. */ 383 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;383 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC; 384 384 /** User argument for GC handlers. */ 385 GCPTRTYPE(void *) pvUserGC;385 RCPTRTYPE(void *) pvUserGC; 386 386 /** Description / Name. For easing debugging. */ 387 387 R3PTRTYPE(const char *) pszDesc; … … 449 449 RTGCUINTPTR cb; 450 450 /** Pointer to the GC callback function. */ 451 GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;451 RCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC; 452 452 /** Pointer to the HC callback function for invalidation. */ 453 453 R3PTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC; … … 909 909 R0PTRTYPE(struct PGMRAMRANGE *) pNextR0; 910 910 /** Pointer to the next RAM range - for GC. */ 911 GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;911 RCPTRTYPE(struct PGMRAMRANGE *) pNextGC; 912 912 #if GC_ARCH_BITS == 32 913 913 /** Pointer alignment. */ … … 926 926 #else 927 927 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */ 928 GCPTRTYPE(PRTHCPTR) pavHCChunkGC;928 RCPTRTYPE(PRTHCPTR) pavHCChunkGC; 929 929 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */ 930 930 R3R0PTRTYPE(PRTHCPTR) pavHCChunkHC; … … 995 995 R0PTRTYPE(struct PGMROMRANGE *) pNextR0; 996 996 /** Pointer to the next range - GC. */ 997 GCPTRTYPE(struct PGMROMRANGE *) pNextGC;997 RCPTRTYPE(struct PGMROMRANGE *) pNextGC; 998 998 #if GC_ARCH_BITS == 32 999 999 RTGCPTR GCPtrAlignment; /**< Pointer alignment. */ … … 1468 1468 R3R0PTRTYPE(PVM) pVMHC; 1469 1469 /** The VM handle - GC Ptr. */ 1470 GCPTRTYPE(PVM) pVMGC;1470 RCPTRTYPE(PVM) pVMGC; 1471 1471 /** The max pool size. This includes the special IDs. */ 1472 1472 uint16_t cMaxPages; … … 1485 1485 uint32_t cPresent; 1486 1486 /** Pointer to the array of user nodes - GC pointer. */ 1487 GCPTRTYPE(PPGMPOOLUSER) paUsersGC;1487 RCPTRTYPE(PPGMPOOLUSER) paUsersGC; 1488 1488 /** Pointer to the array of user nodes - HC pointer. */ 1489 1489 R3R0PTRTYPE(PPGMPOOLUSER) paUsersHC; … … 1495 1495 uint16_t cMaxPhysExts; 1496 1496 /** Pointer to the array of physical xref extent - GC pointer. */ 1497 GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;1497 RCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC; 1498 1498 /** Pointer to the array of physical xref extent nodes - HC pointer. */ 1499 1499 R3R0PTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC; … … 1515 1515 uint16_t cModifiedPages; 1516 1516 /** Access handler, GC. */ 1517 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;1517 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC; 1518 1518 /** Access handler, R0. */ 1519 1519 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0; … … 1814 1814 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3)); 1815 1815 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM)); 1816 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;1817 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;1816 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3; 1817 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3; 1818 1818 1819 1819 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)); … … 1891 1891 1892 1892 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */ 1893 GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;1893 RCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC; 1894 1894 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */ 1895 GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;1895 RCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC; 1896 1896 1897 1897 /** The host paging mode. (This is what SUPLib reports.) */ … … 1920 1920 R3R0PTRTYPE(PX86PD) pGuestPDHC; 1921 1921 /** The guest's page directory, static GC mapping. */ 1922 GCPTRTYPE(PX86PD) pGuestPDGC;1922 RCPTRTYPE(PX86PD) pGuestPDGC; 1923 1923 /** @} */ 1924 1924 … … 1926 1926 * @{ */ 1927 1927 /** The guest's page directory pointer table, static GC mapping. */ 1928 GCPTRTYPE(PX86PDPT) pGstPaePDPTGC;1928 RCPTRTYPE(PX86PDPT) pGstPaePDPTGC; 1929 1929 /** The guest's page directory pointer table, HC pointer. */ 1930 1930 R3R0PTRTYPE(PX86PDPT) pGstPaePDPTHC; … … 1936 1936 * Unlike the HC array the first entry can be accessed as a 2048 entry PD. 1937 1937 * These don't have to be up-to-date - use pgmGstGetPaePD() to access them. */ 1938 GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];1938 RCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4]; 1939 1939 /** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */ 1940 1940 RTGCPHYS aGCPhysGstPaePDs[4]; … … 1954 1954 R3R0PTRTYPE(PX86PD) pHC32BitPD; 1955 1955 /** The 32-Bit PD - GC Ptr. */ 1956 GCPTRTYPE(PX86PD) pGC32BitPD;1956 RCPTRTYPE(PX86PD) pGC32BitPD; 1957 1957 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 1958 1958 uint32_t u32Padding1; /**< alignment padding. */ … … 1970 1970 /** The four PDs for the low 4GB - GC Ptr. 1971 1971 * Same kind of mapping as apHCPaePDs. */ 1972 GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];1972 RCPTRTYPE(PX86PDPAE) apGCPaePDs[4]; 1973 1973 /** The Physical Address (HC) of the four PDs for the low 4GB. 1974 1974 * These are *NOT* 4 contiguous pages. */ … … 1979 1979 RTHCPHYS HCPhysPaePDPT; 1980 1980 /** The PAE PDPT - GC Ptr. */ 1981 GCPTRTYPE(PX86PDPT) pGCPaePDPT;1981 RCPTRTYPE(PX86PDPT) pGCPaePDPT; 1982 1982 /** @} */ 1983 1983 … … 2034 2034 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3)); 2035 2035 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM)); 2036 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;2037 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;2036 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3; 2037 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3; 2038 2038 #if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64 2039 2039 RTGCPTR alignment3; /**< structure size alignment. */ … … 2093 2093 R0PTRTYPE(PPGMRAMRANGE) pRamRangesR0; 2094 2094 /** GC pointer corresponding to PGM::pRamRangesR3. */ 2095 GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;2095 RCPTRTYPE(PPGMRAMRANGE) pRamRangesGC; 2096 2096 /** The configured RAM size. */ 2097 2097 RTUINT cbRamSize; … … 2103 2103 R0PTRTYPE(PPGMRAMRANGE) pRomRangesR0; 2104 2104 /** GC pointer corresponding to PGM::pRomRangesR3. */ 2105 GCPTRTYPE(PPGMRAMRANGE) pRomRangesGC;2105 RCPTRTYPE(PPGMRAMRANGE) pRomRangesGC; 2106 2106 /** Alignment padding. */ 2107 2107 RTGCPTR GCPtrPadding2; … … 2114 2114 R3R0PTRTYPE(PPGMTREES) pTreesHC; 2115 2115 /** PGM offset based trees - GC Ptr. */ 2116 GCPTRTYPE(PPGMTREES) pTreesGC;2116 RCPTRTYPE(PPGMTREES) pTreesGC; 2117 2117 2118 2118 /** Linked list of GC mappings - for GC. 2119 2119 * The list is sorted ascending on address. 2120 2120 */ 2121 GCPTRTYPE(PPGMMAPPING) pMappingsGC;2121 RCPTRTYPE(PPGMMAPPING) pMappingsGC; 2122 2122 /** Linked list of GC mappings - for HC. 2123 2123 * The list is sorted ascending on address. … … 2171 2171 * The array is MM_HYPER_DYNAMIC_SIZE bytes big. 2172 2172 */ 2173 GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;2173 RCPTRTYPE(uint8_t *) pbDynPageMapBaseGC; 2174 2174 /** The index of the last entry used in the dynamic page mapping area. */ 2175 2175 RTUINT iDynPageMapLast; … … 2200 2200 R3R0PTRTYPE(PPGMPOOL) pPoolHC; 2201 2201 /** Shadow Page Pool - GC Ptr. */ 2202 GCPTRTYPE(PPGMPOOL) pPoolGC;2202 RCPTRTYPE(PPGMPOOL) pPoolGC; 2203 2203 2204 2204 /** We're not in a state which permits writes to guest memory. … … 2282 2282 #ifdef VBOX_WITH_STATISTICS 2283 2283 /** GC: Which statistic this \#PF should be attributed to. */ 2284 GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;2284 RCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC; 2285 2285 RTGCPTR padding0; 2286 2286 /** HC: Which statistic this \#PF should be attributed to. */ -
trunk/src/VBox/VMM/PGMPhys.cpp
r8635 r9212 409 409 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 410 410 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 411 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC,411 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTR pvUserGC, 412 412 R3PTRTYPE(const char *) pszDesc) 413 413 { -
trunk/src/VBox/VMM/REMInternal.h
r8223 r9212 242 242 #endif 243 243 244 #if GC_ARCH_BITS == 32 244 245 #define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x6440 : 0xb4a0) 246 #else 247 #define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x8440 : 0xd4a0) 248 #endif 249 245 250 /** Recompiler CPU state. */ 246 251 #ifdef REM_INCLUDE_CPU_H -
trunk/src/VBox/VMM/SELMInternal.h
r8155 r9212 93 93 * This is not initialized until the first relocation because it's used to 94 94 * check if the shadow GDT virtual handler requires deregistration. */ 95 GCPTRTYPE(PVBOXDESC) paGdtGC;95 RCPTRTYPE(PVBOXDESC) paGdtGC; 96 96 /** Current (last) Guest's GDTR. */ 97 97 VBOXGDTR GuestGdtr; … … 102 102 R3PTRTYPE(void *) HCPtrLdt; 103 103 /** GC Pointer to the LDT shadow area placed in Hypervisor memory arena. */ 104 GCPTRTYPE(void *) GCPtrLdt;104 RCPTRTYPE(void *) GCPtrLdt; 105 105 /** GC Pointer to the current Guest's LDT. */ 106 106 RTGCPTR GCPtrGuestLdt; … … 110 110 RTUINT offLdtHyper; 111 111 112 #if HC_ARCH_BITS == 32 112 #if HC_ARCH_BITS == 32 || GC_ARCH_BITS == 64 113 113 /** TSS alignment padding. */ 114 114 RTUINT auPadding[2]; -
trunk/src/VBox/VMM/TMInternal.h
r8155 r9212 347 347 R0PTRTYPE(PFNTIMENANOTSINTERNAL) pfnVirtualGetRawR0; 348 348 /** Pointer to the ring-3 tmVirtualGetRawNanoTS worker function. */ 349 GCPTRTYPE(PFNTIMENANOTSINTERNAL) pfnVirtualGetRawGC;349 RCPTRTYPE(PFNTIMENANOTSINTERNAL) pfnVirtualGetRawGC; 350 350 /** Alignment. */ 351 RTGCPTR 351 RTGCPTR32 AlignmentGCPtr; 352 352 /** The guest virtual timer synchronous time when fVirtualSyncTicking is cleared. */ 353 353 uint64_t volatile u64VirtualSync; … … 393 393 R0PTRTYPE(PTMTIMERQUEUE) paTimerQueuesR0; 394 394 /** Timer queues for the different clock types - GC Ptr */ 395 GCPTRTYPE(PTMTIMERQUEUE) paTimerQueuesGC;395 RCPTRTYPE(PTMTIMERQUEUE) paTimerQueuesGC; 396 396 397 397 /** Pointer to our GC mapping of the GIP. */ 398 GCPTRTYPE(void *) pvGIPGC;398 RCPTRTYPE(void *) pvGIPGC; 399 399 /** Pointer to our R3 mapping of the GIP. */ 400 400 R3PTRTYPE(void *) pvGIPR3; -
trunk/src/VBox/VMM/TRPMInternal.h
r9148 r9212 139 139 140 140 /** Padding to get the IDTs at a 16 byte alignement. */ 141 #if GC_ARCH_BITS == 32 141 142 uint8_t abPadding1[6]; 142 143 #else 144 uint8_t abPadding1[14]; 145 #endif 143 146 /** IDTs. Aligned at 16 byte offset for speed. */ 144 147 VBOXIDTE aIdt[256]; … … 186 189 R0PTRTYPE(PSTAMCOUNTER) paStatForwardedIRQR0; 187 190 /* GC: Statistics for interrupt handlers (allocated on the hypervisor heap). */ 188 GCPTRTYPE(PSTAMCOUNTER) paStatForwardedIRQGC;191 RCPTRTYPE(PSTAMCOUNTER) paStatForwardedIRQGC; 189 192 } TRPM; 190 193 #pragma pack() -
trunk/src/VBox/VMM/TRPMInternal.mac
r8155 r9212 20 20 ; 21 21 22 %include "VBox/asmdefs.mac" 22 23 %include "VBox/stam.mac" 23 24 … … 31 32 %define TRPM_TRAP_IN_HYPER RT_BIT(31) 32 33 33 34 34 struc TRPM 35 35 .offVM resd 1 36 36 .uActiveVector resd 1 37 37 .enmActiveType resd 1 38 .uActiveErrorCode resd139 .uActiveCR2 resd140 .uSavedVector resd138 .uActiveErrorCode RTGCPTR_RES 1 39 .uActiveCR2 RTGCPTR_RES 1 40 .uSavedVector RTGCPTR_RES 1 41 41 .enmSavedType resd 1 42 .uSavedErrorCode resd143 .uSavedCR2 resd144 .uPrevVector resd142 .uSavedErrorCode RTGCPTR_RES 1 43 .uSavedCR2 RTGCPTR_RES 1 44 .uPrevVector RTGCPTR_RES 1 45 45 .fDisableMonitoring resb 1 46 46 .fSafeToDropGuestIDTMonitoring resb 1 47 %if GC_ARCH_BITS == 32 47 48 .abPadding1 resb 6 49 %else 50 .abPadding1 resb 14 51 %endif 48 52 .aIdt resd 512 49 53 .au32IdtPatched resd 8 50 .aTmpTrapHandlers resd25654 .aTmpTrapHandlers RTGCPTR32_RES 256 51 55 52 .GCPtrIdt resd156 .GCPtrIdt RTGCPTR32_RES 1 53 57 .GuestIdtr resb 6 54 58 .au8Padding resb 2 … … 73 77 .paStatForwardedIRQR3 RTR3PTR_RES 1 74 78 .paStatForwardedIRQR0 RTR0PTR_RES 1 75 .paStatForwardedIRQGC RTGCPTR _RES 179 .paStatForwardedIRQGC RTGCPTR32_RES 1 76 80 endstruc 77 81 -
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r8160 r9212 64 64 pVM->cpum.s.pHyperCoreR3 = (R3PTRTYPE(PCPUMCTXCORE))VM_R3_ADDR(pVM, pCtxCore); 65 65 pVM->cpum.s.pHyperCoreR0 = (R0PTRTYPE(PCPUMCTXCORE))VM_R0_ADDR(pVM, pCtxCore); 66 pVM->cpum.s.pHyperCoreGC = ( GCPTRTYPE(PCPUMCTXCORE))VM_GUEST_ADDR(pVM, pCtxCore);66 pVM->cpum.s.pHyperCoreGC = (RCPTRTYPE(PCPUMCTXCORE))VM_GUEST_ADDR(pVM, pCtxCore); 67 67 } 68 68 else … … 70 70 pVM->cpum.s.pHyperCoreR3 = (R3PTRTYPE(PCPUMCTXCORE))MMHyperCCToR3(pVM, pCtxCore); 71 71 pVM->cpum.s.pHyperCoreR0 = (R0PTRTYPE(PCPUMCTXCORE))MMHyperCCToR0(pVM, pCtxCore); 72 pVM->cpum.s.pHyperCoreGC = ( GCPTRTYPE(PCPUMCTXCORE))MMHyperCCToGC(pVM, pCtxCore);72 pVM->cpum.s.pHyperCoreGC = (RCPTRTYPE(PCPUMCTXCORE))MMHyperCCToGC(pVM, pCtxCore); 73 73 } 74 74 } … … 798 798 } 799 799 800 CPUMDECL(RT UINTREG) CPUMGetGuestDR0(PVM pVM)800 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR0(PVM pVM) 801 801 { 802 802 return pVM->cpum.s.Guest.dr0; 803 803 } 804 804 805 CPUMDECL(RT UINTREG) CPUMGetGuestDR1(PVM pVM)805 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR1(PVM pVM) 806 806 { 807 807 return pVM->cpum.s.Guest.dr1; 808 808 } 809 809 810 CPUMDECL(RT UINTREG) CPUMGetGuestDR2(PVM pVM)810 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR2(PVM pVM) 811 811 { 812 812 return pVM->cpum.s.Guest.dr2; 813 813 } 814 814 815 CPUMDECL(RT UINTREG) CPUMGetGuestDR3(PVM pVM)815 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR3(PVM pVM) 816 816 { 817 817 return pVM->cpum.s.Guest.dr3; 818 818 } 819 819 820 CPUMDECL(RT UINTREG) CPUMGetGuestDR6(PVM pVM)820 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR6(PVM pVM) 821 821 { 822 822 return pVM->cpum.s.Guest.dr6; 823 823 } 824 824 825 CPUMDECL(RT UINTREG) CPUMGetGuestDR7(PVM pVM)825 CPUMDECL(RTGCUINTREG) CPUMGetGuestDR7(PVM pVM) 826 826 { 827 827 return pVM->cpum.s.Guest.dr7; … … 903 903 * @remark Intended for PATM. 904 904 */ 905 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdGCPtr(PVM pVM)906 { 907 return GCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdStd[0]);905 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdGCPtr(PVM pVM) 906 { 907 return RCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdStd[0]); 908 908 } 909 909 … … 917 917 * @remark Intended for PATM. 918 918 */ 919 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdExtGCPtr(PVM pVM)920 { 921 return GCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdExt[0]);919 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdExtGCPtr(PVM pVM) 920 { 921 return RCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdExt[0]); 922 922 } 923 923 … … 931 931 * @remark Intended for PATM. 932 932 */ 933 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdCentaurGCPtr(PVM pVM)934 { 935 return GCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdCentaur[0]);933 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdCentaurGCPtr(PVM pVM) 934 { 935 return RCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdCentaur[0]); 936 936 } 937 937 … … 943 943 * @remark Intended for PATM. 944 944 */ 945 CPUMDECL( GCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdDefGCPtr(PVM pVM)946 { 947 return GCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.GuestCpuIdDef);945 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdDefGCPtr(PVM pVM) 946 { 947 return RCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.GuestCpuIdDef); 948 948 } 949 949 -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r9083 r9212 55 55 typedef DECLCALLBACK(uint32_t) PFN_EMULATE_PARAM2(uint32_t *pu32Param1, size_t val2); 56 56 typedef DECLCALLBACK(uint32_t) PFN_EMULATE_PARAM3(uint32_t *pu32Param1, uint32_t val2, size_t val3); 57 typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(RTGCPTR GCPtrParam1, RTGCUINTREG Val2, uint32_t*pf);57 typedef DECLCALLBACK(int) FNEMULATELOCKPARAM2(RTGCPTR GCPtrParam1, RTGCUINTREG Val2, RTGCUINTREG32 *pf); 58 58 typedef FNEMULATELOCKPARAM2 *PFNEMULATELOCKPARAM2; 59 typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(RTGCPTR GCPtrParam1, RTGCUINTREG Val2, size_t cb, uint32_t*pf);59 typedef DECLCALLBACK(int) FNEMULATELOCKPARAM3(RTGCPTR GCPtrParam1, RTGCUINTREG Val2, size_t cb, RTGCUINTREG32 *pf); 60 60 typedef FNEMULATELOCKPARAM3 *PFNEMULATELOCKPARAM3; 61 61 … … 291 291 { 292 292 #ifdef IN_GC 293 int rc = MMGCRamRead(pVM, pDest, GCSrc, cb);293 int rc = MMGCRamRead(pVM, pDest, (void *)GCSrc, cb); 294 294 if (RT_LIKELY(rc != VERR_ACCESS_DENIED)) 295 295 return rc; … … 312 312 { 313 313 #ifdef IN_GC 314 int rc = MMGCRamWrite(pVM, GCDest, pSrc, cb);314 int rc = MMGCRamWrite(pVM, (void *)GCDest, pSrc, cb); 315 315 if (RT_LIKELY(rc != VERR_ACCESS_DENIED)) 316 316 return rc; … … 816 816 Log2(("%s %RGv imm%d=%RGr\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2)); 817 817 818 RTGCUINTREG eflags = 0;818 RTGCUINTREG32 eflags = 0; 819 819 MMGCRamRegisterTrapHandler(pVM); 820 820 rc = pfnEmulate(GCPtrPar1, ValPar2, pCpu->param2.size, &eflags); … … 1090 1090 1091 1091 /* Try emulate it with a one-shot #PF handler in place. */ 1092 RTGCUINTREG eflags = 0;1092 RTGCUINTREG32 eflags = 0; 1093 1093 MMGCRamRegisterTrapHandler(pVM); 1094 1094 rc = pfnEmulate(GCPtrPar1, ValPar2, &eflags); -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r8354 r9212 279 279 } 280 280 #ifdef IN_GC 281 Assert(!pRange || MMHyperIsInsideArea(pVM, pRange)); /** @todo r=bird: there is a macro for this which skips the #if'ing. */281 Assert(!pRange || MMHyperIsInsideArea(pVM, (RTGCPTR)pRange)); /** @todo r=bird: there is a macro for this which skips the #if'ing. */ 282 282 #endif 283 283 … … 426 426 } 427 427 #ifdef IN_GC 428 Assert(!pRange || MMHyperIsInsideArea(pVM, pRange)); /** @todo r=bird: there is a macro for this which skips the #if'ing. */428 Assert(!pRange || MMHyperIsInsideArea(pVM, (RTGCPTR)pRange)); /** @todo r=bird: there is a macro for this which skips the #if'ing. */ 429 429 #endif 430 430 … … 549 549 } 550 550 #ifdef IN_GC 551 Assert(!pRange || MMHyperIsInsideArea(pVM, pRange));551 Assert(!pRange || MMHyperIsInsideArea(pVM, (RTGCPTR)pRange)); 552 552 #endif 553 553 … … 673 673 } 674 674 #ifdef IN_GC 675 Assert(!pRange || MMHyperIsInsideArea(pVM, pRange)); /** @todo r=bird: there is a macro for this which skips the #if'ing. */675 Assert(!pRange || MMHyperIsInsideArea(pVM, (RTGCPTR)pRange)); /** @todo r=bird: there is a macro for this which skips the #if'ing. */ 676 676 #endif 677 677 -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r8234 r9212 250 250 { 251 251 #ifdef IN_GC 252 return MMGCRamReadNoTrapHandler(pDest, GCSrc, cb);252 return MMGCRamReadNoTrapHandler(pDest, (void *)GCSrc, cb); 253 253 #else 254 254 return PGMPhysReadGCPtrSafe(pVM, pDest, GCSrc, cb); … … 261 261 { 262 262 #ifdef IN_GC 263 return MMGCRamWriteNoTrapHandler( GCDest, pSrc, cb);263 return MMGCRamWriteNoTrapHandler((void *)GCDest, pSrc, cb); 264 264 #else 265 265 return PGMPhysWriteGCPtrSafe(pVM, GCDest, pSrc, cb); -
trunk/src/VBox/VMM/VMMAll/MMAll.cpp
r8155 r9212 174 174 { 175 175 #ifdef IN_GC 176 return mmHyperLookupGC(pVM, pv, poff);176 return mmHyperLookupGC(pVM, (RTGCPTR)pv, poff); 177 177 #elif defined(IN_RING0) 178 178 return mmHyperLookupR0(pVM, pv, poff); … … 254 254 { 255 255 #ifdef IN_GC 256 return mmHyperLookupCalcGC(pVM, pLookup, off);256 return (void *)mmHyperLookupCalcGC(pVM, pLookup, off); 257 257 #elif defined(IN_RING0) 258 258 return mmHyperLookupCalcR0(pLookup, off); … … 494 494 */ 495 495 #ifndef IN_GC 496 MMDECL(R TGCPTR) MMHyperCCToGC(PVM pVM, void *pv)496 MMDECL(RCPTRTYPE(void *)) MMHyperCCToGC(PVM pVM, void *pv) 497 497 { 498 498 uint32_t off; … … 516 516 * @deprecated 517 517 */ 518 MMDECL(R TGCPTR) MMHyperHC2GC(PVM pVM, RTHCPTR HCPtr)518 MMDECL(RCPTRTYPE(void *)) MMHyperHC2GC(PVM pVM, RTHCPTR HCPtr) 519 519 { 520 520 PMMLOOKUPHYPER pLookup = (PMMLOOKUPHYPER)((char*)CTXSUFF(pVM->mm.s.pHyperHeap) + pVM->mm.s.offLookupHyper); … … 527 527 unsigned off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)pLookup->u.Locked.pvHC; 528 528 if (off < pLookup->cb) 529 return (R TGCPTR)((RTGCUINTPTR)pVM->mm.s.pvHyperAreaGC + pLookup->off + off);529 return (RCPTRTYPE(void *))((RTGCUINTPTR)pVM->mm.s.pvHyperAreaGC + pLookup->off + off); 530 530 break; 531 531 } … … 535 535 unsigned off = (RTHCUINTPTR)HCPtr - (RTHCUINTPTR)pLookup->u.HCPhys.pvHC; 536 536 if (off < pLookup->cb) 537 return (R TGCPTR)((RTGCUINTPTR)pVM->mm.s.pvHyperAreaGC + pLookup->off + off);537 return (RCPTRTYPE(void *))((RTGCUINTPTR)pVM->mm.s.pvHyperAreaGC + pLookup->off + off); 538 538 break; 539 539 } … … 556 556 557 557 AssertMsgFailed(("HCPtr=%p is not inside the hypervisor memory area!\n", HCPtr)); 558 return (R TGCPTR)0;558 return (RCPTRTYPE(void *))0; 559 559 } 560 560 … … 570 570 * @deprecated 571 571 */ 572 MMDECL(RTHCPTR) MMHyperGC2HC(PVM pVM, R TGCPTRGCPtr)572 MMDECL(RTHCPTR) MMHyperGC2HC(PVM pVM, RCPTRTYPE(void *) GCPtr) 573 573 { 574 574 unsigned offGC = (RTGCUINTPTR)GCPtr - (RTGCUINTPTR)pVM->mm.s.pvHyperAreaGC; … … 615 615 MMDECL(RTHCPTR) MMHyper2HC(PVM pVM, uintptr_t Ptr) 616 616 { 617 return MMHyperGC2HC(pVM, (R TGCPTR)Ptr);617 return MMHyperGC2HC(pVM, (RCPTRTYPE(void *))Ptr); 618 618 } 619 619 … … 630 630 * @deprecated 631 631 */ 632 MMDECL(R TGCPTR) MMHyper2GC(PVM pVM, uintptr_t Ptr)632 MMDECL(RCPTRTYPE(void *)) MMHyper2GC(PVM pVM, uintptr_t Ptr) 633 633 { 634 634 return MMHyperHC2GC(pVM, (RTHCPTR)Ptr); -
trunk/src/VBox/VMM/VMMAll/PDMAllQueue.cpp
r8155 r9212 137 137 * @param pQueue The queue handle. 138 138 */ 139 PDMDECL( GCPTRTYPE(PPDMQUEUE)) PDMQueueGCPtr(PPDMQUEUE pQueue)139 PDMDECL(RCPTRTYPE(PPDMQUEUE)) PDMQueueGCPtr(PPDMQUEUE pQueue) 140 140 { 141 141 Assert(VALID_PTR(pQueue)); -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r9041 r9212 3198 3198 # ifndef IN_RING0 3199 3199 # if PGM_GST_TYPE == PGM_TYPE_32BIT 3200 rc = PGMShwGetPage(pVM, pPGM->pGuestPDGC, NULL, &HCPhysShw);3200 rc = PGMShwGetPage(pVM, (RTGCPTR)pPGM->pGuestPDGC, NULL, &HCPhysShw); 3201 3201 # else 3202 rc = PGMShwGetPage(pVM, pPGM->pGstPaePDPTGC, NULL, &HCPhysShw);3202 rc = PGMShwGetPage(pVM, (RTGCPTR)pPGM->pGstPaePDPTGC, NULL, &HCPhysShw); 3203 3203 # endif 3204 3204 AssertRCReturn(rc, 1); -
trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
r8537 r9212 417 417 #if PGM_GST_TYPE == PGM_TYPE_32BIT 418 418 pVM->pgm.s.pGuestPDHC = (R3R0PTRTYPE(PX86PD))HCPtrGuestCR3; 419 pVM->pgm.s.pGuestPDGC = ( GCPTRTYPE(PX86PD))pVM->pgm.s.GCPtrCR3Mapping;419 pVM->pgm.s.pGuestPDGC = (RCPTRTYPE(PX86PD))pVM->pgm.s.GCPtrCR3Mapping; 420 420 421 421 #elif PGM_GST_TYPE == PGM_TYPE_PAE 422 422 unsigned offset = GCPhysCR3 & GST_CR3_PAGE_MASK & PAGE_OFFSET_MASK; 423 423 pVM->pgm.s.pGstPaePDPTHC = (R3R0PTRTYPE(PX86PDPT)) HCPtrGuestCR3; 424 pVM->pgm.s.pGstPaePDPTGC = ( GCPTRTYPE(PX86PDPT)) ((GCPTRTYPE(uint8_t *))pVM->pgm.s.GCPtrCR3Mapping + offset);424 pVM->pgm.s.pGstPaePDPTGC = (RCPTRTYPE(PX86PDPT)) ((RCPTRTYPE(uint8_t *))pVM->pgm.s.GCPtrCR3Mapping + offset); 425 425 Log(("Cached mapping %VGv\n", pVM->pgm.s.pGstPaePDPTGC)); 426 426 … … 442 442 AssertRCReturn(rc, rc); 443 443 pVM->pgm.s.apGstPaePDsHC[i] = (R3R0PTRTYPE(PX86PDPAE))HCPtr; 444 pVM->pgm.s.apGstPaePDsGC[i] = ( GCPTRTYPE(PX86PDPAE))GCPtr;444 pVM->pgm.s.apGstPaePDsGC[i] = (RCPTRTYPE(PX86PDPAE))GCPtr; 445 445 pVM->pgm.s.aGCPhysGstPaePDs[i] = GCPhys; 446 446 PGM_INVL_PG(GCPtr); -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r9115 r9212 82 82 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 83 83 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 84 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTRpvUserGC,84 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RCPTRTYPE(void *) pvUserGC, 85 85 R3PTRTYPE(const char *) pszDesc) 86 86 { … … 600 600 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 601 601 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 602 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RTGCPTRpvUserGC,602 RCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC, RCPTRTYPE(void *) pvUserGC, 603 603 R3PTRTYPE(const char *) pszDesc) 604 604 { -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r9008 r9212 211 211 { 212 212 #ifdef IN_GC 213 return ( RTGCPTR)((RTGCUINTPTR)pvFault & ~(RTGCUINTPTR)(cbEntry - 1));213 return (const void *)((RTGCUINTPTR)pvFault & ~(RTGCUINTPTR)(cbEntry - 1)); 214 214 215 215 #elif defined(IN_RING0) … … 657 657 * write situation, meaning that it's safe to write here. 658 658 */ 659 RTGCUINTPTR pu32 = (RTGCUINTPTR)pvFault; 660 while (pRegFrame->ecx) 661 { 662 pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, (RTGCPTR)pu32, NULL); 659 663 #ifdef IN_GC 660 uint32_t *pu32 = (uint32_t *)pvFault; 661 #else 662 RTGCPTR pu32 = pvFault; 663 #endif 664 while (pRegFrame->ecx) 665 { 666 pgmPoolMonitorChainChanging(pPool, pPage, GCPhysFault, pu32, NULL); 667 #ifdef IN_GC 668 *pu32++ = pRegFrame->eax; 664 *(uint32_t *)pu32 = pRegFrame->eax; 669 665 #else 670 666 PGMPhysWriteGCPhys(pVM, GCPhysFault, &pRegFrame->eax, 4); 671 pu32 += 4; 672 #endif 673 GCPhysFault += 4;667 #endif 668 pu32 += 4; 669 GCPhysFault += 4; 674 670 pRegFrame->edi += 4; 675 671 pRegFrame->ecx--; -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r8155 r9212 620 620 * @param esp Ring1 ESP register value. 621 621 */ 622 SELMDECL(void) SELMSetRing1Stack(PVM pVM, uint32_t ss, uint32_tesp)622 SELMDECL(void) SELMSetRing1Stack(PVM pVM, uint32_t ss, RTGCPTR32 esp) 623 623 { 624 624 pVM->selm.s.Tss.ss1 = ss; 625 pVM->selm.s.Tss.esp1 = esp;625 pVM->selm.s.Tss.esp1 = (uint32_t)esp; 626 626 } 627 627 … … 635 635 * @param pEsp Ring1 ESP register value. 636 636 */ 637 SELMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, uint32_t *pEsp)637 SELMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp) 638 638 { 639 639 if (pVM->selm.s.fSyncTSSRing0Stack) 640 640 { 641 GCPTRTYPE(uint8_t *) GCPtrTss = (GCPTRTYPE(uint8_t *))pVM->selm.s.GCPtrGuestTss;641 RTGCPTR GCPtrTss = pVM->selm.s.GCPtrGuestTss; 642 642 int rc; 643 643 VBOXTSS tss; … … 649 649 650 650 l_tryagain: 651 rc = MMGCRamRead(pVM, &tss.ss0, GCPtrTss + RT_OFFSETOF(VBOXTSS, ss0), sizeof(tss.ss0));652 rc |= MMGCRamRead(pVM, &tss.esp0, GCPtrTss + RT_OFFSETOF(VBOXTSS, esp0), sizeof(tss.esp0));651 rc = MMGCRamRead(pVM, &tss.ss0, (RCPTRTYPE(void *))(GCPtrTss + RT_OFFSETOF(VBOXTSS, ss0)), sizeof(tss.ss0)); 652 rc |= MMGCRamRead(pVM, &tss.esp0, (RCPTRTYPE(void *))(GCPtrTss + RT_OFFSETOF(VBOXTSS, esp0)), sizeof(tss.esp0)); 653 653 #ifdef DEBUG 654 rc |= MMGCRamRead(pVM, &tss.offIoBitmap, GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap), sizeof(tss.offIoBitmap));654 rc |= MMGCRamRead(pVM, &tss.offIoBitmap, (RCPTRTYPE(void *))(GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap)), sizeof(tss.offIoBitmap)); 655 655 #endif 656 656 … … 662 662 /** @todo might cross page boundary */ 663 663 fTriedAlready = true; 664 rc = PGMPrefetchPage(pVM, GCPtrTss);664 rc = PGMPrefetchPage(pVM, (RTGCPTR)GCPtrTss); 665 665 if (rc != VINF_SUCCESS) 666 666 return rc; … … 692 692 #endif 693 693 /* Update our TSS structure for the guest's ring 1 stack */ 694 SELMSetRing1Stack(pVM, tss.ss0 | 1, tss.esp0);694 SELMSetRing1Stack(pVM, tss.ss0 | 1, (RTGCPTR32)tss.esp0); 695 695 pVM->selm.s.fSyncTSSRing0Stack = false; 696 696 } 697 697 698 698 *pSS = pVM->selm.s.Tss.ss1; 699 *pEsp = pVM->selm.s.Tss.esp1;699 *pEsp = (RTGCPTR32)pVM->selm.s.Tss.esp1; 700 700 701 701 return VINF_SUCCESS; … … 820 820 * without having dependencies on the relocation order. 821 821 */ 822 return MMHyperHC2GC(pVM, pVM->selm.s.paGdtHC);822 return (RTGCPTR)MMHyperHC2GC(pVM, pVM->selm.s.paGdtHC); 823 823 } 824 824 #endif /* IN_RING0 */ -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r8994 r9212 380 380 RTGCPTR pCallerGC; 381 381 #ifdef IN_GC 382 rc = MMGCRamRead(pVM, &pCallerGC, ( RTGCPTR)pRegFrame->esp, sizeof(pCallerGC));382 rc = MMGCRamRead(pVM, &pCallerGC, (void *)pRegFrame->esp, sizeof(pCallerGC)); 383 383 #else 384 384 rc = PGMPhysReadGCPtr(pVM, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC)); … … 449 449 pIDTEntry = (RTGCPTR)((RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate); 450 450 #ifdef IN_GC 451 rc = MMGCRamRead(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte));451 rc = MMGCRamRead(pVM, &GuestIdte, (void *)pIDTEntry, sizeof(GuestIdte)); 452 452 #else 453 453 rc = PGMPhysReadGCPtr(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte)); … … 464 464 } 465 465 #ifdef IN_GC 466 rc = MMGCRamRead(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte));466 rc = MMGCRamRead(pVM, &GuestIdte, (void *)pIDTEntry, sizeof(GuestIdte)); 467 467 #else 468 468 rc = PGMPhysReadGCPtr(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte)); … … 477 477 ) 478 478 { 479 RTGCPTR 480 GCPTRTYPE(uint32_t *)pTrapStackGC;479 RTGCPTR pHandler, dummy; 480 RTGCPTR pTrapStackGC; 481 481 482 482 pHandler = (RTGCPTR)((GuestIdte.Gen.u16OffsetHigh << 16) | GuestIdte.Gen.u16OffsetLow); … … 509 509 pGdtEntry = (RTGCPTR)(uintptr_t)&((VBOXDESC *)gdtr.pGdt)[GuestIdte.Gen.u16SegSel >> X86_SEL_SHIFT]; /// @todo fix this 510 510 #ifdef IN_GC 511 rc = MMGCRamRead(pVM, &Desc, pGdtEntry, sizeof(Desc));511 rc = MMGCRamRead(pVM, &Desc, (void *)pGdtEntry, sizeof(Desc)); 512 512 #else 513 513 rc = PGMPhysReadGCPtr(pVM, &Desc, pGdtEntry, sizeof(Desc)); … … 524 524 } 525 525 #ifdef IN_GC 526 rc = MMGCRamRead(pVM, &Desc, pGdtEntry, sizeof(Desc));526 rc = MMGCRamRead(pVM, &Desc, (void *)pGdtEntry, sizeof(Desc)); 527 527 #else 528 528 rc = PGMPhysReadGCPtr(pVM, &Desc, pGdtEntry, sizeof(Desc)); … … 588 588 /* Check maximum amount we need (10 when executing in V86 mode) */ 589 589 rc = PGMVerifyAccess(pVM, (RTGCUINTPTR)pTrapStackGC - 10*sizeof(uint32_t), 10 * sizeof(uint32_t), X86_PTE_RW); 590 pTrapStack = pTrapStackGC;590 pTrapStack = (uint32_t *)pTrapStackGC; 591 591 #else 592 592 Assert(eflags.Bits.u1VM || (pRegFrame->ss & X86_SEL_RPL) == 0 || (pRegFrame->ss & X86_SEL_RPL) == 3); … … 694 694 STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[iOrgTrap], o); 695 695 696 CPUMGCCallGuestTrapHandler(pRegFrame, GuestIdte.Gen.u16SegSel | 1, pVM->trpm.s.aGuestTrapHandler[iGate], eflags.u32, ss_r0, (RTGCPTR )esp_r0);696 CPUMGCCallGuestTrapHandler(pRegFrame, GuestIdte.Gen.u16SegSel | 1, pVM->trpm.s.aGuestTrapHandler[iGate], eflags.u32, ss_r0, (RTGCPTR32)esp_r0); 697 697 /* does not return */ 698 698 #else -
trunk/src/VBox/VMM/VMMAll/VMMAll.cpp
r8155 r9212 40 40 RTGCPTR VMMGetStackGC(PVM pVM) 41 41 { 42 return pVM->vmm.s.pbGCStackBottom;42 return (RTGCPTR)pVM->vmm.s.pbGCStackBottom; 43 43 } 44 44 -
trunk/src/VBox/VMM/VMMCodingGuidelines.cpp
r8155 r9212 42 42 * The rules: 43 43 * 44 * - When declaring pointers in shared structures use the GCPTRTYPE() and45 * HCPTRTYPE() macros.44 * - When declaring pointers in shared structures use the RCPTRTYPE(), 45 * R0PTRTYPE() and R3PTRTYPE() macros. 46 46 * 47 47 * - Use RTGCPTR and RTHCPTR when dealing with the other context in -
trunk/src/VBox/VMM/VMMGC/DBGFGC.cpp
r8793 r9212 46 46 * @param uDr6 The DR6 register value. 47 47 */ 48 DBGFGCDECL(int) DBGFGCTrap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RT UINTREG uDr6)48 DBGFGCDECL(int) DBGFGCTrap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6) 49 49 { 50 50 const bool fInHyper = !(pRegFrame->ss & X86_SEL_RPL) && !pRegFrame->eflags.Bits.u1VM; -
trunk/src/VBox/VMM/VMMGC/MMRamGC.cpp
r8155 r9212 138 138 * And mark the relevant guest page as accessed and dirty. 139 139 */ 140 PGMGstModifyPage(pVM, pDst, cb, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));140 PGMGstModifyPage(pVM, (RTGCPTR)pDst, cb, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); 141 141 142 142 return rc; -
trunk/src/VBox/VMM/VMMGC/SELMGC.cpp
r8155 r9212 205 205 /** @todo should check if any affected selectors are loaded. */ 206 206 uint32_t cb; 207 rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb);207 rc = EMInterpretInstruction(pVM, pRegFrame, (RTGCPTR)pvFault, &cb); 208 208 if (VBOX_SUCCESS(rc) && cb) 209 209 { … … 291 291 */ 292 292 uint32_t cb; 293 int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb);293 int rc = EMInterpretInstruction(pVM, pRegFrame, (RTGCPTR)pvFault, &cb); 294 294 if (VBOX_SUCCESS(rc) && cb) 295 295 { … … 321 321 { 322 322 /* Shadow page table might be out of sync */ 323 rc = PGMPrefetchPage(pVM, ( uint8_t *)pGuestTSS + offIntRedirBitmap + i*8);323 rc = PGMPrefetchPage(pVM, (RTGCPTR)((uint8_t *)pGuestTSS + offIntRedirBitmap + i*8)); 324 324 if (VBOX_FAILURE(rc)) 325 325 { … … 404 404 } 405 405 406 407 /** 408 * Gets ss:esp for ring1 in main Hypervisor's TSS. 409 * 410 * @returns VBox status code. 411 * @param pVM VM Handle. 412 * @param pSS Ring1 SS register value. 413 * @param pEsp Ring1 ESP register value. 414 */ 415 SELMGCDECL(int) SELMGCGetRing1Stack(PVM pVM, uint32_t *pSS, uint32_t *pEsp) 416 { 417 if (pVM->selm.s.fSyncTSSRing0Stack) 418 { 419 RCPTRTYPE(uint8_t *) GCPtrTss = (RCPTRTYPE(uint8_t *))pVM->selm.s.GCPtrGuestTss; 420 int rc; 421 VBOXTSS tss; 422 423 Assert(pVM->selm.s.GCPtrGuestTss && pVM->selm.s.cbMonitoredGuestTss); 424 425 #ifdef IN_GC 426 bool fTriedAlready = false; 427 428 l_tryagain: 429 rc = MMGCRamRead(pVM, &tss.ss0, GCPtrTss + RT_OFFSETOF(VBOXTSS, ss0), sizeof(tss.ss0)); 430 rc |= MMGCRamRead(pVM, &tss.esp0, GCPtrTss + RT_OFFSETOF(VBOXTSS, esp0), sizeof(tss.esp0)); 431 #ifdef DEBUG 432 rc |= MMGCRamRead(pVM, &tss.offIoBitmap, GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap), sizeof(tss.offIoBitmap)); 433 #endif 434 435 if (VBOX_FAILURE(rc)) 436 { 437 if (!fTriedAlready) 438 { 439 /* Shadow page might be out of sync. Sync and try again */ 440 /** @todo might cross page boundary */ 441 fTriedAlready = true; 442 rc = PGMPrefetchPage(pVM, (RTGCPTR)GCPtrTss); 443 if (rc != VINF_SUCCESS) 444 return rc; 445 goto l_tryagain; 446 } 447 AssertMsgFailed(("Unable to read TSS structure at %08X\n", GCPtrTss)); 448 return rc; 449 } 450 451 #else /* !IN_GC */ 452 /* Reading too much. Could be cheaper than two seperate calls though. */ 453 rc = PGMPhysReadGCPtr(pVM, &tss, GCPtrTss, sizeof(VBOXTSS)); 454 if (VBOX_FAILURE(rc)) 455 { 456 AssertReleaseMsgFailed(("Unable to read TSS structure at %08X\n", GCPtrTss)); 457 return rc; 458 } 459 #endif /* !IN_GC */ 460 461 #ifdef LOG_ENABLED 462 uint32_t ssr0 = pVM->selm.s.Tss.ss1; 463 uint32_t espr0 = pVM->selm.s.Tss.esp1; 464 ssr0 &= ~1; 465 466 if (ssr0 != tss.ss0 || espr0 != tss.esp0) 467 Log(("SELMGetRing1Stack: Updating TSS ring 0 stack to %04X:%08X\n", tss.ss0, tss.esp0)); 468 469 Log(("offIoBitmap=%#x\n", tss.offIoBitmap)); 470 #endif 471 /* Update our TSS structure for the guest's ring 1 stack */ 472 SELMSetRing1Stack(pVM, tss.ss0 | 1, (RTGCPTR32)tss.esp0); 473 pVM->selm.s.fSyncTSSRing0Stack = false; 474 } 475 476 *pSS = pVM->selm.s.Tss.ss1; 477 *pEsp = pVM->selm.s.Tss.esp1; 478 479 return VINF_SUCCESS; 480 } -
trunk/src/VBox/VMM/VMMGC/TRPMGC.cpp
r8155 r9212 69 69 * Install handler. 70 70 */ 71 pVM->trpm.s.aTmpTrapHandlers[iTrap] = (RTGCPTR )(RTGCUINTPTR)pfnHandler;71 pVM->trpm.s.aTmpTrapHandlers[iTrap] = (RTGCPTR32)(RTGCUINTPTR)pfnHandler; 72 72 return VINF_SUCCESS; 73 73 } … … 115 115 116 116 AssertMsg(offRange < (uint32_t)cbIDT+1, ("pvFault=%VGv GCPtrIDT=%VGv-%VGv pvRange=%VGv\n", pvFault, GCPtrIDT, GCPtrIDTEnd, pvRange)); 117 Assert( pvRange == GCPtrIDT);117 Assert((RTGCPTR)pvRange == GCPtrIDT); 118 118 119 119 #if 0 -
trunk/src/VBox/VMM/VMMInternal.h
r9148 r9212 178 178 R0PTRTYPE(PFNVMMSWITCHERHC) pfnR0HostToGuest; 179 179 /** Guest to host switcher entry point. */ 180 GCPTRTYPE(PFNVMMSWITCHERGC) pfnGCGuestToHost;180 RCPTRTYPE(PFNVMMSWITCHERGC) pfnGCGuestToHost; 181 181 /** Call Trampoline. See vmmGCCallTrampoline(). */ 182 182 RTGCPTR32 pfnGCCallTrampoline; … … 197 197 R3PTRTYPE(uint8_t *) pbHCStack; 198 198 /** Pointer to the bottom of the stack - needed for doing relocations. */ 199 GCPTRTYPE(uint8_t *) pbGCStack;199 RCPTRTYPE(uint8_t *) pbGCStack; 200 200 /** Pointer to the bottom of the stack - needed for doing relocations. */ 201 GCPTRTYPE(uint8_t *) pbGCStackBottom;201 RCPTRTYPE(uint8_t *) pbGCStackBottom; 202 202 203 203 /** Pointer to the GC logger instance - GC Ptr. 204 204 * This is NULL if logging is disabled. */ 205 GCPTRTYPE(PRTLOGGERGC) pLoggerGC;205 RCPTRTYPE(PRTLOGGERGC) pLoggerGC; 206 206 /** Size of the allocated logger instance (pLoggerGC/pLoggerHC). */ 207 207 RTUINT cbLoggerGC; … … 216 216 #ifdef VBOX_WITH_GC_AND_R0_RELEASE_LOG 217 217 /** Pointer to the GC release logger instance - GC Ptr. */ 218 GCPTRTYPE(PRTLOGGERGC) pRelLoggerGC;218 RCPTRTYPE(PRTLOGGERGC) pRelLoggerGC; 219 219 /** Size of the allocated release logger instance (pRelLoggerGC/pRelLoggerHC). 220 220 * This may differ from cbLoggerGC. */ -
trunk/src/VBox/VMM/VMMR0/DBGFR0.cpp
r8155 r9212 45 45 * @param uDr6 The DR6 register value. 46 46 */ 47 DBGFR0DECL(int) DBGFR0Trap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RT UINTREG uDr6)47 DBGFR0DECL(int) DBGFR0Trap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6) 48 48 { 49 49 /** @todo Intel docs say that X86_DR6_BS has the highest priority... */ -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r9188 r9212 681 681 pVMCB->guest.u64RAX = pCtx->eax; 682 682 683 /* vmrun will fail otherwise. */684 pVMCB->guest.u64EFER = MSR_K6_EFER_SVME;683 /* vmrun will fail without MSR_K6_EFER_SVME. */ 684 pVMCB->guest.u64EFER = pCtx->msrEFER | MSR_K6_EFER_SVME; 685 685 686 686 /** TSC offset. */ … … 696 696 } 697 697 698 /** @todo 64 bits stuff (?): 699 * - STAR 700 * - LSTAR 701 * - CSTAR 702 * - SFMASK 703 * - KernelGSBase 704 */ 698 /* Sync the various msrs for 64 bits mode. */ 699 pVMCB->guest.u64STAR = pCtx->msrSTAR; /* legacy syscall eip, cs & ss */ 700 pVMCB->guest.u64LSTAR = pCtx->msrLSTAR; /* 64 bits mode syscall rip */ 701 pVMCB->guest.u64CSTAR = pCtx->msrCSTAR; /* compatibility mode syscall rip */ 702 pVMCB->guest.u64SFMASK = pCtx->msrSFMASK; /* syscall flag mask */ 703 pVMCB->guest.u64KernelGSBase = pCtx->msrKERNELGSBASE; /* swapgs exchange value */ 705 704 706 705 #ifdef DEBUG -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r9188 r9212 273 273 AssertRC(rc); 274 274 275 /* VMX_VMCS_CTRL_ENTRY_CONTROLS276 * Set required bits to one and zero according to the MSR capabilities.277 */278 val = (pVM->hwaccm.s.vmx.msr.vmx_entry & 0xFFFFFFFF);279 if (pVM->hwaccm.s.cpuid.u32AMDFeatureEDX & X86_CPUID_AMD_FEATURE_EDX_LONG_MODE)280 {281 /** @todo 32 bits guest mode only for now. */282 /* val |= VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE; */283 }284 /* Mask away the bits that the CPU doesn't support */285 /** @todo make sure they don't conflict with the above requirements. */286 val &= (pVM->hwaccm.s.vmx.msr.vmx_entry >> 32ULL);287 /* else Must be zero when AMD64 is not available. */288 rc = VMXWriteVMCS(VMX_VMCS_CTRL_ENTRY_CONTROLS, val);289 AssertRC(rc);290 291 275 /* VMX_VMCS_CTRL_EXIT_CONTROLS 292 276 * Set required bits to one and zero according to the MSR capabilities. … … 958 942 STAM_COUNTER_INC(&pVM->hwaccm.s.StatTSCIntercept); 959 943 } 944 945 /* VMX_VMCS_CTRL_ENTRY_CONTROLS 946 * Set required bits to one and zero according to the MSR capabilities. 947 */ 948 val = (pVM->hwaccm.s.vmx.msr.vmx_entry & 0xFFFFFFFF); 949 950 /* 64 bits guest mode? */ 951 if (pCtx->msrEFER & MSR_K6_EFER_LMA) 952 val |= VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE; 953 954 /* Mask away the bits that the CPU doesn't support */ 955 /** @todo make sure they don't conflict with the above requirements. */ 956 val &= (pVM->hwaccm.s.vmx.msr.vmx_entry >> 32ULL); 957 /* else Must be zero when AMD64 is not available. */ 958 rc = VMXWriteVMCS(VMX_VMCS_CTRL_ENTRY_CONTROLS, val); 959 AssertRC(rc); 960 960 961 961 /* Done. */ -
trunk/src/recompiler/target-i386/helper.c
r8564 r9212 1340 1340 } 1341 1341 if (env->cr[0] & CR0_PE_MASK) { 1342 #if TARGET_X86_641342 #ifdef TARGET_X86_64 1343 1343 if (env->hflags & HF_LMA_MASK) { 1344 1344 do_interrupt64(intno, is_int, error_code, next_eip, is_hw);
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