Changeset 99331 in vbox for trunk/src/VBox/VMM/include/IEMMc.h

Timestamp:

Apr 7, 2023 12:27:07 AM (21 months ago)

Author:

vboxsync

Message:

VMM/IEM: Removed CPUID check from most of the IEM_MC_MAYBE_RAISE_*_RELATED_XCPT macros. bugref:10369

File:

• trunk/src/VBox/VMM/include/IEMMc.h (modified) (10 diffs)

trunk/src/VBox/VMM/include/IEMMc.h

@@ -92 +92 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.aXcr[0] & (XSAVE_C_YMM | XSAVE_C_SSE)) != (XSAVE_C_YMM | XSAVE_C_SSE) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSXSAVE) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fAvx) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSXSAVE)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -101 +100 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.aXcr[0] & (XSAVE_C_YMM | XSAVE_C_SSE)) != (XSAVE_C_YMM | XSAVE_C_SSE) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSXSAVE) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fAvx2) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSXSAVE)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -110 +108 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fAesNi) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -119 +116 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSha) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -128 +124 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse42) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -137 +132 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse41) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -146 +140 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -155 +148 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse3) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -164 +156 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
@@ -173 +164 @@
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \
-            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse) \
+            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
             return iemRaiseUndefinedOpcode(pVCpu); \
         if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \