Changeset 99404 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c

Timestamp:

Apr 14, 2023 3:17:44 PM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

156854

Message:

Devices/EFI/FirmwareNew: Update to edk2-stable202302 and make it build, bugref:4643

Location:

trunk/src/VBox/Devices/EFI/FirmwareNew

Files:

• . (modified) (1 prop)
• UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c (modified) (13 diffs)

trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c

@@ -14 +14 @@
 #include <Register/Cpuid.h>
 
-GUID mCpuCrystalFrequencyHobGuid = { 0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a } };
+GUID  mCpuCrystalFrequencyHobGuid = {
+  0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a }
+};
 
 /**
@@ -42 +44 @@
   )
 {
-  UINT64                 TscFrequency;
-  UINT64                 CoreXtalFrequency;
-  UINT32                 RegEax;
-  UINT32                 RegEbx;
-  UINT32                 RegEcx;
+  UINT64  TscFrequency;
+  UINT64  CoreXtalFrequency;
+  UINT32  RegEax;
+  UINT32  RegEbx;
+  UINT32  RegEcx;
 
   //
@@ -58 +60 @@
   // If EAX or EBX returns 0, the XTAL ratio is not enumerated.
   //
-  if (RegEax == 0 || RegEbx ==0 ) {
+  if ((RegEax == 0) || (RegEbx == 0)) {
     ASSERT (RegEax != 0);
     ASSERT (RegEbx != 0);
     return 0;
   }
+
   //
   // If ECX returns 0, the XTAL frequency is not enumerated.
@@ -70 +73 @@
     CoreXtalFrequency = PcdGet64 (PcdCpuCoreCrystalClockFrequency);
   } else {
-    CoreXtalFrequency = (UINT64) RegEcx;
+    CoreXtalFrequency = (UINT64)RegEcx;
   }
 
@@ -100 +103 @@
   // The target timer count is calculated here
   //
-  Ticks = AsmReadTsc() + Delay;
+  Ticks = AsmReadTsc () + Delay;
 
   //
@@ -108 +111 @@
   // Intel guarantees a minimum of 10 years before the TSC wraps.
   //
-  while (AsmReadTsc() <= Ticks) {
-    CpuPause();
+  while (AsmReadTsc () <= Ticks) {
+    CpuPause ();
   }
 }
@@ -129 +132 @@
   )
 {
-
   InternalCpuDelay (
     DivU64x32 (
@@ -137 +139 @@
         ),
       1000000u
-    )
-  );
+      )
+    );
 
   return MicroSeconds;
@@ -159 +161 @@
   )
 {
-
   InternalCpuDelay (
     DivU64x32 (
@@ -167 +168 @@
         ),
       1000000000u
-    )
-  );
+      )
+    );
 
   return NanoSeconds;
@@ -220 +221 @@
 EFIAPI
 GetPerformanceCounterProperties (
-  OUT UINT64  *StartValue,  OPTIONAL
+  OUT UINT64  *StartValue   OPTIONAL,
   OUT UINT64  *EndValue     OPTIONAL
   )
@@ -231 +232 @@
     *EndValue = 0xffffffffffffffffULL;
   }
+
   return InternalGetPerformanceCounterFrequency ();
 }
@@ -270 +272 @@
   // i.e. highest bit set in Remainder should <= 33.
   //
-  Shift = MAX (0, HighBitSet64 (Remainder) - 33);
-  Remainder = RShiftU64 (Remainder, (UINTN) Shift);
-  Frequency = RShiftU64 (Frequency, (UINTN) Shift);
+  Shift        = MAX (0, HighBitSet64 (Remainder) - 33);
+  Remainder    = RShiftU64 (Remainder, (UINTN)Shift);
+  Frequency    = RShiftU64 (Frequency, (UINTN)Shift);
   NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
 
   return NanoSeconds;
 }
-