|
|
|
@74648
|
6 years |
vboxsync |
VMM/IEM, CPUM: Nested VMX: bugref:9180 VM-exit bits; Add TPR …
|
|
|
|
@74392
|
6 years |
vboxsync |
VMM/CPU, IEM: Nested VMX: bugref:9180 Access the CR0 and CR4 fixed …
|
|
|
|
@74258
|
6 years |
vboxsync |
VMM/IEM, CPUM: Nested VMX: bugref:9180 vmlaunch/vmresume bits.
|
|
|
|
@74171
|
6 years |
vboxsync |
VMM/CPUM, IEM: Nested VMX: bugref:9180 vmlaunch/vmresume bits.
|
|
|
|
@74147
|
6 years |
vboxsync |
VMM/CPUM: Nested VMX: bugref:9180 Secondary processor-based …
|
|
|
|
@74113
|
6 years |
vboxsync |
VMM/CPUM, IEM: Nested VMX: bugref:9180 Fixes for allowing 32-bit …
|
|
|
|
@74102
|
6 years |
vboxsync |
VMM/CPUM: Naming nit.
|
|
|
|
@74101
|
6 years |
vboxsync |
VMM/CPUM: Naming nit.
|
|
|
|
@74100
|
6 years |
vboxsync |
VMM/CPUM: Nested VMX: bugref:9180 Added a separate function for …
|
|
|
|
@74054
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 vmlaunch/vmresume bits.
|
|
|
|
@74043
|
6 years |
vboxsync |
VMM/IEM, HM: Nested VMX: bugref:9180 vmlaunch/vmresume work.
|
|
|
|
@73870
|
6 years |
vboxsync |
VMM: Nested VMX: Added VMX CPUID features for RDRAND, RDSEED and PML. …
|
|
|
|
@73795
|
6 years |
vboxsync |
VMM/CPUM: Nested VMX: bugref:9180 Added more VMX CPUID feature identifiers.
|
|
|
|
@73745
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Implement VMPTRLD.
|
|
|
|
@73628
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Implement IA32_VMX_MISC MSR.
|
|
|
|
@73606
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Various bits:
- IEM: Started VMXON, …
|
|
|
|
@73431
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Don't forget to report the VMCS size in …
|
|
|
|
@73406
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Implement MSR_IA32_VMX_VMCS_ENUM.
|
|
|
|
@73395
|
6 years |
vboxsync |
VMM, CPUM: Nested VMX: bugref:9180 Implement Cr0Fixed[0|1] and …
|
|
|
|
@73389
|
6 years |
vboxsync |
VMM, SUPDrv: Nested VMX: bugref:9180 Implement some of the VMX MSRs.
|
|
|
|
@73290
|
6 years |
vboxsync |
VMM/CPUM: Nested VMX: bugref:9180 Consider true capability MSRs while …
|
|
|
|
@73274
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Reports bits of IA32_FEATURE_CONTROL, …
|
|
|
|
@73257
|
6 years |
vboxsync |
VMM: Nested VMX: bugref:9180 Renamed Ia32VmxBase to Ia32VmxBasic to …
|
|
|
|
@73245
|
6 years |
vboxsync |
VMM/CPUM: Nested VMX: bugref:9180 Report IA32_FEATURE_CONTROL.VMXON bit.
|
|
|
|
@72866
|
6 years |
vboxsync |
IEM,CPUM: Can use LogRel in ring-0 too now and have it go to VBox.log.
|
|
|
|
@72634
|
7 years |
vboxsync |
EM[R3]: Use pVCpu->cpum.GstCtx and stop keeping and passing pCtx around.
|
|
|
|
@72522
|
7 years |
vboxsync |
NEM,TM: Work on TSC and NEM/win. bugref:9044 [=>office]
|
|
|
|
@72358
|
7 years |
vboxsync |
NEM: Sync more MSR state; don't treat unrecoverable exceptions as …
|
|
|
|
@72208
|
7 years |
vboxsync |
VMM: VBOX_WITH_NESTED_HWVIRT_SVM.
|
|
|
|
@71755
|
7 years |
vboxsync |
VMM: Nested Hw.virt: Fix overriding SVM nested-guest PAT MSR while …
|
|
|
|
@71108
|
7 years |
vboxsync |
Added speculation control settings to API, refined implementation.
|
|
|
|
@70913
|
7 years |
vboxsync |
CPUM: Infrastructure for speculative execution control.
|
|
|
|
@70071
|
7 years |
vboxsync |
VMM/CPUM: Raise #GP(0) like a physical CPU would when a …
|
|
|
|
@70056
|
7 years |
vboxsync |
VMM: Nested hw.virt: Apply nested-guest TSC offset when executing the …
|
|
|
|
@69216
|
7 years |
vboxsync |
CPUM: Reject invalid MTRR/PAT types.
|
|
|
|
@69160
|
7 years |
vboxsync |
VMM/CPUM: Renamed CPUMSetGuestEferNoCheck.
|
|
|
|
@69144
|
7 years |
vboxsync |
VMM: Added CPUMSetGuestEferNoCheck so we can also call it when …
|
|
|
|
@69111
|
7 years |
vboxsync |
(C) year
|
|
|
|
@68531
|
7 years |
vboxsync |
Typos.
|
|
|
|
@66581
|
8 years |
vboxsync |
VMM: Nested Hw.virt: Implemented various SVM intercepts in IEM, …
|
|
|
|
@66227
|
8 years |
vboxsync |
VMM: Nested Hw.virt: Implement SVM VMRUN and #VMEXIT in IEM.
|
|
|
|
@65904
|
8 years |
vboxsync |
VMM: Nested Hw.virt: Started with tweaking the AMD bits and laying the …
|
|
|
|
@64655
|
8 years |
vboxsync |
VMM,recompiler: Get rid of PDM APIC interfaces reducing one level of …
|
|
|
|
@62606
|
8 years |
vboxsync |
VMM: Unused parameters.
|
|
|
|
@62601
|
8 years |
vboxsync |
VMM: Unused parameters.
|
|
|
|
@62478
|
8 years |
vboxsync |
(C) 2016
|
|
|
|
@60762
|
9 years |
vboxsync |
CPUM: Added an atom silvermont CPU profile.
|
|
|
|
@60377
|
9 years |
vboxsync |
VMM: Fix APIC, CPUM init ordering for the new APIC code while still …
|
|
|
|
@60307
|
9 years |
vboxsync |
VMM: APIC rewrite. Initial commit, work in progress.
|
|
|
|
@58123
|
9 years |
vboxsync |
VMM: Made @param pVCpu more uniform and to the point.
|
|
|
|
@58122
|
9 years |
vboxsync |
VMM: Made @param pVM more uniform and to the point.
|
|
|
|
@58116
|
9 years |
vboxsync |
VMM: Doxygen fixes.
|
|
|
|
@57558
|
9 years |
vboxsync |
VMM: unused vars.
|
|
|
|
@57358
|
9 years |
vboxsync |
*: scm cleanup run.
|
|
|
|
@56985
|
9 years |
vboxsync |
VMM: Log and assertion formatting fixes.
|
|
|
|
@56287
|
10 years |
vboxsync |
VMM: Updated (C) year.
|
|
|
|
@54737
|
10 years |
vboxsync |
VMM,REM: CPUID revamp - almost there now.
|
|
|
|
@54714
|
10 years |
vboxsync |
PATM,CPUM: CPUID patch update.
|
|
|
|
@54674
|
10 years |
vboxsync |
CPUM: Working on refactoring the guest CPUID handling.
|
|
|
|
@53467
|
10 years |
vboxsync |
VMM: Removed VBOX_WITH_NEW_MSR_CODE and the code marked ifndef …
|
|
|
|
@53466
|
10 years |
vboxsync |
VMM/MSRs: Added status codes for returning to ring-3 to service the …
|
|
|
|
@52770
|
10 years |
vboxsync |
VMM/CPUM: Fix EFER WRMSR to ignore EFER.LMA bit, trunk regression …
|
|
|
|
@52717
|
10 years |
vboxsync |
VMM/CPUM: Raise #GP(0) while writing to disallowed EFER bits.
|
|
|
|
@51366
|
11 years |
vboxsync |
VMM/CPUM: Assertion.
|
|
|
|
@51333
|
11 years |
vboxsync |
VMM/GIM: Hyper-V provider, work-in-progress.
|
|
|
|
@51301
|
11 years |
vboxsync |
VMM: Retire aGuestCpuIdHyper legacy array.
|
|
|
|
@51288
|
11 years |
vboxsync |
Fixes for canonical address in MSRs.
|
|
|
|
@51235
|
11 years |
vboxsync |
Instrumented cpumMsrWr_Ia32SysEnterEip with a LogRel for tracking the …
|
|
|
|
@51233
|
11 years |
vboxsync |
CPUMAllMsrs.cpp: Quickfix for IA32_APIC_BASE read #GP.
|
|
|
|
@50617
|
11 years |
vboxsync |
Implemented MSR 0x00000035 on i7, it reports threads and core counts …
|
|
|
|
@50590
|
11 years |
vboxsync |
CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should …
|
|
|
|
@50584
|
11 years |
vboxsync |
CPUM,DevEFI: Bus vs cpu clock ratio fixes for more recent CPUs. Older …
|
|
|
|
@50158
|
11 years |
vboxsync |
cpumMsrWr_Ia32BiosSignId should ignore writes, not GP. Only used on P4.
|
|
|
|
@49981
|
11 years |
vboxsync |
CPUMAllMsrs.cpp: Fixed cpumLookupMsrRange to resolved aliases. Also …
|
|
|
|
@49972
|
11 years |
vboxsync |
CPUM: More msr hacking.
|
|
|
|
@49966
|
11 years |
vboxsync |
CPUM: Added AMD Athlon64 3200+ (130nm) and Pentium4 (mod 4, w/ 64-bit).
|
|
|
|
@49927
|
11 years |
vboxsync |
VMM: Mapped the MSRs for a core 2 penryn cpu.
|
|
|
|
@49899
|
11 years |
vboxsync |
Added data for i5-3570.
|
|
|
|
@49893
|
11 years |
vboxsync |
MSR rewrite: initial hacking - half disabled.
|
