|
|
|
@50994
|
11 years |
vboxsync |
VMM/GIM: Introduce the Minimal provider.
|
|
|
|
@50961
|
11 years |
vboxsync |
VMM/GIM: Use proper-case for the "None" provider CFGM.
|
|
|
|
@50953
|
11 years |
vboxsync |
GIM: Skeleton, work in progress.
|
|
|
|
@50923
|
11 years |
vboxsync |
IEM: Use ASPECT_NOT_IMPLEMENTED on interrupt task gates instead of …
|
|
|
|
@50918
|
11 years |
vboxsync |
VMM/HM: Fix some selector limit checks, comments.
|
|
|
|
@50917
|
11 years |
vboxsync |
Added PDMQueueFlushIfNecessary.
|
|
|
|
@50880
|
11 years |
vboxsync |
VMM/HMVMXR0: nit.
|
|
|
|
@50873
|
11 years |
vboxsync |
VMM/CPUM: comment typo.
|
|
|
|
@50872
|
11 years |
vboxsync |
VMM/HMR0: Assertion and comment.
|
|
|
|
@50870
|
11 years |
vboxsync |
VMM: HM comments.
|
|
|
|
@50867
|
11 years |
vboxsync |
VMM/HMVMXR0: Added hmR0VmxSetPendingXcptGP() and some doxygen fixes.
|
|
|
|
@50866
|
11 years |
vboxsync |
VMM/EMAll: Disallow writing to reserved bits while loading CR0.
|
|
|
|
@50863
|
11 years |
vboxsync |
VMM/IEMAllCImpl: Comment clarification about reserved bits in CR4 for …
|
|
|
|
@50856
|
11 years |
vboxsync |
VMM: Assert 4K alignment on global VT-x and AMD-V physical pages. …
|
|
|
|
@50854
|
11 years |
vboxsync |
VMM/HMR0: VMXON regions need not be mapped executable.
|
|
|
|
@50842
|
11 years |
vboxsync |
VMMRZ: todo.
|
|
|
|
@50819
|
11 years |
vboxsync |
VMMAll/PGMAllPool: Clear references to the shadow table while adding …
|
|
|
|
@50809
|
11 years |
vboxsync |
VMM: introduced VBOX_WITH_VMM_R0_SWITCH_STACK
|
|
|
|
@50800
|
11 years |
vboxsync |
VMM/HMR0: Start with invalid Cpu Ids while initializing, resetting …
|
|
|
|
@50789
|
11 years |
vboxsync |
VMM/HMR0: Rely on zero-initialized allocations. Still trying to figure …
|
|
|
|
@50785
|
11 years |
vboxsync |
CPUMAllRegs: comment nit.
|
|
|
|
@50749
|
11 years |
vboxsync |
VMM/HMVMXR0: When only all-context VPID flush is supported by the CPU, …
|
|
|
|
@50748
|
11 years |
vboxsync |
VMM/HMR0: cleanup.
|
|
|
|
@50746
|
11 years |
vboxsync |
VMM/HMR0: Assert tidying.
|
|
|
|
@50740
|
11 years |
vboxsync |
VMM/HMR0: Don't flush tagged-TLB entries each time while leaving HM …
|
|
|
|
@50739
|
11 years |
vboxsync |
VMM/HMVMXR0: undo temporary change from r92738.
|
|
|
|
@50738
|
11 years |
vboxsync |
VMM/HMVMXR0: Temporary enable of HMVMX_ALWAYS_FLUSH_TLB for a test build.
|
|
|
|
@50720
|
11 years |
vboxsync |
VMM/HMVMXR0: Assert.
|
|
|
|
@50713
|
11 years |
vboxsync |
VMM/HM: typo.
|
|
|
|
@50698
|
11 years |
vboxsync |
VMM/HMVMXR0: More info. on assert failures.
|
|
|
|
@50696
|
11 years |
vboxsync |
VMM/HMVMXR0: More assertions in TLB flushing.
|
|
|
|
@50695
|
11 years |
vboxsync |
format string fixes
|
|
|
|
@50694
|
11 years |
vboxsync |
a few unimportant format string fixes
|
|
|
|
@50661
|
11 years |
vboxsync |
GCC:/MSC: => gcc:/msc: like everywhere
|
|
|
|
@50657
|
11 years |
vboxsync |
VBoxCpuReport: Filled in some msrs for sandybridge.
|
|
|
|
@50656
|
11 years |
vboxsync |
Added an example of the initial SandyBridge silicone.
|
|
|
|
@50655
|
11 years |
vboxsync |
VMM/HMVMXR0: First entry into VT-x may already have saved the …
|
|
|
|
@50653
|
11 years |
vboxsync |
Added a more recent K8 CPU to the CPU database.
|
|
|
|
@50617
|
11 years |
vboxsync |
Implemented MSR 0x00000035 on i7, it reports threads and core counts …
|
|
|
|
@50614
|
11 years |
vboxsync |
VMM/HMVMXR0: Avoid one extra VM-exit while injecting interrupts if …
|
|
|
|
@50607
|
11 years |
vboxsync |
auPrev[2] not [1].
|
|
|
|
@50606
|
11 years |
vboxsync |
cpumR3IsEcxRelevantForCpuIdLeaf: Improved exit conditions, fixing …
|
|
|
|
@50601
|
11 years |
vboxsync |
VMM/HMVMXR0: Undo r92473. We -do- need it, better comments.
|
|
|
|
@50600
|
11 years |
vboxsync |
VMM/HMVMXR0: This should not be necessary, while in preemption hook …
|
|
|
|
@50596
|
11 years |
vboxsync |
VMM: follow-up fix to r92440
|
|
|
|
@50590
|
11 years |
vboxsync |
CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should …
|
|
|
|
@50584
|
11 years |
vboxsync |
CPUM,DevEFI: Bus vs cpu clock ratio fixes for more recent CPUs. Older …
|
|
|
|
@50575
|
11 years |
vboxsync |
VMM: Added SSMR3RegisterStub and used it to provide saved state …
|
|
|
|
@50540
|
11 years |
vboxsync |
VMM/HM: Ignore SMX mode and proceed with a warning.
|
|
|
|
@50509
|
11 years |
vboxsync |
VMM/HMVMXR0: Build fix.
|
|
|
|
@50506
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix for workaround done in r92215.
|
|
|
|
@50428
|
11 years |
vboxsync |
HMR0Mixed.mac: Windows experiment with delaying host IDTR.LIMIT …
|
|
|
|
@50426
|
11 years |
vboxsync |
HMR0VMX.cpp: Hacked hmR0VmxSaveHostSegmentRegs to call …
|
|
|
|
@50407
|
11 years |
vboxsync |
duh
|
|
|
|
@50406
|
11 years |
vboxsync |
Some RTEnvGet cleanup, adding todos for the rest.
|
|
|
|
@50387
|
11 years |
vboxsync |
build fix
|
|
|
|
@50385
|
11 years |
vboxsync |
TMAll: Realized what the asserting was all about and reintroduced it, …
|
|
|
|
@50383
|
11 years |
vboxsync |
tmTimerVirtualSyncSet: Removed non-sensical lock ownership assertion.
|
|
|
|
@50381
|
11 years |
vboxsync |
tmTimerVirtualSyncStop: Removed non-sensical lock ownership assertion.
|
|
|
|
@50333
|
11 years |
vboxsync |
VMM, SupDrv: Allow VT-x when in presumed SMX mode when the VMXON bit …
|
|
|
|
@50285
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping over IO instructions (string I/O is a …
|
|
|
|
@50284
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping over IRET and POPF in real-on-v86 mode.
|
|
|
|
@50275
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping in real-on-v86 mode for certain …
|
|
|
|
@50271
|
11 years |
vboxsync |
VMM/HMVMXR0: Comment clarification.
|
|
|
|
@50270
|
11 years |
vboxsync |
VMM/HMVMXR0: Fix single-stepping with IRET on real-on-v86 mode while …
|
|
|
|
@50255
|
11 years |
vboxsync |
VMM: two undocumented CPUID bits
|
|
|
|
@50163
|
11 years |
vboxsync |
CPUM.cpp: Enable SSE4.1 and SSE4.2 by default for trunk.
|
|
|
|
@50162
|
11 years |
vboxsync |
CPUM.cpp: Added /CPUM/SSE4.1 and /CPUM/SSE4.2 configuration overrides …
|
|
|
|
@50158
|
11 years |
vboxsync |
cpumMsrWr_Ia32BiosSignId should ignore writes, not GP. Only used on P4.
|
|
|
|
@50157
|
11 years |
vboxsync |
CPUMR3Db.cpp: Redid the cpu database matching (cpumR3DbGetCpuInfo) to …
|
|
|
|
@50141
|
11 years |
vboxsync |
selmValidateAndConvertCSAddrHidden: Drop the bogus VERR_INVALID_RPL checks.
|
|
|
|
@50115
|
11 years |
vboxsync |
tstVMM: Drop the MSR quick report in the default test.
|
|
|
|
@50113
|
11 years |
vboxsync |
Because of the CPUID leaves we'll need the heap to always be mapped …
|
|
|
|
@50112
|
11 years |
vboxsync |
Missed one line.
|
|
|
|
@50111
|
11 years |
vboxsync |
Better name & restrict line length to 130 chars.
|
|
|
|
@50110
|
11 years |
vboxsync |
corrected function name.
|
|
|
|
@50087
|
11 years |
vboxsync |
VERR_CPUM_TOO_MANY_CPUID_SUBLEAVES: Dump some potentially useful info …
|
|
|
|
@50038
|
11 years |
vboxsync |
CPUM: Don't use stale pStdFeatureLeaf and pExtFeatureLeaf pointers. …
|
|
|
|
@50019
|
11 years |
vboxsync |
CPUMR3CpuId.cpp (trunk+4.3): s/RTStrmPrintf/Log/
|
|
|
|
@50009
|
11 years |
vboxsync |
VMMRZCallRing3Disable,VMMRZCallRing3Enable: Made them preemption …
|
|
|
|
@50001
|
11 years |
vboxsync |
PDMCritSect: Ditto VERR_INTERRUPTED fix for shared critical sections.
|
|
|
|
@50000
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: That worked but wasn't entirely …
|
|
|
|
@49999
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: Ok, that didn't work, so next attempt.
|
|
|
|
@49998
|
11 years |
vboxsync |
pdmR3R0CritSectEnterContended: Deal with VERR_INTERRUPTED while trying …
|
|
|
|
@49995
|
11 years |
vboxsync |
cpus/*AMD*.h: Make sure the patch loader MSR is present in older entries.
|
|
|
|
@49993
|
11 years |
vboxsync |
CPUM: VIA MSR mappings (rough cut).
|
|
|
|
@49992
|
11 years |
vboxsync |
VMM/HMVMXR0: comment copy & paste error.
|
|
|
|
@49990
|
11 years |
vboxsync |
VMM/HMSVMR0: nit.
|
|
|
|
@49988
|
11 years |
vboxsync |
CPU: Hacking VIA
|
|
|
|
@49981
|
11 years |
vboxsync |
CPUMAllMsrs.cpp: Fixed cpumLookupMsrRange to resolved aliases. Also …
|
|
|
|
@49979
|
11 years |
vboxsync |
Fix burn.
|
|
|
|
@49978
|
11 years |
vboxsync |
CPUM: One more P4 related issue that needs fudging.
|
|
|
|
@49977
|
11 years |
vboxsync |
CPUM: Make sure a minimum of commonly used MSRs are present by default.
|
|
|
|
@49975
|
11 years |
vboxsync |
EM: Make sure the RA1 and RAZ bits of DR6 and DR7 are enforced. Fixes …
|
|
|
|
@49972
|
11 years |
vboxsync |
CPUM: More msr hacking.
|
|
|
|
@49971
|
11 years |
vboxsync |
VMM/HMSVMR0: nit.
|
|
|
|
@49970
|
11 years |
vboxsync |
VMM/HMSVMR0: Avoid MSR write when possible.
|
|
|
|
@49969
|
11 years |
vboxsync |
VMM/HMSVMR0: todo addressed in r91390.
|
|
|
|
@49968
|
11 years |
vboxsync |
VMM/HMSVMR0: Update guest TSC AUX when we allow MSR passthru.
|
|
|
|
@49967
|
11 years |
vboxsync |
HMR0SVM.cpp: Use CPUR0GetGuestTscAux() instead of CPUMQueryGuestMsr to …
|
|
|
|
