Changeset 10458 in vbox for trunk/src/VBox/VMM

Timestamp:

Jul 10, 2008 8:08:05 AM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

33127

Message:

TPR & interrupt dispatch updates.

Location:

trunk/src/VBox/VMM

Files:

• EM.cpp (modified) (1 diff)
• VMMR0/HWSVMR0.cpp (modified) (4 diffs)
• VMMR0/HWVMXR0.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/EM.cpp

@@ -3024 +3024 @@
         }
 
-        /* Replays the handler notification changes. */
+        /* Replay the handler notification changes. */
         if (VM_FF_ISSET(pVM, VM_FF_REM_HANDLER_NOTIFY))
             REMR3ReplayHandlerNotifications(pVM);

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -319 +319 @@
     /* Virtualize masking of INTR interrupts. (reads/writes from/to CR8 go to the V_TPR register) */
     pVMCB->ctrl.IntCtrl.n.u1VIrqMasking = 1;
+    /* Ignore the priority in the TPR; just deliver it when we tell it to. */
+    pVMCB->ctrl.IntCtrl.n.u1IgnoreTPR   = 1; 
 
     /* Set IO and MSR bitmap addresses. */
@@ -395 +397 @@
         &&  VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)))
     {
-        if (!(pCtx->eflags.u32 & X86_EFL_IF))
+        if (    !(pCtx->eflags.u32 & X86_EFL_IF)
+            ||  VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
         {
             if (!pVMCB->ctrl.IntCtrl.n.u1VIrqValid)
             {
-                LogFlow(("Enable irq window exit!\n"));
+                if (!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
+                    LogFlow(("Enable irq window exit!\n"));
+                else
+                    Log(("Pending interrupt blocked at %VGv by VM_FF_INHIBIT_INTERRUPTS -> irq window exit\n", pCtx->rip));
+
                 /** @todo use virtual interrupt method to inject a pending irq; dispatched as soon as guest.IF is set. */
                 pVMCB->ctrl.u32InterceptCtrl1 |= SVM_CTRL1_INTERCEPT_VINTR;
                 pVMCB->ctrl.IntCtrl.n.u1VIrqValid    = 1;
-                pVMCB->ctrl.IntCtrl.n.u1IgnoreTPR    = 1; /* ignore the priority in the TPR; just deliver it */
                 pVMCB->ctrl.IntCtrl.n.u8VIrqVector   = 0; /* don't care */
             }
         }
         else
-        if (!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
         {
             uint8_t u8Interrupt;
@@ -427 +432 @@
             }
         }
-        else
-            Log(("Pending interrupt blocked at %VGv by VM_FF_INHIBIT_INTERRUPTS!!\n", pCtx->rip));
     }
 
@@ -1433 +1436 @@
         Log(("SVM_EXIT_VINTR IF=%d\n", pCtx->eflags.Bits.u1IF));
         pVMCB->ctrl.IntCtrl.n.u1VIrqValid    = 0;
-        pVMCB->ctrl.IntCtrl.n.u1IgnoreTPR    = 0;
         pVMCB->ctrl.IntCtrl.n.u8VIrqVector   = 0;
         goto ResumeExecution;

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -278 +278 @@
 #if HC_ARCH_BITS == 64
     /* Always exit on CR8 writes. */
-    /* @todo investigate TRP treshold option */
+    /* @todo investigate TPR treshold option */
     val |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT;
 
@@ -1197 +1197 @@
         AssertRC(rc);
         /* The TPR can be found at offset 0x80 in the APIC mmio page. */
-        pVM->hwaccm.s.vmx.pAPIC[0x80] = u8TPR;
+        pVM->hwaccm.s.vmx.pAPIC[0x80] = u8TPR << 4; /* bits 7-4 */
     }