|
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|
@12162
|
16 years |
vboxsync |
VMM: Assert that we don't change CPU unexpectedly while executing in …
|
|
|
|
@12121
|
16 years |
vboxsync |
Committed hardware breakpoint support for VT-x and AMD-V. Untested and …
|
|
|
|
@12090
|
16 years |
vboxsync |
Started with hardware debug register support.
Fixed out of sync …
|
|
|
|
@11311
|
16 years |
vboxsync |
VMM: ELEMENTS -> RT_ELEMENTS.
|
|
|
|
@11133
|
16 years |
vboxsync |
compiler warnings
|
|
|
|
@10817
|
16 years |
vboxsync |
Started with EPT support.
|
|
|
|
@10687
|
16 years |
vboxsync |
Save the FPU control word and MXCSR on entry and restore them …
|
|
|
|
@10683
|
16 years |
vboxsync |
Backed out 33399; must save the host context on entry due to long …
|
|
|
|
@10682
|
16 years |
vboxsync |
Saving of the host state is done correctly already for VT-x. (not …
|
|
|
|
@10672
|
16 years |
vboxsync |
Added a comment about the fact that we trash our own FPU state. Could …
|
|
|
|
@10647
|
16 years |
vboxsync |
Manual saving of XMM registers.
Use new FPU/MMX/XMM state saving for …
|
|
|
|
@10572
|
16 years |
vboxsync |
Use NIL_RTR0MEMOBJ and ASMMemZeroPage.
|
|
|
|
@10537
|
16 years |
vboxsync |
Updated HWACCMDumpRegs
|
|
|
|
@10502
|
16 years |
vboxsync |
Take precautions for being rescheduled to a different cpu due to long …
|
|
|
|
@10489
|
16 years |
vboxsync |
AMD-V: Always flush the TLB the first time a cpu is used.
|
|
|
|
@10465
|
16 years |
vboxsync |
Cleaned up
|
|
|
|
@10301
|
16 years |
vboxsync |
Wrong place for the assertion
|
|
|
|
@10297
|
16 years |
vboxsync |
More assertions.
|
|
|
|
@9669
|
17 years |
vboxsync |
warnings
|
|
|
|
@9421
|
17 years |
vboxsync |
64 bits hidden selector base.
|
|
|
|
@9414
|
17 years |
vboxsync |
macro
|
|
|
|
@9413
|
17 years |
vboxsync |
Compile fixes
|
|
|
|
@9412
|
17 years |
vboxsync |
use macros to access base, limit of a descriptor and offset of an IDT entry
|
|
|
|
@9411
|
17 years |
vboxsync |
Use a union for esp & rsp, so they are in-sync.
|
|
|
|
@9409
|
17 years |
vboxsync |
Probably caused the testbox failures.
|
|
|
|
@9407
|
17 years |
vboxsync |
HWACCM updates.
|
|
|
|
@9008
|
17 years |
vboxsync |
Changes for proper flushing of the TLB for physical registration changes.
|
|
|
|
@8879
|
17 years |
vboxsync |
Init idCpu
|
|
|
|
@8878
|
17 years |
vboxsync |
Don't automatically flush the TLB when we remain on the same cpu (on …
|
|
|
|
@8876
|
17 years |
vboxsync |
ASID based TLB flushing
|
|
|
|
@8873
|
17 years |
vboxsync |
Fetch the SVM features too and write them to the release log
|
|
|
|
@8853
|
17 years |
vboxsync |
Manual page invalidation or TLB flush is required for AMD-V.
|
|
|
|
@8554
|
17 years |
vboxsync |
Always refuse to load if the cpu is in vmx root mode (32 bits to PAE …
|
|
|
|
@8553
|
17 years |
vboxsync |
Moved VMX root mode check around.
|
|
|
|
@8550
|
17 years |
vboxsync |
Corrected the KVM presence check
|
|
|
|
@8155
|
17 years |
vboxsync |
The Big Sun Rebranding Header Change
|
|
|
|
@8115
|
17 years |
vboxsync |
Don't assert if RTMpOnAll returns VERR_NOT_SUPPORTED!
|
|
|
|
@7574
|
17 years |
vboxsync |
And again
|
|
|
|
@7573
|
17 years |
vboxsync |
Correction
|
|
|
|
@7572
|
17 years |
vboxsync |
Compile fix
|
|
|
|
@7569
|
17 years |
vboxsync |
Removed assertion
|
|
|
|
@7524
|
17 years |
vboxsync |
Linux VT-x/AMD-V enabled again.
|
|
|
|
@7510
|
17 years |
vboxsync |
Backed out 28970.
|
|
|
|
@7508
|
17 years |
vboxsync |
Enabled VT-x/AMD-V on other platforms again.
|
|
|
|
@7505
|
17 years |
vboxsync |
More assertions
|
|
|
|
@7503
|
17 years |
vboxsync |
Cleanup
|
|
|
|
@7499
|
17 years |
vboxsync |
typo
|
|
|
|
@7498
|
17 years |
vboxsync |
Don't init hwaccm when using raw mode.
|
|
|
|
@7496
|
17 years |
vboxsync |
Moved VMCS allocation to ring 0.
|
|
|
|
@7495
|
17 years |
vboxsync |
More logging
|
|
|
|
@7494
|
17 years |
vboxsync |
Cleaned up
|
|
|
|
@7478
|
17 years |
vboxsync |
Disable VT-x and AMD-V on all hosts except Windows for now.
|
|
|
|
@7477
|
17 years |
vboxsync |
attempt to fix 64-bit Linux boxes
|
|
|
|
@7476
|
17 years |
vboxsync |
Initialize VT-x and AMD-V properly on all cpus if the BIOS failed to do so.
|
|
|
|
@7471
|
17 years |
vboxsync |
Rewrote VT-x & AMD-V mode changes. Requires the MP apis in our runtime …
|
|
|
|
@7105
|
17 years |
vboxsync |
adapted format specifier to 32->64 bit change of CPUMCTX.drX and …
|
|
|
|
@5999
|
17 years |
vboxsync |
The Giant CDDL Dual-License Header Change.
|
|
|
|
@5442
|
17 years |
vboxsync |
VT-x: Restore CR4 again; don't leave the X86_CR4_VMXE flag set if it …
|
|
|
|
@4598
|
17 years |
vboxsync |
Only check for vmx root mode for 64 bits hosts.
|
|
|
|
@4487
|
17 years |
vboxsync |
Todo
|
|
|
|
@4083
|
17 years |
vboxsync |
Changed comment
|
|
|
|
@4079
|
17 years |
vboxsync |
Fail if the CPU is in VMX root mode.
|
|
|
|
@4071
|
17 years |
vboxsync |
Biggest check-in ever. New source code headers for all (C) innotek files.
|
|
|
|
@4000
|
17 years |
vboxsync |
uint32_t -> int32_t
|
|
|
|
@3942
|
17 years |
vboxsync |
fixed detecting the CPU vendor (in DevAPIC) by introducing symbolic …
|
|
|
|
@3750
|
17 years |
vboxsync |
Check if SVM is disabled in the BIOS. Otherwise enabling it with wrmsr …
|
|
|
|
@3301
|
17 years |
vboxsync |
Update the MSR_IA32_FEATURE_CONTROL MSR ourselves if it's not locked.
|
|
|
|
@3295
|
17 years |
vboxsync |
fixed compile errors
|
|
|
|
@3294
|
17 years |
vboxsync |
Get rid of redundant logging
|
|
|
|
@3292
|
17 years |
vboxsync |
Write the exact reason for VMX/SVM detection failure to the release log.
|
|
|
|
@2981
|
18 years |
vboxsync |
InnoTek -> innotek: all the headers and comments.
|
|
|
|
@2818
|
18 years |
vboxsync |
Corrections for 64 bits shifts.
|
|
|
|
@2814
|
18 years |
vboxsync |
compile fix
|
|
|
|
@2813
|
18 years |
vboxsync |
Updates
|
|
|
|
@2811
|
18 years |
vboxsync |
Updates for 64 bits descriptors.
|
|
|
|
@1283
|
18 years |
vboxsync |
Added support for the hybrid darwin setup where the kernel is 32-bit …
|
|
|
|
@23
|
18 years |
vboxsync |
string.h & stdio.h + header cleanups.
|
|
|
|
@1
|
55 years |
vboxsync |
import
|
