|
|
@42705
|
12 years |
vboxsync |
CPUM: Set FF when needed (VBOX_WITH_IEM only). Made CPUMRawSetEFlags …
|
|
|
@42647
|
12 years |
vboxsync |
CPUM: More intel MSRs that NT4 reads when booting on intel systems.
|
|
|
@42640
|
12 years |
vboxsync |
CPUM: Stubbed MSR_IA32_BIOS_SIGN_ID and MSR_IA32_BIOS_UPDT_TRIG.
|
|
|
@42452
|
12 years |
vboxsync |
CPUMAllRegs.cpp: Documented some return values on a few CPUMSetGuest* …
|
|
|
@42427
|
12 years |
vboxsync |
VMM: Fixed some selector arithmetic, introducing a new constand and …
|
|
|
@42420
|
12 years |
vboxsync |
Eliminating CPUM_CHANGED_HIDDEN_SEL_REGS_INVALID and …
|
|
|
@42407
|
12 years |
vboxsync |
VMM: Futher work on dealing with hidden segment register, esp. when …
|
|
|
@42193
|
12 years |
vboxsync |
IEM: Integration work…
|
|
|
@42188
|
12 years |
vboxsync |
VMM: Changed a few ifndef IN_RING0 to ifndef VBOX_WITH_RAW_MODE_NOT_R0.
|
|
|
@42186
|
12 years |
vboxsync |
SELM,DIS,CPUM,EM: Hidden selector register cleanups.
|
|
|
@42166
|
12 years |
vboxsync |
CPUMGetGuestCPL: Use hidden SS register values in raw-mode too.
|
|
|
@42165
|
12 years |
vboxsync |
CPUMIsGuestIn64BitCode/CPUMIsGuestIn64BitCodeEx changes together with …
|
|
|
@42034
|
13 years |
vboxsync |
Doxygen.
|
|
|
@42033
|
13 years |
vboxsync |
VMM: RDTSCP support bits.
|
|
|
@42024
|
13 years |
vboxsync |
VMM: RDTSCP support on Intel. Segregated some common CPU features from …
|
|
|
@41976
|
13 years |
vboxsync |
VMM: Switcher and TRPM fixes wrt hypervisor traps and tstVMM.
|
|
|
@41965
|
13 years |
vboxsync |
VMM: ran scm. Mostly svn:keywords changes (adding Revision).
|
|
|
@41943
|
13 years |
vboxsync |
VMM: Avoid stale selector issues in RC so there will be no need to try …
|
|
|
@41940
|
13 years |
vboxsync |
CPUMRaw[SG]etEFlags: Drop pCtxCore.
|
|
|
@41939
|
13 years |
vboxsync |
CPUMGetGuestCPL: Drop the context core pointer and use the Guest state …
|
|
|
@41931
|
13 years |
vboxsync |
TRPM: Save state directly to the CPUMCPU context member instead of …
|
|
|
@41906
|
13 years |
vboxsync |
CPUM: Combined the visible and hidden selector register data into one …
|
|
|
@41905
|
13 years |
vboxsync |
CPUMCTX++: Rearranging the CPUMCTX structure in preparation of some …
|
|
|
@41836
|
13 years |
vboxsync |
Doxygen.
|
|
|
@41803
|
13 years |
vboxsync |
Doxygen.
|
|
|
@41802
|
13 years |
vboxsync |
Doxygen.
|
|
|
@41800
|
13 years |
vboxsync |
Doxygen.
|
|
|
@41783
|
13 years |
vboxsync |
Doxygen, comment typos.
|
|
|
@41774
|
13 years |
vboxsync |
bugref..
|
|
|
@41728
|
13 years |
vboxsync |
DIS: register macro name adjustments - part two.
|
|
|
@40235
|
13 years |
vboxsync |
build fixes.
|
|
|
@40234
|
13 years |
vboxsync |
Optionally present basic hypervisor CPUID leaves.
|
|
|
@40170
|
13 years |
vboxsync |
MSRs and MTRRs, CPUM saved state changed. (linux 2.4.31 seems to …
|
|
|
@40166
|
13 years |
vboxsync |
MSR todo.
|
|
|
@39078
|
13 years |
vboxsync |
VMM: -Wunused-parameter
|
|
|
@39038
|
13 years |
vboxsync |
VMM: -W4 warnings (MSC).
|
|
|
@38816
|
13 years |
vboxsync |
HWSVMR0.cpp: Addendum to r73226 and #5666 - Since we update SS.DPL …
|
|
|
@37136
|
14 years |
vboxsync |
CPUM: Option to set Hypervisor Present bit.
|
|
|
@36861
|
14 years |
vboxsync |
CPUMSetGuestTR: Awww, shut up.
|
|
|
@36762
|
14 years |
vboxsync |
CPUM: CPUMSetGuestGDTR and CPUMSetGuestIDTR should take 64-bit base value.
|
|
|
@36639
|
14 years |
vboxsync |
CPUMIsGuestInRealOrV86Mode and CPUMIsGuestInRealOrV86ModeEx.
|
|
|
@36315
|
14 years |
vboxsync |
VMM: more correct MSR_IA32_MISC_ENABLE emulation
|
|
|
@35346
|
14 years |
vboxsync |
VMM reorg: Moving the public include files from include/VBox to …
|
|
|
@33540
|
14 years |
vboxsync |
*: spelling fixes, thanks Timeless!
|
|
|
@31512
|
14 years |
vboxsync |
CPUMGetGuestCPL: Don't trust ssHid.Attr.n.u2Dpl to hold the CPL when …
|
|
|
@31489
|
14 years |
vboxsync |
CPUMGetGuestCRx,CPUMGetGuestCR8: Do the PDM TPR querying in CPUM …
|
|
|
@31079
|
14 years |
vboxsync |
spaces
|
|
|
@31060
|
14 years |
vboxsync |
spaces
|
|
|
@30889
|
14 years |
vboxsync |
PGM: Cleanups related to pending MMIO/#PF optimizations. Risky.
|
|
|
@30861
|
14 years |
vboxsync |
VMM,REM: Replumbled the MSR updating and reading so that PGM can …
|
|
|
@30263
|
15 years |
vboxsync |
VMM,REM: Only invalidate hidden registers when using raw-mode. Fixes …
|
|
|
@30164
|
15 years |
vboxsync |
CPUM: Added /CPUM/PortableCpuIdLevel={0..3} for automatically …
|
|
|
@30145
|
15 years |
vboxsync |
Preparations for fixing the NXE assumption in the 32/64 switcher.
|
|
|
@29250
|
15 years |
vboxsync |
iprt/asm*.h: split out asm-math.h, don't include asm-*.h from asm.h, …
|
|
|
@28800
|
15 years |
vboxsync |
Automated rebranding to Oracle copyright/license strings via filemuncher
|
|
|
@28030
|
15 years |
vboxsync |
VMM: SpeedStep and relatives MSRs
|
|
|
@27331
|
15 years |
vboxsync |
MSR_IA32_MISC_ENABLE test code
|
|
|
@26993
|
15 years |
vboxsync |
VMM: implement some Nehalem MSRs
|
|
|
@26673
|
15 years |
vboxsync |
faster
|
|
|
@26649
|
15 years |
vboxsync |
CPUM: better cache sharing descriptor - L2 cache is shared amongst all …
|
|
|
@26648
|
15 years |
vboxsync |
CPUM: wrong sharing info on level 2 cache
|
|
|
@26635
|
15 years |
vboxsync |
PAE and AMD64 paging modes support large pages regardless of CR4.PSE.
|
|
|
@26026
|
15 years |
vboxsync |
shut up gcc.
|
|
|
@25866
|
15 years |
vboxsync |
VMM: More micro optimizations.
|
|
|
@25835
|
15 years |
vboxsync |
CPUM,VMM: Avoid calling CPUMGetGuestEFER until it's needed (see defect …
|
|
|
@25815
|
15 years |
vboxsync |
space
|
|
|
@25803
|
15 years |
vboxsync |
VMM: provide reasonable cache info for Intel CPUs in leaf 4 of CPUID
|
|
|
@24953
|
15 years |
vboxsync |
VMM: functional MSR_IA32_PERF_STATUS implementation
|
|
|
@24753
|
15 years |
vboxsync |
VMM: simple MSR_IA32_PERF_STATUS implementation, watch for regression …
|
|
|
@24728
|
15 years |
vboxsync |
CPUM: report L1 cache as data, and provide reasonable linesize
|
|
|
@23794
|
15 years |
vboxsync |
More synthetic cpu work
|
|
|
@22890
|
15 years |
vboxsync |
VM::cCPUs -> VM::cCpus so it matches all the other cCpus and aCpus members.
|
|
|
@22070
|
15 years |
vboxsync |
VMM,ConsoleImpl2: Moved NT4LeafLimit down into /CPUM and documented …
|
|
|
@22037
|
15 years |
vboxsync |
VMM: correct report cores count, also expose more CPUID leaves by default
|
|
|
@21252
|
16 years |
vboxsync |
First attempt to enable hypervisor breakpoints with vt-x/amd-v guests
|
|
|
@19076
|
16 years |
vboxsync |
CPUMGetGuestCpuId needs a pVCpu parameter.
|
|
|
@19075
|
16 years |
vboxsync |
CPUMGetGuestCpuIdStdRCPtr -> R3
|
|
|
@19032
|
16 years |
vboxsync |
Split TM for SMP guests.
|
|
|
@18927
|
16 years |
vboxsync |
Big step to separate VMM data structures for guest SMP. (pgm, em)
|
|
|
@18082
|
16 years |
vboxsync |
recompiler adaption of r44723
|
|
|
@17106
|
16 years |
vboxsync |
VMM,REM: Removed the single page limitation on the TSS monitoring and …
|
|
|
@17035
|
16 years |
vboxsync |
VMM,REM: Brushed up the TR/TSS shadowing. We're now relying on the …
|
|
|
@16859
|
16 years |
vboxsync |
Load hypervisor CR3 from CPUM (instead of hardcoded fixups in the …
|
|
|
@15416
|
16 years |
vboxsync |
CPUM: hybrid 32-bit kernel FPU mess.
|
|
|
@15390
|
16 years |
vboxsync |
X86_CPUID_AMD_FEATURE_EDX_SEP not set it seems in 32 bits mode. (Intel)
|
|
|
@14870
|
16 years |
vboxsync |
Cleaning up.
|
|
|
@14859
|
16 years |
vboxsync |
More updates for 32/64.
|
|
|
@14704
|
16 years |
vboxsync |
Some more switcher work
|
|
|
@14411
|
16 years |
vboxsync |
RDTSCP support added. Enabled only for AMD-V guests.
|
|
|
@13975
|
16 years |
vboxsync |
Even more debugger fixes.
|
|
|
@13960
|
16 years |
vboxsync |
Moved guest and host CPU contexts into per-VCPU array.
|
|
|
@13832
|
16 years |
vboxsync |
IN_GC -> IN_RC.
|
|
|
@13830
|
16 years |
vboxsync |
VMM: Disabled VM:pVMGC, removed VM_GUEST_ADDR.
|
|
|
@13532
|
16 years |
vboxsync |
CPUMQueryGuestCtxPtr doesn't need to return a status. It can never fail.
|
|
|
@12989
|
16 years |
vboxsync |
VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into …
|
|
|
@12972
|
16 years |
vboxsync |
APIC versioning in features interface
|
|
|
@12971
|
16 years |
vboxsync |
x2APIC bits definitions
|
|
|
@12735
|
16 years |
vboxsync |
CPUMGetGuestCPL fix for real mode in VT-x.
|
|
|
@12657
|
16 years |
vboxsync |
#1865: CPUM. Also added missing aliasing for DR4&5 to the guest DRx …
|
|
|
@12600
|
16 years |
vboxsync |
Turned dr0..dr7 into an array.
|
|
|