|
|
@29287
|
15 years |
vboxsync |
Corrected assertion
|
|
|
@28800
|
15 years |
vboxsync |
Automated rebranding to Oracle copyright/license strings via filemuncher
|
|
|
@28563
|
15 years |
vboxsync |
EMMAll: typo
|
|
|
@28030
|
15 years |
vboxsync |
VMM: SpeedStep and relatives MSRs
|
|
|
@27976
|
15 years |
vboxsync |
*: scm cleans up whitespace and adds a new line at the end of …
|
|
|
@27397
|
15 years |
vboxsync |
MSR_IA32_PMCx logging
|
|
|
@27372
|
15 years |
vboxsync |
Unnecessary AssertRCReturn
|
|
|
@27331
|
15 years |
vboxsync |
MSR_IA32_MISC_ENABLE test code
|
|
|
@27320
|
15 years |
vboxsync |
Log MSR_IA32_MISC_ENABLE accesses
|
|
|
@27231
|
15 years |
vboxsync |
Implemented mwait extension for breaking on external interrupt when …
|
|
|
@27129
|
15 years |
vboxsync |
scm cleaned up some whitespace.
|
|
|
@26993
|
15 years |
vboxsync |
VMM: implement some Nehalem MSRs
|
|
|
@26855
|
15 years |
vboxsync |
Introduced EMInterpretInstructionCPUEx to allow user-level instruction …
|
|
|
@26273
|
15 years |
vboxsync |
VMM: more RC/GC warnings.
|
|
|
@26272
|
15 years |
vboxsync |
VMM: more RC/GC warnings.
|
|
|
@26271
|
15 years |
vboxsync |
VMM: warnings. Changed PATMIsPatchGCAddr and CSAMIsKnownDangerousInstr …
|
|
|
@26180
|
15 years |
vboxsync |
*: The rest of the %V* format specifiers are history.
|
|
|
@25863
|
15 years |
vboxsync |
VMMAll/EMAll.cpp: trailing spaces.
|
|
|
@25554
|
15 years |
vboxsync |
trpmGCTrap0dHandler: use EMInterpretDisasOneEx
EMInterpretDisasOneEx: …
|
|
|
@25550
|
15 years |
vboxsync |
Raw mode: deal with invalidated tlb entries during disassembly (long …
|
|
|
@24953
|
15 years |
vboxsync |
VMM: functional MSR_IA32_PERF_STATUS implementation
|
|
|
@24764
|
15 years |
vboxsync |
Handle missing page inconsistency with guest smp (instruction emulation)
|
|
|
@24753
|
15 years |
vboxsync |
VMM: simple MSR_IA32_PERF_STATUS implementation, watch for regression …
|
|
|
@22493
|
15 years |
vboxsync |
VMM,DevPCI,VBox/types.h: Added a VBOXSTRICTRC type for indicating …
|
|
|
@22121
|
15 years |
vboxsync |
VMM: gcc warnings and a todo.
|
|
|
@22037
|
15 years |
vboxsync |
VMM: correct report cores count, also expose more CPUID leaves by default
|
|
|
@21174
|
15 years |
vboxsync |
Preread opcode bytes when disassembling instructions. …
|
|
|
@20682
|
15 years |
vboxsync |
EMAll.cpp: Implemented writing MSR_IA32_TSC.
|
|
|
@20671
|
15 years |
vboxsync |
Bigger lock for the pagefault handler.
Avoid deadlocks when syncing …
|
|
|
@20666
|
15 years |
vboxsync |
Changed PDMApicGet/SetTPR to get/set the full task priority register.
|
|
|
@20588
|
15 years |
vboxsync |
Emulate lock and & lock xor.
|
|
|
@20530
|
15 years |
vboxsync |
VMM: remove DISCPUSTATE from the stack.
|
|
|
@20461
|
15 years |
vboxsync |
More MSR logging
|
|
|
@20408
|
16 years |
vboxsync |
Moved REM locking to VMMAll
|
|
|
@20406
|
16 years |
vboxsync |
Removed obsolete REMR3ReplayInvalidatedPages
|
|
|
@20001
|
16 years |
vboxsync |
Cleaned up PDMGet/SetTPR.
|
|
|
@19992
|
16 years |
vboxsync |
Started with TPR caching for 32 bits guest (VT-x only).
|
|
|
@19808
|
16 years |
vboxsync |
Invalidate is per VCPU.
|
|
|
@19725
|
16 years |
vboxsync |
Logging update
|
|
|
@19693
|
16 years |
vboxsync |
Emulate the mwait instruction with VT-x and AMD-V as well.
|
|
|
@19611
|
16 years |
vboxsync |
Change the EM state to EMSTATE_HALTED after receiving the startup IPI.
|
|
|
@19141
|
16 years |
vboxsync |
Action flags breakup.
Fixed PGM saved state loading of 2.2.2 images. …
|
|
|
@19076
|
16 years |
vboxsync |
CPUMGetGuestCpuId needs a pVCpu parameter.
|
|
|
@19032
|
16 years |
vboxsync |
Split TM for SMP guests.
|
|
|
@19015
|
16 years |
vboxsync |
Split up TRPM. (guest SMP)
|
|
|
@18992
|
16 years |
vboxsync |
More PGM api changes
|
|
|
@18927
|
16 years |
vboxsync |
Big step to separate VMM data structures for guest SMP. (pgm, em)
|
|
|
@18771
|
16 years |
vboxsync |
Wrong condition
|
|
|
@18770
|
16 years |
vboxsync |
Fake rdpmc instead of causing an invalid opcode exception.
|
|
|
@18764
|
16 years |
vboxsync |
Extra logging of Intel performance counter MSR accesses
|
|
|
@18666
|
16 years |
vboxsync |
VMM: Clean out the VBOX_WITH_NEW_PHYS_CODE #ifdefs. (part 2)
|
|
|
@18338
|
16 years |
vboxsync |
EMInterpretDisasOne: return val spec.
|
|
|
@18082
|
16 years |
vboxsync |
recompiler adaption of r44723
|
|
|
@18078
|
16 years |
vboxsync |
VMM: CR6743344: rdmsr(TSC) == rdtsc
|
|
|
@17695
|
16 years |
vboxsync |
Minor emulation changes for VT-x.
|
|
|
@17531
|
16 years |
vboxsync |
emInterpretStosWD: don't use PGMPhysWriteGCPtr but emRamWrite (new …
|
|
|
@17515
|
16 years |
vboxsync |
build fix.
|
|
|
@17510
|
16 years |
vboxsync |
PGM,EM,PDMDevHlp: Added PGMPhysInterpretedReadNoHandlers and …
|
|
|
@17505
|
16 years |
vboxsync |
PGM: MapCR3 hack for the new code, fixing PGMFlushTLB status …
|
|
|
@17106
|
16 years |
vboxsync |
VMM,REM: Removed the single page limitation on the TSS monitoring and …
|
|
|
@15635
|
16 years |
vboxsync |
More logging
|
|
|
@15634
|
16 years |
vboxsync |
Check parameter size correctly (disabled smsw).
|
|
|
@15633
|
16 years |
vboxsync |
Smsw emlution (inactive).
|
|
|
@15632
|
16 years |
vboxsync |
Extra instruction
|
|
|
@15426
|
16 years |
vboxsync |
EMAll: STOSWD - reject REP operations that crossess pages. The shadow …
|
|
|
@15421
|
16 years |
vboxsync |
EMAll: BTS, BTR and BTC looks fine to me for all 32-bit hosts since …
|
|
|
@15420
|
16 years |
vboxsync |
EMAll: ADD, ADC and SUB - the first is used a bit by windows.
|
|
|
@15419
|
16 years |
vboxsync |
EMAll: Corrected PGMVerifyAccess call in the STOSDW emulation to pass …
|
|
|
@15418
|
16 years |
vboxsync |
EMAll: AND, OR and XOR on darwin/R0 - the first two are for vista64.
|
|
|
@15413
|
16 years |
vboxsync |
#3202: CMPXCHG - 64-bit solaris optimziation.
|
|
|
@15412
|
16 years |
vboxsync |
EMAll: Whitelisted XCHG for >4 bytes operations (64-bit ubuntu 8.10 …
|
|
|
@15188
|
16 years |
vboxsync |
Some typos corrected.
|
|
|
@15184
|
16 years |
vboxsync |
typos
|
|
|
@15181
|
16 years |
vboxsync |
Restrict instruction emulation for 64 bits guests on 32 bits hosts.
|
|
|
@15161
|
16 years |
vboxsync |
Backed out accidental commit 40567
|
|
|
@15160
|
16 years |
vboxsync |
Compile fix
|
|
|
@14755
|
16 years |
vboxsync |
#1865: Converted 4 PGM*2HC* conversion functions to RTR3PTR.
|
|
|
@14562
|
16 years |
vboxsync |
Corrected wrong pointer calculation
|
|
|
@14411
|
16 years |
vboxsync |
RDTSCP support added. Enabled only for AMD-V guests.
|
|
|
@14257
|
16 years |
vboxsync |
cpuid clears the high dwords of the 64 bits registers.
|
|
|
@14251
|
16 years |
vboxsync |
Correction
|
|
|
@14249
|
16 years |
vboxsync |
More logging (msr)
|
|
|
@14248
|
16 years |
vboxsync |
Rdmsr must also clear the high dword of 64 bits registers.
|
|
|
@14247
|
16 years |
vboxsync |
Rdtsc: must clear the high dwords.
|
|
|
@14082
|
16 years |
vboxsync |
Must mask off the reference count from the HC physical address
|
|
|
@13832
|
16 years |
vboxsync |
IN_GC -> IN_RC.
|
|
|
@13825
|
16 years |
vboxsync |
VMM: %VX64 -> %RX64
|
|
|
@13823
|
16 years |
vboxsync |
VMM: %VGv -> %RGv
|
|
|
@13822
|
16 years |
vboxsync |
VMM: %VRv -> %RRv
|
|
|
@13820
|
16 years |
vboxsync |
VMM: %VG* inspection - an awfaul lot of these, hope I got it all right…
|
|
|
@13819
|
16 years |
vboxsync |
VMM: %VH* -> %RH*.
|
|
|
@13818
|
16 years |
vboxsync |
VMM: %Vrc -> %Rrc, %Vra -> %Rra.
|
|
|
@13816
|
16 years |
vboxsync |
VMM: VBOX_SUCCESS -> RT_SUCCESS, VBOX_FAILURE -> RT_FAILURE.
|
|
|
@13566
|
16 years |
vboxsync |
EMAll.cpp: doxygen.
|
|
|
@13565
|
16 years |
vboxsync |
#1865: REM (VMM bits) - moved EMFlushREMTBs to REMFlushTBs, deleted …
|
|
|
@13561
|
16 years |
vboxsync |
Emulate (lock) cmpxchg8b in ring 0 & 3. Added testcase for instruction …
|
|
|
@13532
|
16 years |
vboxsync |
CPUMQueryGuestCtxPtr doesn't need to return a status. It can never fail.
|
|
|
@13447
|
16 years |
vboxsync |
Logging change
|
|
|
@13351
|
16 years |
vboxsync |
Fully emulated lmsw.
|
|
|
@13267
|
16 years |
vboxsync |
lmsw: corrected exit path
|
|
|