InstructionTestGen.py

	Rev	Age	Author	Log Message
(edit)	@47286	11 years	vboxsync	32-bit mov fixes.
(edit)	@47139	11 years	vboxsync	iem: Fixed negation of number in two registers.
(edit)	@47138	11 years	vboxsync	IEM: idiv and div missing bits and fixes.
(edit)	@47135	11 years	vboxsync	32bit fixes
(edit)	@47132	11 years	vboxsync	test divide errors (BS2+big.mac).
(edit)	@47047	11 years	vboxsync	Two image BS2 so we can drop the test size restrictions. Rewrite the …
(edit)	@47017	11 years	vboxsync	div and idiv tests (greg only, no mem yet).
(edit)	@46991	11 years	vboxsync	-> weinstadt.
(edit)	@46917	11 years	vboxsync	bs2 + VBoxInsTst hacking.
(edit)	@46906	11 years	vboxsync	variation control…
(edit)	@46894	11 years	vboxsync	New way of varying the three SIB fields. Expected to create better …
(edit)	@46893	11 years	vboxsync	more tedium…
(edit)	@46875	11 years	vboxsync	yeah, finally getting somewhere…
(edit)	@46856	11 years	vboxsync	8-bit high register hell (reg/reg only so far).
(edit)	@46853	11 years	vboxsync	NMI -> laptop.
(edit)	@46771	11 years	vboxsync	SIB hacking in progress.
(edit)	@46746	11 years	vboxsync	REX.B rip encoding (half of them, anyways).
(edit)	@46744	11 years	vboxsync	32-bit memory accesses in 64-bit mode.
(edit)	@46733	11 years	vboxsync	fixes
(edit)	@46731	11 years	vboxsync	calling it a day…
(edit)	@46728	11 years	vboxsync	-> home
(edit)	@46571	11 years	vboxsync	Preps for memory operand tests.
(edit)	@46554	11 years	vboxsync	Test size control, better inputs.
(edit)	@46550	11 years	vboxsync	elf, gcc and 32-bit.
(add)	@46543	11 years	vboxsync	Instruction testing, early hacking.

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