|
|
|
@10110
|
17 years |
vboxsync |
More TPR updates
|
|
|
|
@10108
|
17 years |
vboxsync |
More CR8 updates
|
|
|
|
@10097
|
17 years |
vboxsync |
Derive CPL from cs, not ss.
|
|
|
|
@10095
|
17 years |
vboxsync |
logging change
|
|
|
|
@10066
|
17 years |
vboxsync |
Paranoid assertion
|
|
|
|
@10018
|
17 years |
vboxsync |
Wrong assertion + logging updates
|
|
|
|
@10015
|
17 years |
vboxsync |
Don't forget to sync back MSR_K8_KERNEL_GS_BASE.
|
|
|
|
@10014
|
17 years |
vboxsync |
Filter out the MSR_K6_LME bit or else AMD-V expects amd64 shadow …
|
|
|
|
@10011
|
17 years |
vboxsync |
Compile fix
|
|
|
|
@10010
|
17 years |
vboxsync |
Updates for 64 bits mode (invlpg - amd-v)
|
|
|
|
@9988
|
17 years |
vboxsync |
Unconditionally update the sysenter msrs.
|
|
|
|
@9897
|
17 years |
vboxsync |
Updates for executing 64 bits guest code with AMD-V.
|
|
|
|
@9720
|
17 years |
vboxsync |
Emulate rdmsr & wrmsr.
Note that Intel mentions a (slightly different) …
|
|
|
|
@9718
|
17 years |
vboxsync |
Single instruction emulation for rd/wrmsr
|
|
|
|
@9708
|
17 years |
vboxsync |
Use RIP everywhere
|
|
|
|
@9660
|
17 years |
vboxsync |
Correction
|
|
|
|
@9659
|
17 years |
vboxsync |
SELMGetCpuModeFromSelector is a better name.
|
|
|
|
@9658
|
17 years |
vboxsync |
Renamed SELMIsSelector32Bit to SELMGetSelectorType.
|
|
|
|
@9457
|
17 years |
vboxsync |
Reapplied fixed 31707.
|
|
|
|
@9453
|
17 years |
vboxsync |
Backed out 31707
|
|
|
|
@9452
|
17 years |
vboxsync |
Preparing for 64 bits vmlaunch/vmresume.
|
|
|
|
@9411
|
17 years |
vboxsync |
Use a union for esp & rsp, so they are in-sync.
|
|
|
|
@9407
|
17 years |
vboxsync |
HWACCM updates.
|
|
|
|
@9385
|
17 years |
vboxsync |
Backed out some of the changes. Broke VT-x
|
|
|
|
@9383
|
17 years |
vboxsync |
VT-x/AMD-V updates for 64 bits guests
|
|
|
|
@9212
|
17 years |
vboxsync |
Major changes for sizeof(RTGCPTR) == uint64_t.
Introduced RCPTRTYPE …
|
|
|
|
@9188
|
17 years |
vboxsync |
Same IF fix for halt instructions in VT-x.
|
|
|
|
@9184
|
17 years |
vboxsync |
If CF=0 HLT should never resume.
|
|
|
|
@9125
|
17 years |
vboxsync |
AMD-V: setup PAT guest register for nested paging
|
|
|
|
@9122
|
17 years |
vboxsync |
Logging update
|
|
|
|
@9120
|
17 years |
vboxsync |
Updates
|
|
|
|
@9116
|
17 years |
vboxsync |
Added stat counter for physical page invalidation.
|
|
|
|
@9115
|
17 years |
vboxsync |
HWACCM: Invalidate pages changed by PGMHandlerPhysicalPageTempOff. …
|
|
|
|
@9110
|
17 years |
vboxsync |
Minor update
|
|
|
|
@9092
|
17 years |
vboxsync |
We need a real shadow paging backend for PGMHandlerPhysicalPageTempOff …
|
|
|
|
@9082
|
17 years |
vboxsync |
More statistics
|
|
|
|
@9075
|
17 years |
vboxsync |
Fixed wrong call to TRPMResetTrap
|
|
|
|
@9074
|
17 years |
vboxsync |
Log normal page faults in nested paging mode too (DEBUG only).
|
|
|
|
@9073
|
17 years |
vboxsync |
Updated logging
|
|
|
|
@9064
|
17 years |
vboxsync |
Properly deal with CR3 changes in nested paging mode.
|
|
|
|
@9038
|
17 years |
vboxsync |
Sync back the debug registers too (fixed gdb/dbx weirdness on solaris).
|
|
|
|
@9033
|
17 years |
vboxsync |
Statistics for SVM_EXIT_NPF
|
|
|
|
@9029
|
17 years |
vboxsync |
Removed assertion
|
|
|
|
@9026
|
17 years |
vboxsync |
More updates for nested paging. (setting up the paging mode)
|
|
|
|
@9021
|
17 years |
vboxsync |
Nested paging updates. Extra paging mode added to prevent illegal …
|
|
|
|
@9008
|
17 years |
vboxsync |
Changes for proper flushing of the TLB for physical registration changes.
|
|
|
|
@8965
|
17 years |
vboxsync |
Nested paging updates
|
|
|
|
@8952
|
17 years |
vboxsync |
Nested paging updates
|
|
|
|
@8948
|
17 years |
vboxsync |
Nested paging updates
|
|
|
|
@8945
|
17 years |
vboxsync |
Updated comment
|
|
|
|
@8944
|
17 years |
vboxsync |
Fixed problem with erratum 170 cpus.
|
|
|
|
@8943
|
17 years |
vboxsync |
AMD-V: flush TLB when the flush count for the cpu has changed
AMD-V: …
|
|
|
|
@8941
|
17 years |
vboxsync |
Intercept task switches as well. (they can change CR3)
|
|
|
|
@8914
|
17 years |
vboxsync |
Moved cpu id check around for tlb flushing.
|
|
|
|
@8901
|
17 years |
vboxsync |
Always enable caching
|
|
|
|
@8900
|
17 years |
vboxsync |
Some updates
|
|
|
|
@8881
|
17 years |
vboxsync |
Wrong assertion
|
|
|
|
@8880
|
17 years |
vboxsync |
More logging
|
|
|
|
@8878
|
17 years |
vboxsync |
Don't automatically flush the TLB when we remain on the same cpu (on …
|
|
|
|
@8876
|
17 years |
vboxsync |
ASID based TLB flushing
|
|
|
|
@8871
|
17 years |
vboxsync |
Updated assertion
|
|
|
|
@8870
|
17 years |
vboxsync |
Intercept mwait as well (AMD-V)
|
|
|
|
@8868
|
17 years |
vboxsync |
Base & extended model corrections.
|
|
|
|
@8864
|
17 years |
vboxsync |
Small update
|
|
|
|
@8862
|
17 years |
vboxsync |
Inverted check
|
|
|
|
@8861
|
17 years |
vboxsync |
Don't bother to invalidate pages if a TLB flush is already pending.
|
|
|
|
@8860
|
17 years |
vboxsync |
Some flushing statistics
|
|
|
|
@8855
|
17 years |
vboxsync |
Simplified tlb flushing.
|
|
|
|
@8854
|
17 years |
vboxsync |
Minor updates
|
|
|
|
@8853
|
17 years |
vboxsync |
Manual page invalidation or TLB flush is required for AMD-V.
|
|
|
|
@8848
|
17 years |
vboxsync |
Backed out 30862; redundant
|
|
|
|
@8847
|
17 years |
vboxsync |
On entry always flush the TLB.
|
|
|
|
@8843
|
17 years |
vboxsync |
Correction
|
|
|
|
@8842
|
17 years |
vboxsync |
Wrong assertion
|
|
|
|
@8839
|
17 years |
vboxsync |
Correctly restore IF in SVMVMRun
|
|
|
|
@8815
|
17 years |
vboxsync |
Corrected revision checks for erratum 170.
|
|
|
|
@8809
|
17 years |
vboxsync |
Proper injection of pending interrupts when IF=0, so they get …
|
|
|
|
@8808
|
17 years |
vboxsync |
Correction
|
|
|
|
@8807
|
17 years |
vboxsync |
Unused local variable
|
|
|
|
@8806
|
17 years |
vboxsync |
Determine which AMD cpus are really affected by erratum 170 (forced …
|
|
|
|
@8155
|
17 years |
vboxsync |
The Big Sun Rebranding Header Change
|
|
|
|
@7717
|
17 years |
vboxsync |
Some write protect changes
|
|
|
|
@7496
|
17 years |
vboxsync |
Moved VMCS allocation to ring 0.
|
|
|
|
@7471
|
17 years |
vboxsync |
Rewrote VT-x & AMD-V mode changes. Requires the MP apis in our runtime …
|
|
|
|
@5999
|
17 years |
vboxsync |
The Giant CDDL Dual-License Header Change.
|
|
|
|
@5605
|
17 years |
vboxsync |
BIT => RT_BIT, BIT64 => RT_BIT_64. BIT() is defined in Linux 2.6.24
|
|
|
|
@5447
|
17 years |
vboxsync |
Bugfix for rare cases where a pending interrupt is cleared behind our back
|
|
|
|
@5073
|
17 years |
vboxsync |
Limit the amount of resume loops
|
|
|
|
@4789
|
17 years |
vboxsync |
Also use host OS ioctls to go to ring 0 for hardware virtualization.
|
|
|
|
@4756
|
17 years |
vboxsync |
Translate VERR_EM_INTERPRETER to VINF_EM_RAW_EMULATE_INSTR
|
|
|
|
@4420
|
18 years |
vboxsync |
Force recompiler emulation of string io operations to work around host …
|
|
|
|
@4411
|
18 years |
vboxsync |
Disabled string io operations for ring 0 (hangs/crashes host). Debug …
|
|
|
|
@4071
|
18 years |
vboxsync |
Biggest check-in ever. New source code headers for all (C) innotek files.
|
|
|
|
@3488
|
18 years |
vboxsync |
Put back logging changes.
|
|
|
|
@3486
|
18 years |
vboxsync |
got rid of incorrect assertion
|
|
|
|
@3216
|
18 years |
vboxsync |
Removed incorrect io return code changes.
|
|
|
|
@3197
|
18 years |
vboxsync |
IO handling updates
|
|
|
|
@3184
|
18 years |
vboxsync |
return VINF_EM_RAW_EMULATE_INSTR instead of VINF_EM_RESCHEDULE_REM …
|
|
|
|
@3172
|
18 years |
vboxsync |
compile fix
|
|
|
|
@3171
|
18 years |
vboxsync |
Fixes for bad error code VINF_EM_RESCHEDULE_REM.
|
|
|
|
