|
|
|
@71755
|
7 years |
vboxsync |
VMM: Nested Hw.virt: Fix overriding SVM nested-guest PAT MSR while …
|
|
|
|
@70913
|
7 years |
vboxsync |
CPUM: Infrastructure for speculative execution control.
|
|
|
|
@70612
|
7 years |
vboxsync |
VMM: Expose PCID, INVPCID, FSGSBASE features to guests. Implemented …
|
|
|
|
@70606
|
7 years |
vboxsync |
updates (bugref:9087)
|
|
|
|
@70265
|
7 years |
vboxsync |
x86.h: DebugCtl MSR bits.
|
|
|
|
@70254
|
7 years |
vboxsync |
VMM: Match the AMD specs exactly whenever possible for SVM specific …
|
|
|
|
@69105
|
7 years |
vboxsync |
include/iprt/: (C) year
|
|
|
|
@66883
|
8 years |
vboxsync |
X86XSAVEAREA: Added YmmHi to the union member 'u' as it's normally …
|
|
|
|
@66684
|
8 years |
vboxsync |
SVM: Log additional features on newer CPUs.
|
|
|
|
@66599
|
8 years |
vboxsync |
x86.h,bs2: X86_XCPT_MAX -> X86_XCPT_LAST; Corrected X86_XCPT_SX value.
|
|
|
|
@66581
|
8 years |
vboxsync |
VMM: Nested Hw.virt: Implemented various SVM intercepts in IEM, …
|
|
|
|
@66392
|
8 years |
vboxsync |
x86.h,IEMAll.cpp,bs3-cpu-generated-1: s/X86_MXSCR_/X86_MXCSR_/
|
|
|
|
@66314
|
8 years |
vboxsync |
IEM: Use RTUINT128U instead of uint128_t; started on movsldup Vdq,Wdq.
|
|
|
|
@66227
|
8 years |
vboxsync |
VMM: Nested Hw.virt: Implement SVM VMRUN and #VMEXIT in IEM.
|
|
|
|
@66218
|
8 years |
vboxsync |
x86.h: Added X field to XCR0 flags.
|
|
|
|
@66056
|
8 years |
vboxsync |
x86.h: X86_MODRM_MAKE()
|
|
|
|
@65904
|
8 years |
vboxsync |
VMM: Nested Hw.virt: Started with tweaking the AMD bits and laying the …
|
|
|
|
@65776
|
8 years |
vboxsync |
x86.h,.mac: Fixed harmless X86_OP_PRF_REPNZ/REPZ mixup.
|
|
|
|
@65595
|
8 years |
vboxsync |
Fixed an ancient typo.
|
|
|
|
@64113
|
8 years |
vboxsync |
Added some missing MSRs.
|
|
|
|
@62473
|
8 years |
vboxsync |
(C) 2016
|
|
|
|
@62288
|
8 years |
vboxsync |
x86.h: some BIT values.
|
|
|
|
@61776
|
8 years |
vboxsync |
CPUM,APIC: Per-CPU APIC CPUID feature bit and MSR_IA32_APICBASE GP …
|
|
|
|
@61249
|
9 years |
vboxsync |
iprt/x86.h: Rename MSR to be more inline with inconsistent Intel docs.
|
|
|
|
@61229
|
9 years |
vboxsync |
iprt/x86.h: Added missing global performance counter control MSRs.
|
|
|
|
@61072
|
9 years |
vboxsync |
VMM/APIC: Get rid of a couple of duplicate macros, and added a couple …
|
|
|
|
@60996
|
9 years |
vboxsync |
x86: Added two more CPUID bit definitions.
|
|
|
|
@60677
|
9 years |
vboxsync |
iprt/x86.h: Added X86_PAGE_SIZE and associates aliasing …
|
|
|
|
@60667
|
9 years |
vboxsync |
x86.h: docs
|
|
|
|
@60665
|
9 years |
vboxsync |
VMM,ConsoleImpl2: Added 386 profile, adding IEM code for some obvious …
|
|
|
|
@60313
|
9 years |
vboxsync |
iprt/x86.*: updates
|
|
|
|
@60228
|
9 years |
vboxsync |
asm-amd64-x86.h,*: made ASMInvalidatePage take a flat unsigned pointer …
|
|
|
|
@60087
|
9 years |
vboxsync |
iprt/x86.h: duh!
|
|
|
|
@59988
|
9 years |
vboxsync |
x86.h: x2APIC MSR typo, added range for LVT MSRs.
|
|
|
|
@59965
|
9 years |
vboxsync |
iprt/x86.h,x86.mac: Added X86LAR_F_XXX, regenerated assembly version.
|
|
|
|
@59961
|
9 years |
vboxsync |
iprt/x86.h: RT_BIT -> RT_BIT_32 (for 16-bit compilers).
|
|
|
|
@59897
|
9 years |
vboxsync |
x86.h: Added missing x2APIC MSRs.
|
|
|
|
@59868
|
9 years |
vboxsync |
iprt/x86.h/mac: X86_CPUID_FEATURE_EDX_PAE_BIT
|
|
|
|
@59285
|
9 years |
vboxsync |
iprt/x86.h,*: Drop IntRedirBitmap from X86TSS32 and X86TSS64.
|
|
|
|
@59238
|
9 years |
vboxsync |
iprt/x86.h: Bitfield fix for 16-bit compilers.
|
|
|
|
@59019
|
9 years |
vboxsync |
x86.h: added IA32_SMM_MONITOR_CTL MSR.
|
|
|
|
@58693
|
9 years |
vboxsync |
iprt/x86.h: Converted some unsigned bitfields to uint32_t so the …
|
|
|
|
@57055
|
9 years |
vboxsync |
SUPDrv: Remove the KVM hack, it only affects <= 3.8 linux kernels, …
|
|
|
|
@57051
|
9 years |
vboxsync |
VMM, SUPDrv: More fine-grained error codes and checking, corrected …
|
|
|
|
@56514
|
9 years |
vboxsync |
VMM/DBGF: Dump guest core with a more standardized CPU dump including …
|
|
|
|
@56291
|
9 years |
vboxsync |
include: Updated (C) year.
|
|
|
|
@55690
|
10 years |
vboxsync |
x86.h: PKE
|
|
|
|
@55456
|
10 years |
vboxsync |
CPUM: Dump supported extra state in the verbose edition of 'cpumguest' …
|
|
|
|
@55048
|
10 years |
vboxsync |
VMM,REM: Allocate the FPU/SSE/AVX/FUTURE state stuff. We need to use …
|
|
|
|
@54898
|
10 years |
vboxsync |
CPUMCTX,CPUMHOST: Replaced the fpu (X86FXSAVE) member with an XState …
|
|
|
|
@54896
|
10 years |
vboxsync |
x86.h,VMM: XSAVE structures.
|
|
|
|
@54894
|
10 years |
vboxsync |
VMM: Expose some of the recent AMD instruction set extensions to the …
|
|
|
|
@54893
|
10 years |
vboxsync |
typo - X86_MXSCR_MM is bit 17 according to figure 4-2 in APM1 v3.20.
|
|
|
|
@54892
|
10 years |
vboxsync |
typo
|
|
|
|
@54887
|
10 years |
vboxsync |
CPUM: Enable a bunch of recent instruction extensions for VMs which …
|
|
|
|
@54862
|
10 years |
vboxsync |
Corrected x86.h/mac typo.
|
|
|
|
@54738
|
10 years |
vboxsync |
VMM,REM: CPUID revamp - almost there now.
|
|
|
|
@53630
|
10 years |
vboxsync |
dtrace library fixes/hacks.
|
|
|
|
@53194
|
10 years |
vboxsync |
doc nit
|
|
|
|
@53192
|
10 years |
vboxsync |
iprt/x86.h: comment typo.
|
|
|
|
@53191
|
10 years |
vboxsync |
iprt/x86.h: comment typos.
|
|
|
|
@53187
|
10 years |
vboxsync |
x86.h: Found some documentation of DR7 bits 12, 14 and 15. Tentatively …
|
|
|
|
@52778
|
10 years |
vboxsync |
iprt/x86.h: add EFER.TCE bit.
|
|
|
|
@52466
|
10 years |
vboxsync |
VMM: Nit for r95680.
|
|
|
|
@52465
|
10 years |
vboxsync |
VMM: Fix IEM FXSAVE implementation to match the logic in HM/raw-mode …
|
|
|
|
@51182
|
11 years |
vboxsync |
VMM/IEM: Implemented hardware task-switches, code path disabled.
|
|
|
|
@50971
|
11 years |
vboxsync |
iprt/x86.h: Minimum TSS descriptor limit value.
|
|
|
|
@50765
|
11 years |
vboxsync |
include/iprt, Runtime/common: Added defines for newer Intel CPU …
|
|
|
|
@50255
|
11 years |
vboxsync |
VMM: two undocumented CPUID bits
|
|
|
|
@49893
|
11 years |
vboxsync |
MSR rewrite: initial hacking - half disabled.
|
|
|
|
@49731
|
11 years |
vboxsync |
FPU save/restore experiment.
|
|
|
|
@49417
|
11 years |
vboxsync |
typo.
|
|
|
|
@49391
|
11 years |
vboxsync |
iprt/x86.h: Added X86_IS_CANONICAL.
|
|
|
|
@49083
|
11 years |
vboxsync |
x86.h: Added ECX feature F16C (valid on both Intel and AMD).
|
|
|
|
@48698
|
11 years |
vboxsync |
typo
|
|
|
|
@48695
|
11 years |
vboxsync |
CPUM: MSR_CORE_THREAD_COUNT and MSR_FLEX_RATIO for snow leopard.
|
|
|
|
@48368
|
11 years |
vboxsync |
Implement MSR_PKG_CST_CONFIG_CONTROL for mac os x.
|
|
|
|
@48357
|
11 years |
vboxsync |
The intel_pstate Linux driver depends on these two MSRs
|
|
|
|
@48284
|
11 years |
vboxsync |
VMM/HMVMXR0: Avoid calling PGM twice for reading just 4 consecutive bytes.
|
|
|
|
@48267
|
11 years |
vboxsync |
VMM: Allow VT-x to be used in SMX mode, more granular error checking.
|
|
|
|
@48151
|
11 years |
vboxsync |
Netware 6 is reading MSR_P4_LASTBRANCH_0 (0x1db).
|
|
|
|
@48143
|
11 years |
vboxsync |
x86.h: some new MSRs. _BIT defines for some EFLAGS.
|
|
|
|
@48120
|
11 years |
vboxsync |
Another intel MSR.
|
|
|
|
@48119
|
11 years |
vboxsync |
Another intel MSR.
|
|
|
|
@48066
|
11 years |
vboxsync |
CPUM: Fake MSR_IA32_MCG_STATUS reads. Corrected MSR names, IA32_MCP …
|
|
|
|
@47996
|
11 years |
vboxsync |
More MSRs fixes on AMD64. MSR_K8_NB_CFG is for recent linux kernels …
|
|
|
|
@47988
|
11 years |
vboxsync |
Solaris reads MSR_RAPL_POWER_UNIT, give it some fake values.
|
|
|
|
@47942
|
11 years |
vboxsync |
CPUM: Ignore MSR_K8_INT_PENDING access.
|
|
|
|
@47839
|
11 years |
vboxsync |
x86.h: APICBASE fields.
|
|
|
|
@47738
|
11 years |
vboxsync |
x86.h: Corrected X86DESCATTR_P definition (shifted left by 4 bits by …
|
|
|
|
@47667
|
11 years |
vboxsync |
x86.h: A couple of DR7 macros.
|
|
|
|
@47660
|
11 years |
vboxsync |
VMM: Debug register handling redo. (only partly tested on AMD-V so far.)
|
|
|
|
@47547
|
11 years |
vboxsync |
x86.h: Added X86_EFL_LIVE_MASK and X86_EFL_RA1_MASK.
|
|
|
|
@47432
|
11 years |
vboxsync |
HMR0VMX.cpp: Attempt to fix incorrect DR7 and DR[0-3] checks in I/O …
|
|
|
|
@47406
|
11 years |
vboxsync |
x86.h: Added MSXCR macros.
|
|
|
|
@47381
|
11 years |
vboxsync |
keep within 130 columns.
|
|
|
|
@47328
|
11 years |
vboxsync |
CPUM,++: Fix DR6 and DR7 read-as-1 (RA1) and read-as-zero (RAZ) values …
|
|
|
|
@47305
|
11 years |
vboxsync |
x86.h/mac: opcode prefixes.
|
|
|
|
@47267
|
11 years |
vboxsync |
Regenerate assembly headers, added TSSes to x86extra.mac.
|
|
|
|
@47247
|
11 years |
vboxsync |
HMVMX: preserve SS.DPL and CS.L/D/G when the 'unusable' bit is set. …
|
|
|
|
