|
|
|
@106791
|
3 months |
vboxsync |
Disassembler: Decode Advanced SIMD load/store multiple structures …
|
|
|
|
@106770
|
3 months |
vboxsync |
Disassembler: Decode load/store memory tags instructions, bugref:10394
|
|
|
|
@106758
|
3 months |
vboxsync |
Disassembler: Decode ldraa/ldrab instructions, bugref:10394
|
|
|
|
@106754
|
3 months |
vboxsync |
Disassembler: Decode SIMD ldnp/stnp (no allocate register pair) …
|
|
|
|
@106746
|
3 months |
vboxsync |
Disassembler: Decode SIMD ldr/str instructions, bugref:10394
|
|
|
|
@106739
|
3 months |
vboxsync |
Disassembler: Decode more barrier and addg/subg instructions, bugref:10394
|
|
|
|
@106649
|
3 months |
vboxsync |
Disassembler: Decode more branch instructions, change the opcode table …
|
|
|
|
@106626
|
3 months |
vboxsync |
Disassembler: Re-arrange the ARMv8 tables to allow for multiple …
|
|
|
|
@106618
|
3 months |
vboxsync |
Disassembler: Get rid of fClass member and convert the only real use …
|
|
|
|
@106616
|
3 months |
vboxsync |
Disassembler: Fix decoding instructions which take sp as a register …
|
|
|
|
@106004
|
4 months |
vboxsync |
Disassembler/ArmV8: Updates and start on floating point and SIMD …
|
|
|
|
@105858
|
5 months |
vboxsync |
Disassembler/ARMv8: Implement decoding of the ldr/str …
|
|
|
|
@105857
|
5 months |
vboxsync |
Disassembler/ARMv8: Implement decoding of the ldr/str (unscaled …
|
|
|
|
@105848
|
5 months |
vboxsync |
Disassembler/ARMv8: Support disassembling the load/store register …
|
|
|
|
@105830
|
5 months |
vboxsync |
Disassembler/ARMv8: Implement decoding of the ldp/stp unsigned variant …
|
|
|
|
@105815
|
5 months |
vboxsync |
Disassembler/ARMv8: Started decoding more ldr/str instruction …
|
|
|
|
@105808
|
5 months |
vboxsync |
Disassembler/ARMv8: Rework the disassembler tables to allow for an …
|
|
|
|
@105807
|
5 months |
vboxsync |
Disassembler/ARMv8: Rename DIS_ARMV8_INSN_PARAM_CREATE -> …
|
|
|
|
@105806
|
5 months |
vboxsync |
Disassembler/ARMv8: Rework the disassembler tables to allow for an …
|
|
|
|
@105789
|
5 months |
vboxsync |
Disassembler/ARMv8: Move the mask bits from the opcode into the class …
|
|
|
|
@105785
|
5 months |
vboxsync |
Disassembler/ARMv8: Updates, decode basic ldr/str (unsigned with …
|
|
|
|
@105779
|
5 months |
vboxsync |
Disassembler/ARMv8: Updates, decode more instructions, add them to the …
|
|
|
|
@105731
|
5 months |
vboxsync |
Disassembler/ARMv8: Refactoring and updates, among others make it …
|
|
|
|
@100046
|
20 months |
vboxsync |
Disassembler: Some updates to the ARMv8 disassembler lying around, …
|
|
|
|
@99334
|
22 months |
vboxsync |
Diassembler: Updates to the ARMv8 disassembler, bugref:10394
|
|
|
|
@99320
|
22 months |
vboxsync |
Disassember: Continue work on the ARMv8 disassember, defining the …
|
|
|
|
@99319
|
22 months |
vboxsync |
Disassember: Continue work on the ARMv8 disassember, defining the …
|
|
|
|
@99241
|
22 months |
vboxsync |
Disassembler: ARMv8 skeleton, bugref:10394
|
