|
|
@15144
|
16 years |
vboxsync |
Oops
|
|
|
@15142
|
16 years |
vboxsync |
Compile fixes
|
|
|
@15141
|
16 years |
vboxsync |
Cleaned up
|
|
|
@15072
|
16 years |
vboxsync |
Compile fixes
|
|
|
@15071
|
16 years |
vboxsync |
Deal with 64 bits address flushes in 32 bits host mode. (flush the …
|
|
|
@15031
|
16 years |
vboxsync |
Switcher updates
|
|
|
@15017
|
16 years |
vboxsync |
More detailed statistics for CRx accesses.
|
|
|
@14993
|
16 years |
vboxsync |
Switcher updates
|
|
|
@14945
|
16 years |
vboxsync |
Manual disassembly of ins/outs. Take two.
|
|
|
@14943
|
16 years |
vboxsync |
Disassemble ins/outs manually to deal with segment prefixes.
|
|
|
@14875
|
16 years |
vboxsync |
More switcher updates
|
|
|
@14862
|
16 years |
vboxsync |
Compile fix
|
|
|
@14859
|
16 years |
vboxsync |
More updates for 32/64.
|
|
|
@14580
|
16 years |
vboxsync |
Some updates
|
|
|
@14530
|
16 years |
vboxsync |
More error logging
|
|
|
@14416
|
16 years |
vboxsync |
Argh
|
|
|
@14415
|
16 years |
vboxsync |
Corrected assertion
|
|
|
@14414
|
16 years |
vboxsync |
Wrong control for rdtscp intercept.
|
|
|
@14411
|
16 years |
vboxsync |
RDTSCP support added. Enabled only for AMD-V guests.
|
|
|
@14366
|
16 years |
vboxsync |
Cleaned up some more.
|
|
|
@14364
|
16 years |
vboxsync |
Preparations
|
|
|
@14109
|
16 years |
vboxsync |
Implemented NMI injection.
|
|
|
@13960
|
16 years |
vboxsync |
Moved guest and host CPU contexts into per-VCPU array.
|
|
|
@13905
|
16 years |
vboxsync |
Moved more data.
|
|
|
@13898
|
16 years |
vboxsync |
Moved more data to VMCPU.
|
|
|
@13883
|
16 years |
vboxsync |
Moved more data around.
|
|
|
@13879
|
16 years |
vboxsync |
SMP updates for VT-x/AMD-V.
|
|
|
@13873
|
16 years |
vboxsync |
Updates
|
|
|
@13872
|
16 years |
vboxsync |
Pass the VMCPU id on to all hwaccm functions.
|
|
|
@13825
|
16 years |
vboxsync |
VMM: %VX64 -> %RX64
|
|
|
@13824
|
16 years |
vboxsync |
VMM: %VGp -> %RGp
|
|
|
@13823
|
16 years |
vboxsync |
VMM: %VGv -> %RGv
|
|
|
@13820
|
16 years |
vboxsync |
VMM: %VG* inspection - an awfaul lot of these, hope I got it all right…
|
|
|
@13818
|
16 years |
vboxsync |
VMM: %Vrc -> %Rrc, %Vra -> %Rra.
|
|
|
@13816
|
16 years |
vboxsync |
VMM: VBOX_SUCCESS -> RT_SUCCESS, VBOX_FAILURE -> RT_FAILURE.
|
|
|
@13541
|
16 years |
vboxsync |
Paranoid assertions
|
|
|
@13514
|
16 years |
vboxsync |
Enabled power notification callbacks to disable VT-x/AMD-V before …
|
|
|
@13252
|
16 years |
vboxsync |
Obsolete comment
|
|
|
@13251
|
16 years |
vboxsync |
Stats for forced TLB flushes by physical page invalidation.
|
|
|
@13250
|
16 years |
vboxsync |
AMD-V/nested paging: invlpga only invalidates TLB entries for guest …
|
|
|
@13089
|
16 years |
vboxsync |
EPT updates
|
|
|
@13025
|
16 years |
vboxsync |
Updates for EPT.
|
|
|
@12989
|
16 years |
vboxsync |
VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into …
|
|
|
@12795
|
16 years |
vboxsync |
HWACCM: fixed unsigned/signed compare warning (x86.h), use const and g_.
|
|
|
@12708
|
16 years |
vboxsync |
Comments added
|
|
|
@12702
|
16 years |
vboxsync |
#1865: HWACCM - alignment fix+check for 32-bit gcc, doxygen.
|
|
|
@12692
|
16 years |
vboxsync |
Backed out paging changes (36990/86/83).
|
|
|
@12681
|
16 years |
vboxsync |
Updates for real and protected mode without paging shadow mode.
|
|
|
@12674
|
16 years |
vboxsync |
Off by one.
|
|
|
@12664
|
16 years |
vboxsync |
IO breakpoint length implies an io range.
|
|
|
@12625
|
16 years |
vboxsync |
IO breakpoints triggered after the fact.
|
|
|
@12610
|
16 years |
vboxsync |
Extra statistics for IO debug breakpoint checking.
|
|
|
@12609
|
16 years |
vboxsync |
IO breakpoint support for VT-x and AMD-V.
|
|
|
@12600
|
16 years |
vboxsync |
Turned dr0..dr7 into an array.
|
|
|
@12578
|
16 years |
vboxsync |
Enable hardware breakpoint support for VT-x and AMD-V.
|
|
|
@12554
|
16 years |
vboxsync |
Some debug register statistics added.
|
|
|
@12549
|
16 years |
vboxsync |
VMM: Implemented a TSC mode where it's tied to execution and halt …
|
|
|
@12350
|
16 years |
vboxsync |
Cleaned up a bit.
|
|
|
@12122
|
16 years |
vboxsync |
Fixed regression for AMD-V cpus with erratum 170.
|
|
|
@12121
|
16 years |
vboxsync |
Committed hardware breakpoint support for VT-x and AMD-V. Untested and …
|
|
|
@12091
|
16 years |
vboxsync |
Debug register support updates
|
|
|
@12090
|
16 years |
vboxsync |
Started with hardware debug register support.
Fixed out of sync …
|
|
|
@12077
|
16 years |
vboxsync |
Adjusted assertions.
|
|
|
@11575
|
16 years |
vboxsync |
Sync back CR2 as it can be changed behind our back in the nested …
|
|
|
@11568
|
16 years |
vboxsync |
Cleanup
|
|
|
@11474
|
16 years |
vboxsync |
AMD-V: Corrected current asid handling. (multiple VMs could end up …
|
|
|
@10886
|
16 years |
vboxsync |
Fixes for syncing back sysenter MSRs.
|
|
|
@10683
|
16 years |
vboxsync |
Backed out 33399; must save the host context on entry due to long …
|
|
|
@10682
|
16 years |
vboxsync |
Saving of the host state is done correctly already for VT-x. (not …
|
|
|
@10667
|
16 years |
vboxsync |
Sync back TPR if necessary.
|
|
|
@10661
|
16 years |
vboxsync |
Reduce the number of world switches caused by cr8 writes by checking …
|
|
|
@10647
|
16 years |
vboxsync |
Manual saving of XMM registers.
Use new FPU/MMX/XMM state saving for …
|
|
|
@10609
|
16 years |
vboxsync |
Check for unexpected rescheduling.
|
|
|
@10607
|
16 years |
vboxsync |
Guest state loading and host state saving *must* be done after TPR …
|
|
|
@10572
|
16 years |
vboxsync |
Use NIL_RTR0MEMOBJ and ASMMemZeroPage.
|
|
|
@10566
|
16 years |
vboxsync |
Comment
|
|
|
@10542
|
16 years |
vboxsync |
Go directly to the halted state when encountering a hlt instruction …
|
|
|
@10537
|
16 years |
vboxsync |
Updated HWACCMDumpRegs
|
|
|
@10509
|
16 years |
vboxsync |
And again
|
|
|
@10508
|
16 years |
vboxsync |
Stupid compiler
|
|
|
@10506
|
16 years |
vboxsync |
Assertion
|
|
|
@10505
|
16 years |
vboxsync |
Easier to grep for
|
|
|
@10504
|
16 years |
vboxsync |
Don't violate my own rules…
|
|
|
@10503
|
16 years |
vboxsync |
More logging
|
|
|
@10502
|
16 years |
vboxsync |
Take precautions for being rescheduled to a different cpu due to long …
|
|
|
@10500
|
16 years |
vboxsync |
Clarified comment
|
|
|
@10499
|
16 years |
vboxsync |
Another paranoid assertion.
|
|
|
@10498
|
16 years |
vboxsync |
Added warning
|
|
|
@10497
|
16 years |
vboxsync |
Another edge case where we need to flush the TLB.
|
|
|
@10491
|
16 years |
vboxsync |
Logging
|
|
|
@10489
|
16 years |
vboxsync |
AMD-V: Always flush the TLB the first time a cpu is used.
|
|
|
@10480
|
16 years |
vboxsync |
Must monitor CR8 writes. (for now)
|
|
|
@10458
|
16 years |
vboxsync |
TPR & interrupt dispatch updates.
|
|
|
@10354
|
16 years |
vboxsync |
Extra assertion
|
|
|
@10353
|
16 years |
vboxsync |
TPR caching for VT-x. Removed the CR8 register from CPUMCTX.
|
|
|
@10331
|
16 years |
vboxsync |
Removed the assertion completely.
|
|
|
@10330
|
16 years |
vboxsync |
Wrong assertion. Due to ring 3 far jumps the assertion condition can …
|
|
|
@10299
|
16 years |
vboxsync |
Force a TLB flush on a mode switch too.
|
|
|
@10297
|
16 years |
vboxsync |
More assertions.
|
|
|
@10269
|
16 years |
vboxsync |
Logging updates
|
|
|